CN102314530A - Novel interactive type hierarchical short circuit tracing and dynamic debugging method - Google Patents

Novel interactive type hierarchical short circuit tracing and dynamic debugging method Download PDF

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Publication number
CN102314530A
CN102314530A CN2010102230353A CN201010223035A CN102314530A CN 102314530 A CN102314530 A CN 102314530A CN 2010102230353 A CN2010102230353 A CN 2010102230353A CN 201010223035 A CN201010223035 A CN 201010223035A CN 102314530 A CN102314530 A CN 102314530A
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short circuit
key point
path
graph
gauzes
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CN102314530B (en
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谢光益
王勇
李启宏
李志雄
王彦威
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Beijing Empyrean Technology Co Ltd
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Beijing CEC Huada Electronic Design Co Ltd
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Abstract

The invention discloses a novel interactive type hierarchical short circuit tracing and dynamic debugging method. Track short refers to the operation used for interactive type short circuit tracing in a layout design, wherein a user selects a graph respectively from two wire meshes according to the two determined wire meshes and searches all graphs connected to the selected graph, and simultaneously, a shortest path between the two wire meshes is displayed. Because the wire meshes are anfractuous and a key point giving rise to wire mesh short circuit is difficult to recognize, a dynamic debugging method is proposed for locating the key point, wherein in a dynamic debugging stage, a trial-and-error method is proposed to search the graph of a current short circuit key point, the graph is virtually deleted in the layout, the virtually deleted graph is virtually reset back to the original layout, and the like; and accordingly, by means of repeated operations of virtually deleting and virtually resetting back, the key point giving rise to the current short circuit can be accurately located, furthermore, break operation provided in the invention can be used for actually deleting the key point giving rise to the short circuit from the layout. By means of the seamless transition operation, the efficiency of the Track short can be effectively increased.

Description

A kind of new interactive level short circuit tracking and dynamic modulation
Technical field
Trace short be in the IC cad tools in the layout design process check circuit whether have the operation a kind of commonly used of short circuit.The invention belongs to layout design field in the IC cad tools.
Background technology
The later stage of integrated circuit (IC) design comprises layout design and layout verification, and these two functions are the important steps in the eda tool; Because number of devices is big in the integrated circuit; The IO port line is intricate, and the layout that in the layout design process, draws usually can cause short circuit condition to take place in the line process, normally after waiting for the layout design completion, carries out layout verification; In the layout verification process, search and revise the connectivity mistake; Revise domain and can expend bigger cost when finding to violate design wrong this moment, because this moment, the laying out pattern structure formed; Revising connection error possibly need the adjustment laying out pattern, even need design again some unit module.Therefore when layout editing, provide Trace short function can in editing process, find to reduce the design iteration number of times by most Miswire, quicken layout design efficient.
For a function element of editing, its IO port has only limited several gauze.When the function element line is accomplished, need its IO port of inspection whether correctly to connect.When carrying out Trace short, check at first whether two gauzes for appointment exist short circuit.If have short circuit between two gauzes, then need find out the key point that there is short circuit in it, key point is edited, make no longer to exist till the short circuit.Therefore cross in the process of searching key point at this, because gauze itself is intricate, there are many branches in its inside, and these components are not necessarily to exist the key point of short circuit, need provide this moment a kind of strategy to find its key point.Therefore provide a kind of dynamic modulation to find its short circuit key point just to seem particularly important.
The iterations that in the layout editing process, provides this short circuit tracking and dynamic modulation can effectively reduce layout design and layout verification quickens layout design efficient.Therefore, this is a job that helps quickening the IC design later stage.
Summary of the invention
The present invention proposes the method for a kind of new short circuit tracking and dynamic debugging, and this new short circuit tracking and dynamic modulation are supported the level domain.It can carry out real-time virtual debugging to the result who follows the tracks of; Figure to virtual disconnection in the debug process carries out record; And can be put by the node figure of virtual disconnection and to be got back in the domain; When debugging is accomplished, can support the direct short-circuit opening operation, need carry out script in the operation that a plurality of operations are integrated in a seamless connection like this, make in the layout design process search and to revise connection error more convenient.
Figure BSA00000181922400011
basic thought: the figure of selecting two gauzes at first successively.If two gauzes do not exist short circuit, then EO; If there is short circuit in two gauzes of current selection, then show a paths the shortest in current two gauzes.Get into the debug phase this moment, in debug process, need break off processing through one or more key points that trial method is found out in the critical path of two gauzes.At first select a figure in the current path, selecteed figure this moment virtual cancel from domain falls.If this moment, also there were other paths in two gauzes, need continue that then current path is carried out virtual disconnection and handle, till no longer having the path that is communicated with between two gauzes.In virtual disconnection process,, then can put the figure of these mistake deletions again and get back in the domain if find that the figure of virtual cancel is not the key point of short circuit from domain.Through repeatable operation in this process, thereby the short circuit of finding final key point to carry out on the actual physics is interrupted.
Description of drawings
The domain annexation that defines in Fig. 1 technical papers
Fig. 2 selects the short circuit figure that occurs behind two gauzes
Short circuit figure after node of the virtual disconnection of Fig. 3
Short circuit figure after two nodes of the virtual disconnection of Fig. 4
Short circuit figure after the virtual disconnected node of Fig. 5 is returned and put
Short circuit figure after the virtual disconnection key point of Fig. 6
Fig. 7 carries out break and breaks off after the short circuit figure as a result
The practical implementation step:
The domain annexation depends on the given description of technical papers.Like Fig. 1) the device annexation is described in the technical papers.In conjunction with following the tracks of short circuit and dynamic modulation in the concrete instance explanation layout editing, the operating process step is following:
1) at first selects a figure in first gauze;
2) secondly select a figure in second gauze.If there is not short circuit in two gauzes, then search operation finishes; Otherwise entering step 3);
3) all figures that are connected between two figures internal record step 1) and 2) selecting, and show current two shortest paths of selecting between the figures, shown in Fig. 2 red display, get into the debug phase simultaneously.
4) get into the debug phase.In debug process, select segment1 as shown in Figure 3 in the red display path, then segment1 is by virtual cancel; Need this moment in the internal data of record, to search annexation again; Discovery still has annexation to exist, and then shows the short circuit paths that it is new, shown in Fig. 3 red display.Select segment2 as shown in Figure 4 in the red display path, then segment2 is needed in the internal data of record, search annexation again by virtual cancel at this moment, searches and finds not have the annexation existence this moment; Get into step 5).
5) carry out virtual UNDO operation.In the virtual debug process of step 4), not segment1 and segment2 through relatively finding its key point, return segment1 and segment2 and put in the domain this moment, as shown in Figure 5, and demonstration is still identical with initial lookup result at this moment.Through comparison and analysis discovery repeatedly; Segment3 as shown in Figure 6 is the critical path that there is short circuit in current gauze in the red display path; Select segment3; Then segment3 is by virtual cancel, and search annexation again this moment in the internal data of record, searches and finds that no annexation exists.Cause on this figure when finding current short circuit through analyzing.Dynamic debugging this moment finishes.Get into step 6).
6) carry out opening operation, only need this moment execution on the interface, to carry out the break operation and get final product.The Break operation is carried out and from the domain of reality, is deleted the figure that is shown as segment3, this EO simultaneously.

Claims (3)

1. new interactive level short circuit tracking and dynamic modulation are mainly concerned with and are selecting to search a short circuit between two gauzes, and dynamic debugging is carried out in the short circuit of searching.Its characteristic is following:
(1) figure of first gauze of selection;
(2) figure of second gauze of selection;
(3) carry out path according to two figures selecting and connect, have the path of UNICOM, internal record and all figures of selecting figure to be connected, shortest path of high bright demonstration, and get into the debug phase.Debug phase is used the notion of virtual interruption, and the figure of in debug process, selecting virtual cancel from actual domain falls.Virtual cancel is selected behind the figure figure according to initial two gauzes selecting to carry out path again to connect, if still there is short circuit, then need continue short circuit is debugged again.
(4) figure of discovery virtual cancel is not the key point that causes two gauze short circuits in debug process, then need be put back into the figure of virtual cancel in the former domain.
(5) after the figure of virtual cancel is put back in the former domain, can carry out the inspection of short circuit connectivity this moment automatically.
(6) carry out the operation of (4)~(5) repeatedly, till there is not path in two gauzes.
(7) when no longer there is path in two gauzes, then carry out the break operation.This moment this trace short EO.
2. the combination that requires protection to have characteristic 1,2,3;
3. the combination that requires protection to have characteristic 3,4,5,6;
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106841889A (en) * 2016-11-24 2017-06-13 深圳市燕麦科技股份有限公司 A kind of short-circuit open test method and system
CN109858166A (en) * 2019-02-13 2019-06-07 北京芯愿景软件技术有限公司 A kind of dynamic complex figure

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1521622A (en) * 2003-01-29 2004-08-18 上海芯华微电子有限公司 Recognition method for artwork of integrated circuit
CN1521830A (en) * 2003-02-12 2004-08-18 上海芯华微电子有限公司 Technical method for integrated circuit design, test and measurement integration
CN101593222A (en) * 2008-05-28 2009-12-02 北京华大九天软件有限公司 A kind of method that realizes that density is checked in the layout verification

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1521622A (en) * 2003-01-29 2004-08-18 上海芯华微电子有限公司 Recognition method for artwork of integrated circuit
CN1521830A (en) * 2003-02-12 2004-08-18 上海芯华微电子有限公司 Technical method for integrated circuit design, test and measurement integration
CN101593222A (en) * 2008-05-28 2009-12-02 北京华大九天软件有限公司 A kind of method that realizes that density is checked in the layout verification

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106841889A (en) * 2016-11-24 2017-06-13 深圳市燕麦科技股份有限公司 A kind of short-circuit open test method and system
CN109858166A (en) * 2019-02-13 2019-06-07 北京芯愿景软件技术有限公司 A kind of dynamic complex figure

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