CN101593222A - A kind of method that realizes that density is checked in the layout verification - Google Patents
A kind of method that realizes that density is checked in the layout verification Download PDFInfo
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- CN101593222A CN101593222A CNA2008101131230A CN200810113123A CN101593222A CN 101593222 A CN101593222 A CN 101593222A CN A2008101131230 A CNA2008101131230 A CN A2008101131230A CN 200810113123 A CN200810113123 A CN 200810113123A CN 101593222 A CN101593222 A CN 101593222A
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Abstract
The present invention relates to the method that density is checked in a kind of quick realization layout verification, belong to layout verification field in the IC cad tools.The density inspection is a kind of graphic operation in the DRC (DRC) in the IC cad tools layout verification.The basic meaning of density inspection is area shared number percent in total region area of checking a certain layer pattern.Area calculated just effective when the figure of some density inspection requirements computation layer was positioned at another one contrast graph layer inside.Its describing mode is: Density is calculated graph layer Inside of contrast graph layer.Under this condition, density calculation realizes that difficulty is big.The present invention proposes at the density of above-mentioned condition and check implementation method, can improve the counting yield that the density inspection has contrast layer greatly.
Description
Technical field
The density inspection is a kind of graphic operation in the DRC (DRC) in the layout verification in the IC cad tools.The invention belongs to layout verification field in the IC cad tools.
Background technology
The later stage of integrated circuit (IC) design comprises layout design and layout verification, and these two functions are the important steps in the eda tool; Layout verification is according to the logical relation of layout design rules, electricity rule and original input layout design to be carried out accuracy verification and can be by to circuit and Parameter Extraction, the input file that produces breadboardin carries out the back simulation, with further inspection electric property.
The density inspection is a kind of common inspection in the DRC in the layout verification (DRC), and its basic meaning is area shared number percent in total region area of checking a certain layer pattern.When this inspection does not have other restrictive condition, realize fairly simple.But some density inspection requirements increases some subsidiary condition when reference area, more typical condition be the figure of requirement computation layer be positioned at another one contrast graph layer when inner area calculate just effectively, its describing mode is:
Density is calculated graph layer Inside of contrast graph layer
Under this condition, density calculation realizes that difficulty is big.The present invention proposes at the density of above-mentioned condition and check implementation method, can improve the counting yield that the density inspection has contrast layer (Density Inside of Layer) greatly.
Suppose according to general implementation method have the performing step of contrast layer to be in the density inspection:
1, forms the figure of contrast layer;
2, the figure of each contrast layer is done circulation, execution in step 3,4,5,6,7;
3, scan domain from left to right, seek the public part of figure of being calculated graph layer and contrast graph layer, promptly calculate the result of two layer patterns " logical and ";
4, with the result of step 3 as new input layer, the molecule of its area as bulk density adds up;
5, calculate the area of current contrast graph layer figure frame, with its denominator as bulk density;
6, ratio calculated;
7, judge whether to meet constraint, obtain meeting expected result, exported.
The drawback of this implementation method is that the situation of practical application contrasts the figure huge amount of graph layer often, because the rechecking that need repeatedly circulate, so counting yield is not high.
For example, suppose that by the figure number of calculating graph layer be 100,000, the figure number of contrast graph layer is 100,000, adopts said method, needs inspection 100,000 x 100,000=10,000,000,000 time figures altogether, and calculated amount is very huge, and efficient is too low.
In order to address the above problem, the present invention proposes a kind of implementation method efficiently.
Summary of the invention
The present invention is directed in the layout verification density inspection has contrast layer (Density Inside Layer) conventional method and need carry out mx and calculate that (m is a contrast layer figure sum for n time, n is by computation layer figure sum) slow problem, a kind of implementation method has efficiently been proposed.
General thought of the present invention: from the application purpose of density inspection, the inferior calculating of a* (m+n) is reduced in n calculating of m x, and (m is a contrast layer figure sum, and n is that a is a constant by computation layer figure sum, and it is far smaller than m, n).Scanned respectively by computation layer, contrast layer, only handle one time.In order to determine to be positioned at the scope of which contrast layer fast by computation layer, utilize domain to distribute and have inhomogeneity principle, introduce the notion of bucket, determine more excellent branch bucket scheme, guarantee the contrast layer figure negligible amounts in each barrel, reach the effect of rapid location.Each is once only had the contrast layer figure of crossover relation to do " logical and " with one by the computation layer figure.
The present invention comprises following key step:
1, scans contrast layer from left to right, calculate the frame of contrast layer figure;
2, determine to divide a bucket principle according to the figure number of contrast layer figure, divide the bucket of uniform bidimensional, the frame of contrast layer figure is assigned in the bucket;
3, scan from left to right by computation layer, when each is finished by the computation layer figure, calculate this and be positioned at which bucket, search the frame of each the contrast layer figure in this barrel, execution in step 4,5,6 by the computation layer figure;
4, temporary layer TemLayer1=should be by the computation layer figure, this contrast layer figure frame of TemLayer2=, TemLayer3=And TemLayer1 TemLayer2
5, with the area of TemLayer3 molecule, with the area of TemLayer2 denominator, ratio calculated as bulk density as bulk density;
6, judge whether ratio meets constraint, if meet, this contrast layer figure is the result, exports.
The remarkable difference of said method and conventional method is, conventional method is in order to seek whether public part is arranged between two layer patterns, need all figures of traversal search, and this method, seek the public part of two layer patterns, only need the relational graph of searching graphic close region, significantly reduced calculated amount, improved counting yield.
For example, suppose that by the figure number of calculating graph layer be 100,000, the figure number of contrast graph layer is 100,000, adopts the inventive method, supposes to have divided on two-dimensional space uniform 100x100 bucket, on average in each bucket 10 figures is arranged.During at searching contrast layer figure and by the public part of computation layer figure, on average each figure only need be searched 10 times, just can search to finish.Total number of times of searching is: 10x (100,000+100,000)=2,000,000 times is far smaller than 1,000,000,000 times of conventional method.
Description of drawings
Fig. 1 original layout
The frame of Fig. 2 contrast layer figure
Fig. 3 divides a barrel scheme
Fig. 4 checks density in bucket
Fig. 5 temporary layer TemLayer1
Fig. 6 temporary layer TemLayer2
Fig. 7 temporary layer TemLayer3
Fig. 8 resultant layer
Embodiment:
Below in conjunction with the description of drawings specific embodiment of the invention.If domain originally as shown in Figure 1, the layer1 shown in the figure is by computation layer, and layer2 is a contrast layer.Suppose that order is DENSITY layer1 constaint Inside of Layer layer2.
The 1st step was scanned layer2 from left to right, calculated the frame of layer2 figure.The result as shown in Figure 2;
The 2nd step determined to divide a bucket principle according to the figure number of layer2 figure, divided the bucket of uniform bidimensional, and the frame of layer2 figure is assigned in the bucket.The result as shown in Figure 3;
The 3rd step was scanned layer1 from left to right, when each layer1 figure finishes, calculated this layer1 figure and was positioned at which bucket, searched the frame of each the layer2 figure in this barrel, execution in step 4,5,6.The result as shown in Figure 4;
The 4th this layer1 figure of step temporary layer TemLayer1=, this layer2 figure frame of TemLayer2=, TemLayer3=And TemLayer1 TemLayer2.TemLayerl result as shown in Figure 5.TemLayer2 result as shown in Figure 6.TemLayer3 result as shown in Figure 7;
The 5th step is with the area of the TemLayer3 molecule as bulk density, with the area of the TemLayer2 denominator as bulk density, ratio calculated;
The 6th step judged whether ratio meets constraint, if meet, this contrast layer figure is the result, exports.The result as shown in Figure 8.
Method by density inspection in a kind of quick realization layout verification disclosed by the invention, proposed to check implementation method, improved the counting yield that the density inspection has contrast layer greatly at density with contrast layer (Density is calculated graph layer Inside of Layer contrast graph layer).
Claims (1)
1. a kind of quick branch bucket implementation method that density is checked in the layout verification is used for checking that being positioned at the area that contrasts graph layer inside by the computation layer figure is contrasting the shared number percent of graph layer area, it is characterized in that these method concrete steps are as follows:
(1) scans contrast layer from left to right, calculate the frame of contrast layer figure;
(2) determine to divide a bucket principle according to the figure number of contrast layer figure, divide the bucket of uniform bidimensional, the frame of contrast layer figure is assigned in the bucket;
(3) scan from left to right by computation layer, when each is finished by the computation layer figure, calculate this and be positioned at which bucket, search the frame of each the contrast layer figure in this barrel, execution in step (4), (5), (6) by the computation layer figure;
(4) temporary layer TemLayer1=should be by the computation layer figure, this contrast layer figure frame of TemLayer2=, TemLayer3=AndTemLayer1 TemLayer2;
(5) with the area of TemLayer3 molecule, with the area of TemLayer2 denominator, ratio calculated as bulk density as bulk density;
(6) judge whether ratio meets constraint, if meet, this contrast layer figure is the result, exports.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101131230A CN101593222B (en) | 2008-05-28 | 2008-05-28 | Density checking method in territory verification |
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| CN2008101131230A CN101593222B (en) | 2008-05-28 | 2008-05-28 | Density checking method in territory verification |
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| CN101593222B CN101593222B (en) | 2011-09-14 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102314530A (en) * | 2010-07-02 | 2012-01-11 | 北京华大九天软件有限公司 | Novel interactive type hierarchical short circuit tracing and dynamic debugging method |
| CN102411643A (en) * | 2010-09-26 | 2012-04-11 | 北京华大九天软件有限公司 | Integrated circuit layout verification self adaptive scanning line solution |
| CN102890730A (en) * | 2011-07-20 | 2013-01-23 | 北京华大九天软件有限公司 | Validation method of rectangular containing rule in layout verification of integrated circuit |
| CN115048542A (en) * | 2022-06-10 | 2022-09-13 | 杭州行芯科技有限公司 | Method, device and system for inquiring graphic information, electronic device and storage medium |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100576212C (en) * | 2006-07-26 | 2009-12-30 | 北京华大九天软件有限公司 | Tracking based on bucket |
-
2008
- 2008-05-28 CN CN2008101131230A patent/CN101593222B/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102314530A (en) * | 2010-07-02 | 2012-01-11 | 北京华大九天软件有限公司 | Novel interactive type hierarchical short circuit tracing and dynamic debugging method |
| CN102314530B (en) * | 2010-07-02 | 2014-02-05 | 北京华大九天软件有限公司 | Interactive type hierarchical short circuit tracing and dynamic debugging method |
| CN102411643A (en) * | 2010-09-26 | 2012-04-11 | 北京华大九天软件有限公司 | Integrated circuit layout verification self adaptive scanning line solution |
| CN102411643B (en) * | 2010-09-26 | 2014-06-25 | 北京华大九天软件有限公司 | Integrated circuit layout verification self adaptive scanning line solution |
| CN102890730A (en) * | 2011-07-20 | 2013-01-23 | 北京华大九天软件有限公司 | Validation method of rectangular containing rule in layout verification of integrated circuit |
| CN102890730B (en) * | 2011-07-20 | 2016-08-10 | 清华大学 | In a kind of integrated circuit layout verification, rectangle comprises the verification method of rule |
| CN115048542A (en) * | 2022-06-10 | 2022-09-13 | 杭州行芯科技有限公司 | Method, device and system for inquiring graphic information, electronic device and storage medium |
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| CN101593222B (en) | 2011-09-14 |
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Address after: 100015 Beijing city Chaoyang District Gaojiayuan No. 1 Patentee after: Beijing Huada Jiutian Technology Co.,Ltd. Address before: 100015 Beijing city Chaoyang District Gaojiayuan No. 1 Patentee before: HUADA EMPYREAN SOFTWARE Co.,Ltd. |
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