CN102290978B - Power management system - Google Patents
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- CN102290978B CN102290978B CN201110221630.8A CN201110221630A CN102290978B CN 102290978 B CN102290978 B CN 102290978B CN 201110221630 A CN201110221630 A CN 201110221630A CN 102290978 B CN102290978 B CN 102290978B
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Abstract
The invention provides a power management system, which comprises a plurality of power chips and a supplied chip with a plurality of power supply areas, wherein each power chip supplies power to a corresponding power supply area in the supplied chip by a pin; a plurality of programmable resistance voltage division circuits are arranged in the supplied chip; and each programmable resistance voltage division circuit acquires the power voltage of the corresponding power supply area in the supplied chip, generates a feedback voltage based on the power voltage and provides the feedback voltage for the power chip supplying the power to the corresponding power supply area by another pin. By such a design, the supplied chip can be supplied with the power only by developing and making researches on a standard power chip without repeatedly developing and making the researches on a power management chip for each supplied chip, so the research and development cost can be greatly saved.
Description
[technical field]
The present invention relates to electronic circuit field, particularly a kind of power-supply management system that can flexible configuration.
[background technology]
Along with the development of modern electronic technology, it is increasingly sophisticated that electronic system becomes, and power management scheme is correspondingly also increasingly sophisticated.At present increasing company all develops special-purpose Power Management Unit (PMU:PowerManagement Unit) chip.For complicated smart mobile phone, panel computer, net book and various notebook computer, its required PMU chip is integrated to be reached 7 roads or more switching mode DC-to-DC converter and reaches the 20 above linear voltage regulators in road.The integrated function of these senior electronic products is also continuing increase, as GPS, 3-D image, acceleration transducer, gyroscope, projection and advanced video function, Modern wireless communication and intelligent sensing technology etc., every kind of required voltage and current of function all may be different, so all need independently power management module, so just cause the number of required switching mode DC-to-DC converter and linear voltage regulator also can increase.And because modern electronic technology development speed is too fast, at electronic product initial stage of development, being even all difficult to prediction needs how many roads power management module.At present, during many Power Management Unit chip designs, can design the path of some redundancies, cause like this some path in use improper or unnecessary.And this analog chip design complexities of power management is very high; once design successful probability also very low; its construction cycle often can be over 1 year; even reach 2 years also not within minority; required design team scale is also very large, as verified personnel, volume production tester, technologist, encapsulation personnel and administrative staff etc. in the above front end circuit design of 10 people team, rear end layout design team more than 5 people, great many of experiments chamber.So need a kind of power management scheme of flexible configuration more, reduce the significant cost for each application overlapping development.
Another kind of conventional art is on printed circuit board (PCB) (PCB:PrintedCircuit Board), to build power-supply management system by the power supply chip of a plurality of separation, but this scheme is superseded by aforementioned PMU scheme gradually, and reason has two.
The first, traditional separated power supply chip cannot be accomplished multistage dynamic adjustments output voltage, and dynamic adjustments output voltage is the essential function of high-efficiency power system of new generation.The application processor of one of core devices of contemporary electronic systems (Application Processor) chip is the control centre of electronic system, the scene difference that it can be used according to user is carried out the output voltage of dynamic adjustments power module, when needing the scene of high-speed cruising, it heightens the output voltage power module, the operating frequency of chip can improve like this, and power consumption is now larger.But when some scene without high-speed cruising, it turns down the output voltage of power module, and the operating frequency of chip can reduce like this, thereby plays energy-conservation effect.The output voltage of current separate power supplies chip is generally fixing setting.And PMU chip is generally by the I of a standard
2c interface connects application processor and PMU chip, specifically can be shown in Figure 1, and wherein said I
2c interface has two holding wires (SDA and SCK), and all power modules (specifically including 6 DC-to-DC converter, i.e. DCDC1, DCDC2, DCDC3, DCDC4, DCDC5 and DCDC6) are shared an I
2c interface.I
2c interface is followed I
2c agreement is to realize communicating by letter of described application processor and PMU chip chamber.Described application processor can be notified PMU chip to heighten or reduce output voltage, also can realize while enabling to control the power module work of ，Ji Mou road and can notify it to close, so that power saving; While needing its work, notify its unlatching work.Similarly, for described the second conventional art, can be by separate power supplies chip be increased to an I
2c interface, each separate power supplies chip need increase by two I like this
2the pin of C, and application processor needs to increase by two I for each separate power supplies chip
2the pin of C.Pin is more, and chip cost is higher, and this cost all too is large, does not almost have at present producer to adopt this scheme.
The second, resolution element solution lacks electrifying timing sequence management flexibly.PMU scheme can provide sequencing and the relative delay of the electrifying timing sequence ，Ji Ge road power initiation of flexible configuration to set.
In addition, in Fig. 1 because PMU chip-scale constantly increases, even meet certain power path on one side from application processor chip to be powered part closer, as DCDC1 and DCDC2, always but there will be and be powered the far situation of circuit as DCDC4 and DCDC5 distance.Rpar4 and Rpar5 be on printed circuit board (PCB) due to the long larger dead resistance causing of cabling, when supply current is very large, in this dead resistance, also can produce very large energy loss, its loss power is I
2r, wherein I is supply current, R is the dead resistance on printed circuit board (PCB).These energy losses all directly change into heat.
In addition, in conventional P MU solution, pass through I
2c circuit and the communication of PMU chip, be subject to I on the one hand
2c circuit clock frequency limitation, the speed of its transmission data can be limited in lower speed.In order to save chip pin number, PMU chip is generally only by an I in addition
2c interface transmits the control data of controlling all power channel, the further like this speed having reduced the control of power channel.
Therefore being necessary to propose a kind of new technical scheme solves the problems referred to above.
[summary of the invention]
The object of this part is to summarize some aspects of embodiments of the invention and briefly introduces some preferred embodiments.In this part and the application's specification digest and denomination of invention, may do a little simplification or omit to avoid the making object of this part, specification digest and denomination of invention fuzzy, and this simplification or omit can not be for limiting the scope of the invention.
The object of the present invention is to provide a kind of power-supply management system, it needs the power supply chip of research and development standard, just can be and is powered chip power supply, without for every a chip that is powered repeats to research and develop power management chip, can greatly save R&D costs.
According to object of the present invention, the invention provides a kind of power-supply management system, the chip that is powered that it comprises several power supply chips and has several service areas, wherein each power supply chip provides power supply by a pin for the described Yi Ge service area being powered in chip, the described chip internal that is powered is provided with several programmable resistance bleeder circuits, described in each programmable resistance bleeder circuit collection, be powered the supply voltage of the Yi Ge service area in chip, and generate a feedback voltage based on this supply voltage, by another pin, described feedback voltage is offered to the power supply chip into its corresponding service area power supply.
Further, described power supply chip is DC-to-DC converter chip or linear voltage regulator chip.
Further, described DC-to-DC chip comprises four pins, and described four pins are respectively: input power pin, pin, feedback signal pin and switch output pin; Described linear voltage regulator comprises four pins, and described four pins are respectively: input power pin, pin, feedback signal pin and Voltage-output pin.
Further, described programmable resistance bleeder circuit comprises and is series at the supply voltage of corresponding service area and several resistance between ground and several switches in parallel with each resistance respectively, the control end of each switch is controlled by the described control signal that is powered chip, an intermediate node of several resistance of series connection is as feedback node, and the voltage on described feedback node is used as described feedback voltage.
Further, between the supply voltage of corresponding service area and feedback node, be provided with several resistance, between described feedback signal output node and ground, be provided with several resistance.
Further, described programmable resistance bleeder circuit also comprises an enable switch, and a link of described enable switch connects predetermined voltage, and another link connects described feedback node, and the control end of described enable switch connects an enable signal.
Further, described power supply chip comprises a comparator and control circuit, an input of described comparator receives described feedback voltage, another input connects a reference voltage, its output output is for controlling the enable signal that described control circuit enables, described control circuit receives described feedback voltage, and provides power supply for corresponding service area.
Further, described reference voltage is arranged between the normal working voltage of feedback voltage and the supply voltage of corresponding service area, the supply voltage that described predetermined voltage is corresponding service area.
Further, the voltage sample point in described divider resistance circuit able to programme is arranged on the supply voltage extreme lower position of the corresponding service area being powered in chip.
Compared with prior art, power-supply management system provided by the invention only need to be researched and developed the power supply chip of sign, just can be implemented as and be powered chip power supply, and without repeating to study Switching Power Supply managing chip for every a chip that is powered, greatly save R&D costs, and its inner programmable resistance bleeder circuit can be realized dynamic electric voltage regulatory function, in addition, because power supply chip adopts wiring nearby when being powered chip and being connected, thereby reduce the wiring area of printed circuit board (PCB), make electronic system miniaturization more.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.Wherein:
Fig. 1 is the structural representation of power management in prior art;
Fig. 2 is power-supply management system structural representation in one embodiment in the present invention;
Fig. 3 is the schematic diagram of power-supply management system in a specific embodiment in the present invention;
Fig. 4 is the schematic diagram of power-supply management system in another specific embodiment in the present invention;
Fig. 5 is the schematic diagram of programmable resistance bleeder circuit in the present invention;
Fig. 6 is DCDC chip circuit diagram in one embodiment in the present invention;
Fig. 7 is LDO chip circuit diagram in one embodiment in the present invention; With
Fig. 8 is application processor schematic diagram in one embodiment in the present invention.
[embodiment]
Detailed description of the present invention is mainly carried out the running of direct or indirect simulation technical solution of the present invention by program, step, logical block, process or other symbolistic descriptions.For the thorough the present invention that understands, a lot of specific detail in ensuing description, have been stated.And when there is no these specific detail, the present invention may still can realize.Affiliated those of skill in the art use these descriptions and statement herein to the others skilled in the art in affiliated field, effectively to introduce their work essence.In other words, be the object of the present invention of avoiding confusion, due to the method for knowing and easily understanding of program, so they are not described in detail.
Alleged " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention herein.Different local in this manual " in one embodiment " that occur not all refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.In addition, represent sequence of modules in method, flow chart or the functional block diagram of one or more embodiment and revocablely refer to any particular order, not also being construed as limiting the invention." some " described in literary composition and " several " all refer to two or more.
Fig. 2 is power-supply management system 200 structural representation in one embodiment in the present invention, described power-supply management system 200 comprises and is powered chip 210 and several power supply chips 220, wherein each power supply chip 220 provides power supply by a pin for the described chip 210Zhong Yige service area that is powered, described chip 210 inside that are powered are provided with several programmable resistance bleeder circuits (will consult Fig. 4 do specifically tell about) below, described in the collection of described programmable resistance bleeder circuit, be powered the supply voltage of chip 210Zhong Yige service area, and generate a feedback voltage based on this supply voltage, by another pin, described feedback voltage is offered to the power supply chip of its corresponding service area power supply.In figure, only show four power supply chips 220, but in actual applications, the number of described power supply chip 220 can be set according to the described demand that is powered chip 210.Below in conjunction with Fig. 3 to Fig. 6, describe the power-supply management system in the present invention in detail.
Fig. 3 is the schematic diagram of power-supply management system in a specific embodiment in the present invention, and compared to Figure 1, each power supply chip 220 in the power-supply management system in Fig. 3 is independently, each power supply chip 220 respectively with described in be powered chip 210 and be connected.The chip 210 that is powered here can be the application processor described in Fig. 1, and power supply chip 220 can be DC-to-DC converter (6 DC-to-DC converter have been shown in Fig. 3, have wherein been specially DCDC1, DCDC2, DCDC3, DCDC4, DCDC5 and DCDC6).Wherein each DC-to-DC converter all has four pins, described four pins be specially input power pin V, pin G, feedback signal pin FB and switch output pin LX.The feedback signal pin FB of each power supply chip 220 (being the DC-to-DC converter in this figure) with described in the corresponding programmable resistance bleeder circuit that is powered in chip 210 connect, described switch output pin LX and corresponding service area's connection.The pin LX that is each power supply chip 220 provides power supply for the described Yi Ge service area being powered in chip 210, corresponding programmable resistance bleeder circuit gathers the supply voltage of described service area, and generate a feedback voltage based on this supply voltage, by telescopic pin FB, described feedback voltage is offered to the power supply chip into its corresponding service area power supply.
Fig. 4 is the schematic diagram of power-supply management system in another specific embodiment in the present invention, power supply chip 220 in the present embodiment (there is shown 6 linear voltage regulators for linear voltage regulator, wherein be specially LDO1, LDO2, LDO3, LDO4, LDO5 and LDO6), wherein said linear voltage regulator can be set to the chip of four pins of standard, described four pins comprise input power pin V, pin G, feedback signal pin FB and Voltage-output pin VO.The corresponding resistor voltage divider circuit that the feedback signal pin FB of each power supply chip 220 (being the linear voltage regulator in this figure) and Voltage-output pin VO are powered in chip 210 described in is respectively connected with corresponding service area.
Certainly, when specific implementation, described power supply chip is not limited to the DC-to-DC converter shown in Fig. 3 and Fig. 4 and linear voltage regulator, can also be the power supply chip of other types, as long as the pin of each power supply chip is connected just passable with the corresponding node that is powered chip internal setting.In addition, for each power-supply management system, the power supply chip connecting is all not necessarily also that same type is (if all power supply chips in Fig. 3 are all DC-to-DC converter, and all power supply chips in Fig. 4 are all linear voltage regulators), in actual applications, the power supply chip connecting can be also different type, if part power supply chip can be linear voltage regulator for DC-to-DC converter, another part power supply chip, then a part can also be other power supply chips after by standard configuration.
Fig. 5 is the schematic diagram of programmable resistance bleeder circuit in the present invention, wherein said programmable resistance bleeder circuit comprises and is series at the supply voltage VDD of corresponding service area and several resistance between ground and several switches in parallel with each resistance respectively, the control end of each switch is controlled by the described control signal that is powered chip, an intermediate node of several resistance of series connection is as feedback node, and the voltage on described feedback node FB is used as described feedback voltage.Between described supply voltage VDD and feedback node FB, being provided with several can be by the described several resistance (being respectively resistance R 1, resistance R 2, resistance R 3 and resistance R 4) that are powered internal chip enable signal (signal shown in figure is DA1, DA2 and DA3) control; Between described feedback node FB and ground, be provided with another several and can be powered several resistance (being respectively resistance R 5, resistance R 6, resistance R 7 and resistance R 8) that internal chip enable signal (signal shown in figure is DA4, DA5 and DA6) is controlled by described.Wherein signal DA1 is by K switch 1 controlling resistance R2, signal DA2 is by K switch 2 controlling resistance R3, and signal DA3 is by K switch 3 controlling resistance R4, and signal DA4 is by K switch 4 controlling resistance R5, signal DA5 is by K switch 5 controlling resistance R6, and signal DA6 is by K switch 6 controlling resistance R7.Like this along with the low and high level of internal signal is different, the resistance R between supply voltage VDD and feedback node FB
uP, the resistance R between feedback node FB and ground
dNcan dynamic adjustments, thus can realize the effect of dynamic adjustments output voltage.
When described programmable resistance bleeder circuit specifically connects in Fig. 3, described in it, supply voltage VDD connects with the pin LX of corresponding DC-to-DC converter, as the first via programmable resistance bleeder circuit corresponding to the first DC-to-DC converter DCDC1 (including supply voltage VDD1 and feedback signal output node FB1), its corresponding supply voltage VDD1 is connected with the pin LX of DCDC1, and described feedback node FB1 is connected with the pin FB of DCDC1.When described programmable resistance bleeder circuit specifically connects in Fig. 4, described in it, supply voltage VDD connects with the pin VO of corresponding linear regulator, as the first via programmable resistance bleeder circuit corresponding to linear regulator LDO1 (including supply voltage VDD1 and feedback node FB1), its corresponding supply voltage VDD1 is connected with the pin VO of LDO1, and described feedback node FB1 is connected with the pin FB of LDO1.Remaining each power supply chip all carries out, with similarly connecting, just no longer having described in detail here with corresponding programmable resistance bleeder circuit.
As shown in Figure 5, the voltage of the power supply output node VDD1 of described first via power supply chip equals:
So, be powered the DA1-DA6 signal of chip internal by switch controlling resistance R
uPand R
dN, can further realize the voltage control to power supply output node VDD1, and then avoid being powered in prior art the I simultaneously needing in chip and PMU chip
2c circuit, and can realize dynamic electric voltage regulatory function.
Certainly, the resistance in Fig. 5 is not limited to above-mentioned several resistance, can also have more or less resistance to realize dynamic adjustments.Obviously, described several resistance can also adopt parallel connection or mix the mode connecting except the mode that is connected in series shown in figure.By multiple connected mode, can realize better the dynamic adjustments to voltage.
In addition, divider resistance circuit able to programme in Fig. 5 has also designed and has enabled to control, comprise enable switch Kon, a link of described enable switch Kon connects predetermined voltage V_IO, another link connects described feedback node FB, and the control end of described enable switch Kon connects an enable signal ENB.Wherein, when enabling control signal ENB while being high level, described enable switch Kon conducting, is pulled to V_IO voltage by the voltage FB of described feedback node, and the V_IO voltage here can be for being powered the supply voltage of corresponding service area in chip.
Common I
2the clock frequency of C is generally hundreds of KHz, can work over 1GHz, and to be built in the programming that is powered the divider resistance circuit able to programme in chip 210 is real-time and be powered chip (as application processor), without any communication delay, limits.So the present invention quotes divider resistance circuit design scheme able to programme, than existing PMU solution, have dynamic voltage adjustment speed and enable/closing velocity faster, application processor is faster to the control rate of power path.
Fig. 6 is DCDC chip circuit diagram in one embodiment in the present invention, and described DCDC chip comprises DCDC controller circuitry and comparator C omp1, and VTH is reference voltage, can produce by the reference voltage source circuit in DCDC controller.The DCDC chip is here integrated standardization to form the DC-to-DC chip with above-mentioned four pins by DCDC control circuit and comparator C omp1.When the voltage of feedback signal FB is during higher than VTH, comparator C omp1 output EN signal is low level, controls DCDC control circuit and closes, and forbids the work of DCDC controller.When the voltage of feedback signal FB is during lower than VTH, comparator C omp1 output EN signal is high level, allows the work of DCDC control circuit.Conventionally, described reference voltage VHT is set to the magnitude of voltage between FB normal working voltage and V_IO voltage, the adjusted stable target voltage values of FB when wherein FB normal working voltage refers to the normal operation of DCDC controller, V_IO voltage is the supply voltage that is powered the logical circuit of often opening in chip.In one embodiment, if the normal working voltage of FB is 0.6V, and V_IO voltage is 2.8V, and VTH can be set to 2V.
In actual applications, described DCDC control circuit is the size of comparison FB voltage and an internal reference voltage, and when FB voltage is during lower than internal reference voltage, conversion adjustment increases the duty ratio of LX signal; When FB voltage is during higher than internal reference voltage, conversion adjustment reduces the duty ratio of LX signal.Take voltage-dropping type DCDC as example, LX signal produces VDD1 voltage after inductance and electric capacity (as the L11 in Fig. 3 and C11) filtering, in application processor is powered chip, by programmable resistance bleeder circuit, produce FB signal, feed back to again in DCDC change-over circuit, formed like this degeneration factor.Can be by FB voltage accurate adjustment to internal reference voltage when such degeneration factor works, such as when described internal reference voltage is 0.6V, FB normal working voltage is 0.6V.This voltage can need be worked by pcb board or be integrated in voltage regulator or the DCDC change-over circuit independently often opened in application processor and power always, can not be turned off.
Known by Fig. 5 and Fig. 6, by being powered the control of chip internal control signal to feedback signal FB voltage, and the comparison of the voltage of feedback signal FB and reference voltage VTH can further realize enabling and turn-offing DCDC control circuit.
Fig. 7 is LDO chip circuit diagram in one embodiment in the present invention, and it is substantially identical with the operation principle of the DCDC control circuit shown in Fig. 6, and just application circuit is different with controller architecture, so just no longer describe in detail here.
In addition, the implementation in Fig. 6 and Fig. 7 can also increase the delay of EN signal is avoided to too responsive to system noise in DCDC control circuit and LDO control circuit.When EN signal becomes high level from low level, within certain hour, maintain high level, and while there will not be interim step-down level, DCDC control circuit and LDO control circuit just start and work.Equally, when EN signal becomes low level from high level, maintain low level, and there will not be while uprising level temporarily within certain hour, DCDC control circuit and LDO control circuit are just closed and quit work.
Above-mentioned programmable resistance bleeder circuit is arranged in and is powered chip (as application processor), in embodiment preferably, and can be by described divider resistance sampled point choose reasonable able to programme at the described power supply minimum point place being powered on chip.As shown in Figure 8, it shows middle application processor schematic diagram in one embodiment.Voltage VDD1 is input to and is powered chip from the application processor upper left corner, generally by gold thread, the pressure welding point of described chip and chip pin coupled together, and R
goldbe the impedance of gold thread in equivalent encapsulation, comprise dead resistance and inductance.Take dead resistance as example, and the gold thread resistance of 50mohm when the electricity consumption modules A RM of application processor consumes 1 Ampere currents, will form 50mV voltage drop in dead resistance.Because these electric currents may be also dynamic, so stray inductance can cause on it voltage drop larger.Very large owing to being powered the shared chip area of modules A RM in addition, supply terminals, in the upper left corner, due to the dead resistance of metal line, causes the voltage actual specific upper left corner in the lower right corner much lower, and this phenomenon is called as IR drop effect in chip design.Modern senior simulation software can be modeled to this effect more clearly, but chip operation scene is different, and power consumption electric current is also different, and this voltage drop changes thereupon.After chip manufacturing, chip chamber also there are differences in addition, and this resistance value is also different, and the voltage drop that equals electric current and resistance product is also different.Meanwhile, resistance and electric current also change with environmental factors such as temperature.When voltage is too low, will cause digital circuit to work, as deadlock phenomenon.In order to prevent the phenomenon that crashes, conventionally can suitably improve the voltage at node VDD1 place, can avoid like this brownout of minimum voltage point, owing to there being above-mentioned uncertainty, generally leave larger surplus.A kind of method that the present invention adopts is can be by the upper end of described divider resistance R1 able to programme is connected on minimum voltage point, so the feedback voltage sampling is the dividing potential drop based on minimum voltage point, so can accurately control the voltage of minimum point, make minimum voltage point also have sufficiently high voltage to guarantee that whole circuit can not crash.
In the present invention, because the power supply chip of each standard is very little, can adopt as sot23-5 or less packing forms, can be distributed in and be powered near circuit very easily.Guarantee that like this cabling on printed circuit board (PCB) is shorter, dead resistance is less, makes thermal losses less, thereby contributes to improve the operating efficiency of system, for battery power supply system, can extend and once be full of the operating time after electric weight.In addition, because each power supply chip in the present invention can connect corresponding divider resistance circuit able to programme nearby, can greatly reduce length of arrangement wire, contribute to reduce the wiring area of printed circuit board (PCB), be conducive to the miniaturization of electronic system.
In actual applications, due to each power supply chip has been carried out to standardization setting, without repeating to research and develop power management chip for every a chip that is powered, and only need to when production is powered chip, also carry out relative set, so just can avoid for correspondence is powered the continuous upgrading of chip, constantly researching and developing the huge R&D costs that new power supply management system is brought in prior art.
Above-mentioned explanation has fully disclosed the specific embodiment of the present invention.It is pointed out that being familiar with any change that person skilled in art does the specific embodiment of the present invention does not all depart from the scope of claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to previous embodiment.
Claims (9)
1. a power-supply management system, the chip that is powered that it comprises several power supply chips and has several service areas, it is characterized in that: each power supply chip provides power supply by a pin for the described Yi Ge service area being powered in chip, the described chip internal that is powered is provided with several programmable resistance bleeder circuits
Described in each programmable resistance bleeder circuit collection, be powered the supply voltage of the Yi Ge service area in chip, and generate a feedback voltage based on this supply voltage, described feedback voltage is offered to the power supply chip into its corresponding service area power supply.
2. power-supply management system according to claim 1, is characterized in that: described power supply chip is DC-to-DC converter chip or linear voltage regulator chip.
3. power-supply management system according to claim 2, is characterized in that: described DC-to-DC converter chip comprises four pins, and described four pins are respectively: input power pin, pin, feedback signal pin and switch output pin; Described linear voltage regulator chip comprises four pins, and described four pins are respectively: input power pin, pin, feedback signal pin and Voltage-output pin.
4. according to the arbitrary described power-supply management system of claim 1-3, it is characterized in that: described programmable resistance bleeder circuit comprises and is series at the supply voltage of corresponding service area and several resistance between ground and several switches in parallel with each resistance respectively, the control end of each switch is controlled by the described control signal that is powered chip, an intermediate node of several resistance of series connection is as feedback node, and the voltage on described feedback node is used as described feedback voltage.
5. power-supply management system according to claim 4, is characterized in that: between the supply voltage of corresponding service area and feedback node, be provided with several resistance, be provided with several resistance between described feedback node and ground.
6. power-supply management system according to claim 4, it is characterized in that: described programmable resistance bleeder circuit also comprises an enable switch, a link of described enable switch connects predetermined voltage, another link connects described feedback node, and the control end of described enable switch connects an enable signal.
7. power-supply management system according to claim 6, it is characterized in that: described power supply chip comprises a comparator and control circuit, an input of described comparator receives described feedback voltage, another input connects a reference voltage, its output output is for controlling the enable signal that described control circuit enables, described control circuit receives described feedback voltage, and provides power supply for corresponding service area.
8. power-supply management system according to claim 7, is characterized in that: described reference voltage is arranged between the normal working voltage of feedback voltage and the supply voltage of corresponding service area, the supply voltage that described predetermined voltage is corresponding service area.
9. power-supply management system according to claim 1, is characterized in that: the voltage sample point in described programmable resistance bleeder circuit is arranged on the supply voltage extreme lower position of the corresponding service area being powered in chip.
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| CN110138218B (en) * | 2019-06-25 | 2020-08-11 | 深圳市海浦蒙特科技有限公司 | Band-type brake power supply with adjustable output voltage |
| CN111342777B (en) * | 2020-02-29 | 2023-03-21 | 昆山普尚电子科技有限公司 | Effective power supply voltage calculation method for frequency mixer |
| CN115296530A (en) * | 2022-07-25 | 2022-11-04 | 圣邦微电子（北京）股份有限公司 | Power management chip |
| CN116073649A (en) * | 2022-12-27 | 2023-05-05 | 中科可控信息产业有限公司 | Voltage adjustment circuit, electronic device, and voltage adjustment method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2004088956A (en) * | 2002-07-04 | 2004-03-18 | Ricoh Co Ltd | Power circuit |
| US7397228B2 (en) * | 2006-01-12 | 2008-07-08 | International Business Machines Corporation | Programmable on-chip sense line |
| US20090115384A1 (en) * | 2007-11-01 | 2009-05-07 | Broadcom Corporation | Distributed Power Management |
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