Embodiment
By background technology as can be known, existing SOI CMOS radio-frequency (RF) switch can cause the loss of signal, and can cause nonlinear effect.
The inventor studies at the problems referred to above, finds that SOI CMOS radio-frequency (RF) switch can cause that the loss of signal is because the high resistivity monocrystalline silicon support substrates 100 of SOI substrate causes (details are with reference to figure 1).
Particularly, please refer to Fig. 2, Fig. 2 is current relationship schematic diagram between each transistor in the existing SOI CMOS radio-frequency (RF) switch.As shown in Figure 2, the transistor that comprises n series connection with SOI CMOS radio-frequency (RF) switch, electric current is along first transistor, second transistor ... n transistorized sequence is transmitted as example, in the process of current delivery, one part of current flows to grid, some current direction substrate, so for n transistor:
Id
n=Id
n-1-Isub
n-1-Ig
n-1,(1)
Wherein, Id
nFor flowing into n transistorized electric current, Id
N-1For flowing into n-1 transistorized electric current, Isub
N-1Flow to the component of substrate when flowing through n-1 transistor, Ig for electric current
N-1Flow to the component of grid when flowing through n-1 transistor for electric current.Because generally speaking, each transistorized formation technology is identical, so Ig
i=Ig
j=Ig, n 〉=i wherein, j>0, similarly, Isub
i=Isub
j=Isub.
So formula (1) can be expressed as:
Id
n=Id
n-1-Isub-Ig,(2)
By formula (2) as can be seen, electric current can be because flow to substrate and flow to grid and decay in the process of SOI CMOS radio-frequency (RF) switch transmission, and promptly SOI CMOS radio-frequency (RF) switch can cause the loss of signal.
Simultaneously, please refer to Fig. 1, high resistivity monocrystalline silicon support substrates 100, insulation film 110 is buried electric capacity with soi layer 120 compositions that are positioned at insulation film 110 surfaces, it is generally acknowledged that described capacitance of burying electric capacity is a fixed value, yet show but that by one group of capacitance-voltage test result described capacitance of burying electric capacity changes with the variation of test voltage, the capacitance of burying electric capacity has caused the nonlinear effect of SOI CMOS radio-frequency (RF) switch with the variation generation nonlinear change of measuring voltage.
The inventor after further research, a kind of SOI CMOS radio-frequency (RF) switch and forming method thereof is provided in an embodiment of the present invention, and adopts device by the formed SOI CMOS of the SOI CMOS radio-frequency (RF) switch formation method radio-frequency (RF) switch that embodiments of the invention provided.Embodiments of the invention provide the SOICMOS radio-frequency (RF) switch can avoid existing SOI CMOS radio-frequency (RF) switch the loss of signal and the nonlinear effect that can cause.
The SOI CMOS radio-frequency (RF) switch formation method that embodiments of the invention provided comprises:
SOI is provided substrate, and described SOI substrate is divided into switch region and outer peripheral areas, and described SOI substrate comprises the support substrates that forms successively, insulating thin layer and semiconductor layer;
Form at least one transistor in described switch region;
Removal is positioned at the support substrates of switch region.
For the formed SOI CMOS of embodiments of the invention radio-frequency (RF) switch, because support substrates is removed, do not existed, so avoided the nonlinear effect of radio-frequency (RF) switch so bury electric capacity; The SOICMOS radio-frequency (RF) switch is when work in addition, and current signal transmits along each transistor, and can not produce the component that flows to substrate, thereby has reduced the loss amount of signal.
Fig. 3 comprises for the SOI CMOS radio-frequency (RF) switch that the first embodiment of the present invention provided forms the method flow schematic diagram:
Step S101 provides SOI substrate, and described SOI substrate is divided into switch region and outer peripheral areas, and described SOI substrate comprises support substrates, is positioned at the insulating thin layer and the semiconductor layer that is positioned at the insulation film surface on support substrates surface;
Step S102 forms at least one transistor in described switch region, and wherein, described transistor gate is positioned at described semiconductor layer surface, and described transistorized source, drain electrode are positioned at described semiconductor layer;
Step S103 removes the support substrates corresponding with the transistor sites that is formed at the switch region.In order further to set forth the spirit and the essence of present embodiment, in conjunction with the accompanying drawings present embodiment is described in detail hereinafter.
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the invention is described in detail in detail; for ease of explanation; the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
At first, with reference to figure 4, SOI substrate 300 is provided, described SOI substrate 300 is divided into switch region I and outer peripheral areas II, described SOI substrate 300 comprises support substrates 310, is positioned at the insulating thin layer 320 and the semiconductor layer 330 that is positioned at insulation film 320 surfaces on support substrates 310 surfaces.
Described switch region I is used for forming SOI CMOS radio-frequency (RF) switch at subsequent technique, described outer peripheral areas II is used for the device outside subsequent technique formation SOI CMOS radio-frequency (RF) switch, and the type of described device and formation technology can be regulated according to the design needs.In the present embodiment, the area of described switch region I is less than the area of outer peripheral areas II, and the area of switch region I is 1 with the ratio of the area of outer peripheral areas II: 1000000-1: 5, such as, the area of switch region I is 0.1 square millimeter, and the area of outer peripheral areas II is 4 square millimeters.
The transistorized source electrode, the drain electrode that are formed at SOI substrate 300 surfaces are formed in the semiconductor layer 330, because semiconductor layer 330 is thinner, so the parasitic capacitance between transistorized source electrode and the drain electrode is lower, thereby can improve the efficient of device, reduce power consumption.In the present embodiment, the thickness of described semiconductor layer 330 is 1-2 μ m, and the material of described semiconductor layer 330 is a silicon, and the material of insulating thin layer 320 is silica, and described support substrates 310 is a silicon substrate.In other embodiments, the thickness of described semiconductor layer 330 can be other values outside the 1-2 μ m.
With reference to figure 5, form at least one transistor at described switch region I, wherein, described transistorized grid 340 is positioned at described semiconductor layer 330 surfaces, and described transistorized source electrode 351, drain electrode 350 are positioned at the described semiconductor layer 330 of grid 340 both sides.
The transistorized source electrode that is formed at described switch region I links to each other with the drain electrode of adjacent transistor, thereby series connection is formed at each transistor of described switch region I, the transistorized number of being connected depends on each transistorized maximum working voltage, and the maximum load voltage of switch.Under the situation that load voltage is determined, each transistorized maximum working voltage is big more, and transistorized number is few more; Similarly, under the situation that transistorized maximum working voltage is determined, the maximum load voltage of switch is big more, and transistorized number is many more.
In the present embodiment, to form two transistors at described switch region I is example, in other embodiments, the transistorized number that forms at described switch region I also can be other values outside two, such as 3,5,10...... separates with isolation structure 400 between the adjacent transistor in the present embodiment, and switch region I and outer peripheral areas II separate with isolation structure 500.
After forming transistor, on each electrode, form contact, by deposition and processing metal line, each transistor of connecting.
With reference to figure 6, remove the support substrates corresponding 310 with the transistor sites that is formed at switch region I.
As mentioned before, because the area of described switch region I is less than the area of outer peripheral areas II, such as in one embodiment, the area of switch region I is 0.1 square millimeter, the area of outer peripheral areas II is 4 square millimeters, be 1/40th of the described area of the stating switch region I area that is outer peripheral areas II, can ignore so remove the influence of the mechanical strength generation of 310 pairs of whole SOI substrates of support substrates corresponding with the transistor sites that is formed at switch region I.
Can adopt existing technology to remove the support substrates 310 corresponding, such as adopting dry etch process or wet-etching technology with the transistor sites that is formed at switch region I.
In the present embodiment, earlier form photoresist layer 600 in support substrates 310 away from the surface of insulating thin layer 320, it is fluted that 600 layers of described photoresists contain, and the position of described groove and width are corresponding with transistor sites that is formed at switch region I and width; Then along described groove etching support substrates 310, until forming the groove 700 that exposes insulating thin layer 320.
Described etching utilizes method well known to those skilled in the art to carry out etching, for example utilizes dry plasma etch.Specifically comprise: select inductively coupled plasma type etching apparatus for use, in etching process, for example etching gas comprises argon Ar and tetrafluoromethane CF
4, perfluoroethane C
2F
6With fluoroform CHF
3Deng fluoro-gas.Feed above-mentioned gas in reative cell simultaneously, wherein argon Ar plays the effect of dilution etching gas, and its flow is 100sccm-300sccm.Play in the gas of corrasion tetrafluoromethane CF
4Flow be 50sccm-100sccm; Perfluoroethane C
2F
6Flow be 100sccm-400sccm; Fluoroform CHF
3Flow be 10sccm-100sccm.The power output that in the reative cell with described gas ionization is the radio frequency power source of plasma is 50W-1000W; The power output of rf bias power source is 50W-250W.Pressure in the reative cell is set to 50mTorr-500mTorr, and the temperature of SOI substrate 300 is controlled between 20 ℃ and 90 ℃.The process of above-mentioned plasma etching is a kind of anisotropic etching.
Be subjected to the restriction of Alignment Process and etching technics, the possibility of result that described etching obtains is not that the support substrates 310 corresponding with the transistor sites that is formed at switch region I removed by whole etchings, but those skilled in the art is understood that, as long as be formed at the removal that is etched of the corresponding support substrates 310 of the transistor sites of switch region I with any one, the loss of signal and the nonlinear effect that can produce in the time of just can avoiding signal code to flow through respective transistor, thus the performance of whole SOI CMOS radio-frequency (RF) switch improved.In addition, because the area of described switch region I is less than the area of outer peripheral areas II, and general area much smaller than outer peripheral areas II, so in order to improve the performance of SOI CMOS radio-frequency (RF) switch better, generally can make the recess width of photoresist 600 be slightly larger than the width of switch region I, one of the percentage hundred of width that such as the recess width of photoresist 600 is switch region I is to one of percentage 110.
In the present embodiment; only remove the support substrates 310 corresponding with the transistor sites that is formed at switch region I; thereby avoided in the process of removing insulating thin layer 320 semiconductor layer 330 being caused damage, described insulating thin layer 320 can also form insulation protection to semiconductor layer 330.
In optional embodiment of the present invention, after removing the support substrates 310 corresponding with the transistor sites that is formed at switch region I, can also adopt fill process, form the filled media layer, described filled media layer is filled and is completely removed the described support substrates corresponding with the transistor sites that is formed at switch region I 310 formed grooves 700.Described filled media layer can guarantee further that the mechanical strength of SOI substrate 300 is not subjected to the influence of described removal technology.
In other embodiments of the invention, also can adopt strong acid solution, mixed solution such as sulfuric acid, nitric acid is removed the described support substrates corresponding with the transistor sites that is formed at switch region I 310, perhaps adopts strong base solution to remove the support substrates 310 corresponding with the transistor sites that is formed at switch region I.
Fig. 7 comprises for the SOI CMOS radio-frequency (RF) switch that the second embodiment of the present invention provided forms the method flow schematic diagram:
Step S201 provides SOI substrate, and described SOI substrate is divided into switch region and outer peripheral areas, and described SOI substrate comprises support substrates, is positioned at the insulating thin layer and the semiconductor layer that is positioned at the insulation film surface on support substrates surface;
Step S202 removes the support substrates that is positioned at the switch region;
Step S203 forms at least one transistor in the described switch region of removing support substrates, and wherein, described transistor gate is positioned at described semiconductor layer surface, and described transistorized source, drain electrode are positioned at the semiconductor layer of described grid both sides.
The SOI CMOS radio-frequency (RF) switch formation method that the second embodiment of the present invention provided is with the difference part of the SOI CMOS radio-frequency (RF) switch formation method that the first embodiment of the present invention is provided, the SOI CMOS radio-frequency (RF) switch formation method that the second embodiment of the present invention provided is removed the support substrates corresponding with the position of switch region I earlier, forms at least one transistor that is positioned at described switch region again; And in the SOI CMOS radio-frequency (RF) switch formation method that the first embodiment of the present invention provided, form the transistor that is positioned at the switch region earlier, remove the support substrates corresponding again with the position of switch region.Concrete technology can be referring to first embodiment.
Similarly, in the second embodiment of the present invention, can also form and fill the filled media layer of removing the formed groove of described support substrates.Based on aforementioned reason, after removing the support substrates corresponding with the position of switch region I, though for whole SOI substrate, the variation of mechanical strength can be ignored, but the SOI substrate is positioned at the segment thickness of switch region I obviously to be reduced, at follow-up formation grid, the source, easily the SOI substrate is caused local damage in the step of drain electrode and metal wire, if after removing the support substrates corresponding with the position of switch region I, form and fill the filled media layer of removing the formed groove of technology, then can avoid because the SOI substrate to be positioned at the part of switch region I thin excessively, and at follow-up formation grid, the source, in the step of drain electrode and metal wire the SOI substrate is caused local damage.
To sum up, for by the formed SOI CMOS of embodiments of the invention radio-frequency (RF) switch, because support substrates is removed, so burying electric capacity has not existed, so SOI CMOS radio-frequency (RF) switch is when work, current signal transmits along each transistor, and can not produce the component that flows to substrate, thereby has reduced the loss amount of signal.
In addition, also avoided by the formed SOI CMOS of embodiments of the invention radio-frequency (RF) switch owing to bury the caused nonlinear effect of electric capacity.
Correspondingly, embodiments of the invention also provide the device that adopts by the formed SOI CMOS of said method radio-frequency (RF) switch, please refer to Fig. 6, and the device that embodiments of the invention provided comprises:
SOI substrate 300, described SOI substrate 300 is divided into switch region I and outer peripheral areas II, and described SOI substrate 300 comprises support substrates 310, is positioned at the insulating thin layer 320 and the semiconductor layer 330 that is positioned at insulation film 320 surfaces on support substrates 310 surfaces; Described SOI substrate 300 also comprises the groove 700 that is positioned at switch region I, and described groove 700 exposes insulating thin layer 320;
Be positioned at least one transistor of switch region I, described transistorized grid is positioned at semiconductor layer 330 surfaces, described transistorized source, the drain electrode be positioned at semiconductor layer 330, at transistor size greater than 1 o'clock, each transistor series;
Be positioned at the device of outer peripheral areas II.
In the present embodiment, the thickness of described semiconductor layer 330 is 1-2 μ m, and the material of described semiconductor layer 330 is a silicon.
In other embodiments of the invention, also comprise the filled media layer of filling full described groove 700.The material of described filled media layer can be the dielectric material that silica or silicon nitride etc. and SOI substrate can form good interface.
Correspondingly, embodiments of the invention also provide the device by the formed SOI CMOS of said method radio-frequency (RF) switch, please refer to Fig. 8, and the SOI CMOS radio-frequency (RF) switch that embodiments of the invention provided comprises:
Semiconductor layer 330, and at least one transistor that is formed at described semiconductor layer 330, when transistorized number greater than 1 the time, each transistor series separates with isolation structure 400 between the adjacent transistor.
Particularly, in the present embodiment, the thickness of described semiconductor layer 330 is 1-2 μ m, and the material of described semiconductor layer 330 is a silicon.Described semiconductor layer 330 comprise first first type surface and with the first first type surface opposite second major surface.Form described transistorized grid at first first type surface.In other embodiments of the invention, described SOI CMOS radio-frequency (RF) switch also comprises the filled media layer that is formed at second first type surface.
To sum up, the SOI CMOS radio-frequency (RF) switch formation method that embodiments of the invention provided has been removed the electric capacity of burying of SOI substrate, and technology is simple, is easy to realize;
For adopting device by the formed SOI CMOS of embodiments of the invention radio-frequency (RF) switch, because the support substrates of SOI CMOS radio-frequency (RF) switch is removed, so burying electric capacity has not existed, avoided nonlinear effect, and SOI CMOS radio-frequency (RF) switch is when work, and current signal transmits along each transistor, and can not produce the component that flows to substrate, thereby reduced the loss amount of signal, thereby improved the performance and the sensitivity of device;
For by the formed SOI CMOS of embodiments of the invention radio-frequency (RF) switch, because the support substrates of SOICMOS radio-frequency (RF) switch is removed, so burying electric capacity has not existed, avoided nonlinear effect, and SOI CMOS radio-frequency (RF) switch is when work, and current signal transmits along each transistor, and can not produce the component that flows to substrate, thereby reduced the loss amount of signal, improved the operating efficiency of SOI CMOS radio-frequency (RF) switch.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made possible change and modification; therefore; every content that does not break away from technical solution of the present invention; to any simple modification, equivalent variations and modification that above embodiment did, all belong to the protection range of technical solution of the present invention according to technical spirit of the present invention.