CN102290332A - Method for preparing high-density silicon nanopore array - Google Patents
Method for preparing high-density silicon nanopore array Download PDFInfo
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- CN102290332A CN102290332A CN2011102931358A CN201110293135A CN102290332A CN 102290332 A CN102290332 A CN 102290332A CN 2011102931358 A CN2011102931358 A CN 2011102931358A CN 201110293135 A CN201110293135 A CN 201110293135A CN 102290332 A CN102290332 A CN 102290332A
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Abstract
The invention relates to a method for preparing a high-density silicon nanopore array. The method comprises the following steps: on the basis of taking a Pt nano crystal as a catalyst, and etching a silicon chip in a mixed solution of hydrofluoric acid and hydrogen peroxide by adopting a metal auxiliary chemical etching technology, thus the high-density silicon nanopore array is prepared, wherein the Pt nano crystal is obtained by carrying out high-temperature rapid hot annealing on an ultrathin Pt thin film which grows through magnetic control sputtering and has nano-scale thickness. According to the invention, the high-density silicon nanopore array is prepared by the metal auxiliary chemical etching technology, the technology is simple, wherein the high-temperature rapid hot annealing is performed for a short time, the thermal budget is low, simultaneously a power supply is not required to added additionally for the metal auxiliary chemical etching technology, power supply can be carried out spontaneously, the silicon nanopore array with the density exceeding 1.0*10<10>cm<-2> can be obtained, the preparation cost of the whole technology is lower, and the array can be manufactured on a large scale.
Description
Technical field
The invention belongs to silicon-based nano material and device and make the field, be specifically related to a kind of process for preparing the high-density silicon nanohole array.
Background technology
Silicon nano hole is considered to the very promising processing template of photovoltaic, biochemical sensor and energy field of storage.In numerous manufacture methods, metal assistant chemical etching has obtained paying close attention to widely in last decade because of it can form the silicon nano hole structure by simple, cheap processing step on silicon chip.The basic mechanism that metal assistant chemical etching forms silicon nano hole is: at first cover the discrete heavy metal of one deck (Au, Ag, Pt or Pd) particle on silicon chip, then silicon chip is immersed in the etching liquid that contains hydrofluoric acid and oxidant (hydrogen peroxide, ferric nitrate, potassium permanganate etc.), because the silicon etch rate that covers heavy metal is apparently higher than the silicon that does not cover heavy metal, the depths forms the nano-pore suitable with density with the heavy metal particles diameter so heavy metal can sink to entering body silicon (bulk silicon).
At present, heavy metal mainly is chemical plating (electroless deposition) in the covering method of silicon chip surface.This method relatively is applicable in the silicon chip surface deposition to have high density, separation property Au and Ag particle preferably, but is not suitable for Pt.This is because of the increase along with sedimentation time, Pt is easy to form fine and close film at silicon chip surface, hinder the carrying out of etching,, can't prepare the high-density silicon nanohole array so generally only suit to form the very little Pt particle of density at silicon chip surface by chemical plating method.
Therefore, need a kind of method of utilizing heavy metal Pt assistant chemical etching to prepare the high-density silicon nanohole array of exploitation.
Summary of the invention
The purpose of this invention is to provide a kind of method for preparing the high-density silicon nanohole array, be applicable to the silicon-based nano device, preparation cost is low, is expected to produce in enormous quantities.
For realizing above purpose, the invention provides a kind of method for preparing the high-density silicon nanohole array, adopt metal assistant chemical etching technics, nanocrystalline with Pt as catalyst, etching silicon chip in the mixed solution of hydrofluoric acid and hydrogen peroxide, thus prepare the high-density silicon nanohole array; Wherein, described Pt is nanocrystalline to be to be that nano level ultra-thin Pt film carries out high-temperature quick thermal annealing and obtains by the thickness to magnetron sputtering growth, and nanocrystalline size, shape and the density of Pt can be controlled by changing annealing temperature and annealing time.And, before grow ultra-thin Pt film, need be on the Si substrate heat growth one deck SiO
2Layer, this is in order to prevent that Pt and Si substrate react when the Pt film is carried out rapid thermal annealing.
The above-mentioned method for preparing the high-density silicon nanohole array comprises following concrete steps:
Step 1, heat growth one layer thickness is 1 ~ 7 nanometer SiO on heavily doped p type silicon chip
2Layer, wherein hot growth temperature is 800 ~ 1000 ℃, growth time is about 2min, reaches requirement with thickness and is as the criterion;
Step 2 is at above-mentioned SiO
2The magnetron sputtering layer thickness of growing is the ultra-thin Pt film of 2 ~ 5 nanometers on the layer;
Step 3, the ultra-thin Pt film that step 2 is obtained carries out high-temperature quick thermal annealing, and wherein annealing temperature is 700 ~ 800 ℃, and annealing time is 30 ~ 60s, and the atmosphere of high annealing can be nitrogen or argon gas;
Step 4, the mixed solution that the resulting silicon chip that includes ultra-thin Pt film of step 3 is dropped into hydrofluoric acid and hydrogen peroxide (promptly, etching solution) carries out etching in, wherein, the mass fraction of hydrofluoric acid is 50%, the mass fraction of hydrogen peroxide is 30%, and the volume ratio of hydrofluoric acid and hydrogen peroxide is that 2:1 ~ 10:1(is preferably 2:1 ~ 4:1); This etching solution suitably thin up reducing etch rate, thereby reduce silicon chip surface roughness after the etching; Wherein, general 1 ~ 5 minute of etching period, specifically the degree of depth with required silicon nano hole is as the criterion, and the hole of the same degree of depth, and etching solution concentration is low more, and required time is long more.
Step 5 is rinsed the silicon chip after the etching well with deionized water, be placed on air drying then.
The above-mentioned method for preparing the high-density silicon nanohole array, in step 1, described SiO
2The thickness of layer is 5 ~ 6 nanometers.
The above-mentioned method for preparing the high-density silicon nanohole array, in step 2, the thickness of described ultra-thin Pt film is 3 ~ 4 nanometers.
The above-mentioned method for preparing the high-density silicon nanohole array, in step 2, magnetron sputtering power is 90W, and sputtering time is 48s, and sputtering pressure is 0.56Pa, and sputter temperature is a room temperature.
Technical scheme of the present invention adopts metal assistant chemical etching technics, and is nanocrystalline as catalyst with the Pt that high-temperature quick thermal annealing forms, and the etching silicon chip forms the high-density silicon nanohole array in the mixed solution of hydrofluoric acid and hydrogen peroxide.By controlling diameter and the density that nanocrystalline size of Pt and density just can be controlled silicon nano hole.
The advantage of the method for preparing the high-density silicon nanohole array proposed by the invention:
1) the present invention adopts the high-density silicon nanohole array of metal assistant chemical etching preparation, compared to traditional anodic oxidation and reactive ion etching method, need not additional power source, just can spontaneously carry out, so technology is simple, preparation cost is cheap.
2) to adopt high-temperature quick thermal annealing to obtain to have the Pt of catalytic action nanocrystalline in the present invention, and the duration of wherein annealing is shorter, and heat budget is low, and nanocrystalline size, shape and the density of Pt can be controlled by changing annealing temperature and annealing time.
3) density of the prepared silicon nano hole of the present invention is higher, surpasses 1.0 * 10
10Cm
-2(that is, every square centimeter surpasses 1.0 * 10
10The nano-pore number).
4) diameter of the prepared silicon nano hole of the present invention and density are nanocrystalline quite with Pt, thereby diameter and the density that just can control silicon nano hole by nanocrystalline size of control Pt and density.
High-temperature quick thermal annealing is a kind of self-assembly process, by this technology ultra-thin heavy metal film is handled, and can obtain the very big and separation property of density heavy metal particles preferably.So the Pt that the present invention adopts high-temperature quick thermal annealing technology to obtain is nanocrystalline as catalyst, silicon chip is carried out metal assistant chemical etching, prepared and had highdensity silicon nano hole array.Technology of the present invention is simple, and wherein the high-temperature quick thermal annealing duration lacks, and heat budget is low, and metal assistant chemical etching need not additional power source simultaneously, can spontaneously carry out, so whole prepared cost is lower, is expected to produce in enormous quantities.
Description of drawings
Fig. 1 a is according to embodiments of the invention, the nanocrystalline ESEM picture of annealing Pt that 45s forms under 800 ℃ of conditions.
Fig. 1 b is according to embodiments of the invention, the nanocrystalline trans D distribution map of annealing Pt that 45s forms under 800 ℃ of conditions.
Fig. 2 a is according to embodiments of the invention, through the flat scanning Electronic Speculum picture of silicon chip after the metal assistant chemical etching.
Fig. 2 b is according to embodiments of the invention, through the cross section ESEM picture of silicon chip after the metal assistant chemical etching.
Embodiment
Describe the specific embodiment of the present invention in detail below in conjunction with drawings and Examples.
Embodiment
Step 1, heat growth one layer thickness is about the SiO of 6 nanometers on heavily doped p type silicon chip
2Layer, wherein hot growth temperature is 1000 ℃, growth time is 2min.
Step 2 is at SiO
2The magnetron sputtering layer thickness of growing is about the ultra-thin Pt film of 4 nanometers on the layer, and wherein magnetron sputtering power is 90W, and sputtering time is 48s, and sputtering pressure is 0.56Pa, and sputter temperature is a room temperature.
Step 3 is carried out high-temperature quick thermal annealing to ultra-thin Pt film, and annealing conditions is: nitrogen atmosphere, 800 ℃ of temperature, time 45s.Fig. 1 a and Fig. 1 b are respectively nanocrystalline ESEM picture of the Pt that forms of annealing back institute and the nanocrystalline trans D distribution map of Pt accordingly.The nanocrystalline density of Pt is 1.89 * 10
10Cm
-2(the Pt nano-crystalline granule number on being every square centimeter), nanocrystalline horizontal average diameter is 39.97 nanometers.
Step 4, silicon chip is dropped in the mixed solution of hydrofluoric acid and hydrogen peroxide and carry out etching, wherein, the mass fraction of hydrofluoric acid is 50%, and the mass fraction of hydrogen peroxide is 30%, and the volume ratio of hydrofluoric acid and hydrogen peroxide is 3:1, etch period is 3min, nano-pore after the nanocrystalline corresponding etching of every Pt of step 3, that is, obtaining density is 1.89 * 10
10Cm
-2The high density nanohole array of (being the nano-pore number on every square centimeter of silicon chip).Fig. 2 a and Fig. 2 b are respectively the flat scanning Electronic Speculum picture and the cross section ESEM picture of silicon chip after the metal assistant chemical etching, can see that the columnar nanometer hole of diameter about 40 nanometers closely arranging.
Step 5 with the deionized water rinsing 5min of the silicon chip after the etching, is placed on air drying then, makes high-density silicon nanohole array of the present invention.
It is nanocrystalline that the present invention adopts high-temperature quick thermal annealing to obtain to have the Pt of catalytic action, and the duration of wherein annealing is shorter, and heat budget is low, and in step 3, nanocrystalline size, shape and the density of Pt can be controlled by changing annealing temperature and annealing time.The thickness that the annealing of Pt film forms nanocrystalline needed temperature and time and Pt film itself also is related; As shown in table 1, under Pt film thickness condition provided by the present invention, in 700 ~ 800 ℃ of scopes, along with the rising of temperature, the nanocrystalline density of Pt reduces gradually, and nanocrystalline average transverse diameter reduces gradually, and nanocrystalline shape moves closer to sphere; Under 800 ℃ of annealing conditions, along with the prolongation of annealing time, the nanocrystalline density of Pt increases afterwards earlier and reduces, nanocrystalline average level diameter reduces earlier afterwards to increase, especially at 800 ℃, under the annealing 45s condition, the density maximum that Pt is nanocrystalline, the separation property between nanocrystalline is best.
The size that table 1:Pt is nanocrystalline and the relation of density and annealing temperature and annealing time
| Sample | Nanocrystalline density (10 10/cm 2) | Average transverse diameter (nm) |
| 700 ℃ of 30s that anneal down | 1.68 | 52.32 |
| 750 ℃ of 30s that anneal down | 1.65 | 50.41 |
| 800 ℃ of 30s that anneal down | 1.63 | 43.71 |
| 800 ℃ of 45s that anneal down | 1.89 | 39.97 |
| 800 ℃ of 60s that anneal down | 1.85 | 42.28 |
The Pt that the present invention adopts high-temperature quick thermal annealing technology to obtain is nanocrystalline as catalyst, and silicon chip is carried out metal assistant chemical etching, has prepared to have highdensity silicon nano hole array; This technology is simple, and wherein the high-temperature quick thermal annealing duration lacks, and heat budget is low, and metal assistant chemical etching need not additional power source simultaneously, can spontaneously carry out, so whole prepared cost is lower, is expected to produce in enormous quantities.
Although content of the present invention has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to limitation of the present invention.After those skilled in the art have read foregoing, for multiple modification of the present invention with to substitute all will be conspicuous.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (5)
1. method for preparing the high-density silicon nanohole array, it is characterized in that this method adopts Pt metal assistant chemical etching technics, and is nanocrystalline as catalyst with Pt, etching silicon chip in the mixed solution of hydrofluoric acid and hydrogen peroxide, thus prepare the high-density silicon nanohole array; Described Pt is nanocrystalline to be to be that nano level ultra-thin Pt film carries out high-temperature quick thermal annealing and obtains by the thickness to magnetron sputtering growth; Described high-density silicon nanohole array is meant that density surpasses 1.0 * 10
10Cm
-2The silicon nano hole array.
2. the method for preparing the high-density silicon nanohole array as claimed in claim 1 is characterized in that, this method comprises following concrete steps:
Step 1, heat growth one layer thickness is the SiO of 1 ~ 7 nanometer on heavily doped p type silicon chip
2Layer, wherein, hot growth temperature is 800 ~ 1000 ℃;
Step 2 is at above-mentioned SiO
2The magnetron sputtering layer thickness of growing is the ultra-thin Pt film of 2 ~ 5 nanometers on the layer;
Step 3, the ultra-thin Pt film that above-mentioned steps 2 is obtained carries out high-temperature quick thermal annealing, and wherein, annealing temperature is 700 ~ 800 ℃, and annealing time is 30 ~ 60s, and the atmosphere of high annealing is selected nitrogen or argon gas;
Step 4 is carried out etching in the mixed solution with resulting silicon chip input hydrofluoric acid of step 3 and hydrogen peroxide, and wherein, the mass fraction of hydrofluoric acid is 50%, and the mass fraction of hydrogen peroxide is 30%, and the volume ratio of hydrofluoric acid and hydrogen peroxide is 2:1 ~ 10:1;
Step 5 is rinsed the silicon chip after the etching well with deionized water, be placed on air drying then.
3. the method for preparing the high-density silicon nanohole array as claimed in claim 2 is characterized in that, in step 1, and described SiO
2The thickness of layer is 5 ~ 6 nanometers.
4. as claim 2 or the 3 described methods that prepare the high-density silicon nanohole array, it is characterized in that, in step 2, the thickness of described ultra-thin Pt film is 3 ~ 4 nanometers, and wherein, magnetron sputtering power is 90W, sputtering time is 48s, and sputtering pressure is 0.56Pa, and sputter temperature is a room temperature.
5. as claim 2 or the 3 described methods that prepare the high-density silicon nanohole array, it is characterized in that in step 4, the volume ratio of described hydrofluoric acid and hydrogen peroxide is 2:1 ~ 4:1.
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| WO2019109254A1 (en) * | 2017-12-05 | 2019-06-13 | 清华大学 | Preparation method for and uses of nanopore and array |
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| US10134599B2 (en) | 2016-02-24 | 2018-11-20 | The Board Of Trustees Of The University Of Illinois | Self-anchored catalyst metal-assisted chemical etching |
Citations (4)
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|---|---|---|---|---|
| US6790785B1 (en) * | 2000-09-15 | 2004-09-14 | The Board Of Trustees Of The University Of Illinois | Metal-assisted chemical etch porous silicon formation method |
| US20100248449A1 (en) * | 2009-03-31 | 2010-09-30 | Georgia Tech Research Corporation | Metal-Assisted Chemical Etching of Substrates |
| CN102157621A (en) * | 2011-03-03 | 2011-08-17 | 郑州大学 | Square silicon nanometer hole and preparation method thereof |
| CN102201486A (en) * | 2010-03-26 | 2011-09-28 | 北京师范大学 | Preparation technology for silicon nano-aperture array photovoltaic material and photovoltaic cell |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6790785B1 (en) * | 2000-09-15 | 2004-09-14 | The Board Of Trustees Of The University Of Illinois | Metal-assisted chemical etch porous silicon formation method |
| US20100248449A1 (en) * | 2009-03-31 | 2010-09-30 | Georgia Tech Research Corporation | Metal-Assisted Chemical Etching of Substrates |
| CN102201486A (en) * | 2010-03-26 | 2011-09-28 | 北京师范大学 | Preparation technology for silicon nano-aperture array photovoltaic material and photovoltaic cell |
| CN102157621A (en) * | 2011-03-03 | 2011-08-17 | 郑州大学 | Square silicon nanometer hole and preparation method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 耿学文 等: "Pt纳米粒子辅助化学刻蚀制备硅减反射层", 《红外与激光工程》, vol. 39, no. 6, 31 December 2010 (2010-12-31), pages 1096 - 1099 * |
Cited By (1)
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|---|---|---|---|---|
| WO2019109254A1 (en) * | 2017-12-05 | 2019-06-13 | 清华大学 | Preparation method for and uses of nanopore and array |
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