CN102270625A - Dummy metal-filled structure and planar inductor with dummy metal fillers - Google Patents

Dummy metal-filled structure and planar inductor with dummy metal fillers Download PDF

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Publication number
CN102270625A
CN102270625A CN2010101923792A CN201010192379A CN102270625A CN 102270625 A CN102270625 A CN 102270625A CN 2010101923792 A CN2010101923792 A CN 2010101923792A CN 201010192379 A CN201010192379 A CN 201010192379A CN 102270625 A CN102270625 A CN 102270625A
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dummy metal
dummy
layer
metal
film inductor
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CN2010101923792A
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Chinese (zh)
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程仁豪
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

The invention discloses a dummy metal-filled structure. The dummy metal-filled structure comprises a plurality of layers of dummy metal layers and each dummy metal layer comprises a plurality of dummy metals. Dummy metals in each dummy metal layer and dummy metals in an adjacent dummy metal layer are arranged crosswise, so that the dummy metals are distributed more uniformly and thus an influence of the dummy metals on a performance of an integrated circuit is reduced. Meanwhile, the invention discloses a planar inductor with dummy metal fillers. The planar inductor provided in the invention comprises: an inductance main body; an inductance winding, which is connected with the inductance main body; and dummy metal fillers, which are below the inductance main body and the inductance winding; besides, the each dummy metal filler has the above-mentioned dummy metal-filled structure. Therefore, a metal density below an inductance area of the planar inductor is more uniformly, so that influences of dummy metals on quality factors of the planar inductor are reduced.

Description

The film inductor of a kind of dummy metal interstitital texture and band dummy metal filler
Technical field
The present invention relates to the semiconductor integrated circuit manufacturing process, relate in particular to the film inductor of a kind of dummy metal interstitital texture and band dummy metal filler.
Background technology
Along with the fast development of wireless mobile telecommunication technology, radio frequency integrated circuit (RFIC, Radio FrequencyIntegrated Circuit) becomes more and more important, and radio frequency integrated circuit is the integrated circuit in a kind of 300MHz of being operated in~300GHz frequency range.
As everyone knows, integrated circuit (IC, Integrated Circuit) essence is exactly that electronic devices and components such as the required transistor of circuit, diode, resistance, electric capacity and inductance are incorporated on the semiconductor wafer, forms complete logical circuit, to reach functions such as control, calculating or memory.As a rule, integrated circuit comprises multilayer electronic components and parts layer, connects by plain conductor between each layer.
In general, the general production method of the plain conductor in the integrated circuit is: at entire wafer surface deposition layer of metal film (film), on metallic film, deposit photoresistance again, then do exposure and develop (photolithography) processing by mask (mask), thereby finish of the conversion of the domain figure of metal to the wafer figure of metal, by etching processing (Etching), then wafer surface presents the conducting wire framework of metal again.So far, finish the wiring of layer of metal on the technology.
Before finishing the layer of metal wiring, carrying out subsequent handling, carry out complanation (global planarization) to the profile of film on the wafer or layer and handle, to guarantee the necessary evenness of integrated circuit.Planarization process adopts the mode of chemico-mechanical polishing (CMP, chemical-mechanical polishing) usually.CMP technology is a kind of grinding technics, and it relates to by under the situation about existing at chemical pulp, applies controlled pressure, burnishing pad and wafer is rotated toward each other, thereby material is removed from semiconductor wafer selectively.Utilize CMP, both can also can on metal, produce good part plan on the oxide.After the CMP process, just can be ready for follow-up processing step through the surface of polishing, for example increase more layer.
Yet, the planar profile that the CMP process produces depends on the pattern density of bottom usually, owing to the inhomogeneous variation that produces of bottom pattern density can be greater than 30%~40%, 90nm, 65nm and following technology have particularly been arrived, because the number of plies of integrated circuit is more, this variation is more obvious.In order to prevent that owing to the irregular problem in the inhomogeneous CMP of causing of bottom pattern density rear surface common way is to insert virtual filler in the sparse zone of each layer pattern at present, for example: virtual active area, dummy gate and dummy metal layer etc.
Equally, in radio frequency integrated circuit, also existence causes the irregular problem in CMP rear surface owing to the bottom pattern density is inhomogeneous, in order to address this problem, usually also be by inserting virtual filler in the sparse zone of each layer pattern, for example: virtual active area, dummy gate and dummy metal layer wait to be realized.
In radio frequency integrated circuit, film inductor plays important effect, become a kind of electronic devices and components of key and be widely used in the various radio frequency integrated circuit, voltage controlled oscillator (VCO for example, Voltage Control Oscillator), low noise amplifier (LNA, Low-noise Amplifier) and frequency mixer (mixer) etc. all need to use film inductor.
An important indicator estimating film inductor performance quality is a quality factor q, and quality factor q is high more, and the efficient of film inductor is just high more.As a rule, the quality factor q of film inductor is subjected to the restriction of the parasitic loss of substrate own, and this loss comprises the high resistance by the metal level of film inductor own.Therefore, in order to reach high-quality-factor Q, resistance in the film inductor should be as far as possible little, and a kind of technology that reduces the resistance in the film inductor is the thickness that increases the metal be used for making film inductor, for reaching this purpose, usually film inductor is arranged in the top layer of integrated circuit, this is because the metal layer of top layer can be done very thickly, and further planarization is not crucial.Simultaneously, with film inductor arrange with substrate at a distance of as far as possible far away so as to reduce because and the substrate interaction form to the electric capacity between the substrate.
Though film inductor is arranged in the top layer of the integrated circuit of substrate apart from each other favourable to the Q value that improves film inductor, yet can cause the pattern density of film inductor bottom too small, be unfavorable for surface smoothness.
In order to address this problem, common way is filled the dummy metal filler below the film inductor zone at present, described dummy metal filler comprises the multilayer virtual metal level, wherein, the concrete number of plies of dummy metal layer depends on makes the employed technology of this integrated circuit, every layer of dummy metal layer in the described multilayer virtual metal level comprises a plurality of dummy metals (dummy metal), and dummy metal in described every layer of dummy metal layer and the dummy metal in the adjacent virtual metal level are randomize, please refer to Fig. 1, Fig. 1 is the schematic diagram of film inductor of the dummy metal filler of existing band randomize structure, as shown in Figure 1, described film inductor comprises inductance main body 201, the inductance that links to each other with described inductance main body 201 coiling 202 and be positioned at described inductance main body 201 and the wind the line dummy metal filler 100 of 202 belows of inductance, described dummy metal filler 100 comprises 8 layers of dummy metal layer, every layer of dummy metal layer in described 8 layers of dummy metal layer comprises a plurality of dummy metals, comprise 3 dummy metals 10 as ground floor dummy metal layer 1, second layer dummy metal layer 2 comprises 2 dummy metals 20 etc., and the dummy metal in described every layer of dummy metal layer and the dummy metal in the adjacent virtual metal level are randomize.Yet the insertion of the dummy metal filler of randomize causes very big influence to the Q value of film inductor, will cause the Q value of planar inductor to surpass 15% decline.
Therefore, how to fill the dummy metal layer effectively, become the problem that industry is needed solution badly to reduce its influence to the Q value of film inductor.
Summary of the invention
The object of the present invention is to provide a kind of dummy metal interstitital texture, the problem that the performance of integrated circuit is made a big impact with the dummy metal layer that solves randomize.
Another object of the present invention is to provide a kind of film inductor, the problem that the quality factor of film inductor is made a big impact with the dummy metal layer that solves randomize with the dummy metal filler.
For addressing the above problem, the present invention proposes a kind of dummy metal interstitital texture, described dummy metal interstitital texture comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level.
Optionally, described dummy metal is a copper.
Optionally, described dummy metal is an aluminium.
Simultaneously, the present invention also provides a kind of film inductor with the dummy metal filler, the film inductor of described band dummy metal filler is positioned at the top layer of integrated circuit, it is characterized in that, comprise the inductance main body, the dummy metal filler that the inductance that links to each other with described inductance main body winds the line and is positioned at described inductance main body and inductance coiling below, described dummy metal filler comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level.
Optionally, described dummy metal is a copper.
Optionally, described dummy metal is an aluminium.
Optionally, described inductance main body is super thick metal.
Optionally, the thickness of described super thick metal is 3.1 microns~3.7 microns.
Optionally, described super thick metal is a copper.
Optionally, described super thick metal is an aluminium.
Optionally, the film inductor of described band dummy metal filler is a spiral inductor.
Optionally, the film inductor of described band dummy metal filler is three end centre cap differential inductors.
Compared with prior art, the invention provides a kind of dummy metal interstitital texture, described dummy metal interstitital texture comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level, thereby make the density distribution of dummy metal more even, reduced the influence of dummy metal performance of integrated circuits.
Simultaneously, the invention provides a kind of film inductor with the dummy metal filler, the below of described film inductor is provided with the dummy metal filler, described dummy metal filler comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level, thereby make the density metal of induction areas below of film inductor more even, reduced the influence of dummy metal the film inductor quality factor.
Description of drawings
Fig. 1 is the schematic diagram of film inductor of the dummy metal filler of existing band randomize structure;
The schematic diagram of the dummy metal interstitital texture that Fig. 2 provides for the embodiment of the invention;
Fig. 3 the present invention executes the schematic diagram of film inductor of the dummy metal filler of the band cross arrangement structure that example provides;
Fig. 4 is that the quality factor of different arrangement mode lower plane inductors of dummy metal filler is with the change curve of frequency;
Fig. 5 is the schematic diagram of the film inductor of the dummy metal filler of band homogeneous texture.
Embodiment
Below in conjunction with the drawings and specific embodiments the dummy metal filler of the present invention's proposition and the film inductor of band dummy metal filler are described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only be used for conveniently, the purpose of the aid illustration embodiment of the invention lucidly.
Core concept of the present invention is, a kind of dummy metal interstitital texture is provided, described dummy metal interstitital texture comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals (dummymetal), dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level, thereby make the density distribution of dummy metal more even, reduced the influence of dummy metal performance of integrated circuits.
Simultaneously, the present invention also provides a kind of film inductor with the dummy metal filler, the below of described film inductor is provided with the dummy metal filler, described dummy metal filler comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level, thereby make the density metal of induction areas below of film inductor more even, reduced the influence of dummy metal the film inductor quality factor.
Please refer to Fig. 2, the schematic diagram of the dummy metal interstitital texture that Fig. 2 provides for the embodiment of the invention, as shown in Figure 2, described dummy metal interstitital texture comprises 8 layers of dummy metal layer, be 1 to the 8th layer of dummy metal layer 8 of ground floor dummy metal layer, every layer of dummy metal layer in described 8 layers of dummy metal layer comprises a plurality of dummy metals, comprise 3 dummy metals 10 as ground floor dummy metal layer 1, second layer dummy metal layer 2 comprises 2 dummy metals 20 etc., and the dummy metal in described every layer of dummy metal layer and the dummy metal in the adjacent virtual metal level are cross arrangements.
Please continue with reference to figure 3, Fig. 3 the present invention executes the schematic diagram of film inductor of the dummy metal filler of the band cross arrangement structure that example provides, the film inductor of described band dummy metal filler is positioned at the top layer of integrated circuit, as shown in Figure 3, the film inductor of described band dummy metal filler comprises inductance main body 201, the inductance that links to each other with described inductance main body 201 coiling 202 and be positioned at described inductance main body 201 and the wind the line dummy metal filler 100 of 202 belows of inductance, described dummy metal filler 100 comprises 8 layers of dummy metal layer, be 1 to the 8th layer of dummy metal layer 8 of ground floor dummy metal layer, every layer of dummy metal layer in described 8 layers of dummy metal layer comprises a plurality of dummy metals, comprise 3 dummy metals 10 as ground floor dummy metal layer 1, second layer dummy metal layer 2 comprises 2 dummy metals 20 etc., and the dummy metal in described every layer of dummy metal layer and the dummy metal in the adjacent virtual metal level are cross arrangements.
Wherein, the film inductor of described band dummy metal filler is three end centre cap differential inductors, and described inductance main body 201 is super thick metal, and its thickness is 3.1 microns~3.7 microns.
And according to making the concrete technology that integrated circuit adopted, described dummy metal can be copper or aluminium; Simultaneously, according to making the concrete technology that integrated circuit adopted, the super thick metal that forms described inductance main body 201 can be copper or aluminium.
In a specific embodiment of the present invention, the number of plies of the dummy metal layer of described dummy metal filler is 8 layers, yet according to actual conditions, described dummy metal layer the number of plies can also be worth for other, the concrete number of plies is determined according to the technology of making integrated circuit.
In a specific embodiment of the present invention, the film inductor of described band dummy metal filler is three end centre cap differential inductors, yet according to actual conditions, the film inductor of described band dummy metal filler can also be the film inductor of other kind, for example spiral inductor.
In a specific embodiment of the present invention, described dummy metal filler is to be described as the below that is used for film inductor, so that the density metal of film inductor below is uniform, yet should be realized that, described dummy metal filler can also be applied in other device, for example transducer.
Please continue with reference to figure 4, Fig. 4 is that the quality factor of different arrangement mode lower plane inductors of dummy metal filler is with the change curve of frequency, wherein curve a is the quality factor q of the film inductor of the dummy metal filler that the adopts band cross arrangement structure provided by the invention change curve with frequency, curve b is the quality factor q of the film inductor of the dummy metal filler that adopts the band homogeneous texture change curve with frequency, and curve c is the quality factor q of the film inductor of the dummy metal filler that the adopts band randomize structure change curve with frequency.As shown in Figure 4, under identical frequency, the quality factor of the film inductor of curve a representative is greater than the quality factor of the unilateral inductor of curve b and curve c representative, and the performance of film inductor that shows the dummy metal filler of band cross arrangement structure provided by the invention is better than the film inductor with the dummy metal filler of the film inductor of the dummy metal filler of homogeneous texture and band randomize structure.This is because the dummy metal in the film inductor of the dummy metal filler of band cross arrangement structure provided by the present invention is more evenly distributed.
Wherein, the structure of the film inductor of the dummy metal filler of described band homogeneous texture please refer to Fig. 5, Fig. 5 is the schematic diagram of the film inductor of the dummy metal filler of band homogeneous texture, as shown in Figure 5, dummy metal filler in the film inductor of the dummy metal filler of described band homogeneous texture comprises 8 layers of dummy metal layer, be 1 to the 8th layer of dummy metal layer 8 of ground floor dummy metal layer, every layer of dummy metal layer in described 8 layers of dummy metal layer comprises a plurality of dummy metals, comprise 3 dummy metals 10 as ground floor dummy metal layer 1, second layer dummy metal layer 2 comprises 2 dummy metals 20 etc., and the dummy metal in described every layer of dummy metal layer and the dummy metal in the adjacent virtual metal level are arranged in parallel.
In sum, the invention provides a kind of dummy metal interstitital texture, described dummy metal interstitital texture comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level, thereby make the density distribution of dummy metal more even, reduced the influence of dummy metal performance of integrated circuits.
Simultaneously, the present invention also provides a kind of film inductor with the dummy metal filler, the below of described film inductor is provided with the dummy metal filler, described dummy metal filler comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level, thereby make the density metal of induction areas below of film inductor more even, reduced the influence of dummy metal the film inductor quality factor.
Obviously, those skilled in the art can carry out various changes and modification to invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (12)

1. a dummy metal interstitital texture is characterized in that, comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level.
2. dummy metal interstitital texture as claimed in claim 1 is characterized in that, described dummy metal is a copper.
3. dummy metal interstitital texture as claimed in claim 1 is characterized in that, described dummy metal is an aluminium.
4. film inductor with the dummy metal filler, the film inductor of described band dummy metal filler is positioned at the top layer of integrated circuit, it is characterized in that, the dummy metal filler that the inductance that comprise the inductance main body, links to each other with described inductance main body winds the line and is positioned at described inductance main body and inductance coiling below, described dummy metal filler comprises the multilayer virtual metal level, and wherein every layer of dummy metal layer comprises a plurality of dummy metals, dummy metal in described every layer of dummy metal layer and the dummy metal cross arrangement in the adjacent virtual metal level.
5. the film inductor of band dummy metal filler as claimed in claim 4 is characterized in that, described dummy metal is a copper.
6. the film inductor of band dummy metal filler as claimed in claim 4 is characterized in that, described dummy metal is an aluminium.
7. the film inductor of band dummy metal filler as claimed in claim 4 is characterized in that, described inductance main body is super thick metal.
8. the film inductor of band dummy metal filler as claimed in claim 7 is characterized in that, the thickness of described super thick metal is 3.1 microns~3.7 microns.
9. the film inductor of band dummy metal filler as claimed in claim 8 is characterized in that, described super thick metal is a copper.
10. the film inductor of band dummy metal filler as claimed in claim 8 is characterized in that, described super thick metal is an aluminium.
11. the film inductor of band dummy metal filler as claimed in claim 4 is characterized in that, the film inductor of described band dummy metal filler is a spiral inductor.
12. the film inductor of band dummy metal filler as claimed in claim 4 is characterized in that, the film inductor of described band dummy metal filler is three end centre cap differential inductors.
CN2010101923792A 2010-06-04 2010-06-04 Dummy metal-filled structure and planar inductor with dummy metal fillers Pending CN102270625A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104051435A (en) * 2013-03-11 2014-09-17 台湾积体电路制造股份有限公司 Structure and Method for an Inductor With Metal Dummy Features
WO2020199036A1 (en) * 2019-03-29 2020-10-08 华为技术有限公司 Inductive wiring architecture, integrated circuit, and communication device
WO2022242000A1 (en) * 2021-05-19 2022-11-24 长鑫存储技术有限公司 Semiconductor structure

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CN1848423A (en) * 2004-12-21 2006-10-18 三洋电机株式会社 Semiconductor apparatus and circuit apparatus
JP2007180321A (en) * 2005-12-28 2007-07-12 Matsushita Electric Ind Co Ltd Hybrid electronic component
CN101128921A (en) * 2005-03-11 2008-02-20 松下电器产业株式会社 Semiconductor integrated circuit
CN101241923A (en) * 2007-02-08 2008-08-13 台湾积体电路制造股份有限公司 Image sensor semiconductor device

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Publication number Priority date Publication date Assignee Title
CN1499626A (en) * 2002-10-30 2004-05-26 ��ʿͨ��ʽ���� Semiconductor device and its mfg. method
CN1848423A (en) * 2004-12-21 2006-10-18 三洋电机株式会社 Semiconductor apparatus and circuit apparatus
CN101128921A (en) * 2005-03-11 2008-02-20 松下电器产业株式会社 Semiconductor integrated circuit
JP2007180321A (en) * 2005-12-28 2007-07-12 Matsushita Electric Ind Co Ltd Hybrid electronic component
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104051435A (en) * 2013-03-11 2014-09-17 台湾积体电路制造股份有限公司 Structure and Method for an Inductor With Metal Dummy Features
CN104051435B (en) * 2013-03-11 2017-11-03 台湾积体电路制造股份有限公司 Inductor structure and method with pseudo- metal parts
WO2020199036A1 (en) * 2019-03-29 2020-10-08 华为技术有限公司 Inductive wiring architecture, integrated circuit, and communication device
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WO2022242000A1 (en) * 2021-05-19 2022-11-24 长鑫存储技术有限公司 Semiconductor structure

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Application publication date: 20111207