CN102269619A - Wireless sensor network-based acoustic signal acquisition terminal - Google Patents
Wireless sensor network-based acoustic signal acquisition terminal Download PDFInfo
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- CN102269619A CN102269619A CN 201110125899 CN201110125899A CN102269619A CN 102269619 A CN102269619 A CN 102269619A CN 201110125899 CN201110125899 CN 201110125899 CN 201110125899 A CN201110125899 A CN 201110125899A CN 102269619 A CN102269619 A CN 102269619A
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Abstract
The invention relates to a wireless sensor network-based acoustic signal acquisition terminal, which comprises an acoustic sensor array module, an acoustic signal conditioning module, a microprocessor module, a wireless transmitting and receiving module and a power module. Six paths of acoustic signals acquired by the acoustic sensor array module are connected to the input end of the six channel-containing acoustic signal conditioning module; the output end of the acoustic signal conditioning module is connected with the input end of the microprocessor module; the output end of the microprocessor module is connected to the input end of the wireless transmitting and receiving module; and the power module provides power for the acoustic sensor array module, the acoustic signal conditioning module, the microprocessor module and the wireless transmitting and receiving module respectively. When the terminal equipment is used for constructing a wireless sensor network, the vehicle identification accuracy is high, the application cost is reduced, and a vehicle identification coverage area can be increased through the wireless sensor network.
Description
Technical field
The present invention relates to radio sensing network and Embedded System Design field, relate to a kind of acoustical signal acquisition terminal based on radio sensing network.
Background technology
In modern war, track vehicle and wheeled vehicle are still being played the part of important role.How to distinguish afield that crawler type and wheeled vehicle become an emphasis of each country's research.Recognition methods commonly used comprises radar, infrared, video image or spy satellite etc. on modern battlefield.These methods respectively have relative merits, are limited such as the precision of infrared acquisition all with distance, and the overall limitation of surveying is also bigger.Such as radar detection, but its precision and accuracy than higher cost than higher, and also be subjected to the influence of environment in the application in battlefield, in the open air with the place that relatively exposes because himself characteristics of radar are also under attack easily.Utilize acoustical signal distinguish vehicle in the Traffic monitoring field and military field obtained some and used, but actual be applied in the constraint that also is subjected to various conditions on investigative range and the precision.
Traditional acoustical signal collection all is to finish by microphone or microphone array.This method is at the comparative maturity of sniper's detecting and locating system utilization.Sniper's acoustic detection positioning system receives and measures the position that the muzzle shock wave of sniper rifle and shock wave that projectile flight produces are determined the sniper by microphone array.Vehicle identification system based on acoustical signal is similar to the principle of sniper's detecting and locating system, and vehicle identification system is that the different acoustic signals that utilize different vehicle to produce are under steam realized the resolution to vehicle.The design of system can be divided into three parts: the one, and sensor array; The 2nd, signal processing unit; Three data far-end transmission units.The acquisition range of the sound collection array of some reality is very limited now, have no idea to realize co-ordination in a plurality of sensor arrays of area arrangements that a slice is bigger, the cost of each sensor array is also than higher, in the acoustic signal processing unit of reality, signal conditioning circuit carries out certain processing to acoustical signal and sends into A/D converter and carry out A/D conversion and handle.Aspect algorithm, there have been some scientific research personnel that Theory of Information Fusion is applied to and differentiated based on the target of acoustical signal, actual effect neither be very outstanding, but very good of prospect.Method for especially distinguish vehicle target in the reality in the acoustical signal of military field application all needs to solve design cost from the actual system design to the theoretical research, detection on a large scale waits the emphasis problem.
Summary of the invention
The present invention is directed to the limitation of prior art, the acoustical signal acquisition terminal based on radio sensing network is provided.
The technical scheme that technical solution problem of the present invention is taked is:
The present invention includes sensor array module, acoustical signal conditioning module, microprocessor module, wireless transmission and receiver module and power module.
Six tunnel acoustical signals of sound sensor array module collection are received the input end of the acoustical signal conditioning circuit module that comprises six passages.The output terminal of acoustical signal conditioning module links to each other with the microprocessor module input end.The output terminal of microprocessor module is connected to the input end of wireless transmission and receiver module.
Module, microprocessor module and wireless transmission and receiver module that described power module is respectively sensor array module, acoustical signal modulate circuit provide power supply.
Described sound sensing array module comprises little acoustic pickup M1, little acoustic pickup M2, little acoustic pickup M3, little acoustic pickup M4, little acoustic pickup M5 and little acoustic pickup M6; The anodal port of little acoustic pickup M1 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M1 links to each other with ground.The anodal port of little acoustic pickup M2 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M2 links to each other with ground.The anodal port of little acoustic pickup M3 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M3 links to each other with ground.The anodal port of little acoustic pickup M4 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M4 links to each other with ground.The anodal port of little acoustic pickup M5 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M5 links to each other with ground.The anodal port of little acoustic pickup M6 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M6 links to each other with ground.
Described acoustical signal conditioning module comprises first capacitor C 1, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, second capacitor C 2, the 5th resistance R 5, the first operational amplifier U1A, the 3rd capacitor C 3 and the first voltage stabilizing diode D1.One end of first capacitor C 1 links to each other with the 3rd resistance R 3 one ends, and first resistance R 1 links to each other with power supply, and second resistance R, 2 one ends link to each other with ground, and an end of first resistance R, 1, the second resistance R, 2, the first capacitor C 1 and the end of the 3rd resistance E3 have a public intersection point.The 3rd resistance R 3 one ends link to each other with the 4th resistance R 4 one ends, the 3rd resistance R 3 links to each other with the negative pole of amplifier U1A with the 4th resistance R 4, second capacitor C, 2 one ends link to each other with ground, the 5th resistance R 5 one ends link to each other with ground, and second capacitor C 2 links to each other with the positive terminal of the first amplifier U1A with the 5th resistance R 5 one ends.Output one end of amplifier links to each other with the positive terminal of the 3rd capacitor C 3 and the first voltage stabilizing diode D1, the 3rd capacitor C 3 other ends link to each other with ground, the negative pole end of the first voltage stabilizing diode D1 links to each other with ground, and the A/D port that the output terminal of amplifier is connected to first processor U1 carries out the A/D conversion.
Described microprocessor module comprises the second diode D2, first switch SW 1, the 6th resistance R 6, the 4th capacitor C 4, the 7th resistance R 7, the 5th capacitor C 5, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8 and first microprocessor U1.Anodal termination+5V power supply of the second diode D2, negative pole end links to each other with first switch SW 1, and the 6th resistance R 6 one ends link to each other with+5V power supply, and the other end links to each other with the 4th capacitor C 4, the 4th capacitor C 4 other ends link to each other with ground, and the other end of first switch SW 1 also links to each other with ground.One end of the 7th resistance R 7 links to each other with the RESET port of first processor U1.ADC.0～ADC.5 of first processor U1 links to each other with the output AD1～AD5 of signal conditioning circuit respectively.The vdd terminal of first processor U1 links to each other with the 3.3V power supply, and an end of the 5th capacitor C 5, the six capacitor C 6 all links to each other with the 3.3V power supply, and an other end all links to each other with ground.The Vref end of first processor U1 links to each other with the 3.3V power supply, and an end of the 7th capacitor C 7, the eight capacitor C 8 all links to each other with the 3.3V power supply, and an other end all links to each other with ground, and the model of described first microprocessor U1 is NUC100LD3AN.
Described wireless transmission and receiver module comprise the 9th capacitor C 9, the tenth capacitor C the 10, the 11 capacitor C the 11, the 12 capacitor C the 12, the 13 capacitor C 13, the 8th resistance R 8, the second processor U2, the 14 capacitor C the 14, the 15 capacitor C the 15, the 16 capacitor C the 16, the 17 capacitor C the 17, the 18 capacitor C 18, first inductance L 1, second inductance L 2, the first antenna AT1 and the first level transferring chip T1.One end of the 9th capacitor C 9 links to each other with the C1+ port of the first antenna T1, and the other end links to each other with the C1-port of the first antenna T1.One end of the tenth capacitor C 10 links to each other with the C2+ port of the first antenna T1, and the other end links to each other with the C2-port of the first antenna T1.One end of the 11 capacitor C 11 links to each other with the V+ port of the first antenna T1, and the other end links to each other with ground.One end of the 12 capacitor C 12 links to each other with the V-port of the first antenna T1, and the other end links to each other with ground.The VCC port of the first antenna T1 links to each other with the 3.3V power supply.The R1IN port of the first antenna T1 links to each other with the PB.1/TX0 of first microprocessor U1.The R1OUT port of the first antenna T1 links to each other with the P1_2 of the second processor U2.The R2IN port of the first antenna T1 links to each other with the P1_1 port of the second processor U2.The R2OUT port of the first antenna T1 links to each other with the PB.0/RX0 of first microprocessor U1.The VCC end of the second processor U2 links to each other with the 3.3V power supply.One end of the 8th resistance R 8 links to each other with the RBIAS of U2 end, and the other end links to each other with ground.The 13 electric capacity one end links to each other with the DCOUPLE end of U2, and the other end links to each other with ground.The GND end of the second processor U2 links to each other with ground.AVDD1～AVDD6 of the second processor U2 links to each other with the 3.3V power supply.The DVDD1 of the second processor U2 links to each other with the 3.3V power supply with DVDD2.One end of the 14 electric capacity links to each other with the end of the RF_N of the second processor U2, and the other end links to each other with first inductance L 1.The 15 capacitor C 15 1 ends link to each other with second inductance L 2.An other end of first inductance L 1 links to each other with ground.One end of the 17 capacitor C 17 links to each other with second inductance L 2, and an other end links to each other with ground.One end of the 16 capacitor C 16, the second inductance L 2 links to each other with the 18 capacitor C 18, and an other end of the 18 capacitor C 18 links to each other with the first antenna AT1.
Described power module comprises to be provided+first power module of 12V voltage, provide the second source module of 5V and 3.3V voltage.
First power module comprises the 19 capacitor C 19, the first voltage stabilizer VR1, the 3rd diode D3, the 20 capacitor C 20, the 9th resistance R 9, the tenth resistance R 10, the 4th diode D4 and the 21 capacitor C 21.Input power supply VIN end links to each other with the Vin end of the first voltage stabilizer VR1, and an end of the 19 electric capacity links to each other with the Vin of the first voltage stabilizer VR1, and the other end links to each other with ground.The positive terminal of the 3rd diode D3 links to each other with the Vin of the first voltage stabilizer VR1, and negative pole end links to each other with the Vout end of the first voltage stabilizer VR1.The 20 capacitor C 20 1 ends link to each other with the GND of the first voltage stabilizer VR1, and the other end links to each other with ground.The 9th resistance R 9 one ends link to each other with the Vout end of the first voltage stabilizer VR1, and the other end links to each other with an end of the tenth resistance R 10, and an end of the tenth resistance R 10 links to each other with ground.The 4th diode D4 positive terminal links to each other with the Vout end of the first voltage stabilizer VR1, and negative pole end links to each other with the 20 capacitor C 20.One end of the 21 capacitor C 21 links to each other with the Vout of the first voltage stabilizer VR1, and the other end links to each other with ground.
The second source module comprises the 22 capacitor C the 22, the 23 capacitor C 23, the second voltage stabilizer VR2, the 24 capacitor C the 24, the 24 capacitor C the 25, the 26 capacitor C the 26, the 27 capacitor C 27 and the 3rd voltage stabilizer VR3.One end of the 22 capacitor C 22, the 23 capacitor C 23 links to each other with the Vin end of the second voltage stabilizer VR2 simultaneously, and the other end all links to each other with ground.The GND end of the second voltage stabilizer VR2 links to each other with ground.The Vout of second voltage stabilizer VR2 end connects simultaneously with an end of the 24 capacitor C 24, the 25 capacitor C 25, and an other end of the 24 capacitor C 24, the 25 capacitor C 25 all links to each other with ground.The GND of the 3rd voltage stabilizer VR3 links to each other with ground, and the OUT end of the 3rd voltage stabilizer VR3 links to each other with the Vout end.The 27 capacitor C 27, the 28 capacitor C 28 link to each other with the Vout end of the 3rd voltage stabilizer VR3 simultaneously, and their other end all links to each other with ground.
The present invention has following beneficial effect with respect to prior art: design on this link in the sound sensing, than traditional microphone array, the sound sensor array that makes up by the little acoustic pickup of sound of the present invention design highly sensitive, low in energy consumption, performance show good in main embodiment be advantage on the design cost.In this link of signal Processing, the present invention is added to acoustical signal coupling and carries out the conversion of signal polarity on the DC network, and two electric capacity can be finished the work, and is simple and reliable and cost is very low.The NUC100LD3AN functional processor that terminal device is selected for use is powerful, and 12 A/D converters that inside carries not only precision height but also speed are fast, has also saved independently A/D converter of outside expansion simultaneously.Arrange that by radio sensing network the terminal device collection acoustical signal of some has increased the acquisition range of acoustical signal greatly, makes whole vehicle identification zone also increase.In general, the design of terminal device has reduced cost when the performance performance is excellent.With respect to existing technology, the terminal device that utilizes the present invention to design makes up the wireless exploration network, the accuracy rate height of vehicle identification, and application cost reduces the area coverage that has improved vehicle identification by radio sensing network.
Description of drawings
Fig. 1 is the terminal device circuitry structural drawing;
Fig. 2 is a sound sensor array module;
Fig. 3 is a sound sensor array plane structure chart;
Fig. 4 is the acoustical signal conditioning module;
Fig. 5 is a microprocessor module;
Fig. 6 is wireless transmission and receiver module;
Fig. 7 is first power module;
Fig. 8 is the second source module;
Fig. 9 is the vehicle identification system structural drawing;
Figure 10 is the synoptic diagram of the vehicle identification system on the battlefield;
Figure 11 is the fusion structure figure of vehicle identification system.
Embodiment
The present invention is further illustrated below in conjunction with accompanying drawing.
As shown in Figure 1, the acoustical signal acquisition terminal based on radio sensing network comprises sensor array module, acoustical signal conditioning module, microprocessor module, wireless transmission and receiver module and power module.
Six road signal CH1 by the collection of sound sensor array, CH2, CH3, CH4, CH5, CH6 are undertaken being input to the acoustical signal microprocessor module again after the signal Processing by the acoustical signal modulate circuit and carry out the A/D conversion.After finishing the A/D conversion on the microprocessor, data will be sent to by serial ports carries out wireless transmission on wireless transmit and the receiver module.
As shown in Figure 2, sound sensing array module mainly comprises: little acoustic pickup M1, little acoustic pickup M2, little acoustic pickup M3, little acoustic pickup M4, little acoustic pickup M5 and little acoustic pickup M6.The anodal port of M1 links to each other with+12V power supply, and the negative pole port of M1 links to each other with ground.The anodal port of M2 links to each other with+12V power supply, and the negative pole port of M2 links to each other with ground.The anodal port of M3 links to each other with+12V power supply, and the negative pole port of M3 links to each other with ground.The anodal port of M4 links to each other with+12V power supply, and the negative pole port of M4 links to each other with ground.The anodal port of M5 links to each other with+12V power supply, and the negative pole port of M5 links to each other with ground.The anodal port of M6 links to each other with+12V power supply, and the negative pole port of M6 links to each other with ground.
The microphony acoustic pickup is+the 12V power supply that it has three pins, two power pins and a signal output pin.
As shown in Figure 3, the sound sensor array by six microphony audiomonitors in two dimensional surface circle according to evenly distributions such as 60 ° of angles, radius of a circle is 1m.Microphony audiomonitor inside is made up of advanced person's discharge circuit and high-fidelity microphony acoustic pickup, and is not only highly sensitive, and monitor in 100 square metres of the occasions undistorted.Can arrange as required on the ground by microphony audiomonitor sound sensor array, also can be installed on the motion platform of vehicle one class.Microphony audiomonitor inside has comprised the amplification treatment circuit of front end signal, so terminal device does not need to carry out the signal processing and amplifying again.
As shown in Figure 4, the acoustical signal conditioning circuit module mainly comprises: first capacitor C, 1, the first resistance R, 1, the second resistance R 2, the 3rd resistance R 3, the four resistance R 4, the second capacitor C 2, the five resistance R 5, the first operational amplifier U1A, the 3rd capacitor C 3, the first voltage stabilizing diode D1.One end of first capacitor C 1 links to each other with signal CH1, the other end of first capacitor C 1 links to each other with first resistance R, 1 one ends, the other end of first capacitor C 1 links to each other with second resistance R, 2 one ends, the other end of first capacitor C 1 links to each other with the 3rd resistance R 3 one ends, the other end of first resistance R 1 links to each other with power supply, and second resistance R, 2 other ends link to each other with ground, first resistance R 1, one end of second resistance R, 2, the first capacitor C 1 and the end of the 3rd resistance E3 have a public intersection point.The 3rd resistance R 3 other ends link to each other with the 4th resistance R 4 one ends, the 3rd resistance R 3 links to each other with the negative pole of amplifier U1A, the 4th resistance R 4 links to each other with the negative pole of amplifier U1A, second capacitor C, 2 one ends link to each other with ground, the 5th resistance R 5 one ends link to each other with ground, and second capacitor C, 2 other ends link to each other with the positive terminal of the first amplifier U1A.The 5th resistance R 5 other ends link to each other with the positive terminal of the first amplifier U1A, output one end the 4th resistance R 4 other ends of amplifier link to each other, output one end of amplifier links to each other with the 3rd capacitor C 3 one ends, output one end of amplifier links to each other with the positive terminal of the first voltage stabilizing diode D1, the 3rd capacitor C 3 other ends link to each other with ground, the negative pole end of the first voltage stabilizing diode D1 links to each other with ground, and the A/D port that the output terminal of amplifier is connected to U1 carries out the A/D conversion.
The sound sensor array always has the output of six tunnel acoustical signals, and the acoustical signal characteristic of each road output is just the same, so their signal conditioning circuit is also just the same, only lists wherein one tunnel signal conditioning circuit figure here.
The acoustical signal of microphony audiomonitor output is an AC signal, so carrying out will carrying out certain processing before the A/D conversion.Because microphony audiomonitor inside has comprised high-quality amplifying circuit, so the outside mainly is that AC signal is converted to direct current signal.Method of the present invention is, AC signal is added to by coupling capacitance on the potential-divider network, and ambipolar signal just becomes unipolar.The RC coupled circuit of AC signal by forming with the resistor and the capacitor of lumped parameter is one group of single order Hi-pass filter in fact, and output frequency characteristic meets relational expression:
After the RC value is set, have-decay of 3DB, so claim fL the low frequency corner frequency of Hi-pass filter for this reason at frequency f L place.For convenience of calculation, as R with kilo-ohm, C is unit with UF, fL then is HZ, formula can be written as: fL (hz)=159/R (kilo-ohm) * C (microfarad).The output voltage range Wei – 2.2V of acoustic pickup～+ 2.2V.The bleeder circuit that first resistance R 1 and second resistance R 2 are formed connects+the 5V power supply, R1=R2 wherein, the voltage that M is ordered is 2.5V, the voltage that is added to behind the M point of acoustical signal coupling is output as 0.3V～4.7V like this, 4.7V voltage has surpassed the maximum bearing value 3.3V of A/D converter, satisfies the range that the A/D conversion allows so the acoustical signal after the coupling stack also will be carried out certain ratio conversion through ratio circuit.D1 is the voltage stabilizing diode of 3.3V, mainly is to be used for protecting A/D converter.
As shown in Figure 5, microprocessor module mainly comprises: the second diode D2, first switch SW, 1, the six resistance R, 6, the four capacitor C, 4, the seven resistance R, 7, the five capacitor C, 5, the six capacitor C 6, the seven capacitor C, 7, the eight capacitor C 8 and first processor U1.Anodal termination+5V power supply of the second diode D2, the negative pole end of the second diode D2 links to each other with first switch SW, 1 one ends, the 6th resistance R 6 one ends link to each other with+5V power supply, the 6th resistance R 6 other ends link to each other with the 4th capacitor C 4 one ends, the 4th capacitor C 4 other ends link to each other with ground, and the other end of first switch SW 1 links to each other with ground.One end of the 7th resistance R 7 is connected with the negative pole end of the second diode D2, one end of the 7th resistance R 7 links to each other with first switch SW, 1 one ends, one end of the 7th resistance R 7 is connected with the 6th resistance R 6 other ends, the other end of the 7th resistance R 7 links to each other with the 4th capacitor C 4 one ends, and the other end of the 7th resistance R 7 links to each other with the RESET port of U1.PA.0/ADC.0～PA.5/ADC.5 of U1 links to each other with the output AD1～AD5 of signal conditioning circuit respectively.The vdd terminal of U1 links to each other with the 3.3V power supply, and an end of the 5th capacitor C 5 all links to each other with the 3.3V power supply, and an end of the 6th capacitor C 6 all links to each other with the 3.3V power supply, and the other end of the 5th capacitor C 5 links to each other with ground, and the other end of the 6th capacitor C 6 links to each other with ground.The Vref end of U1 links to each other with the 3.3V power supply, and an end of the 7th capacitor C 7 all links to each other with the 3.3V power supply, and an end of the 8th capacitor C 8 all links to each other with the 3.3V power supply, and the other end of the 7th capacitor C 7 links to each other with ground, and the other end of the 8th capacitor C 8 links to each other with ground.
The first processor U1 that the present invention selects for use is based on the new NUC100LD3AN of the Tang processor of Cortex-M0 kernel.The main effect of microprocessor in system of the present invention has two: the one, acoustical signal is carried out the A/D conversion, and the 2nd, the acoustical signal data of A/D conversion are carried out preliminary processing.The travelling speed of NUC100LD3AN processor can reach 50MHz and power consumption is lower, and its internal-internal has comprised high-precision 12 A/D change-over circuit modules.When acoustical signal being carried out the A/D conversion, just saved independently A/D converter of outside expansion.The Vref port of NUC100LD3AN processor is the reference power source input end of A/D conversion, and what native system connected is the power supply of 3.3V.
As shown in Figure 6, wireless transmission and receiver module mainly comprise the 9th capacitor C 9, the ten capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13, the 8th resistance R 8, the second processor U2, the 14 capacitor C 14, the 15 capacitor C 15, the 16 capacitor C 16, the 17 capacitor C 17, the 18 capacitor C 18, the first inductance L 1, the second inductance L 2, the first antenna AT1, the first level transferring chip T1.One end of the 9th capacitor C 9 links to each other with the C1+ port of T1, and the other end of the 9th capacitor C 9 links to each other with the C1-port of T1.One end of the tenth capacitor C 10 links to each other with the C2+ port of T1, and the tenth capacitor C 10 other ends link to each other with the C2-port.One end of the 11 capacitor C 11 links to each other with the V+ port of T1,, the other end of the 11 capacitor C 11 links to each other with ground.One end of the 12 capacitor C 12 links to each other with the V-port of T1, and the other end of the 12 capacitor C 12 links to each other with ground.The VCC port of T1 links to each other with the 3.3V positive source.The R1IN port of T1 links to each other with the PB.1/TX0 of U1.The R1OUT port of T1 links to each other with the P1_2 of U2.The R2IN port of T1 links to each other with the P1_1 port of U2.The R2OUT port of T1 links to each other with the PB.0/RX0 of U1.The VCC end of U2 links to each other with the 3.3V positive source.One end of the 8th resistance R 8 links to each other with the RBIAS of U2 end, and the other end of the 8th resistance R 8 links to each other with ground.The 13 electric capacity one end links to each other with the DCOUPLE end of U2, and the other end of the 13 electric capacity links to each other with ground.The GND end of U2 links to each other with ground.AVDD1～AVDD6 of U2 links to each other with the 3.3V positive source.The DVDD1 of U2 links to each other with the 3.3V positive source with DVDD2.One end of the 14 electric capacity links to each other with the end of the RF_N of U2, and the other end of the 14 electric capacity links to each other with first inductance L 1.The 15 capacitor C 15 1 ends link to each other with second inductance L, 2 one ends.An other end of first inductance L 1 links to each other with ground.One end of the 17 capacitor C 17 links to each other with second inductance L, 2 one ends, and an other end of the 17 capacitor C 17 links to each other with ground.One end of the 16 capacitor C 16 links to each other with the 18 capacitor C 18, and an end of second inductance L 2 links to each other with the 18 capacitor C 18, and an other end of the 18 capacitor C 18 links to each other with the first antenna AT1.
Wireless transmit among the present invention and receiver module mainly are made of the second processor CC2530 and the first level transferring chip T1.CC2530 is special single-chip solution, economy and low-power consumption at IEEE 802.15.4 and Zigbee application.It has integrated enhancement mode 8051 microcontrollers of fully integrated efficient radio frequency transceiver and industrywide standard, the RAM of 8KB and other powerful support function and peripheral hardwares.CC2530 realizes communicating by letter with first processor NUC100LD3AN by serial ports.The data that NUC100LD3AN handles well are transferred to CC2530 by serial ports, and CC2530 receives to such an extent that order also is transferred on the NUC100LD3AN by serial ports.The level transferring chip T1 that selects for use in the invention is MAX3232, and its operating voltage is 3.3V.
Described power module mainly comprises two circuit modules: provide+first power module of 12V voltage and provide 5V and the second source module of 3.3V voltage.
As shown in Figure 7, first power module comprises: the 19 capacitor C 19, the first voltage stabilizer VR1, the 3rd diode D3, the 20 capacitor C 20, the nine resistance R 9, the ten resistance R 10, the four diode D4, the 21 capacitor C 21.Input power supply VIN end links to each other with the Vin end of VR1, and an end of the 19 electric capacity links to each other with Vin, and the other end of the 19 electric capacity links to each other with ground.The positive terminal of the 3rd diode D3 links to each other with VIN, and the negative pole end of the 3rd diode D3 links to each other with the Vout of VR3 end.The 20 capacitor C 20 1 ends link to each other with the GND of VR1, and the 20 capacitor C 20 other ends link to each other with ground.The 9th resistance R 9 one ends link to each other with the Vout end of VR1, and the other end of the 9th resistance R 9 links to each other with an end of the tenth resistance R 10, and the other two ends of the tenth resistance R 10 link to each other with ground.The 4th diode D4 positive terminal links to each other with the Vout end of VR1, and the negative pole end of the 4th diode D4 links to each other with the 20 capacitor C 20.One end of the 21 capacitor C 21 links to each other with the Vout of VR1, and the other end of the 21 capacitor C 21 links to each other with ground.The described first voltage stabilizer VR1 is the LM317 chip.
As shown in Figure 8, the second source module comprises: the 22 capacitor C 22, the 23 capacitor C 23, the second voltage stabilizer VR2, the 24 capacitor C 24, the 24 capacitor C 25, the 26 capacitor C 26, the 27 capacitor C 27, the three voltage stabilizer VR3.The 22 capacitor C 22 links to each other with the Vin end of VR2, and an end of the 23 capacitor C 23 links to each other with the Vin of VR2 end, and the 22 capacitor C 22 other ends link to each other with ground, and the other end of the 23 capacitor C 23 links to each other with ground.The GND end of VR2 links to each other with ground.The Vout end of VR2 is connected with the 24 capacitor C 24 1 ends, and the Vout end of VR2 is connected with an end of the 25 capacitor C 25, and an other end of the 24 capacitor C 24 links to each other with ground, and an other end of the 25 capacitor C 25 links to each other with ground.The GND of VR3 links to each other with ground, and the OUT end of VR3 links to each other with the Vout end.The 26 capacitor C 26 links to each other with the Vout end of VR3, and the 27 capacitor C 27 links to each other with the Vout end of VR3, and the other end of the 26 capacitor C 26 links to each other with ground, and the other end of the 27 capacitor C 27 links to each other with ground.The described second voltage stabilizer VR2 is the LM7805 chip, and the 3rd voltage stabilizer VR3 is the LM1117-3.3 chip.
Utilize terminal device of the present invention can make up crawler type and wheeled vehicle recognition system.As shown in Figure 9, this system comprises three modules: network coordinator, router and terminal device.Terminal device mainly is the collection of being responsible for acoustical signal.Router is that node is merged in the part of total system, it not only will finish the collection of acoustical signal and video signal, but also to carry out the fusion of foreign peoples's signal to acoustical signal and the video image of gathering on terminal device and the router, the local fusion results that obtains is sent in the network coordinator by radio sensing network.Network coordinator is the fusion center of total system, and it mainly finishes three tasks: the first, and the structure of responsible whole radio sensing network; The second, each local fusion results is carried out the overall situation merge; The 3rd, with the wireless network external network communication.Network coordinator communicates commands on each router, and router is sent on each terminal device again.
In conjunction with terminal device, router and network coordinator, on the battlefield of reality, utilize radio sensing network at relevant battlefield area arrangements wireless exploration network as shown in figure 10.In this system, always have three parts and form: the wireless exploration network on region of war, triones navigation system and the center that commands troops.The wireless exploration network on region of war is based on the radio sensing network of ZigBee, terminal device in the radio sensing network is settling the sound sensor array to gather acoustical signal, router arrangement sound sensor array and video image acquisition device, network coordinator is the core of whole detection system, it is responsible for the structure of network and communicates to connect, and the satellite communication on each region of war also is to be realized by the Big Dipper terminal device in the network coordinator.Radio sensing network has realized that on each region of war the transmission of sensor information is with shared.Triones navigation system mainly is to be responsible between region of war and region of war, the region of war with command troops in the heart information transmission, the center of commanding troops utilizes Beidou satellite navigation system can realize remote command and deployment to each region of war.
According to the detection network synoptic diagram of Figure 10, building on the basis of hardware platform, utilization heterogeneous information blending theory carries out foreign peoples's signal fused to acoustical signal and video signal and comes resolution target.The common treatment structure of Multi-source Information Fusion always has three kinds: centralized fusion structure, distributed fusion structure and hybrid fusion structure.In practice, the effect of distributed fusion structure is best.Distributed fusion structure at first carries out local processing to the information of observation on localized sensor, after the Local treatment result is sent to the data fusion center, form the final overall situation at fusion center and estimate.In distributed fusion structure since when the data that fusion center merges vector data, therefore reduce the calculated load of fusion center greatly.Distributed fusion structure not only has local ability of following the tracks of, and the expense of system is not expensive and good stability, and comprehensive actual effect is relatively good.As shown in figure 11, acoustical signal and video signal that the terminal device of wireless exploration network and router are gathered carry out partial estimation on local processor (router), and then estimate just can obtain final fusion results through the overall situation of fusion center (network coordinator).
Claims (1)
1. based on the acoustical signal acquisition terminal of radio sensing network, comprise sensor array module, acoustical signal conditioning module, microprocessor module, wireless transmission and receiver module and power module, it is characterized in that:
Six tunnel acoustical signals of sound sensor array module collection are received the input end of the acoustical signal conditioning circuit module that comprises six passages; The output terminal of acoustical signal conditioning module links to each other with the microprocessor module input end; The output terminal of microprocessor module is connected to the input end of wireless transmission and receiver module;
Module, microprocessor module and wireless transmission and receiver module that described power module is respectively sensor array module, acoustical signal modulate circuit provide power supply;
Described sound sensing array module comprises little acoustic pickup M1, little acoustic pickup M2, little acoustic pickup M3, little acoustic pickup M4, little acoustic pickup M5 and little acoustic pickup M6; The anodal port of little acoustic pickup M1 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M1 links to each other with ground; The anodal port of little acoustic pickup M2 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M2 links to each other with ground; The anodal port of little acoustic pickup M3 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M3 links to each other with ground; The anodal port of little acoustic pickup M4 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M4 links to each other with ground; The anodal port of little acoustic pickup M5 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M5 links to each other with ground; The anodal port of little acoustic pickup M6 links to each other with+12V power supply, and the negative pole port of little acoustic pickup M6 links to each other with ground;
Described acoustical signal conditioning module comprises first capacitor C 1, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, second capacitor C 2, the 5th resistance R 5, the first operational amplifier U1A, the 3rd capacitor C 3 and the first voltage stabilizing diode D1; One end of first capacitor C 1 links to each other with the 3rd resistance R 3 one ends, and first resistance R 1 links to each other with power supply, and second resistance R, 2 one ends link to each other with ground, and an end of first resistance R, 1, the second resistance R, 2, the first capacitor C 1 and the end of the 3rd resistance E3 have a public intersection point; The 3rd resistance R 3 one ends link to each other with the 4th resistance R 4 one ends, the 3rd resistance R 3 links to each other with the negative pole of amplifier U1A with the 4th resistance R 4, second capacitor C, 2 one ends link to each other with ground, the 5th resistance R 5 one ends link to each other with ground, and second capacitor C 2 links to each other with the positive terminal of the first amplifier U1A with the 5th resistance R 5 one ends; Output one end of amplifier links to each other with the positive terminal of the 3rd capacitor C 3 and the first voltage stabilizing diode D1, the 3rd capacitor C 3 other ends link to each other with ground, the negative pole end of the first voltage stabilizing diode D1 links to each other with ground, and the A/D port that the output terminal of amplifier is connected to first processor U1 carries out the A/D conversion;
Described microprocessor module comprises the second diode D2, first switch SW 1, the 6th resistance R 6, the 4th capacitor C 4, the 7th resistance R 7, the 5th capacitor C 5, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8 and first microprocessor U1; Anodal termination+5V power supply of the second diode D2, negative pole end links to each other with first switch SW 1, and the 6th resistance R 6 one ends link to each other with+5V power supply, and the other end links to each other with the 4th capacitor C 4, the 4th capacitor C 4 other ends link to each other with ground, and the other end of first switch SW 1 also links to each other with ground; One end of the 7th resistance R 7 links to each other with the RESET port of first processor U1; ADC.0～ADC.5 of first processor U1 links to each other with the output AD1～AD5 of signal conditioning circuit respectively; The vdd terminal of first processor U1 links to each other with the 3.3V power supply, and an end of the 5th capacitor C 5, the six capacitor C 6 all links to each other with the 3.3V power supply, and an other end all links to each other with ground; The Vref end of first processor U1 links to each other with the 3.3V power supply, and an end of the 7th capacitor C 7, the eight capacitor C 8 all links to each other with the 3.3V power supply, and an other end all links to each other with ground, and the model of described first microprocessor U1 is NUC100LD3AN;
Described wireless transmission and receiver module comprise the 9th capacitor C 9, the tenth capacitor C the 10, the 11 capacitor C the 11, the 12 capacitor C the 12, the 13 capacitor C 13, the 8th resistance R 8, the second processor U2, the 14 capacitor C the 14, the 15 capacitor C the 15, the 16 capacitor C the 16, the 17 capacitor C the 17, the 18 capacitor C 18, first inductance L 1, second inductance L 2, the first antenna AT1 and the first level transferring chip T1; One end of the 9th capacitor C 9 links to each other with the C1+ port of the first antenna T1, and the other end links to each other with the C1-port of the first antenna T1; One end of the tenth capacitor C 10 links to each other with the C2+ port of the first antenna T1, and the other end links to each other with the C2-port of the first antenna T1; One end of the 11 capacitor C 11 links to each other with the V+ port of the first antenna T1, and the other end links to each other with ground; One end of the 12 capacitor C 12 links to each other with the V-port of the first antenna T1, and the other end links to each other with ground; The VCC port of the first antenna T1 links to each other with the 3.3V power supply; The R1IN port of the first antenna T1 links to each other with the PB.1/TX0 of first microprocessor U1; The R1OUT port of the first antenna T1 links to each other with the P1_2 of the second processor U2; The R2IN port of the first antenna T1 links to each other with the P1_1 port of the second processor U2; The R2OUT port of the first antenna T1 links to each other with the PB.0/RX0 of first microprocessor U1; The VCC end of the second processor U2 links to each other with the 3.3V power supply; One end of the 8th resistance R 8 links to each other with the RBIAS of U2 end, and the other end links to each other with ground; The 13 electric capacity one end links to each other with the DCOUPLE end of U2, and the other end links to each other with ground; The GND end of the second processor U2 links to each other with ground; AVDD1～AVDD6 of the second processor U2 links to each other with the 3.3V power supply; The DVDD1 of the second processor U2 links to each other with the 3.3V power supply with DVDD2; One end of the 14 electric capacity links to each other with the end of the RF_N of the second processor U2, and the other end links to each other with first inductance L 1; The 15 capacitor C 15 1 ends link to each other with second inductance L 2; An other end of first inductance L 1 links to each other with ground; One end of the 17 capacitor C 17 links to each other with second inductance L 2, and an other end links to each other with ground; One end of the 16 capacitor C 16, the second inductance L 2 links to each other with the 18 capacitor C 18, and an other end of the 18 capacitor C 18 links to each other with the first antenna AT1; The described first level transferring chip T1 model is MAX3232, and the second processor U2 model is CC2530;
Described power module comprises to be provided+first power module of 12V voltage, provide the second source module of 5V and 3.3V voltage;
First power module comprises the 19 capacitor C 19, the first voltage stabilizer VR1, the 3rd diode D3, the 20 capacitor C 20, the 9th resistance R 9, the tenth resistance R 10, the 4th diode D4 and the 21 capacitor C 21; Input power supply VIN end links to each other with the Vin end of the first voltage stabilizer VR1, and an end of the 19 electric capacity links to each other with the Vin of the first voltage stabilizer VR1, and the other end links to each other with ground; The positive terminal of the 3rd diode D3 links to each other with the Vin of the first voltage stabilizer VR1, and negative pole end links to each other with the Vout end of the first voltage stabilizer VR1; The 20 capacitor C 20 1 ends link to each other with the GND of the first voltage stabilizer VR1, and the other end links to each other with ground; The 9th resistance R 9 one ends link to each other with the Vout end of the first voltage stabilizer VR1, and the other end links to each other with an end of the tenth resistance R 10, and an end of the tenth resistance R 10 links to each other with ground; The 4th diode D4 positive terminal links to each other with the Vout end of the first voltage stabilizer VR1, and negative pole end links to each other with the 20 capacitor C 20; One end of the 21 capacitor C 21 links to each other with the Vout of the first voltage stabilizer VR1, and the other end links to each other with ground; The described first voltage stabilizer VR1 model is LM317;
The second source module comprises the 22 capacitor C the 22, the 23 capacitor C 23, the second voltage stabilizer VR2, the 24 capacitor C the 24, the 24 capacitor C the 25, the 26 capacitor C the 26, the 27 capacitor C 27 and the 3rd voltage stabilizer VR3; One end of the 22 capacitor C 22, the 23 capacitor C 23 links to each other with the Vin end of the second voltage stabilizer VR2 simultaneously, and the other end all links to each other with ground; The GND end of the second voltage stabilizer VR2 links to each other with ground; The Vout of second voltage stabilizer VR2 end connects simultaneously with an end of the 24 capacitor C 24, the 25 capacitor C 25, and an other end of the 24 capacitor C 24, the 25 capacitor C 25 all links to each other with ground; The GND of the 3rd voltage stabilizer VR3 links to each other with ground, and the OUT end of the 3rd voltage stabilizer VR3 links to each other with the Vout end; The 27 capacitor C 27, the 28 capacitor C 28 link to each other with the Vout end of the 3rd voltage stabilizer VR3 simultaneously, and their other end all links to each other with ground; The described second voltage stabilizer VR2 model is LM7805, and the 3rd voltage stabilizer VR3 model is LM1117-3.3.
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Application publication date: 20111207 Assignee: HANGZHOU DAZHI ELECTROMECHANICAL Co.,Ltd. Assignor: HANGZHOU DIANZI University Contract record no.: X2020330000073 Denomination of invention: Acoustic signal acquisition terminal based on Wireless Sensor Network Granted publication date: 20130102 License type: Common License Record date: 20201010 |