CN102262595B - Extended addressing method for microprocessor - Google Patents
Extended addressing method for microprocessor Download PDFInfo
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- CN102262595B CN102262595B CN201110214807.1A CN201110214807A CN102262595B CN 102262595 B CN102262595 B CN 102262595B CN 201110214807 A CN201110214807 A CN 201110214807A CN 102262595 B CN102262595 B CN 102262595B
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Abstract
The invention discloses an extended addressing method for a microprocessor. The extended addressing method comprises the following steps of: determining a set register by the microprocessor; setting the set register according to an in-operation data address; and judging a transmission mark, and reading and writing the register by combining a high address of the set register. By using the extended addressing method, the microprocessor can finish data reading and writing of a whole piece of memory chip of which the addressing capacity is far greater than that of the microprocessor, and the microprocessor can finish mass data temporary storage or storage during electrification working process.
Description
Technical field
The present invention relates to a kind of extended addressing method for microprocessor.
Background technology
Along with electronic equipment integrated level is more and more higher, the data volume of need processing is increasing, for microprocessor, deposits and storage capacity requires also more and more highlyer, if select microprocessor from the angle based on internal memory and storage capacity, causes unavoidably the waste of resource.Under high integration, low-power consumption and low-cost Electronic Design require, some microprocessors enjoy favor because interface function is powerful, and this often contradicts with data processing and storage capacity, need extensive expansion to deposit and storage capacity, and microprocessor access external data memory capacity is subject to the very big restriction of itself relevant interface pin number, there is no at present special-purpose extensive address expansion special chip; If consider expand microprocessor addressing register chip selection signal by programmable logic device (PLD), realize more difficultly, and when a large amount of address bus quantity of expansion, a plurality of internal memories of needs or storage chip, be unfavorable for the system integration and reduction power consumption.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiencies in the prior art, a kind of extended addressing method for microprocessor is provided.Adopt the present invention can make microprocessor complete the reading and writing data to the full wafer storage chip much larger than its addressing capability, make microprocessor in the process of working on power, complete mass data and keep in or store.
Technical solution of the present invention is:
An extended addressing method for microprocessor, can be used for making microprocessor to realize and carries out read-write operation to being greater than the storer of microprocessor addressing range, comprises the following steps:
S1: choose in the register of microprocessor for expanding one or more registers that arrange of microprocessor addressing range; The described register that arranges is for storing the extended address over microprocessor addressing range;
S2: when microprocessor need to write storer or read operation before, determine the memory address in storer by service data; The memory address of described service data can be divided into high address and low order address, and wherein low order address figure place is identical with Microprocessor Address figure place, and high address figure place is the figure place that exceeds Microprocessor Address; Microprocessor writes described high address register is set, and transmission sign is set to effectively;
S3: the high address arranging in register is latched, transmission sign is detected, if transmission sign is invalid, return to S2 to register setting is set; If transmission sign effectively, proceed to S4;
S4: microprocessor is to being write or read operation by service data:
When data writing, microprocessor directly will be outputed to storer by the low order address of service data, and the high address that storer utilization is latched and the low order address of input, by being written in storer by service data of microprocessor output;
When reading out data, microprocessor directly will be outputed to storer by the low order address of service data, and the high address that storer utilization is latched and the low order address of input, to being carried out addressing by service data, read for microprocessor;
Microprocessor, to after belonging to the operation by service data within the scope of same high address and completing, returns to S2.
Described quantity l=(k-m)/n that register is set, if l is not integer, gets the smallest positive integral that is greater than this number, and wherein, k is memory address bus bit wide; M is microprocessor address bus bit wide; N is data bus bit wide between microprocessor and storer.
The present invention compared with prior art tool has the following advantages:
(1) the present invention carries out piecemeal by microprocessor to memory storage space, the storage address utilization that exceeds microprocessor addressing range is arranged to register stores, before reading and writing data, to register setting is set, when reading and writing data, in conjunction with the direct-connected address bus of high address in register and micro-processing and storer is set, carry out addressing, can, in the situation that affecting hardly microprocessor stores speed, realize the expansion to memory addressing scope.
(2), when the present invention adopts and register pair microprocessor addressing content to be set to expand, utilize register in microprocessor to latch to exceed the method for microprocessor addressing range address date to be convenient to Project Realization.Under the control of transmission sign, can once complete in same address realm the repeatedly read-write operation of data, when address realm changes, only need to change the high address content in register is set, and do not need to change existing hardware, do not connect, therefore lowered the complexity of Project Realization.
Accompanying drawing explanation
Fig. 1 is process flow diagram of the present invention;
Fig. 2 is embodiment of the present invention structural drawing.
Embodiment
Below just by reference to the accompanying drawings the present invention is described further.
Extended addressing method for microprocessor of the present invention, can realize and operating exceeding the data of microprocessor addressing range.
Based on the method for the invention, carry out, after hardware design, realizing module and comprising: microprocessor, programmable logic device (PLD) and the storer for data are stored.Be illustrated in figure 2 structural representation of the present invention.The annexation of each device and module is: microprocessor and storer have the data bus that bit wide is nbit; Address and command signal between microprocessor and storer are transmitted by programming device, between microprocessor and programming device, comprise: the mbit address bus of microprocessor addressing register, nbit data bus and sheet choosing, read-write control signal; Between programming device and storer, comprise: the kbit address bus of storer, nbit data bus and sheet choosing, read-write control signal, k=m+e wherein, e is extended address bus position.
Below just in conjunction with the process flow diagram shown in above-mentioned hardware design and Fig. 1, introduce operation steps of the present invention:
(1) microprocessor setting
Micro-processing is with a slice or the several central processing units that large scale integrated circuit forms.These circuit are carried out the function of control assembly and arithmetic logical unti.Microprocessor is compared with traditional central processing unit, has volume little, lightweight and easy modular advantage.The element of microprocessor has: register file, arithmetical unit, sequential control circuit, and data and address bus.Microprocessor can complete instruction fetch, carry out instruction and with the operation such as extraneous storer and logical block exchange message, be the s operation control part of microcomputer.All kinds of single-chip microcomputers, ARM, DSP etc. conventional in communications electronics engineering all belong to microprocessor.
Microprocessor has special-purpose selected cell, generally comprise address bus, data bus and sheet choosing, read-write control signal, each has exclusive register to control, and is not doing expand in the situation that, and microprocessor addressing capability is confined to the quantity of address bus and chip selection signal.
In the method, for convenience of addressing, control, in microprocessor, choose the register of some as register is set, register is set for storing the extended address over microprocessor addressing range, register quantity l is set can be by formula l=(k-m)/n (if l be integer, get the smallest positive integral that is greater than this number) calculate, with above-mentioned corresponding, the k in formula is memory address bus bit wide; M is microprocessor address bus bit wide; N is data bus bit wide between microprocessor and storer.
Register and programmable logic device (PLD) one are set and are used from the extended address state that storage surpasses microprocessor addressing range.
(2) before data manipulation, microprocessor is prepared
Microprocessor need to storer is write or read operation before, first determine by service data corresponding memory address in storer.Memory address by service data in storer can be divided into high address and low order address.In the present invention, according to the addressing range of microprocessor, high address and low order address are defined, the address within microprocessor addressing range belongs to low order address, and the address that exceeds micro-processing addressing range belongs to high address.Therefore, corresponding any one data, if its memory address exceeds micro-processing addressing range, have determined that, by after the high address of service data and low order address, high address will be written into register is set.
In the present invention, each arranges register can only deposit the extended address position that maximum is no more than microprocessor data position (nbit), if extended address figure place is less than or equal to nbit, according to formula l=(k-m)/n (if l is not integer, get the smallest positive integral that is greater than this number) to calculate l be 1, only needs one register is set can completes the storage to extended address.Continued operation for ease of microprocessor to storer is chosen when register is set in microprocessor, selects the maximum address register of microprocessor as register is set.
If extended address figure place is greater than nbit, according to formula l=(k-m)/n (if l is not integer, getting the smallest positive integral that is greater than this number), calculate l and be greater than 1, need a plurality of registers that arrange to complete the storage to extended address.Continued operation for ease of microprocessor to storer is chosen when register is set in microprocessor, and continuous several address registers are as arranging register from maximum address register to select microprocessor, and number is identical with l.
(3) before data manipulation, programming device is prepared
Programmable logic device (PLD), by being connected with the hardware of microprocessor, judges microprocessor addressed state:
If microprocessor is to register writing address data are set, after programmable logic device (PLD) correct judgment, the data that arrange in register are latched, and give the e bit extended address being connected with memory hardware bus by data, set transmission sign effectively, in programming device inside, the m bit address bus being connected with microprocessor, storer is direct-connected, the sheet choosing, the read-write control signal that it are connected with microprocessor, storer respectively direct-connected simultaneously;
If microprocessor is to register register read-write data are in addition set, programmable logic device (PLD) judges this operation and checks that transmission indicates, if transmission flag set, can directly by programmable logic device (PLD) is inner direct-connected, to storer low order address, carry out read-write operation, if transmission indicates not set, programmable logic device (PLD) interconnector does not connect, cannot operate storer low order address, need to again read the data that arrange in register, and give the e bit extended address being connected with memory hardware bus, and to transmission flag set.
(4) data writing or reading
When microprocessor carries out read-write operation to storer first, need first to register write store high address status data is set, through programmable logic device (PLD), latch, deliver to storer upper address bits, programmable logic device (PLD) will be transmitted flag set simultaneously, and micro-processing low order address and storer low order address, sheet choosing and read-write control signal is direct-connected, so far, microprocessor just can be to storer low order address direct read/write in the memory block of high address representative; As need change storer high address state, again to being set, register writes change status data, then the low order address in the respective memory piece of high address representative is directly carried out to read-write operation.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (1)
1. an extended addressing method for microprocessor, can be used for making microprocessor to realize and carries out read-write operation to being greater than the storer of microprocessor addressing range, it is characterized in that comprising the following steps:
S1: choose in the register of microprocessor for expanding one or more registers that arrange of microprocessor addressing range; The described register that arranges, for storing the extended address over microprocessor addressing range, arranges register and programmable logic device (PLD) one and is used from the extended address state that storage surpasses microprocessor addressing range;
S2: when microprocessor need to write storer or read operation before, determine the memory address in storer by service data; Describedly by the memory address of service data, can be divided into high address and low order address, wherein low order address figure place is identical with Microprocessor Address figure place, and high address figure place is the figure place that exceeds Microprocessor Address; Microprocessor writes described high address register is set, and transmission sign is set to effectively;
S3: the high address arranging in register is latched, transmission sign is detected, if transmission sign is invalid, return to S2 to register setting is set; If transmission sign effectively, proceed to S4;
S4: microprocessor is to being write or read operation by service data:
When data writing, microprocessor directly will be outputed to storer by the low order address of service data, and the high address that storer utilization is latched and the low order address of input, by being written in storer by service data of microprocessor output;
When reading out data, microprocessor directly will be outputed to storer by the low order address of service data, and the high address that storer utilization is latched and the low order address of input, to being carried out addressing by service data, read for microprocessor;
Microprocessor, to after belonging to the operation by service data within the scope of same high address and completing, returns to S2;
Described quantity l-(k-m)/n that register is set, if l is not integer, gets the smallest positive integral that is greater than this number, and wherein, k is memory address bus bit wide; M is microprocessor address bus bit wide; N is data bus bit wide between microprocessor and storer.
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| CN105095095B (en) * | 2014-05-12 | 2018-04-06 | 上海大学 | A kind of computer system and data read-write method |
| KR102275710B1 (en) * | 2015-02-02 | 2021-07-09 | 삼성전자주식회사 | Memory Device and Memory System capable of over-writing and Operating Method thereof |
| CN106339327B (en) * | 2015-07-06 | 2019-08-20 | 上海大学 | A kind of computer system and blade server cabinet |
| CN108984441B (en) * | 2018-05-31 | 2020-06-02 | 烽火通信科技股份有限公司 | Method and system for maintaining data transmission consistency |
| CN112732338B (en) * | 2021-04-02 | 2021-08-31 | 北京欣博电子科技有限公司 | Method and device for expanding addressing range, storage medium and electronic equipment |
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| CN102033768A (en) * | 2010-12-10 | 2011-04-27 | 杭州海康威视数字技术股份有限公司 | Multi-CPU system and starting method thereof |
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| US3944983A (en) * | 1973-06-11 | 1976-03-16 | Texas Instruments Incorporated | Expandable data storage for a calculator system |
| US4363091A (en) * | 1978-01-31 | 1982-12-07 | Intel Corporation | Extended address, single and multiple bit microprocessor |
| US6032248A (en) * | 1998-04-29 | 2000-02-29 | Atmel Corporation | Microcontroller including a single memory module having a data memory sector and a code memory sector and supporting simultaneous read/write access to both sectors |
| CN100338571C (en) * | 2003-09-27 | 2007-09-19 | 英特尔公司 | Extended register space device of processor and method thereof |
| CN100378653C (en) * | 2005-01-20 | 2008-04-02 | 西安电子科技大学 | 8-bit RISC microcontroller with double arithmetic logic units |
| US7996651B2 (en) * | 2007-11-30 | 2011-08-09 | Microchip Technology Incorporated | Enhanced microprocessor or microcontroller |
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