CN102254707A - Electric double-layer capacitor package and manufacturing method thereof - Google Patents
Electric double-layer capacitor package and manufacturing method thereof Download PDFInfo
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- CN102254707A CN102254707A CN2010105371264A CN201010537126A CN102254707A CN 102254707 A CN102254707 A CN 102254707A CN 2010105371264 A CN2010105371264 A CN 2010105371264A CN 201010537126 A CN201010537126 A CN 201010537126A CN 102254707 A CN102254707 A CN 102254707A
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- 239000003990 capacitor Substances 0.000 title claims abstract description 169
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 239000011347 resin Substances 0.000 claims abstract description 15
- 229920005989 resin Polymers 0.000 claims abstract description 15
- 238000005538 encapsulation Methods 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 16
- 238000001746 injection moulding Methods 0.000 claims description 10
- 238000009434 installation Methods 0.000 claims description 3
- 230000004308 accommodation Effects 0.000 abstract 3
- 239000007772 electrode material Substances 0.000 description 6
- 239000003792 electrolyte Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 239000011148 porous material Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
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- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002322 conducting polymer Substances 0.000 description 2
- 229920001940 conductive polymer Polymers 0.000 description 2
- 238000004146 energy storage Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
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- 239000007787 solid Substances 0.000 description 2
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000011255 nonaqueous electrolyte Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/78—Cases; Housings; Encapsulations; Mountings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/10—Multiple hybrid or EDL capacitors, e.g. arrays or modules
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
- H01G11/74—Terminals, e.g. extensions of current collectors
- H01G11/76—Terminals, e.g. extensions of current collectors specially adapted for integration in multiple or stacked hybrid or EDL capacitors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/13—Energy storage using capacitors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Double-Layer Capacitors Or The Like (AREA)
Abstract
The invention discloses an electric double-layer capacitor package and a manufacturing method thereof. The electric double-layer capacitor package comprises a housing equipped with an accommodation space arranged therein and formed with insulating resin, a first external terminal and a second external terminal buried in the housing and respectively equipped with a first surface exposed to the accommodation space and a second surface exposed to the outside of the housing, a first capacitor cell and a second capacitor cell separated from each other within the accommodation space, and an internal series-connected terminal for connecting the first capacitor cell and the second capacitor cell in series. The first capacitor cell is connected with the first external terminal and the second capacitor cell is connected with the second external terminal.
Description
The cross reference of related application
Present patent application requires the priority at the korean patent application No.10-2010-0047517 of Korea S Department of Intellectual Property submission on May 20th, 2010, by reference, its disclosure is herein incorporated.
Technical field
The present invention relates to double-layer capacitor encapsulation and manufacture method thereof, more specifically, relate to the double-layer capacitor encapsulation and the manufacture method thereof that allow surge voltage and operating voltage to increase.
Background technology
Double-layer capacitor (EDLC) is a kind of energy storage medium, in this medium, two electrodes of anode and negative electrode are arranged to face with each other and are inserted with separator betwixt, make that can to produce the charge layer (electric double layer) with distinct symbols on the electrode surface of facing right.
EDLC is mainly as the accessory power supply of various Electrical and Electronic devices, IC stand-by power supply etc.In recent years, EDLC has been widely used in multiple application, comprises toy, industrial power, uninterrupted power supply (ups) Unity, solar energy storage, the sub-power supply of HEV/EV etc.
Usually by being received into element cell in the housing and filling housing with electrolyte then and make EDLC.Here, element cell constitutes by electrode pair and separator.
Electrode pair has according to the symbol of the external electric that applies to it and definite positive polarity (+) or negative polarity (-).The terminal that is applied in external electric is drawn from this electrode pair.
In this electrode pair, just (+) electric charge and negative (-) electric charge are polarized, and correspondingly, form two charge layers (electric double layer) in the individual unit battery.
Yet in traditional element cell, surge voltage is low, and promptly less than 3.0V, and operating voltage is also low, is 2.3V to 2.7V.Therefore, problem is that in order to create the operating voltage applicable to electronic product, two or more EDLC must be connected in series.
Yet, two or more EDLC that are connected in series with the situation that increases operating voltage under, another problem has appearred, i.e. equilibrium problem between the EDLC, this this problem that will inevitably occur need be resolved.Specifically; need be such as the balance of voltage protective circuit of resistor, diode and another IC; make that the whole operation voltage of capacitor is not concentrated on the single EDLC under the condition of the electric capacity of having considered each EDLC, equivalent series resistance (ESR), leakage current etc.
Yet, because owing to the cycle that repeats causes the balance of voltage between the EDLC to be broken, so the problem that exists is that high voltage is applied on any EDLC.This just causes electrolytical dissolving (when applying 3.0V or bigger voltage to electrolyte, electrolyte can dissolve).This internal resistance that also causes increasing, reduce electric capacity etc.
Summary of the invention
One aspect of the present invention provides a kind of double-layer capacitor encapsulation and manufacture method thereof that allows surge voltage and operating voltage to increase.
According to an aspect of the present invention, provide the encapsulation of a kind of double-layer capacitor, having comprised: shell body is provided with in it and lays the space and formed by insulating resin; First outside terminal and second outside terminal, it is buried in the described shell body, and wherein each has the second surface that is exposed to the described first surface of laying the space and is exposed to the described shell body outside; First capacitor battery and second capacitor battery, it is provided in described laying in the space and separates each other, and described first capacitor battery is connected to described first outside terminal, and described second capacitor battery is connected to described second outside terminal; And the internal series-connection splicing ear, it is connected in series described first capacitor battery and described second capacitor battery.
Can described first outside terminal and described second outside terminal be buried in the described shell body by inserting injection molding (insert injection molding).
Described shell body can also comprise separator, described separator is divided into the described space of laying first and lays space and second and lay the space, and described first capacitor battery and described second capacitor battery can be separately positioned on described first and lay space and described second and lay in the space.
Described first outside terminal and described second outside terminal can be arranged on the surface of the lower surface that is defined as described shell body.
Described internal series-connection splicing ear can be arranged on the surface that is defined as the described upper surface of laying the space.
In described first capacitor battery and described second capacitor battery each can comprise first electrode and second electrode, and is arranged on the separator between described first electrode and described second electrode.Described internal series-connection splicing ear can be connected in series second electrode of described first capacitor battery and first electrode of described second capacitor battery.
Described shell body can comprise: lower house, and it has the space of laying of top surface opening, and has buried described first outside terminal and described second outside terminal therein; Loam cake, it is installed on the described lower house, to cover the described space of laying.
Described internal series-connection splicing ear can be arranged on and cover on described.
In described first capacitor battery and described second capacitor battery each can comprise first electrode and second electrode and be arranged on described first electrode and described second electrode between separator.First electrode of described first capacitor battery can be electrically connected to described first outside terminal, and second electrode of described second capacitor battery can be electrically connected to described second outside terminal.
Described first capacitor battery can comprise: first electrode and second electrode, first current collector that is arranged on the separator between described first electrode and described second electrode and is electrically connected with described first electrode.Described first current collector can be electrically connected to described first outside terminal.
Described second capacitor battery can comprise: first electrode and second electrode, second current collector that is arranged on the separator between described first electrode and described second electrode and is electrically connected with described second electrode.Described second current collector can be electrically connected to described second outside terminal.
According to another aspect of the present invention, a kind of method of making the double-layer capacitor encapsulation is provided, described method comprises: form lower house, described lower house has laying the space and having first outside terminal and second outside terminal that is buried in wherein of opening, and each in described first outside terminal and described second outside terminal has the second surface that is exposed to the described first surface of laying the space and is exposed to the described lower house outside; Lay described that first capacitor battery and second capacitor battery are set to separate each other in the space, make described first capacitor battery be electrically connected to described first outside terminal and described second capacitor battery is electrically connected to described second outside terminal; Form the internal series-connection splicing ear that described first capacitor battery and described second capacitor battery are connected in series; And loam cake is installed on the described lower house, to cover the described space of laying.
Can carry out the formation of described lower house by inserting the injection molding.
Form described lower house and can also comprise the formation separator, described separator is divided into the described space of laying first and lays space and second and lay the space.
Described internal series-connection splicing ear is formed on and covers on described, and is arranged on described first capacitor battery and described second capacitor battery by the installation of described loam cake.
Can be by first electrode and second electrode be provided, and the separator that is provided with between described first electrode and described second electrode prepares in described first capacitor battery and described second capacitor battery each.Described internal series-connection splicing ear can be configured to first electrode of second electrode of described first capacitor battery and described second capacitor battery is connected in series.
Can prepare in described first capacitor battery and described second capacitor battery each by the separator that is provided with between first electrode and second electrode and described first electrode and described second electrode is provided.First electrode of described first capacitor battery can be electrically connected to described first outside terminal, and second electrode of described second capacitor battery can be electrically connected to described second outside terminal.
Can prepare described first capacitor battery by the separator that provides first electrode and second electrode, first current collector that is electrically connected with described first electrode and between described first electrode and described second electrode, be provided with.Described first current collector can be electrically connected to described first outside terminal.
Can prepare described second capacitor battery by the separator that provides first electrode and second electrode, second current collector that is electrically connected with described second electrode and between described first electrode and described second electrode, be provided with.Described second current collector can be electrically connected to described second outside terminal.
Description of drawings
In conjunction with the accompanying drawings, from following detailed, will more be expressly understood above and other aspect of the present invention, feature and other advantage, wherein:
Figure 1A is the perspective schematic view that illustrates according to the double-layer capacitor encapsulation of one exemplary embodiment of the present invention;
Figure 1B is the schematic cross sectional views that the double-layer capacitor encapsulation in Figure 1A of line I-I ' intercepting is shown;
Fig. 2 is the perspective schematic view that illustrates according to first outside terminal and second outside terminal of one exemplary embodiment of the present invention;
Fig. 3 A is the top plan view that schematically shows according to the lower house of one exemplary embodiment of the present invention;
Fig. 3 B is the schematic cross sectional views that illustrates according to the loam cake of one exemplary embodiment of the present invention;
Fig. 3 C is the bottom plan view of the loam cake of Fig. 3 B; And
Fig. 4 A to Fig. 4 C is the cutaway view according to the method for the manufacturing double-layer capacitor encapsulation of one exemplary embodiment of the present invention.
Embodiment
Now, describe one exemplary embodiment of the present invention with reference to the accompanying drawings in detail.
Yet the present invention can implement by many different forms, should not be understood that to be limited to these embodiment that this paper sets forth.Exactly, provide these embodiment to make that the disclosure will be thorough with completely, and will convey to those skilled in the art to scope of the present invention fully.Should consider, for clarity, can exaggerate the shape and size of element in the accompanying drawing.In institute's drawings attached, will use identical Reference numeral to refer to identical or similar elements.
Figure 1A is the perspective schematic view that illustrates according to the double-layer capacitor encapsulation of one exemplary embodiment of the present invention.Figure 1B is the schematic cross sectional views that the double-layer capacitor encapsulation in Figure 1A of line I-I ' intercepting is shown.
Fig. 2 is the perspective schematic view that illustrates according to first outside terminal and second outside terminal of one exemplary embodiment of the present invention.
Fig. 3 A is the top plan view that schematically shows according to the lower house of one exemplary embodiment of the present invention.Fig. 3 B is the schematic cross sectional views that illustrates according to the loam cake of one exemplary embodiment of the present invention.Fig. 3 C is the bottom plan view of the loam cake of Fig. 3 B.
With reference to Figure 1A and Figure 1B, encapsulation comprises according to the double-layer capacitor of this embodiment: shell body 10, described shell body 10 have the space of laying therein and are formed by insulating resin; First capacitor battery 20 and second capacitor battery 30, it is arranged on laying in the space of shell body 10 with separating each other; And internal series-connection splicing ear 12, it is connected in series first capacitor battery 20 and second capacitor battery 30.
When the first outside terminal 11a and the second outside terminal 11b are buried in the shell body 10, the first outside terminal 11a has the second surface 11a-2 that is exposed to the first surface 11a-1 that lays the space and is exposed to shell body 10 outsides, and the second outside terminal 11b has the second surface 11b-2 that is exposed to the first surface 11b-1 that lays the space and is exposed to shell body 10 outsides.That is to say, the first outside terminal 11a and the second outside terminal 11b be used for the outside of shell body 10 with lay the structure that the space is connected.
The first outside terminal 11a and the second outside terminal 11b can be used for applying to first capacitor battery 20 and second capacitor battery 30.The first surface 11b-1 of the first surface 11a-1 of the first outside terminal 11a and the second outside terminal 11b can be connected respectively to first capacitor battery 20 and second capacitor battery 30.The second surface 11b-2 of the second surface 11a-2 of the first outside terminal 11a and the second outside terminal 11b can be connected to external power source.
Fig. 2 illustrates according to first outside terminal 11a of one exemplary embodiment of the present invention and the perspective schematic view of the second outside terminal 11b.The shape of the first outside terminal 11a and the second outside terminal 11b is specifically not limited.Can suitably revise the first outside terminal 11a and the second outside terminal 11b,, guarantee to be used for the zone of first surface and second surface simultaneously and guarantee to have wide contact area with insulating resin so that it easily is buried in the shell body.
The first outside terminal 11a and the second outside terminal 11b can be formed on the similar face of shell body 10.Therefore, can under the situation of not using any supernumerary structure, use surface mounting technology (SMT) to come mounted on surface is carried out in double-layer capacitor encapsulation itself.
With reference to Fig. 3 A to Fig. 3 C, shell body 10 can comprise lower house 10a and loam cake 10b, and this lower house 10a has the space of laying that top surface is an opening, and loam cake 10b covers and lays the space.
Can form lower house 10a, make by inserting injection molding etc. insulating resin and the first outside terminal 11a and the second outside terminal 11b is integrated.
The first outside terminal 11a and the second outside terminal 11b can be formed on the similar face of lower house 10a.The first surface 11b-1 of the first surface 11a-1 of the first outside terminal 11a and the second outside terminal 11b is exposed to the space of laying of lower house 10a.This similar face can be defined as the lower surface of lower house 10a, and lower surface may be provided in the mounted on surface surface.
According to present embodiment, first capacitor battery 20 can be arranged on first and lay space S
1In, and second capacitor battery 30 can be arranged on second and lays space S
2In.
The first electrode 22a of first capacitor battery 20 is configured to face with each other and have different polarity with the second electrode 22b.The first electrode 32a of second capacitor battery 30 is configured to face with each other and have different polarity with the second electrode 32b.
The first electrode 22a of first capacitor battery 20 can be formed on the first current collector 21a.The second electrode 32b of second capacitor battery 30 can be formed on the second current collector 31b.
The first current collector 21a and second circuit gatherer 31b are respectively the conducting strips that is used for the signal of telecommunication is transferred to the first electrode 22a and the second electrode 32b.The first current collector 21a and second circuit gatherer 31b can be formed by conducting polymer, sheet rubber or metal forming.
In the present embodiment, first capacitor battery 20 is electrically connected to the first outside terminal 11a by the first current collector 21a, and second capacitor battery 30 is electrically connected to the second outside terminal 11b by the second current collector 31b.
Can suitably revise the shape of the first current collector 21a and second circuit gatherer 31b, make them be electrically connected to the first outside terminal 11a and the second outside terminal 11b respectively.This modification may be subjected to shape or the shape of size and outside terminal and the influence of position of capacitor battery.
In addition, first electrode 22a of first capacitor battery 20 and the second electrode 32b of second capacitor battery 30 can be double-face electrodes, and it has two lip-deep electrode materials that are formed on current collector.
Under the first electrode 22a and the second electrode 32b are not formed on situation on the first current collector 21a and the second circuit gatherer 31b, can form first electrode material and second electrode material by using solid piece, and the first electrode 22a can be connected to the first outside terminal 11a, and the second electrode 32b can be connected to the second outside terminal 11b.
The material of internal series-connection splicing ear 12 is specifically not limited, as long as it has good conductivity.For example, internal series-connection splicing ear 12 can be formed by conducting polymer, sheet rubber or metal forming.
As shown in Fig. 3 B and Fig. 3 C, internal series-connection splicing ear 12 can be formed on the loam cake 10b, and can be used for and will adopt the second electrode 22b of first capacitor battery 20 of horizontal mode setting and the first electrode 32a of second capacitor battery 30 to be connected in series.
Fig. 4 A to Fig. 4 C is the cutaway view that illustrates according to the method for the manufacturing double-layer capacitor of one exemplary embodiment of the present invention encapsulation.
At first, shown in Fig. 4 A, form lower house 10a, make lower house 10a have laying the space and being included in the first outside terminal 11a and the second outside terminal 11b that wherein buries of opening.The first outside terminal 11a has the second surface 11a-2 that is exposed to the first surface 11a-1 that lays the space and is exposed to the lower house 10a outside.The second outside terminal 11b has the second surface 11b-2 that is exposed to the first surface 11b-1 that lays the space and is exposed to the lower house 10a outside.
Laying the space can be separated part 13 and be divided into first and lay space S
1With second lay space S
2
The method that forms lower house 10a is specifically not limited, as long as can be integrally formed insulating resin and the first outside terminal 11a and the second outside terminal 11b, win outside terminal 11a and the second outside terminal 11b can be buried in the insulating resin get final product.For example, can use insertion injection molding (insert injection molding).
More specifically, the first outside terminal 11a and the second outside terminal 11b are arranged in the mould with required lower house shape, and insulating resin is injected mould.By cooling or crosslinked, first outside terminal 11a and the second outside terminal 11b of insulating resin in mould that is injected into mould hardens to.By inserting the injection molding that insulating resin and the first outside terminal 11a and the second outside terminal 11b is integrated, even the first outside terminal 11a is formed by the material different with insulating resin with the second outside terminal 11b.
Then, shown in Fig. 4 B, first capacitor battery 20 and second capacitor battery 30 are installed in first of lower house 10a respectively and lay space S
1With second lay space S
2In, be exposed to the first outside terminal 11a and the second outside terminal 11b that lays the space so that be electrically connected to.
More specifically, the first surface of the first outside terminal 11a and the second outside terminal 11b is exposed to lays the space, and first surface is electrically connected to first capacitor battery 20 and second capacitor battery 30.
Can prepare first capacitor battery 20 by the first electrode 22a and the second electrode 22b being provided and inserting separator 23 betwixt.Can prepare second capacitor battery 30 by the first electrode 32a and the second electrode 32b being provided and inserting separator 33 betwixt.
In addition, the first electrode 22a of first capacitor battery 20 can be formed on the first current collector 21a, and the second electrode 32b of second capacitor battery 30 can be formed on the second current collector 31b.
In that being arranged on first, first capacitor battery 20 and second capacitor battery 30 lay space S
1With second lay space S
2Processing in, the first current collector 21a of first capacitor battery 20 can be electrically connected to the first outside terminal 11a.In addition, the second current collector 31b of second capacitor battery 30 can be electrically connected to the second outside terminal 11b.
Can suitably revise the shape of the first current collector 21a and the second current collector 31b, so that be electrically connected with the first outside terminal 11a and the second outside terminal 11b.
Though do not illustrate, but under the first electrode 22a and the second electrode 32b are not formed on situation on the first current collector 21a and the second current collector 31b, can form first electrode material and second electrode material by using solid piece, and the first electrode 22a can be connected to the first outside terminal 11a, and the second electrode 32b can be connected to the second outside terminal 11b.
Then, shown in Fig. 4 C, fill first of lower house 10a with electrolyte and lay space S
1With second lay space S
2Here, can use aqueous electrolyte or non-aqueous electrolyte.After this, loam cake 10b is installed on the lower house 10a, lays space S to cover first
1With second lay space S
2
Internal series-connection splicing ear 12 can be formed on the loam cake 10b.The installation of loam cake 10b allows internal series-connection splicing ear 12 is provided on the first electrode 32a of the second electrode 22b of first capacitor battery 20 that is provided with in a horizontal manner and second capacitor battery 30.Therefore, first capacitor battery 20 and second capacitor battery 30 can be connected in series.
Though do not illustrate, the internal series-connection splicing ear can be formed on first capacitor battery of installing in a horizontal manner and second capacitor battery, and then can loam cake is mounted thereto.
Double-layer capacitor encapsulation according to this embodiment allows to be connected in series in single encapsulation, makes it possible to achieve the increase of surge voltage and operating voltage.
As mentioned above, according to exemplary embodiment of the present invention, the double-layer capacitor encapsulation allows to carry out being connected in series of capacitor battery in single encapsulation, makes its surge voltage and operating voltage to increase.
In addition, encapsulation has the shell body and the outside terminal of integrated molding according to the double-layer capacitor of exemplary embodiment of the present invention, makes it can have the high spatial utilance.In addition, under the situation of supernumerary structure, double-layer capacitor encapsulation itself can be by mounted on surface.
Though describe and show the present invention in conjunction with exemplary embodiment, those skilled in the art will be clear that, under the situation of the spirit and scope of the present invention that do not break away from the claims qualification, can carry out various modifications and distortion.
Claims (19)
1. double-layer capacitor encapsulation comprises:
Shell body, described shell body have the space of laying that is provided in the described shell body, and described shell body is formed by insulating resin;
First outside terminal and second outside terminal, described first outside terminal and described second outside terminal are buried in the described shell body, and each in described first outside terminal and described second outside terminal all has the second surface that is exposed to the described first surface of laying the space and is exposed to the described shell body outside;
First capacitor battery and second capacitor battery, described first capacitor battery and second capacitor battery are arranged on described laying in the space with being separated each other, described first capacitor battery is connected to described first outside terminal, and described second capacitor battery is connected to described second outside terminal; And
The internal series-connection splicing ear, described internal series-connection splicing ear is connected in series described first capacitor battery and described second capacitor battery.
2. double-layer capacitor encapsulation according to claim 1 wherein, by inserting the injection molding, is buried in described first outside terminal and described second outside terminal in the described shell body.
3. double-layer capacitor according to claim 1 encapsulation, wherein, described shell body also comprises separator, described separator is divided into the described space of laying first and lays space and second and lay the space, and
Described first capacitor battery and described second capacitor battery are separately positioned on described first and lay space and described second and lay in the space.
4. double-layer capacitor encapsulation according to claim 1, wherein, described first outside terminal and described second outside terminal are provided on the surface of the lower surface that is defined as described shell body.
5. double-layer capacitor according to claim 1 encapsulation, wherein, described internal series-connection splicing ear is provided on the surface that is defined as the described upper surface of laying the space.
6. double-layer capacitor encapsulation according to claim 1, wherein, each in described first capacitor battery and described second capacitor battery comprises: first electrode and second electrode; And, be arranged on the separator between described first electrode and described second electrode, and
Described internal series-connection splicing ear is connected in series described second electrode of described first capacitor battery and described first electrode of described second capacitor battery.
7. double-layer capacitor encapsulation according to claim 1, wherein, described shell body comprises:
Lower house, described lower house have the space of laying of top surface opening, and have buried described first outside terminal and described second outside terminal in described lower house; And
Loam cake, described loam cake are installed on the described lower house, to cover the described space of laying.
8. double-layer capacitor according to claim 7 encapsulation, wherein, described internal series-connection splicing ear is provided at and covers on described.
9. double-layer capacitor encapsulation according to claim 1, wherein, each in described first capacitor battery and described second capacitor battery comprises: first electrode and second electrode; And, be arranged on the separator between described first electrode and described second electrode,
Described first electrode of described first capacitor battery is electrically connected to described first outside terminal, and
Described second electrode of described second capacitor battery is electrically connected to described second outside terminal.
10. double-layer capacitor encapsulation according to claim 1, wherein, described first capacitor battery comprises: first electrode and second electrode; Be arranged on the separator between described first electrode and described second electrode; And, first current collector that is electrically connected with described first electrode, and
Described first current collector is electrically connected to described first outside terminal.
11. double-layer capacitor encapsulation according to claim 1, wherein, described second capacitor battery comprises: first electrode and second electrode; Be arranged on the separator between described first electrode and described second electrode; And, second current collector that is electrically connected with described second electrode, and
Described second current collector is electrically connected to described second outside terminal.
12. a method of making the double-layer capacitor encapsulation, described method comprises:
Form lower house, described lower house has laying the space and having first outside terminal and second outside terminal that is buried in the described lower house of opening, and each in described first outside terminal and described second outside terminal has the second surface that is exposed to the described first surface of laying the space and is exposed to the described lower house outside;
Lay described that first capacitor battery and second capacitor battery are set to separate each other in the space, make described first capacitor battery be electrically connected to described first outside terminal and described second capacitor battery is electrically connected to described second outside terminal;
Form the internal series-connection splicing ear, described internal series-connection splicing ear is connected in series described first capacitor battery and described second capacitor battery; And
Loam cake is installed on the described lower house, to cover the described space of laying.
13. method according to claim 12 wherein, is carried out the step that forms described lower house by inserting the injection molding.
14. method according to claim 12, wherein, the step that forms described lower house also comprises: form separator, described separator is divided into the described space of laying first and lays space and second and lay the space.
15. method according to claim 12, wherein, described internal series-connection splicing ear is formed on and covers on described, and is provided on described first capacitor battery and described second capacitor battery by the installation of described loam cake.
16. method according to claim 12, wherein, by the separator that is provided with between first electrode and second electrode and described first electrode and described second electrode is provided, prepare in described first capacitor battery and described second capacitor battery each, and
Described first electrode that described internal series-connection splicing ear is provided as described second electrode of described first capacitor battery and described second capacitor battery is connected in series.
17. method according to claim 12, wherein, by the separator that is provided with between first electrode and second electrode and described first electrode and described second electrode is provided, prepare in described first capacitor battery and described second capacitor battery each, and
Described first electrode of described first capacitor battery is electrically connected to described first outside terminal, and described second electrode of described second capacitor battery is electrically connected to described second outside terminal.
18. method according to claim 12, wherein, separator by first electrode and second electrode, first current collector that is electrically connected with described first electrode being provided and being provided with between described first electrode and described second electrode prepares described first capacitor battery, and
Described first current collector is electrically connected to described first outside terminal.
19. method according to claim 12, wherein, separator by first electrode and second electrode, second current collector that is electrically connected with described second electrode being provided and being provided with between described first electrode and described second electrode prepares described second capacitor battery, and
Described second current collector is electrically connected to described second outside terminal.
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| KR10-2010-0047517 | 2010-05-20 | ||
| KR1020100047517A KR101101455B1 (en) | 2010-05-20 | 2010-05-20 | Electric double layer capacitor package and method for manufacturing the same |
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| KR (1) | KR101101455B1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2004327887A (en) * | 2003-04-28 | 2004-11-18 | Sanyo Electric Co Ltd | Capacitor array or battery array |
| CN1624836A (en) * | 2003-12-03 | 2005-06-08 | 三洋电机株式会社 | Double charge layer capacitor, electrolytic cell and their manufacturing method |
| JP2007201382A (en) * | 2006-01-30 | 2007-08-09 | Sanyo Electric Co Ltd | Power accumulation device |
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| JPS59176136U (en) * | 1983-05-10 | 1984-11-24 | 日本ケミコン株式会社 | electric double layer capacitor |
| JP2998401B2 (en) * | 1992-02-26 | 2000-01-11 | 日本電気株式会社 | Electric double layer capacitor and method of manufacturing the same |
| JP2005032669A (en) * | 2003-07-10 | 2005-02-03 | Nok Corp | Electrode terminal for sealing plate |
| JP2005353628A (en) * | 2004-06-08 | 2005-12-22 | Nec Tokin Corp | Electric double layer capacitor and its manufacturing method |
| JP4450378B2 (en) * | 2004-10-27 | 2010-04-14 | Ｎｅｃトーキン株式会社 | Surface mount capacitor and method of manufacturing the same |
| WO2006123892A1 (en) * | 2005-05-17 | 2006-11-23 | Lg Chem, Ltd. | Polymer binder for electrochemcal device comprising multiply stacked electrochemical cells |
| JP2008186945A (en) * | 2007-01-29 | 2008-08-14 | Sanyo Electric Co Ltd | Electrical double-layer capacitor and manufacturing method of electrical double-layer capacitor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004327887A (en) * | 2003-04-28 | 2004-11-18 | Sanyo Electric Co Ltd | Capacitor array or battery array |
| CN1624836A (en) * | 2003-12-03 | 2005-06-08 | 三洋电机株式会社 | Double charge layer capacitor, electrolytic cell and their manufacturing method |
| JP2007201382A (en) * | 2006-01-30 | 2007-08-09 | Sanyo Electric Co Ltd | Power accumulation device |
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| KR101101455B1 (en) | 2012-01-03 |
| KR20110127963A (en) | 2011-11-28 |
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