CN102253848A - Method for automatically generating fiber optic gyros with field programmable gate array (FPGA) logic in batches - Google Patents

Abstract

The invention relates to a method for automatically generating fiber optic gyros with field programmable gate array (FPGA) logic in batches, which is suitable for the field of inertia device fiber optic gyros and is used for FPGA logic implementation, engineering management and quality control in the large batch production process of the fiber optic gyros. By the method, a series of work such as gyro frequency calculation, two-stage digital clock manager (DCM) frequency division parameter calculation and matching, FPGA logic modification, logic synthesis, logic implementation, downloaded file generation and the like can be automatically finished, work efficiency is greatly improved, and product quality and reliability are ensured.

Description

The automatic batch generation method of optical fibre gyro fpga logic

Technical field

This method is suitable for inertia device optical fibre gyro field, is used for the realization of optical fibre gyro high volume production process fpga logic, through engineering approaches management and quality control.

Background technology

Optical fibre gyro is to utilize the Sagnac effect to carry out the inertia device that angular speed detects.It adopts on-site programmable gate array FPGA as master controller, and the optical fibre gyro of using FPGA clock internal administrative unit DCM to realize frequency division, and the DCM frequency division parameter need calculate selection respectively according to the characteristic frequency of gyro.To each gyro, all need to finish according to its characteristic frequency respectively a series of activities such as calculating coupling, fpga logic modification, logic synthesis, logic realization and file in download generation of frequency computation part, two-stage DCM frequency division parameter.In the gyro high volume production process, finish this work by hand if make, for each transit time, this will be very loaded down with trivial details, uninteresting, as to waste time and energy and make mistakes an easily job.

Summary of the invention

Technical matters to be solved by this invention provides a kind of method that can automatic batch generates the optical fibre gyro fpga logic, increasing work efficiency, and guarantees product quality and reliability.

For solving the problems of the technologies described above, the automatic batch that the present invention proposes generates the method for optical fibre gyro fpga logic, comprises the steps:

Step 1, the initial frequency of obtaining optical fibre gyro, termination frequency, crystal oscillator frequency, fpga chip type, sampled point parameter;

Step 2, with described initial frequency as current characteristic frequency;

Step 3, described crystal oscillator frequency is carried out two-stage DCM frequency division, obtain a set of division parameter, that frequency division parameter of selecting to mate most with described current characteristic frequency from described frequency division parameter is as actual frequency division parameter;

Step 4, search for and locate the expression unit of frequency division parameter in the fpga logic of current optical fibre gyro, the described actual frequency division parameter that obtains with step 3 is made amendment and is preserved the expression unit of frequency division parameter in the described fpga logic;

Step 5, fpga logic that step 4 is obtained be as input, calls programmable logic device (PLD) PLD design tool and the FPGA of current optical fibre gyro is carried out the comprehensive of FPGA (Field Programmable Gate Array) and realize;

Step 6, call programmable logic device (PLD) PLD design tool, the fpga logic that step 5 is obtained carries out the file layout conversion, generates file in download;

Step 7, described current characteristic frequency is increased a separation values, judge that the current characteristic frequency that increases after the separation values whether greater than stopping frequency, if not, then returns step 3; Be, then

Step 8, processing finish.

The present invention has following beneficial effect: calculate each transit time characteristic of correspondence frequency automatically, mate fpga chip two-stage DCM frequency division parameter automatically; Automatically finishing fpga logic revises; Logic synthesis; Logic realization, automatic formation logic file in download.Realized the different transit time of mass, different crystal oscillator frequency, generated, improved the production efficiency of optical fibre gyro greatly, effectively guaranteed the q﹠r of product without the automatic batch of the optical fibre gyro logical file of FPGA configuring chip model.

Description of drawings

Fig. 1 is a process flow diagram of the present invention.

Embodiment

The present invention is described in further detail below in conjunction with accompanying drawing.As shown in Figure 1, may further comprise the steps:

1, obtains initial frequency, termination frequency, crystal oscillator frequency, configuring chip type, sampled point parameter.

2, get initial frequency as current characteristic frequency.

3, to current frequency computation part, coupling two-stage DCM frequency division parameter.Comprise: with the crystal oscillator frequency of optical fibre gyro, totally four parameters of use DCM two-stage is carried out frequency division.Concrete grammar is that all combinations of four parameters are all listed, and uses each group parameter that crystal oscillator frequency is carried out frequency division then, obtains a class frequency.With the characteristic frequency value of this class frequency value that obtains and gyro relatively, choose that frequency of absolute difference minimum and frequency division parameter as actual frequency division parameter.

4, fpga logic is revised automatically.Comprise: adopt automatic search method, from fpga logic, find the frequency division parameter part automatically, and parameter in the logic made amendment according to previous step result of calculation and preserve.

5, automatic logic synthesis (XST) and realization.Use the ISE command line mode of Xilinx company to call XST instrument completion logic integrated logic automatic Synthesis, use the ISE command line mode to call Translate, Map, the realization of Place and Route completion logic, generate the bit formatted file;

6, file in download generates automatically.Use ISE command line mode mode to call the IMPACT instrument and generate mcs form file in download automatically.

7, gyro frequency increases a frequency interval, and with finish frequency ratio, if, then return step 3 smaller or equal to finishing frequency; If greater than finishing frequency, then end process.

It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (1)

1. the method for an automatic batch generation optical fibre gyro fpga logic is characterized in that, comprises the steps:

Step 1, the initial frequency of obtaining optical fibre gyro, termination frequency, crystal oscillator frequency, fpga chip type, sampled point parameter;

Step 2, with described initial frequency as current characteristic frequency;

Step 3, described crystal oscillator frequency is carried out two-stage DCM frequency division, obtain a set of division parameter, that frequency division parameter of selecting to mate most with described current characteristic frequency from described frequency division parameter is as actual frequency division parameter;

Step 4, search for and locate the expression unit of frequency division parameter in the fpga logic of current optical fibre gyro, the described actual frequency division parameter that obtains with step 3 is made amendment and is preserved the expression unit of frequency division parameter in the described fpga logic;

Step 5, fpga logic that step 4 is obtained be as input, calls programmable logic device (PLD) PLD design tool and the FPGA of current optical fibre gyro is carried out the comprehensive of FPGA (Field Programmable Gate Array) and realize;

Step 6, call programmable logic device (PLD) PLD design tool, the fpga logic that step 5 is obtained carries out the file layout conversion, generates file in download;

Step 7, described current characteristic frequency is increased a separation values, judge that the current characteristic frequency that increases after the separation values whether greater than stopping frequency, if not, then returns step 3; Be, then

Step 8, processing finish.

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