CN102243579A - SOC (system on chip)-algorithm co-verification method and device - Google Patents
SOC (system on chip)-algorithm co-verification method and device Download PDFInfo
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- CN102243579A CN102243579A CN2010101713370A CN201010171337A CN102243579A CN 102243579 A CN102243579 A CN 102243579A CN 2010101713370 A CN2010101713370 A CN 2010101713370A CN 201010171337 A CN201010171337 A CN 201010171337A CN 102243579 A CN102243579 A CN 102243579A
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Abstract
The embodiment of the invention discloses an SOC (system on chip)-algorithm co-verification method and device. The method comprises the following steps: an adaptive module adapts communication between an SOC part verification module and an algorithm part verification module; the SOC part verification module directly verifies an SOC part; and the algorithm part verification module verifies an algorithm part and the SOC part by virtue of the SOC part verification module and the SOC part. The method and device disclosed by the invention are applicable to SOC-algorithm co-verification.
Description
Technical field
The present invention relates to communication and technical field of semiconductors, particularly a kind of SOC and algorithm co-verification method and device.
Background technology
At present, algorithm SOC (System On Chip, SOC (system on a chip)) chip generally includes two parts, and a part is finished the function of SOC part, and another part is finished the function of algorithm part.Because SOC part and algorithm part-structure differ greatly, when algorithm SOC chip is verified, use different verification methods usually and verify that language is respectively the SOC part and algorithm is partly built verification environment.Since the verification environment difference of building, thus cause SOC part and algorithm part can only carry out independent checking, and can not carry out co-verification.
For SOC part and algorithm are partly carried out co-verification, only partly build verification environment for SOC.Utilize employed verification method and the function that the checking language comes implementation algorithm part verification environment in the SOC part verification environment,, thereby can realize SOC part and algorithm co-verification partly because algorithm partly is subjected to the control of SOC part.
In realizing process of the present invention, the inventor finds that there are the following problems at least in the prior art:
When utilizing SOC part verification environment that SOC part and algorithm are partly carried out co-verification, can not partly fully verify algorithm.
Summary of the invention
Embodiments of the invention provide a kind of SOC and algorithm co-verification method and device, can improve the adequacy of SOC and algorithm co-verification.
The technical scheme that the embodiment of the invention adopts is:
A kind of SOC and algorithm co-verification method comprise:
Adaptation module is carried out adaptive to the communication between SOC part authentication module and the algorithm part authentication module;
SOC part authentication module is directly partly verified SOC;
Algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part.
A kind of SOC and algorithm co-verification device comprise:
SOC part authentication module partly is connected with SOC, is used for described SOC is partly verified;
Adaptation module is connected with algorithm part authentication module with described SOC part authentication module, is used for carrying out adaptive to the communication between SOC part authentication module and the algorithm part authentication module;
Algorithm part authentication module is connected with described adaptation module, is used for by described adaptation module, SOC part authentication module and SOC part algorithm part and SOC partly being verified, described algorithm part partly is connected with described SOC.
Embodiment of the invention SOC and algorithm co-verification method and device, adaptation module is carried out adaptive to the communication between SOC part authentication module and the algorithm part authentication module, SOC part authentication module verifies partly to SOC that directly algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part.Compared with prior art, the technology that the embodiment of the invention provides can be by adaptive to the communication between SOC part authentication module and the algorithm part authentication module, can make the SOC part authentication module and the algorithm part authentication module that adopt different verification methods and checking language that SOC part and algorithm are partly carried out co-verification, thereby can improve the adequacy of SOC and algorithm co-verification.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The method flow diagram that Fig. 1 provides for the embodiment of the invention one;
The method flow diagram that Fig. 2 provides for the embodiment of the invention two;
The apparatus structure synoptic diagram that Fig. 3 provides for the embodiment of the invention three;
The apparatus structure synoptic diagram that Fig. 4 provides for the embodiment of the invention four.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making all other embodiment that obtained under the creative work prerequisite.
For the advantage that makes technical solution of the present invention is clearer, the present invention is elaborated below in conjunction with drawings and Examples.
Embodiment one
Present embodiment provides a kind of SOC and algorithm co-verification method, and as shown in Figure 1, described method comprises:
101, adaptation module is carried out adaptive to the communication between SOC part authentication module and the algorithm part authentication module;
102, SOC part authentication module is directly partly verified SOC;
103, algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part.
Embodiment of the invention SOC and algorithm co-verification method, adaptation module is carried out adaptive to the communication between SOC part authentication module and the algorithm part authentication module, SOC part authentication module verifies partly to SOC that directly algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part.Compared with prior art, the method that the embodiment of the invention provides is by adaptive to the communication between SOC part authentication module and the algorithm part authentication module, can make the SOC part authentication module and the algorithm part authentication module that adopt different verification methods and checking language that SOC part and algorithm are partly carried out co-verification, thereby can improve the adequacy of SOC and algorithm co-verification.
Embodiment two
Present embodiment provides a kind of SOC and algorithm co-verification method, in the present embodiment, is example with algorithm SOC chip, and this algorithm SOC chip comprises part 0 and part 1 two parts, and part 0 finishes the function of SOC part, and part 1 finishes the function of algorithm part.The SOC part mainly is made up of bus (BUS), CPU and other IP (Intellectual Property, intellecture property) module; The algorithm part mainly is made up of bus interface (BUSInterface) and other functional module.In the present embodiment, need partly carry out co-verification to SOC part and algorithm.
As shown in Figure 2, described SOC and algorithm co-verification method comprise:
201, adaptation module connects by first interface and described SOC part authentication module.
202, adaptation module connects by second interface and described algorithm part authentication module.
Wherein, the interface that algorithm part join algorithm part authentication module is adopted in described second interface and the prior art is identical, therefore, does not need described algorithm part authentication module is improved, and can realize and being connected of described second interface.
Further, described step 201 and 202 order can not done qualification.
203, adaptation module is stored the communication data between described SOC part authentication module and the algorithm part authentication module.
Because the storage to communication data does not relate to verification method and checking language, therefore, SOC part authentication module and algorithm part authentication module can carry out exchanges data easily.
204, adaptation module is controlled the communication data exchange between described SOC part authentication module and the algorithm part authentication module.
205, SOC part authentication module is set up being connected partly with described SOC.
Particularly, described SOC partly comprises CPU, IP module and bus, and described CPU is connected with bus respectively with the IP module, and described SOC part authentication module partly is connected with described SOC by described IP module.
206, the control of SOC part authentication module is partly verified described SOC.
207, algorithm part authentication module is set up indirect connection the with described SOC part authentication module;
208, algorithm part authentication module is partly verified described algorithm part and SOC by controlling described SOC part authentication module and SOC part.
Particularly, described algorithm partly comprises bus interface and other functional module, and described bus interface is connected with the bus of described SOC part, and described algorithm is partly accepted the control of described SOC part.Described algorithm part authentication module is controlled described SOC part authentication module and described SOC part, and the control of the described SOC partial C PU of process, and described algorithm part and SOC are partly verified; Perhaps, partly verify but pass through the described SOC direct control algolithm of bus partly without the control of SOC partial C PU.
Embodiment of the invention SOC and algorithm co-verification method, by carrying out adaptive to the communication between SOC part authentication module and the algorithm part authentication module, directly SOC is partly verified by SOC part authentication module, by described SOC part authentication module and SOC part algorithm part and SOC are partly verified by algorithm part authentication module.Compared with prior art, the embodiment of the invention is improved on the basis of existing verification environment, adaptive to communicating between existing SOC part authentication module and the algorithm part authentication module, can simulate actual chips more truly uses, can make the SOC part authentication module and the algorithm part authentication module that adopt different verification methods and checking language that SOC part and algorithm are partly carried out co-verification, thereby can improve the adequacy of SOC and algorithm co-verification; The present invention has made full use of existing verification environment, thereby can reduce input, realizes simple.
Embodiment three
Present embodiment provides a kind of SOC and algorithm co-verification device, and as shown in Figure 3, described device 30 comprises:
SOC part authentication module 301 is connected with SOC part 31, is used for described SOC part 31 is verified;
Algorithm part authentication module 303, be connected with described adaptation module 302, be used for verifying that by described adaptation module 302, SOC part authentication module 301 and 31 pairs of algorithm parts 32 of SOC part and SOC part 31 described algorithm part 32 is connected with described SOC part 31.
Particularly, described SOC part 31 comprises CPU, IP module and bus, and described CPU is connected with bus respectively with the IP module, and described SOC part authentication module 301 is connected with described SOC part 31 by described IP module.
Further, as shown in Figure 4, described adaptation module 302 can comprise:
Wherein, the interface that algorithm part join algorithm part authentication module is adopted in described second interface and the prior art is identical, therefore, does not need described algorithm part authentication module 303 is improved, and can realize and being connected of described second interface.
Further, as shown in Figure 4, described processing unit 3023 can comprise:
Because the storage to communication data does not relate to verification method and checking language, therefore, SOC part authentication module 301 and algorithm part authentication module 303 can carry out exchanges data easily.
Further, described second interface is identical with interface between described algorithm part 32 and the algorithm part authentication module 303.
Further, as shown in Figure 4, described SOC part authentication module 301 can comprise:
Further, as shown in Figure 4, described algorithm part authentication module 303 can comprise:
Particularly, described algorithm part 32 comprises bus interface and other functional module, and described bus interface is connected with the bus of described SOC part 31, and described algorithm part 32 is accepted the control of described SOC part 31.Described algorithm part authentication module 303 described SOC part authentication module 301 of control and described SOC parts 31, and the control of the CPU of the described SOC part 31 of process are verified described algorithm part 32.
Embodiment of the invention SOC and algorithm co-verification device, adaptation module is carried out adaptive to the communication between SOC part authentication module and the algorithm part authentication module, SOC part authentication module verifies partly to SOC that directly algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part.Compared with prior art, the embodiment of the invention is improved on the basis of existing verification environment, adaptive to communicating between existing SOC part authentication module and the algorithm part authentication module, can simulate actual chips more truly uses, can make the SOC part authentication module and the algorithm part authentication module that adopt different verification methods and checking language that SOC part and algorithm are partly carried out co-verification, thereby can improve the adequacy of SOC and algorithm co-verification; The present invention has made full use of existing verification environment, thereby can reduce input, realizes simple.
The above-mentioned method embodiment that provides can be provided for SOC that the embodiment of the invention provides and algorithm co-verification device.SOC that the embodiment of the invention provides and algorithm co-verification method and device go for algorithm SOC chip and other need carry out the scene of SOC and algorithm co-verification, but is not limited only to this.
One of ordinary skill in the art will appreciate that all or part of flow process that realizes in the foregoing description method, be to instruct relevant hardware to finish by computer program, described program can be stored in the computer read/write memory medium, this program can comprise the flow process as the embodiment of above-mentioned each side method when carrying out.Wherein, described storage medium can be magnetic disc, CD, read-only storage memory body (Read-Only Memory, ROM) or at random store memory body (Random Access Memory, RAM) etc.
The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claim.
Claims (10)
1. SOC (system on a chip) SOC and algorithm co-verification method is characterized in that, comprising:
Adaptation module is carried out adaptive to the communication between SOC part authentication module and the algorithm part authentication module;
SOC part authentication module is directly partly verified SOC;
Algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part.
2. method according to claim 1 is characterized in that, described adaptation module is carried out adaptive comprising to the communication between SOC part authentication module and the algorithm part authentication module:
Connect by first interface and described SOC part authentication module;
Connect by second interface and described algorithm part authentication module;
Communication data between described SOC part authentication module and the algorithm part authentication module is exchanged.
3. method according to claim 2 is characterized in that, described adaptation module exchanges the communication data between described SOC part authentication module and the algorithm part authentication module and comprises:
Communication data between described SOC part authentication module and the algorithm part authentication module is stored;
Control the communication data exchange between described SOC part authentication module and the algorithm part authentication module.
4. according to claim 1,2 or 3 described methods, it is characterized in that described SOC part authentication module is directly partly verified SOC and comprised:
Set up direct the connection with described SOC part;
Control is partly verified described SOC.
5. according to claim 1,2 or 3 described methods, it is characterized in that described algorithm part authentication module is partly verified algorithm part and SOC by described SOC part authentication module and SOC part and comprised:
Set up indirect the connection with described SOC part authentication module;
By controlling described SOC part authentication module and SOC part described algorithm part and SOC are partly verified.
6. SOC and algorithm co-verification device is characterized in that, comprising:
SOC part authentication module partly is connected with SOC, is used for described SOC is partly verified;
Adaptation module is connected with algorithm part authentication module with described SOC part authentication module, is used for carrying out adaptive to the communication between SOC part authentication module and the algorithm part authentication module;
Algorithm part authentication module is connected with described adaptation module, is used for by described adaptation module, SOC part authentication module and SOC part algorithm part and SOC partly being verified, described algorithm part partly is connected with described SOC.
7. device according to claim 6 is characterized in that, described adaptation module comprises:
First interface unit is used for connecting by first interface and described SOC part authentication module;
Second interface unit is used for connecting by second interface and described algorithm part authentication module;
Processing unit is connected with second interface unit with described first interface unit respectively, is used for the communication data between described SOC part authentication module and the algorithm part authentication module is exchanged.
8. device according to claim 7 is characterized in that, described processing unit comprises:
Storing sub-units is connected with second interface unit with described first interface unit respectively, is used to store the communication data between described SOC part authentication module and the algorithm part authentication module;
Control sub unit is connected with described storing sub-units, is used to control the communication data exchange between described SOC part authentication module and the algorithm part authentication module.
9. according to claim 6,7 or 8 described devices, it is characterized in that described SOC part authentication module comprises:
First linkage unit is used to set up direct connection the partly with described SOC;
First authentication unit is used for control described SOC is partly verified.
10. according to claim 6,7 or 8 described devices, it is characterized in that described algorithm part authentication module comprises:
Second linkage unit is used to set up indirect connection the with described SOC part authentication module;
Second authentication unit is used for by controlling described SOC part authentication module and SOC part described algorithm part and SOC partly being verified.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6427224B1 (en) * | 2000-01-31 | 2002-07-30 | International Business Machines Corporation | Method for efficient verification of system-on-chip integrated circuit designs including an embedded processor |
| CN1828617A (en) * | 2006-03-31 | 2006-09-06 | 电子科技大学 | Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method |
| CN1928877A (en) * | 2006-08-17 | 2007-03-14 | 电子科技大学 | Verification method for SOC software and hardware integration design |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6427224B1 (en) * | 2000-01-31 | 2002-07-30 | International Business Machines Corporation | Method for efficient verification of system-on-chip integrated circuit designs including an embedded processor |
| CN1828617A (en) * | 2006-03-31 | 2006-09-06 | 电子科技大学 | Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method |
| CN1928877A (en) * | 2006-08-17 | 2007-03-14 | 电子科技大学 | Verification method for SOC software and hardware integration design |
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Effective date of registration: 20201109 Address after: Unit 2414-2416, main building, no.371, Wushan Road, Tianhe District, Guangzhou City, Guangdong Province Patentee after: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. Address before: 518129 headquarters building of Bantian HUAWEI base, Longgang District, Guangdong, Shenzhen Patentee before: HUAWEI TECHNOLOGIES Co.,Ltd. Effective date of registration: 20201109 Address after: 215500 No.13, Caotang Road, Changshu, Suzhou, Jiangsu Province Patentee after: Changshu intellectual property operation center Co.,Ltd. Address before: Unit 2414-2416, main building, no.371, Wushan Road, Tianhe District, Guangzhou City, Guangdong Province Patentee before: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. |
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Address after: 215500 5th floor, building 4, 68 Lianfeng Road, Changfu street, Changshu City, Suzhou City, Jiangsu Province Patentee after: Changshu intellectual property operation center Co.,Ltd. Address before: No.13 caodang Road, Changshu City, Suzhou City, Jiangsu Province Patentee before: Changshu intellectual property operation center Co.,Ltd. |