CN102243388A

CN102243388A - Display apparatus

Info

Publication number: CN102243388A
Application number: CN2011101218382A
Authority: CN
Inventors: 张镇元; 权宁燮; 吴元植; 崔敏修
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Display Co Ltd
Priority date: 2010-05-12
Filing date: 2011-05-11
Publication date: 2011-11-16
Anticipated expiration: 2031-05-11
Also published as: CN102243388B; KR101689363B1; US8564507B2; KR20110125027A; JP2011237777A; JP5788202B2; US20110279485A1; EP2387024A1

Abstract

A display apparatus includes a backlight unit which emits a light, and a display panel which receives the light to display an image. The backlight unit includes a driving circuit which outputs a driving voltage and a reference voltage; and p light source blocks connected to the driving circuit, p being a natural number greater than or equal to 2, where each light source block of the p light source blocks receives the driving voltage through a first terminal thereof and the reference voltage through a second terminal thereof to generate the light, and the p light source blocks are divided into a plurality of groups, each group including at least two light source blocks. The driving circuit includes a first switching section which applies the driving voltage to first terminals of the p light source blocks, and a second switching section which applies the reference voltage to the second terminal of at least one of the p light source blocks.

Description

Display device

CROSS-REFERENCE TO RELATED APPLICATIONS

The application requires in the right of priority of the 2010-44554 korean patent application of submission on May 12nd, 2010 and the ownership equity that therefrom produces, and its full content is hereby expressly incorporated by reference.

Technical field

Total inventive concept relates to the remarkable display device that reduces of quantity of assembly and connecting line.

Background technology

LCD (" LCD ") comprises the display panels of display image and is arranged on the display panels below so that the back light unit of light to be provided to display panels.Usually, cold-cathode fluorescence lamp (" CCFL ") is used to back light unit.

Yet in recent years, in order to reduce amount of power consumption when improving colorrendering quality, back light unit can adopt light emitting diode (" LED ") replaced C CFL as its light source.Adopt LED to comprise a plurality of light-emitting blocks as the LED-backlit unit of its light source, each light-emitting block comprises a plurality of LED that are one another in series and connect.

In addition, the LED-backlit unit can be divided into polytype back light unit, for example, is divided into such as edge light type back light unit and direct illumination type back light unit according to the position of LED.In recent years, along with the exploitation of frivolous LCD, edge light type back light unit is widely used.

Summary of the invention

Inventive concept of the present invention relates to the display device of the quantity that is configured to reduce assembly and connecting line.

According to illustrative embodiments, display device comprises backlight unit radiating light and receives the display panel of light with display image.Back light unit comprises: the driving circuit of outputting drive voltage and reference voltage; And p the light source block that is connected to driving circuit, p is the natural number more than or equal to 2, wherein, each light source block of this p light source block receives driving voltage and receives reference voltage to produce light by its second terminal by its first terminal, and this p light source block is divided into a plurality of groups, and each group comprises two light source blocks at least.Driving circuit comprises: first switch portion applies driving voltage to the first terminal of this p light source block; And second switch portion, second terminal of at least one light source block in this p light source block applies reference voltage.

In an illustrative embodiments, first switch portion can comprise n switching device of public connection, n is the natural number more than or equal to 1, each switching device in n switching device is connected to the first terminal of at least two light source blocks in the group of its correspondence, and second switch portion can comprise m switching device of public connection, m is the natural number more than or equal to 1, and each switching device in m switching device is connected at least one in second terminal of at least two light source blocks in each group.

In an illustrative embodiments, each light source block in this p light source block can be in n switching device be connected in switching device of its first terminal and m the switching device be connected to switching device conducting of its second terminal the time luminous.

In an illustrative embodiments, n and m's and less than p.

In an illustrative embodiments, n and m are the factors of p, and two factors of p all possible and middle obtain minimum and, wherein, the product of these two factors equals p.

In an illustrative embodiments, driving circuit can provide n first control signal to this n switching device, and provides m second control signal to this m switching device.

In an illustrative embodiments, the high level lasting time of second control signal in the high level lasting time of first control signal in this n first control signal and this m second control signal can overlap each other in time, and the conduction duration that receives the light source block of first control signal and second control signal can be determined by section overlapping time of the high level lasting time of the high level lasting time of first control signal and second control signal.

In an illustrative embodiments, this n first control signal can put on this n switching device simultaneously, and this m second control signal puts on this m switching device in turn in a light modulation frame unit.

In an illustrative embodiments, display device can comprise further that it is provided with the printed circuit board (PCB) of light source block.This printed circuit board (PCB) can comprise: q bar connecting line, by this q bar connecting line driving voltage is applied to the first terminal of each light source block, and q is the natural number more than or equal to 1; And r bar connecting line, by this r bar connecting line reference voltage being applied to second terminal of at least one light source block in the light source block, r is the natural number more than or equal to 1, wherein, q and r's and less than p.

In an illustrative embodiments, q and r are two factors of p, and two factors of p all possible and middle defined minimum and, wherein, the product of these two factors equals p.

In an illustrative embodiments, printed circuit board (PCB) can comprise double-sided printed-circuit board, and every connecting line in this q bar connecting line and this r bar connecting line can be set at least one surface of this double-sided printed-circuit board.

In an illustrative embodiments, display device can further comprise connector, and this connector is connected to first switch portion with the q bar connecting line of printed circuit board (PCB), and the r bar connecting line of printed circuit board (PCB) is connected to second switch portion.

In an illustrative embodiments, display device can further comprise light guide plate, and this light guide plate receives from the light of back light unit output by its at least one side, and by its exit facet output light.In an illustrative embodiments, display device can further comprise a plurality of light emitting diodes that are arranged on the top surface of printed circuit board, and the light-emitting area of each light emitting diode in wherein a plurality of light emitting diodes is substantially perpendicular to top surface of printed circuit board.

In an illustrative embodiments, display device can further comprise a plurality of light emitting diodes that are arranged on the top surface of printed circuit board, and wherein the light-emitting area of each light emitting diode of a plurality of light emitting diodes is arranged essentially parallel to top surface of printed circuit board.

In an illustrative embodiments, display panel can be divided into a plurality of light modulations zone corresponding to this p light source block, and regulates the brightness of each light source block in this p light source block based on the representative luminance value in each corresponding light modulation zone of each light source block with in this p light source block in a plurality of light modulations zone.

In an illustrative embodiments, display device can further comprise the timing controller that picture signal is provided to display panel, this timing controller can comprise: the typical value determiner, calculate and determine the representative luminance value in each the light modulation zone in a plurality of light modulations zone based on picture signal; The typical value compensator is by compensating the luminance compensation value in each light modulation zone of calculating a plurality of light modulations zone to representative luminance value; And the pixel correction device, proofread and correct the picture signal that each the light modulation zone to a plurality of light modulations zone is provided based on the luminance compensation value.

In an illustrative embodiments, the pixel correction device can carry out comparison to the target light modulation level of each light source block and the actual light modulation level of this light source block, and do not proofread and correct providing to the picture signal in each light modulation zone in actual light modulation level and target light modulation level not simultaneously, based on the difference between actual light modulation level and the target light modulation level.

As mentioned above, the switching device quantity that controls the conduction duration of light source block can be reduced to less than the quantity of light source block, thereby reduce the quantity of all components of back light unit significantly.

In addition, because the minimizing of the quantity of switching device, so can reduce the quantity that is arranged on the connecting line in the printed circuit board (PCB) (being provided with light source block on it), thus the integral width of printed circuit board (PCB) significantly reduced.

Description of drawings

Describe illustrative embodiments of the present disclosure in further detail by the reference accompanying drawing, above and other aspect of the present disclosure and feature will become more apparent.

Fig. 1 is the schematic circuit according to the illustrative embodiments of back light unit of the present invention;

Fig. 2 is first to the 6th switching device of Fig. 1 and the schematic circuit of first to the 9th light source block, shows the connection between them;

Fig. 3 is the high level lasting time that illustrates according to first to the 6th control signal of Fig. 2, the signal timing diagram of the conduction duration of first to the 9th light source block;

Fig. 4 is the schematic circuit according to the optional illustrative embodiments of back light unit of the present invention;

Fig. 5 is first schematic circuit to minion pass device and the first to the 12 light source block of Fig. 4, shows the connection between them;

Fig. 6 is the vertical view of illustrative embodiments of the light source cell of Fig. 1;

Fig. 7 is the vertical view according to the optional illustrative embodiments of light source cell of the present invention;

Fig. 8 is the sectional view of part I among Fig. 7;

Fig. 9 is the vertical view of illustrative embodiments of back light unit that comprises the light source cell of Fig. 6;

Figure 10 is the sectional view along the line II-II ' intercepting of Fig. 9;

Figure 11 is the vertical view according to the optional illustrative embodiments of back light unit of the present invention;

Figure 12 is the sectional view along the line III-III ' intercepting of Figure 11;

Figure 13 is the vertical view according to the optional illustrative embodiments of back light unit of the present invention;

Figure 14 is the block diagram according to the illustrative embodiments of display device of the present invention;

Figure 15 illustrates the light source cell of Figure 14 and the block diagram of the corresponding relation between the display panels;

Figure 16 is the table of brightness of first to the 9th light source block of expression Figure 15;

Figure 17 is the block diagram of the illustrative embodiments of the timing controller shown in Figure 14;

Figure 18 is the schematic circuit of the optional illustrative embodiments of first to the 6th switching device and first to the 9th light source block, shows the connection between them;

Figure 19 is the high level lasting time that illustrates according to first to the 6th control signal shown in Figure 180, the signal timing diagram of the conduction duration of first to the 9th light source block;

Figure 20 is the block diagram that the light modulation zone in first to the 3rd light modulation frame of Figure 19 is shown; And

Figure 21 is the high level lasting time that illustrates according to first to the 6th control signal in the optional illustrative embodiments, the signal timing diagram of the conduction duration of first to the 9th light source block.

Embodiment

Now, with reference to the accompanying drawing that shows embodiment of the present invention the present invention is described more fully hereinafter.Yet the present invention can be limited to the embodiment that this paper states and should not be construed as with multiple multi-form the embodiment.More properly, provide these embodiments so that the disclosure is detailed and complete, and pass on scope of the present invention fully to those skilled in the art.Identical reference number is represented components identical in full.

Should be appreciated that, when element or layer be known as be positioned at another element or layer " on " or " being connected to " or " being coupled to " another element or when layer, it can be located immediately at this another element or this another element or layer are gone up, are connected directly to or are coupled to layer, perhaps also can have intermediary element or layer.On the contrary, when an element be known as " directly " be positioned at another element or layer " on " or " being connected directly to " or " coupling directly to " another element or when layer, then do not have intermediary element or layer.Identical reference number is represented components identical in full.As used herein, term " and/or " comprise one or more relevant projects of listing arbitrarily and all combinations.

Should be appreciated that though can use term " first ", " second " etc. to describe various elements, assembly, zone, layer and/or part, these elements, assembly, zone, layer and/or part should not be subject to these terms herein.These terms only are used for an element, assembly, zone, layer or part are different from another element, assembly, zone, layer or part.Therefore, below first element, assembly, zone, layer or the part discussed can be called as second element, assembly, zone, layer or part, and without departing the teaching of the invention.

In order to be easy to the relation of element shown in the description figure or feature and another (other) element or feature, can use herein such as spatial relationship terms such as " following ", " below (being lower than) ", " bottom ", " top (being higher than) ", " tops ".Should be understood that the orientation that the spatial relationship term is intended to describe in comprising figure, also be included in use or operation in the different azimuth of device.For example, if the device among the figure is reversed, the element that then is described as be in " following " or " below " of other element or feature will be positioned at " top " of other element or feature.Therefore, exemplary term " below (being lower than) " can be included in the top and below these two orientation.Device can be in other orientation (revolve turn 90 degrees or in other orientation), and spatial relationship descriptor used herein can correspondingly be explained.

Term used herein only is used to describe the purpose of specific implementations, and is not intended to limit the present invention.As used herein, " (a) " of singulative, " one (an) " and " being somebody's turn to do (the) " also are intended to comprise plural form, unless point out clearly in addition in the context.Should be further understood that, when using term " to comprise (includes) " in this instructions and/or when " comprising (including) ", specify feature, integer, step, operation, element and/or assembly that existence is claimed, also do not exist or additional one or more further features, integer, step, operation, element, assembly and/or its combination but do not get rid of.

Unless otherwise defined, all terms used herein (comprising technical term and scientific terminology) and those skilled in the art common understand have an identical connotation.Should be further understood that, should be interpreted as having and the consistent connotation of connotation in the context of correlation technique such as those terms that in normally used dictionary, define, and should not be interpreted as Utopian or too mechanical connotation, unless definition so clearly herein.

Herein, reference is described illustrative embodiments of the present invention as the sectional view of the schematic representation of idealized embodiment of the present invention.Like this, for example can expect the variation of shape of the diagrammatic sketch that causes by manufacturing technology and/or tolerance.Therefore, embodiments of the present invention should not be construed as limited to the given shape in shown zone herein, but for example comprise the deviation of the shape that is caused by manufacturing.For example, the zone that is illustrated as or is described to the plane can have coarse and/or non-linear characteristics usually.In addition, the wedge angle that is illustrated can be that (being similar to) is circular.Therefore, the zone shown in the figure is actually schematically, and its shape is not intended to illustrate the accurate shape in zone, and is not intended to limit the scope of the invention.

All methods of Miao Shuing can be carried out with suitable order herein, unless have in addition in this article the indication or with the obvious contradiction of context.Unless otherwise stated, otherwise only be intended to the disclosure better is described with the use of whole example or exemplary language (for example, " such as ") arbitrarily, rather than the scope of the present disclosure is limited.Language in the instructions should not be interpreted as all representing that the employed any element of not claiming of this paper is that to put into practice embodiment necessary.

Hereinafter, describe in detail according to an illustrative embodiment of the invention with reference to the accompanying drawings.

Fig. 1 is the schematic circuit according to the illustrative embodiments of back light unit 100 of the present invention.

With reference to Fig. 1, back light unit 100 comprises driving circuit 110, light source cell 120, first switch portion 130 and second switch portion 140.

Driver element 110 comprises booster circuit 111 and light adjusting circuit 112.Booster circuit 111 receives the input voltage V that comes from external device (ED) _IN, and with this input voltage V _INBoost to driving voltage V _LEDWith driving light source unit 120.

Light adjusting circuit 112 receives the dim signal PWM that comes from external device (ED), and according to the brightness of dim signal PWM output control signal (for example, the first control signal CS1 to the, six control signal CS6) with each light source block of the overall brightness of control light source cell 120 or light source cell 120.The first control signal CS1 to the, three control signal CS3 among the first control signal CS1 to the, the six control signal CS6 are transferred to first switch portion 130, and the 4th control signal CS4 to the six control signal CS6 are transferred to second switch portion 140.Can regulate the time period of the high level lasting time of the first control signal CS1 to the, six control signal CS6 based on dim signal PWM.With reference to Fig. 3 the first control signal CS1 to the, six control signal CS6 are described in more detail after a while.

Light source cell 120 comprises a plurality of light source blocks (for example, the first light source block LB1 to the, nine light source block LB9).Each light source block among the first light source block LB1 to the, the nine light source block LB9 includes a plurality of light emitting diodes (" LED ") 121.In the exemplary embodiment, each light source block among the first light source block LB1 to the, the nine light source block LB9 includes three LED 121 that are one another in series and connect.Yet the quantity that is included in the LED121 in each light source block among the first light source block LB1 to the, the nine light source block LB9 can change, and being not limited to is three.In optional illustrative embodiments, the quantity that constitutes the light source block of light source cell 120 for example can be nine.

In the exemplary embodiment, first switch portion 130 comprises switching device, for example, and first switching device to the, three switching device SW1, SW2 and SW3.

The first switching device SW1 comprises and is connected with the lead-out terminal of booster circuit 111 and receives driving voltage V _LEDFirst electrode, second electrode that receives the first control signal CS1 come from light adjusting circuit 112 and the third electrode that is connected to the first terminal (for example, the positive pole of a LED 121 of each light source block) of each light source block among first light source block to the, three light source block LB1, LB2 and the LB3.Second switch device SW2 comprises and is connected with the lead-out terminal of booster circuit 111 and receives driving voltage V _LEDFirst electrode, second electrode that receives the second control signal CS2 come from light adjusting circuit 112 and public the third electrode that is connected to the first terminal (for example, the positive pole of a LED 121 of each light source block) of the 4th light source block to the six light source block LB4, LB5 and LB6.The 3rd switching device SW3 comprises and is connected with the lead-out terminal of booster circuit 111 and receives driving voltage V _LEDFirst electrode, second electrode that receives the 3rd control signal CS3 come from light adjusting circuit 112 and the third electrode that is connected to the first terminal (for example, the positive pole of a LED 121 of each light source block) of the 7th light source block to the nine light source block LB7, LB8 and LB9.

Second switch portion 140 comprises the 4th switching device to the six switching device SW4, SW5 and SW6.The 4th switching device SW4 comprises first electrode, second electrode that receives the 4th control signal CS4 that comes from light adjusting circuit 112 that second terminal (for example, the negative pole of last LED 121 of each light source block) with the first light source block LB1, the 4th light source block LB4 and the 7th light source block LB7 is connected and the third electrode that receives reference voltage.Driving voltage V _LEDBe positive voltage, reference voltage can be ground voltage or negative voltage.The 5th switching device SW5 comprises first electrode, second electrode that receives the 5th control signal CS5 that comes from light adjusting circuit 112 that second terminal (for example, the negative pole of last LED 121 of each light source block) with secondary light source piece LB2, the 5th light source block LB5 and the 8th light source block LB8 is connected and the third electrode that receives reference voltage.The 6th switching device SW6 comprises first electrode, second electrode that receives the 6th control signal CS6 that comes from light adjusting circuit 112 that second terminal (for example, the negative pole of last LED 121 of each light source block) with the 3rd light source block LB3, the 6th light source block LB6 and the 9th light source block LB9 is connected and the third electrode that receives reference voltage.

As shown in Figure 1, when light source cell 120 comprised nine light source blocks (for example, the first light source block LB1 to the, nine light source block LB9), first switch portion 130 comprised three switching device SW1 to SW3, and second switch portion 140 comprises three switching device SW4 to SW6.In optional illustrative embodiments, when light source cell 120 (for example comprises 12 light source blocks, the first light source block LB1 to the, 12 light source block LB12) time, first switch portion 160 (for example can comprise four switching devices, the first switching device SW1 to the, four switching device SW4), and second switch portion 170 can comprise three switching devices (for example, the 5th switching device SW5 to the minion is closed device SW7) (as shown in Figure 4 and Figure 5).

Similarly, when light source cell 120 comprises p light source block, and first switch portion 130 and second switch portion 140 be when comprising n switching device and m switching device (m, n and p are natural numbers) respectively, and the summation of m and n can be less than p.In addition, n and m can be the factors of p, that is, p can be divided exactly by n and m and can not be stayed remainder.In the exemplary embodiment, n and m are the factors of p, and all possible of two factors of p and in determined minimum and, wherein, the product of these two factors equals p.

As shown in fig. 1, back light unit 100 can comprise the first switching device SW1 to the, six switching device SW6, and it quantitatively is less than the first light source block LB1 to the, nine light source block LB9.Therefore, the quantity of all components of back light unit 100 can significantly reduce.

Fig. 2 is the schematic circuit of the first switching device SW1 to the, six switching device SW6 and the first light source block LB1 to the, the nine light source block LB9 of Fig. 1, shows the connection between them.Fig. 3 is the high level lasting time that illustrates according to the first control signal CS1 to the, the six control signal CS6 of Fig. 2, the signal timing diagram of the conduction duration of the first light source block LB1 to the, nine light source block LB9.

With reference to Fig. 2, the first light source block LB1 to the, nine light source block LB9 can be provided with matrix form, and this matrix form is defined to the third line r3 by first row c1 to the three row c3 that are connected to the first switching device SW1 to the, three switching device SW3 respectively and the first capable r1 that is connected to the 4th switching device SW4 to the six switching device SW6 respectively.

The first switching device SW1 that is connected to the first row c1 provides driving voltage V in response to the first control signal CS1 to the first light source block LB1 to the, three light source block LB3 _LEDThe second switch device SW2 that is connected to secondary series c2 provides driving voltage V in response to the second control signal CS2 to the 4th light source block LB4 to the six light source block LB6 _LEDThe 3rd switching device SW3 that is connected to the 3rd row c3 provides driving voltage V in response to the 3rd control signal CS3 to the 7th light source block LB7 to the nine light source block LB9 _LED

The 4th switching device SW4 that is connected to the first row r1 provides reference voltage in response to the 4th control signal CS4 to the first light source block LB1, the 4th light source block LB4 and the 7th light source block LB7.The 5th switching device SW5 that is connected to the second row r2 provides reference voltage in response to the 5th control signal CS5 to secondary light source piece LB2, the 5th light source block LB5 and the 8th light source block LB8.The 6th switching device SW6 that is connected to the third line r3 provides reference voltage in response to the 6th control signal CS6 to the 3rd light source block LB3, the 6th light source block LB6 and the 9th light source block LB9.

When two switching devices that are connected to each light source block all during conducting, each light source block is luminous.In the exemplary embodiment, the conduction duration of each light source block can be determined by the conduction duration of two switching devices that are connected to each light source block.Because the conduction duration of each switching device is to be determined by the control signal that is applied to switching device, so the conduction duration of the first light source block LB1 to the, nine light source block LB9 can be determined by the high level lasting time of the first control signal CS1 to the, six control signal CS6.Fig. 3 illustrates the high level lasting time according to the first control signal CS1 to the, six control signal CS6, the conduction duration of the first light source block LB1 to the, nine light source block LB9.

Referring now to Fig. 3, the high level lasting time of the first control signal CS1 is set at the t0 to the first constantly between the t1 constantly of zero in each time frame, and the high level lasting time of the second control signal CS2 is set at the t0 to the second constantly between the t2 constantly of zero in each time frame.The high level lasting time of the 3rd control signal CS3 is set at zero in each time frame constantly between t0 to the three moment t3.

The high level lasting time of the 4th control signal CS4 is set at the t0 to the four constantly between the t4 constantly of zero in each time frame, and the high level lasting time of the 5th control signal CS5 is set at the t0 to the five constantly between the t5 constantly of zero in each time frame.The high level lasting time of the 6th control signal CS6 is set at zero in each time frame constantly between t0 to the three moment t3.

The first light source block LB1 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the first control signal CS1 and the 4th control signal CS4.In the exemplary embodiment, the first light source block LB1 has the corresponding conduction duration of high level lasting time of the 4th control signal CS4 with narrower time period in the high level lasting time with the high level lasting time of the first control signal CS1 and the 4th control signal CS4.In the exemplary embodiment, the first light source block LB1 is switched between t0 to the four moment t4 constantly zero.

Secondary light source piece LB2 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the first control signal CS1 and the 5th control signal CS5.In the exemplary embodiment, secondary light source piece LB2 is switched between the t1 constantly at zero moment t0 and first.

The 3rd light source block LB3 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the first control signal CS1 and the 6th control signal CS6.In the exemplary embodiment, the 3rd light source block LB3 is switched between the t1 constantly at zero moment t0 and first.

The 4th light source block LB4 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the second control signal CS2 and the 4th control signal CS4.In the exemplary embodiment, the 4th light source block LB4 is switched between the t4 constantly at zero moment t0 and the 4th.

The 5th light source block LB5 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the second control signal CS2 and the 5th control signal CS5.In the exemplary embodiment, the 5th light source block LB5 is switched between the t5 constantly at zero moment t0 and the 5th.

The 6th light source block LB6 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the second control signal CS2 and the 6th control signal CS6.In the exemplary embodiment, the 6th light source block LB6 is switched between the t3 constantly at zero moment t0 and the 3rd.

The 7th light source block LB7 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the 3rd control signal CS3 and the 4th control signal CS4.In the exemplary embodiment, the 7th light source block LB7 is switched between the t4 constantly at zero moment t0 and the 4th.

The 8th light source block LB8 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the 3rd control signal CS3 and the 5th control signal CS5.In the exemplary embodiment, the 8th light source block LB8 is switched between the t5 constantly at zero moment t0 and the 5th.

The 9th light source block LB9 was switched in the overlapping in time time period of the high level lasting time of the high level lasting time of the 3rd control signal CS3 and the 6th control signal CS6.In the exemplary embodiment, the 9th light source block LB9 is switched between the t3 constantly at zero moment t0 and the 3rd.

As mentioned above, can determine the conduction duration of each light source block of light source block LB1 to the light source block LB9 by time period of high level lasting time that control puts on two control signals of two switching devices that are connected to each light source block of light source block LB1 to the light source block LB9.Therefore, the light quantity exported from light source block LB1 to light source block LB9 of may command.

Fig. 4 is the schematic circuit according to the optional illustrative embodiments of back light unit 105 of the present invention, Fig. 5 is the schematic circuit that first switching device SW1 to the minion of Fig. 4 is closed device SW7 and the first light source block LB1 to the, 12 light source block LB12, shows the connection between them.

With reference to Fig. 4, back light unit 105 comprises light source cell 120, driving circuit 150, first switch portion 160 and second switch portion 170.

Driving circuit 150 receives the input voltage V that comes from external device (ED) _IN, and with this input voltage V _INBoost to driving voltage V _LEDWith driving light source unit 120.Driving circuit 150 receives the dim signal PWM that comes from external device (ED) and based on the brightness of dim signal PWM output control signal (for example, the first control signal CS1 to the, seven control signal CS7) with each piece of the overall brightness of control light source cell 120 or light source cell 120.The first control signal CS1 to the, four control signal CS4 among the first control signal CS1 to the, the seven control signal CS7 are applied in first switch portion 160, and the 5th control signal CS5 to the seven control signal CS7 are applied in second switch portion 170.Driving circuit 150 can be regulated the time period of the high level lasting time of the first control signal CS1 to the, seven control signal CS7 based on dim signal PWM.

Light source cell 120 comprises a plurality of light source blocks (for example, the first light source block LB1 to the, 12 light source block LB12).Each light source block among the first light source block LB1 to the, the 12 light source block LB12 includes a plurality of LED 121 that are one another in series and connect.

In the exemplary embodiment, first switch portion 160 comprises first switching device to the, four switching device SW1, SW2, SW3 and SW4.The first switching device SW1 comprises reception driving voltage V _LEDFirst electrode, second electrode that receives the first control signal CS1 and the third electrode that is connected to the first terminal (for example, the positive pole of first LED of each light source block) of first light source block to the, three light source block LB1, LB2 and LB3.Second switch device SW2 comprises reception driving voltage V _LEDFirst electrode, the third electrode that receives second electrode of the second control signal CS2 and be connected to the first terminal of the 4th light source block to the six light source block LB4, LB5 and LB6.The 3rd switching device SW3 comprises reception driving voltage V _LEDFirst electrode, the third electrode that receives second electrode of the 3rd control signal CS3 and be connected to the first terminal of the 7th light source block to the nine light source block LB7, LB8 and LB9.The 4th switching device SW4 comprises reception driving voltage V _LEDFirst electrode, the third electrode that receives second electrode of the 4th control signal CS4 and be connected to the first terminal of the tenth light source block to the 12 light source block LB10, LB11 and LB12.

Second switch portion 170 comprises the 5th switching device to the minion pass device SW5, SW6 and SW7.The 5th switching device SW5 comprises the third electrode of first electrode of second terminal (for example, the negative pole of last LED 121 of each light source block) that is connected to the first light source block LB1, the 4th light source block LB4, the 7th light source block LB7 and the tenth light source block LB10, second electrode that receives the 5th control signal CS5 and reception reference voltage.Driving voltage V _LEDBe positive voltage, reference voltage can be ground voltage or negative voltage.The 6th switching device SW6 comprises the third electrode of first electrode of second terminal that is connected to secondary light source piece LB2, the 5th light source block LB5, the 8th light source block LB8 and the 11 light source block LB11, second electrode that receives the 6th control signal CS6 and reception reference voltage.Minion is closed the third electrode that device SW7 comprises first electrode of second terminal that is connected to the 3rd light source block LB3, the 6th light source block LB6, the 9th light source block LB9 and the 12 light source block LB12, second electrode that receives the 7th control signal CS7 and reception reference voltage.

With reference to Fig. 5, the first light source block LB1 to the, 12 light source block LB12 can be provided with matrix form, and this matrix form is by first row c1 to the four row c4 that are connected to the first switching device SW1 to the, four switching device SW4 respectively and be connected to the first capable r1 that the 5th switching device SW5 to the minion closes device SW7 respectively and define to the third line r3.

The first switching device SW1 that is connected to the first row c1 provides driving voltage V in response to the first control signal CS1 to the first light source block LB1 to the, three light source block LB3 _LEDThe second switch device SW2 that is connected to secondary series c2 provides driving voltage V in response to the second control signal CS2 to the 4th light source block LB4 to the six light source block LB6 _LEDThe 3rd switching device SW3 that is connected to the 3rd row c3 provides driving voltage V in response to the 3rd control signal CS3 to the 7th light source block LB7 to the nine light source block LB9 _LEDThe 4th switching device SW4 that is connected to the 4th row c4 provides driving voltage V in response to the 4th control signal CS4 to the tenth light source block LB10 to the 12 light source block LB12 _LED

The 5th switching device SW5 that is connected to the first row r1 provides reference voltage in response to the 5th control signal CS5 to the first light source block LB1, the 4th light source block LB4, the 7th light source block LB7 and the tenth light source block LB10.The 6th switching device SW6 that is connected to the second row r2 provides reference voltage in response to the 6th control signal CS6 to secondary light source piece LB2, the 5th light source block LB5, the 8th light source block LB8, the 11 light source block LB11.The minion pass device SW7 that is connected to the third line r3 provides reference voltage in response to the 7th control signal CS7 to the 3rd light source block LB3, the 6th light source block LB6, the 9th light source block LB9, the 12 light source block LB12.

(for example, each light source block among the first light source block LB1 to the, the 12 light source block LB12 all during conducting, each light source block is luminous for) two switching devices when being connected to each light source block.In the exemplary embodiment, the conduction duration of each light source block can be determined by the conduction duration of two switching devices that are connected to this light source block.More specifically, because the conduction duration of each switching device is to be determined by the control signal that it is applied, so the conduction duration of the first light source block LB1 to the, 12 light source block LB12 can be determined by the high level lasting time of the first control signal CS1 to the, seven control signal CS7.

Fig. 6 is the vertical view of illustrative embodiments of the light source cell 120 of Fig. 1.

With reference to Fig. 6, light source cell 120 can comprise in one direction the printed circuit board (PCB) 122 that extends and be arranged on the first light source block LB1 to the, nine light source block LB9 on the printed circuit board (PCB) 122 along the longitudinal direction linearity of printed circuit board (PCB) 122.Longitudinal direction linearity on the end face of printed circuit board (PCB) 122 along printed circuit board (PCB) 122 is provided with included LED 121 among the first light source block LB1 to the, the nine light source block LB9.

Light source cell 120 also comprises the connector 123 on the end that is arranged on printed circuit board (PCB) 122.In the exemplary embodiment, the first light source block LB1 to the, the nine light source block LB9 of printed circuit board (PCB) 122 are electrically connected to first switch portion 130 and second switch portion 140 as shown in fig. 1 via connector 123.

Connector 123 can comprise pin (pin), and the quantity of pin is more than or equal to the summation of the quantity of the switching device SW4 to SW6 of the quantity of the switching device SW1 to SW3 of first switch portion 130 and second switch portion 140.In the exemplary embodiment, connector 123 comprises the first pin P1 to the, the six pin P6 that are connected to the first switching device SW1 to the, six switching device SW6 respectively.In the exemplary embodiment, the first pin P1 to the, three pin P3 receive driving voltage V according to the on/off operation of the first switching device SW1 to the, three switching device SW3 _LED, the 4th pin P4 to the six pin P6 receive reference voltage according to the on/off operation of the 4th switching device SW4 to the six switching device SW6.

Printed circuit board (PCB) 122 comprises the first connecting line CL1 to the, the six connecting line CL6 of the first pin P1 to the, the six pin P6 that are connected to connector 123 respectively.More specifically, the first connecting line CL1 to the, three connecting line CL3 are connected to the first pin P1 to the, three pin P3 respectively, and receive driving voltage V by them _LEDThe 4th connecting line CL4 to the six connecting line CL6 are connected to the 4th pin P4 to the six pin P6 respectively, and receive reference voltage by them.

The first connecting line CL1 is electrically connected to the positive pole of first LED of the first light source block LB1 to the, three light source block LB3 with the 3rd pin P3, and the first light source block LB1 to the, three light source block LB3 receive driving voltage V by the first connecting line CL1 when the first switching device SW1 conducting _LEDThe second connecting line CL2 is electrically connected to the positive pole of first LED of the 4th light source block LB4 to the six light source block LB6 with the second pin P2, and the 4th light source block LB4 to the six light source block LB6 receive driving voltage V by the second connecting line CL2 when second switch device SW2 conducting _LEDThe 3rd connecting line CL3 is electrically connected to the positive pole of first LED of the 7th light source block LB7 to the nine light source block LB9 with the first pin P1, and the 7th light source block LB7 to the nine light source block LB9 receive driving voltage V by the 3rd connecting line CL3 when the 3rd switching device SW3 conducting _LED

The 4th connecting line CL4 is electrically connected to the negative pole of last LED of the first light source block LB1, the 4th light source block LB4 and the 7th light source block LB7 with the 4th pin P4, and the first light source block LB1, the 4th light source block LB4 and the 7th light source block LB7 receive reference voltage by the 4th connecting line CL4 when the 4th switching device SW4 conducting.The 5th connecting line CL5 is electrically connected to the negative pole of last LED of secondary light source piece LB2, the 5th light source block LB5 and the 8th light source block LB8 with the 5th pin P5, and secondary light source piece LB2, the 5th light source block LB5 and the 8th light source block LB8 receive reference voltage by the 5th connecting line CL5 when the 5th switching device SW5 conducting.The 6th connecting line CL6 is electrically connected to the negative pole of last LED of the 3rd light source block LB3, the 6th light source block LB6 and the 9th light source block LB9 with the 6th pin P6, and the 3rd light source block LB3, the 6th light source block LB6 and the 9th light source block LB9 receive reference voltage by the 6th connecting line CL6 when the 6th switching device SW6 conducting.

In the exemplary embodiment, when (for example on printed circuit board (PCB) 122, being provided with nine light source blocks, the first light source block LB1 to the, nine light source block LB9) time, printed circuit board (PCB) 122 comprise as shown in Figure 6 six connecting lines (for example, the first connecting line CL1 to the, six connecting line CL6), but the quantity of connecting line is not limited to these.In optional illustrative embodiments, when the quantity of light source block was increased to 12, the quantity of connecting line rose to seven.Therefore, when the quantity of light source block was p, the quantity of the connecting line that printed circuit board (PCB) 122 comprises can be multiple quantity less than p.The quantity of the connecting line of printed circuit board (PCB) 122 can be set equal to p two factors all possible and in minimum value, wherein, the product of these two factors equals p.

As mentioned above, when the quantity of the connecting line of printed circuit board (PCB) 122 during, can significantly reduce the integral width w1 of printed circuit board (PCB) 122, thereby can reduce the size of back light unit 100 less than the quantity of light source block.

Fig. 7 is the vertical view according to the optional illustrative embodiments of light source cell 128 of the present invention.Fig. 8 is the sectional view of the part I of Fig. 7.

With reference to Fig. 7 and Fig. 8, light source cell 128 comprises double-sided printed-circuit board 125.This double-sided printed-circuit board 125 can comprise on the end face 125a that is provided with LED 121 thereon connecting line (for example, the first connecting line CL1 to the, six connecting line CL6) and be arranged on end face 125a opposed bottom surface 125b on connecting line (for example, the 7th connecting line CL7 to the nine connecting line CL9).

In the exemplary embodiment, connector 123 is arranged on the end face 125a of double-sided printed-circuit board 125.In the exemplary embodiment, the first connecting line CL1 to the, six connecting line CL6 are arranged on the end face 125a of double-sided printed-circuit board 125, thereby the first connecting line CL1 to the, six connecting line CL6 are electrically connected to the first pin P1 to the, the six pin P6 of connector 123.

The direction (being provided with LED 121 on this direction) that is provided with of the LED 121 of the first connecting line CL1 to the, three connecting line CL3 on the end face 125a of double-sided printed-circuit board 125 among the first connecting line CL1 to the, the six connecting line CL6 goes up extension.The 4th connecting line CL4 to the six connecting line CL6 among the first connecting line CL1 to the, the six connecting line CL6 are electrically connected to the side of setting upwardly extending the 7th connecting line CL7 to the nine connecting line CL9 of the LED 121 on the 125b of the bottom surface of double-sided printed-circuit board 125 respectively.Double-sided printed-circuit board 125 comprises the through hole 125c that penetrates its formation.The 4th connecting line CL4 to the six connecting line CL6 are electrically connected to the 7th connecting line CL7 to the nine connecting line CL9 by its corresponding through hole 125c respectively.

When light source cell 128 comprises double-sided printed-circuit board 125 because the 7th connecting line CL7 to the nine connecting line CL9 can be overlapping with LED 121, so the width w2 of double-sided printed-circuit board 125 can be significantly less than the width w1 of the printed circuit board (PCB) shown in Fig. 6 122.

In the exemplary embodiment, as shown in Figure 7 and Figure 8, light source cell 128 comprises double-sided printed-circuit board 125, but is not limited thereto.In optional illustrative embodiments,

light source cell

120 and 128 for example can comprise the multilayer board (not shown).In the exemplary embodiment, connecting line CL1 to CL6 can be distributed in each layer of multilayer board.

In the exemplary embodiment, printed circuit board (PCB) 122 and 125 can comprise metal material.Because the operplate printing circuit board has the thermal conductivity higher than plastic printing circuit board, so the heat that the comparable plastic printing circuit board of operplate printing circuit board more effectively dissipates and sends from LED 121.

Fig. 9 is the vertical view of illustrative embodiments of back light unit 100 that comprises the light source cell 120 of Fig. 6.Figure 10 is the sectional view along the line II-II ' intercepting of Fig. 9.

With reference to Fig. 9 and Figure 10, back light unit 100 can comprise light source cell 120 and light guide plate 180.The light source cell 120 of Fig. 9 and Figure 10 is identical with the light source cell shown in Fig. 6 basically, hereinafter will omit any repetition details of light source cell 120 and describe.

In the exemplary embodiment, light guide plate 180 can have the tabular shape, rectangular flat shape shape for example shown in Figure 9.In the exemplary embodiment, light guide plate 180 comprises the side 181 that is set to adjacent light source unit 120, the exit facet 182 that extends of an end of 181 and be set to from the side 181 opposite end and extend and be arranged essentially parallel to the reflecting surface 183 that exit facet 182 is provided with from the side.

Be incident on the side 181 of light guide plate 180 from the light of light source cell 120 outputs.Passed side 181 and gone into to inject the light of light guide plate 180 and be transferred to the outside by exit facet 182, face 183 reflections perhaps were reflected before light is transferred to exit facet 182.Be not reflected surface 183 reflections and pass light that reflecting surface 183 leaks and can be reflected plate or reflector plate (can be arranged on the following of light guide plate 180) (not shown) once more towards light guide plate 180 reflections.

In the exemplary embodiment, as shown in Figure 9, back light unit 100 comprises the light source cell 120 that a side of contiguous light guide plate 180 is provided with, but is not limited thereto.In optional illustrative embodiments, for example, back light unit 100 can comprise at least two light source cells of at least two sides settings that are respectively adjacent to light guide plate 180.

As shown in figure 10, the LED 121 that is arranged on the printed circuit board (PCB) 122 comprises that light-emitting area 121a is with output light.In the exemplary embodiment, light-emitting area 121a can be arranged essentially parallel to the end face 122a of printed circuit board (PCB) 122.In the exemplary embodiment, the end face 122a of light-emitting area 121a and printed circuit board (PCB) 122 can be arranged essentially parallel to the side 181 of light guide plate 180.

Figure 11 is the vertical view according to the optional illustrative embodiments of back light unit 108 of the present invention.Figure 12 is the sectional view along the line III-III ' intercepting of Figure 11.

With reference to Figure 11 and Figure 12, back light unit 108 can comprise light source cell 129 and light guide plate 180.Light guide plate 180 is identical with Fig. 9 and light guide plate shown in Figure 10 basically, hereinafter will omit it and repeat details arbitrarily and describe.

In the exemplary embodiment, light source cell 129 comprises the printed circuit board (PCB) 127 of reflecting surface 183 settings that are parallel to light guide plate 180.More specifically, the end face 127a of printed circuit board (PCB) 127 side 181 that is set to be arranged essentially parallel to the reflecting surface 183 of light guide plate 180 and is substantially perpendicular to light guide plate 180.LED 124 is set on the end face 127a of printed circuit board (PCB) 127.The light-emitting area 124a of LED 124 is set to be substantially perpendicular to the end face 127a of printed circuit board (PCB) 127, and is arranged essentially parallel to the side 181 of light guide plate 180.

In the exemplary embodiment, as shown in Fig. 6 to Figure 12, back light unit comprises one dimension local dimming structure, and wherein, light source block is arranged linearly in one direction, but is not limited thereto.In optional illustrative embodiments, back light unit for example can comprise multidimensional local dimming structure.

Figure 13 is the vertical view according to the optional illustrative embodiments of back light unit 109 of the present invention.

With reference to Figure 13, back light unit 109 can have two-dimentional local dimming structure, and wherein, light source block is disposed on the both direction.In the exemplary embodiment, back light unit 109 comprises light source cell 150 and scatter plate 190.Light source cell 150 comprises and is arranged on the printed circuit board (PCB) 151 below the scatter plate 190 and is arranged on a plurality of light source block LB1 to LB12 on the printed circuit board (PCB) 151.In the exemplary embodiment, light source block LB1 to LB12 can be arranged to 3 * 4 matrix form.

Light source block LB1 to LB12 can comprise a plurality of light sources 152, and each light source can comprise (a plurality of) LED.

Figure 14 is the block diagram according to the illustrative embodiments of display device 200 of the present invention.

With reference to Figure 14, display device 200 can comprise display panels 210, timing controller 220, gate drivers 230, data driver 240, driving circuit 110, light source cell 120, first switch portion 130 and second switch portion 140.Driving circuit 110 comprises booster circuit (for example, the DC/DC converter 111) and light adjusting circuit 112.

Display panels 210 (for example comprises many gate lines, first grid polar curve GL1 to the n gate lines G Ln), with many gate lines (for example, first grid polar curve GL1 to the n gate lines G Ln) many data lines of Jiao Chaing (for example, first data line DL1 to the m data line DLm) and be arranged on many gate lines (for example, first grid polar curve GL1 to the n gate lines G Ln) and the pixel in the corresponding zone of many data lines (for example, first data line DL1 to the m data line DLm).As shown in figure 14, each pixel comprises the thin film transistor (TFT) Tr with the grid that is connected to respective gates line and corresponding data line respectively and source electrode, the liquid crystal capacitor C that is connected to the drain electrode of thin film transistor (TFT) Tr _LC, and holding capacitor C _ST

Timing controller 220 receives viewdata signal RGB, horizontal-drive signal H_SYNC, vertical synchronizing signal V_SYNC, clock signal MCLK and data enable signal DE from external device (ED).Timing controller 220 becomes another data layout based on the interface between timing controller 220 and the data driver 240 with the Data Format Transform of viewdata signal RGB, thus the viewdata signal RGB ' that is changed to data driver 240 outputs.In addition, timing controller 220 to data driver 240 output data control signals (for example, output commencing signal TP, horizontal commencing signal STH, clock signal HCLK), and to gate drivers 230 output grid control signals (for example, vertical commencing signal STV, gate clock signal CPV, output enable signal OE).

Gate drivers 230 receives gate-on voltage VON and grid cut-off voltage VOFF, to export signal G1 to Gn in turn with gate-on voltage VON in response to the grid control signal that provides from timing controller 220 (for example, vertical commencing signal STV, gate clock signal CPV, output enable signal OE).Signal G1 to Gn is put on the gate lines G L1 to GLn of display panels 210 in turn, with sequential scanning gate lines G L1 to GLn.In optional illustrative embodiments, display device 200 can further comprise regulator (regulator) (not shown), with input voltage V _INConvert the gate-on voltage VON and the grid cut-off voltage VOFF that will export to, and regulator can receive from what DC/DC converter 111 provided and is different from input voltage V _INVoltage.

Data driver 240 can receive analog drive voltage AVDD, and utilizes the gamma electric voltage that provides from the gamma electric voltage producer (not shown) to produce a plurality of gray-scale voltages.Data driver 240 is selected gray-scale voltage corresponding to viewdata signal RGB ' in response to data controlling signal (for example, the output commencing signal TP that provides from timing controller 220, horizontal commencing signal STH, clock signal HCLK) from gray-scale voltage.Data driver 240 is applied to gray-scale voltage the data line DL1 to DLm of display panels 210 as data-signal D1 to Dm.

When signal G1 to Gn is put on gate lines G L1 to GLn in turn, synchronously data-signal D1 to Dm is put on many data lines (for example, first data line DL1 to the m data line DLm) with signal G1 to Gn.When signal is put on gate line, be connected to thin film transistor (TFT) Tr conducting of gate line in response to signal.When data-signal being put on the data line of the thin film transistor (TFT) Tr that is connected to conducting, data-signal is charged to liquid crystal capacitor C by the thin film transistor (TFT) Tr of conducting _LCWith holding capacitor C _STIn.

Liquid crystal capacitor C _LCRegulate the light transmission of liquid crystal according to charging voltage.When thin film transistor (TFT) Tr conducting, with data-signal to holding capacitor C _STCharge.When thin film transistor (TFT) Tr ends, be charged to holding capacitor C _STIn data-signal be applied in liquid crystal capacitor C _LCThereby, kept liquid crystal capacitor C basically _LCElectric charge.Therefore, display panels 210 uses the such scheme display image.

In the exemplary embodiment, light source cell 120 comprises the first light source block LB1 to the, the nine light source block LB9 of a side that is arranged on display panels 110.First switch portion 130 can be in response to the first control signal CS1 to the, the three control signal CS3 that provide from light adjusting circuit 112 with driving voltage V _LEDOffer at least two light source blocks from the first light source block LB1 to the, nine light source block LB9, selecting.Second switch portion 140 can offer the first light source block LB1 to the, nine light source block LB9 with reference voltage (for example, ground voltage) in response to the 4th control signal CS4 to the six control signal CS6 that provide from light adjusting circuit 112.In the exemplary embodiment, second switch portion 140 can be applied to reference voltage at least one in connected at least two light source blocks.Therefore, light can be from being applied in driving voltage V _LEDAt least one light source block output with reference voltage.

In the exemplary embodiment, can regulate the light quantity of sending from the first light source block LB1 to the, nine light source block LB9 according to the time period of the high level lasting time of the first control signal CS1 to the, six control signal CS6.

Figure 15 is the light source cell 120 of Figure 14 and the block diagram of the corresponding relation between the display panels 210, and Figure 16 is the table of brightness of the first light source block LB1 to the, the nine light source block LB9 of expression Figure 15.

With reference to Figure 15 and Figure 16, display panels 210 can be divided into A1 to the nine light modulations zone, first light modulation zone A9 of the first light source block LB1 to the, the nine light source block LB9 that correspond respectively to light source cell 120.The quantity of the light modulation of definition zone A1 to A9 can change according to the quantity of light source block in the display panels 210.In the exemplary embodiment, when comprising 12 light source blocks in light source cell 120, display panels 210 can be divided into 12 light modulation zones.

When the dim signal PWM that puts on light adjusting circuit 112 represents by 8, and when the image that shows in A1 to the nine light modulations zone, first light modulation zone A9 (these light modulation zones of definition in display panels 210) was converted into the representative luminance value of image, image can be represented with 256 levels (0～255).In the exemplary embodiment, A1 to the three light modulations zone, first light modulation zone A3 among the A9 of A1 to the nine light modulations zone, first light modulation zone can have representative luminance value 0, the 4th light modulation zone A4 can have representative luminance value 64, the five light modulations zone A5 can have representative luminance value 191.The 6th light modulation zone A6 can have that representative luminance value 246, the seven light modulations zone A7 can have representative luminance value 250, the eight light modulations zone A8 and the 9th light modulation zone A9 can have representative luminance value 254.

The light quantity that the conduction duration of the scalable first switching device SW1 to the six switching device SW6 sends from the first light source block LB1 to the, the nine light source block LB9 corresponding to A1 to the nine light modulations zone, first light modulation zone A9 with control.In the exemplary embodiment, as shown in Figure 16, the conduction duration of the first switching device SW1 to the, six switching device SW6 can be represented with 256 values corresponding to 256 intensity levels.

As shown in Figure 16, the conduction duration of the first switching device SW1 can have the time period 0, and the conduction duration of second switch device SW2 can have the time period 246, and the conduction duration of the 3rd switching device SW3 can have the time period 254.In addition, the conduction duration that the conduction duration of the 4th switching device SW4 can have time period 250, the five switching device SW5 can have the time period 254, and the conduction duration of the 6th switching device SW6 can have the time period 254.

When the conduction duration of the first switching device SW1 had time period 0, the first light source block LB1 to the, the three light source block LB3 that are connected to the first switching device SW1 were disconnected.The 4th light source block LB4 was switched in corresponding with the less duration in the conduction duration of the conduction duration of second switch device SW2 and the 4th switching device SW4 246 duration.The 5th light source block LB5 was switched in corresponding with the less duration in the conduction duration of the conduction duration of second switch device SW2 and the 5th switching device SW5 246 duration.The 6th light source block LB6 was switched in corresponding with the less duration in the conduction duration of the conduction duration of second switch device SW2 and the 6th switching device SW6 246 duration.

The 7th light source block LB7 was switched in corresponding with the less duration in the conduction duration of the conduction duration of the 3rd switching device SW3 and the 4th switching device SW4 250 duration.Because the conduction duration of the 3rd switching device SW3, the 5th switching device SW5, the 6th switching device SW6 has the identical time period, so the 8th light source block LB8, the 9th light source block LB9 were switched in 254 duration.

For illustrative purposes, the data shown in Figure 16 are provided as an example.When the intensity level of A1 to the nine light modulations zone, first light modulation zone of display panels 210 A9 changes, can change the conduction duration of the first light source block LB1 to the, nine light source block LB9.

As mentioned above, display device 200 can adopt the light modulation scheme of controlling the light quantity of sending from the first light source block LB1 to the, nine light source block LB9 according to the time period of the conduction duration of the first switching device SW1 to the, six switching device SW6.

Figure 17 is the block diagram of illustrative embodiments of the timing controller 220 of Figure 14.

With reference to Figure 17, timing controller 220 can comprise typical value determiner 221, typical value compensator 223 and pixel data corrector 225.

Typical value determiner 221 is determined the representative luminance value of the first light source block LB1 to the, nine light source block LB9 based on the external image signal of regional A1 to the nine light modulations of first light modulation corresponding to the first light source block LB1 to the, the nine light source block LB9 zone A9 that offers display panels 210.Typical value compensator 223 calculates the luminance compensation value by representative luminance value is compensated.The luminance compensation value that typical value compensator 223 calculates is provided for pixel data corrector 225.Pixel data corrector 225 is applied to borderline region between the first light source block LB1 to the, nine light source block LB9 based on the luminance compensation value with distance weighting, with the pixel data of image signal correction RGB.Then, the pixel data after the correction is provided to data driver 240.

In the exemplary embodiment, typical value determiner 221 utilizes the representative luminance value of choosing the first light source block LB1 to the, nine light source block LB9 from first light modulation zone A1 to the nine light modulations zone corresponding picture signal RGB of A9 and the control signal CS with based on the first light source block LB1 to the, nine light source block LB9 division of outside input.Each representative luminance value can be the maximum brightness value of picture signal RGB of each image block and the intermediate value of the scope between the average brightness value.

Typical value compensator 223 can comprise spatial compensator 223a, carries out low-pass filtering with the representative luminance value to the first light source block LB1 to the, nine light source block LB9.The maximal value of the representative luminance value that spatial compensator 223a can obtain based on the other light sources piece from specific light source piece and contiguous this specific light source piece is calculated the luminance compensation value of the first light source block LB1 to the, nine light source block LB9.

In the exemplary embodiment, if the representative luminance value of specific light source piece less than replacement ratio and the mxm. from the representative luminance value that the light source block of specific light source piece and contiguous this specific light source piece obtains (for example, maximum representative luminance value) product, then spatial compensator 223a can make the representative luminance value of this specific light source piece calculate the luminance compensation value of this specific light source piece greater than the product of replacement ratio and maximum representative luminance value by the representative luminance value that compensates this specific light source piece.Therefore, the representative luminance value of the first light source block LB1 to the, nine light source block LB9 can reduce lenitively basically or increase and sharply not change.

In the exemplary embodiment, typical value compensator 223 can further comprise Time Compensator 223b, thereby be unit with each frame of picture signal RGB the representative luminance value of each light source block among the first light source block LB1 to the, the nine light source block LB9 is carried out low-pass filtering.

When brightness moving image jumpy is shown, because the instantaneous change of brightness meeting of the first light source block LB1 to the, nine light source block LB9, so between the frame of picture signal RGB, scintillation occurs.In the exemplary embodiment, the representative luminance value of the first light source block LB1 to the, nine light source block LB9 is carried out low-pass filtering, therefore, retrained the variation of the representative luminance value of the first light source block LB1 to the, nine light source block LB9 about time shaft.

Typical value compensator 223 can comprise about spatial axes and the representative luminance value of each light source block among the first light source block LB1 to the, the nine light source block LB9 carried out the spatial compensator 223a of low-pass filtering and the representative luminance value of each light source block among the light source block LB1 to LB9 is carried out among the Time Compensator 223b of low-pass filtering one about time shaft.When typical value compensator 223 comprise spatial compensator 223a and Time Compensator 223b the two the time, the layout of spatial compensator 223a and Time Compensator 223b is not limited to the specific arrangements mode.

Typical value compensator 223 calculates the luminance compensation value and the luminance compensation value is provided to pixel data corrector 225 by each representative luminance value is compensated.225 pairs of pixel datas of pixel data corrector proofread and correct to prevent whole screen because the light modulation of back light unit and deepening, thereby increase the brightness of image.Pixel data corrector 225 is applied to borderline region between the first light source block LB1 to the, the nine light source block LB9 based on the luminance compensation value that obtains from typical value compensator 223 with distance weighting, thus the pixel data of image signal correction RGB effectively.

In the exemplary embodiment, the part that pixel data corrector 225 will be close to the light-emitting block of light source block LB1 to LB9 is made as borderline region and remaining area is made as the central area, thereby can adopt specific pixel correction scheme to each zone.The central area luminance compensation value that provides from typical value compensator 223 is provided carries out pixel correction, and borderline region is based on by the value of estimating to luminance compensation value applications distances weight and carries out pixel correction, thereby the sharp luminance that reduces significantly between the first light source block LB1 to the, the nine light source block LB9 changes.

In the exemplary embodiment, when actual light modulation level and target light modulation level not simultaneously, pixel data corrector 225 can be proofreaied and correct the pixel data of the picture signal that puts on each the light modulation zone among the A9 of A1 to the nine light modulations zone, first light modulation zone according to the actual light modulation level and the difference between the target light modulation level of each light source block among the first light source block LB1 to the, the nine light source block LB9.

Particularly, as shown in Figure 15 and Figure 16, even the target light modulation level of the 4th light source block LB4 that calculates is 64, but the actual light modulation level of the 4th light source block LB4 that measures is 246.In this case, because actual light modulation level is greater than target light modulation level, the 4th light modulation zone A4 corresponding to the 4th light source block LB4 of display panels 210 can have the intrinsic brilliance value greater than target brightness value.Therefore, pixel data corrector 225 is proofreaied and correct the brightness value of the picture signal that puts on the 4th light modulation zone A4 to reduce brightness value.

On the contrary, when the actual light modulation level of the preset light sources piece among the first light source block LB1 to the, the nine light source block LB9 during less than target light modulation level, pixel data corrector 225 recoverables put on the brightness value of picture signal in the light modulation zone corresponding with this light source block to increase brightness value.

As mentioned above, when the first light source block LB1 to the, nine light source block LB9 have the actual light modulation level that is different from target light modulation level, pixel data corrector 225 can be proofreaied and correct the pixel data of the picture signal that puts on A1 to the nine light modulations zone, first light modulation zone A9 according to the difference between actual light modulation level and the target light modulation level, thereby significantly improves dimming effect.

Figure 18 is the schematic circuit of the optional illustrative embodiments of the first switching device SW1 to the, six switching device SW6 and the first light source block LB1 to the, nine light source block LB9, show the connection between them, Figure 19 illustrates the high level lasting time that controls signal to the 6th control signal according to first of Figure 18, the signal timing diagram of the conduction duration of the first light source block LB1 to the, nine light source block LB9.

With reference to Figure 18, the first light source block LB1 to the, nine light source block LB9 can be provided with matrix form, and first row c1 to the three row c3s and the first row r1 that be connected to four switching device SW4 to the six switching device SW6s of this matrix form by being connected to the first switching device SW1 to the, three switching device SW3 defines to the third line r3.

The first switching device SW1 that is connected to the first row c1 provides driving voltage V in response to the first control signal CS1 to the first light source block LB1, the 4th light source block LB4 and the 7th light source block LB7 _LEDThe second switch device SW2 that is connected to secondary series c2 provides driving voltage V in response to the second control signal CS2 to secondary light source piece LB2, the 5th light source block LB5 and the 8th light source block LB8 _LEDThe 3rd switching device SW3 that is connected to the 3rd row c3 provides driving voltage V in response to the 3rd control signal CS3 to the 3rd light source block LB3, the 6th light source block LB6 and the 9th light source block LB9 _LED

The 4th switching device SW4 that is connected to the first row r1 provides reference voltage in response to the 4th control signal CS4 to the first light source block LB1 to the, three light source block LB3.The 5th switching device SW5 that is connected to the second row r2 provides reference voltage in response to the 5th control signal CS5 to the 4th light source block LB4 to the six light source block LB6.The 6th switching device SW6 that is connected to the third line r3 provides reference voltage in response to the 6th control signal CS6 to the 7th light source block LB7 to the nine light source block LB9.

In the exemplary embodiment, when being connected to two switch conductions of each light source block, light source block is operated with output light.The conduction duration of each light source block is determined by the control signal that puts on two switching devices that are connected to this light source block.

Figure 19 is the high level lasting time that illustrates according to each control signal among the first control signal CS1 to the, the six control signal CS6 of Figure 18, the signal timing diagram of the conduction duration of each light source block among the first light source block LB1 to the, the nine light source block LB9.

With reference to Figure 19, in the first light modulation frame DF1, the high level lasting time of the first control signal CS1 is set to from zero moment t0 to the first moment t1, the high level lasting time of the second control signal CS2 is set to from the zero moment t2 of t0 to the second constantly, and the high level lasting time of the 3rd control signal CS3 is set to three moment t3 from zero moment t0 to the.As shown in Figure 19, zero moment t0 is defined as the start time point of each light modulation frame.

The high level lasting time of the 4th control signal CS4 is set to the whole duration of running through the first light modulation frame DF1.On the contrary, the 5th control signal CS5 and the 6th control signal CS6 remain on low level state in the first light modulation frame DF1.

Therefore, in the first light modulation frame DF1, among the first light source block LB1 to the, the nine light source block LB9 only the first light source block LB1 to the, three light source block LB3 can be switched on.Particularly, the first light source block LB1 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the first control signal CS1 and the 4th control signal CS4 (for example, from zero t0 to the first duration of t1 constantly) constantly.In addition, secondary light source piece LB2 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the second control signal CS2 and the 4th control signal CS4 (for example, from zero t0 to the second duration of t2 constantly) constantly.The 3rd light source block LB3 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the 3rd control signal CS3 and the 4th control signal CS4 (for example, from zero t0 to the three duration of t3 constantly) constantly.

As shown in Figure 19, when the second light modulation frame DF2 began, the 6th control signal CS6 remained on low level state, and the 4th control signal CS4 becomes low level state, and the 5th control signal CS5 becomes high level state.The high level state that keeps the 5th control signal CS5 at the whole duration of the second light modulation frame DF2.

In the second light modulation frame DF2, the high level lasting time of the first control signal CS1 is set to four moment t4 from zero moment t0 to the, the high level lasting time of the second control signal CS2 is set to from zero five moment t5 of t0 to the constantly, and the high level lasting time of the 3rd control signal CS3 is set to six moment t6 from zero moment t0 to the.

Therefore, in the second light modulation frame DF2, among the first light source block LB1 to the, the nine light source block LB9 only the 4th light source block LB4 to the six light source block LB6 be switched on.Particularly, the 4th light source block LB4 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the first control signal CS1 and the 5th control signal CS5 (for example, from zero t0 to the four duration of t4 constantly) constantly.In addition, the 5th light source block LB5 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the second control signal CS2 and the 5th control signal CS5 (for example, from zero t0 to the five duration of t5 constantly) constantly.The 6th light source block LB6 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the 3rd control signal CS3 and the 5th control signal CS5 (for example, from zero t0 to the six duration of t6 constantly) constantly.

When the 3rd light modulation frame DF3 began, the 4th control signal CS4 remained on low level state, and the 5th control signal CS5 becomes low level state, and the 6th control signal CS6 becomes high level state.The high level state that keeps the 6th control signal CS6 at the whole duration of the 3rd light modulation frame DF3.

In the 3rd light modulation frame DF3, the high level lasting time of the first control signal CS1 is set to seven moment t7 from zero moment t0 to the, the high level lasting time of the second control signal CS2 is set to from zero eight moment t8 of t0 to the constantly, and the high level lasting time of the 3rd control signal CS3 is set to nine moment t9 from zero moment t0 to the.

Therefore, in the 3rd light modulation frame DF3, among the first light source block LB1 to the, the nine light source block LB9 only the 7th light source block LB7 to the nine light source block LB9 be switched on.Particularly, the 7th light source block LB7 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the first control signal CS1 and the 6th control signal CS6 (for example, from zero t0 to the seven duration of t7 constantly) constantly.In addition, the 8th light source block LB8 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the second control signal CS2 and the 6th control signal CS6 (for example, from zero t0 to the eight duration of t8 constantly) constantly.The 9th light source block LB9 was switched in the overlapping time period of the high level lasting time of the high level lasting time of the 3rd control signal CS3 and the 6th control signal CS6 (for example, zero t0 and the 9th duration between the t9 constantly) constantly.

As mentioned above, if in the light modulation frame, set the high level lasting time of the 4th control signal CS4 to the six control signal CS6 in turn, during the first light modulation frame to the, three light modulation frame DF1, DF2 and DF3, can be that unit drives the first light source block LB1 to the, nine light source block LB9 in turn then with three light source blocks.

When adopting above-mentioned drive scheme in turn, change the time period of the high level lasting time of each the light modulation first control signal CS1 to the image duration three control signal CS3 among the first light modulation frame to the, three light modulation frame DF1, DF2 and the DF3, to control the conduction duration of its corresponding light source block.Thereby, can be effectively and substantially accurately control light quantity from the first light source block LB1 to the, nine light source block LB9 output.

Figure 20 is at the first timing frame to the, three timing frame DF1, the DF2 of Figure 19 and the block diagram in the light modulation zone among the DF3.

With reference to Figure 20, display panels 210 is divided into A1 to the nine light modulations zone, first light modulation zone A9 corresponding to the first light source block LB1 to the, the nine light source block LB9 of light source cell 120.The quantity in the light modulation zone of definition can change according to the quantity of light source block in the display panels 210.In optional illustrative embodiments, when 12 light source blocks were set in light source cell 120, display panels 210 can be divided into 12 light modulation zones.

When the dim signal PWM that puts on light adjusting circuit 112 represents by 8, and when the image that shows in A1 to the nine light modulations zone, first light modulation zone A9 (these light modulation zones of definition in display panels 210) can be converted into the representative luminance value of image, image can be represented with 256 levels (0～255).In the exemplary embodiment, among the A9 of A1 to the nine light modulations zone, first light modulation zone, A1 to the three light modulations zone, first light modulation zone A3 can have representative luminance value 0, the four light modulation zone A4 and can have representative luminance value 64, the five light modulations zone A5 and can have representative luminance value 191.The 6th light modulation zone A6 can have representative luminance value 246, the seven light modulations zone A7 can have representative luminance value 250.The 8th light modulation zone A8 and the 9th light modulation zone A9 can have representative luminance value 254.

In the exemplary embodiment, when showing that the time that image spent is defined as a picture frame on the whole zone at display panels 210, this picture frame can comprise the continuous first light modulation frame to the, three light modulation frames.

When a picture frame comprises the continuous first light modulation frame to the, three light modulation frames, the first light source block LB1 to the, three light source block LB3 operate during the first light modulation frame DF1 to provide light to A1 to the three light modulations zone, first light modulation zone A3, the 4th light source block LB4 to the six light source block LB6 operate during the second light modulation frame DF2 to provide light to A4 to the six light modulations zone, the 4th light modulation zone A6, and the 7th light source block LB7 to the nine light source block LB9 operate during the 3rd light modulation frame DF3 to provide light to A7 to the nine light modulations zone, the 7th light modulation zone A9 then.Therefore, during a picture frame, be that unit drives the first light source block LB1 to the, nine light source block LB9 in turn with three light source blocks.

Figure 21 is the high level lasting time that illustrates according to the first control signal CS1 to the, six control signal CS6, the signal timing diagram of the conduction duration of the first light source block LB1 to the, nine light source block LB9.Control signal to time period of high level lasting time of the 6th control signal except the 4th, the signal timing diagram of Figure 21 is substantially the same with the signal timing diagram of Figure 19.

With reference to Figure 21, in the first light modulation frame DF1, the high level lasting time of the 4th control signal CS4 has the identical time period of long period section in time period with the high level lasting time of the first control signal CS1 to the, three control signal CS3.Therefore, in the first light modulation frame DF1, the high level lasting time of the 4th control signal CS4 is set to from zero moment t0 to the second moment t2.

In the second light modulation frame DF2, the high level lasting time of the 5th control signal CS5 can have the identical time period of long period section in time period with the high level lasting time of the first control signal CS1 to the, three control signal CS3.Therefore, in the second light modulation frame DF2, the high level lasting time of the 5th control signal CS5 is set to six moment t6 from zero moment t0 to the.

In the 3rd light modulation frame DF3, the high level lasting time of the 6th control signal CS6 has the identical time period of long period section in time period with the high level lasting time of the first control signal CS1 to the, three control signal CS3.Therefore, in the 3rd light modulation frame DF3, the high level lasting time of the 6th control signal CS6 is set to seven moment t7 from zero moment t0 to the.

As mentioned above, the whole duration of each the light modulation frame in the first light modulation frame DF1 to the, three light modulation frame DF3 does not keep the time period of the high level lasting time of the 4th control signal CS4 to the six control signal CS6, thereby has significantly reduced the power consumption of back light unit.

The present invention should not be understood that to be limited to the illustrative embodiments of statement herein.On the contrary, provide these illustrative embodiments so that the disclosure is detailed and complete, and pass on design of the present invention fully to those skilled in the art.

Although specifically illustrate and described the present invention with reference to illustrative embodiments of the present invention, but those skilled in the art is to be understood that, under the situation that does not deviate from the spirit or scope of the present invention that claims limit, can carry out various changes in form and details.

Claims

1. display device comprises:

Back light unit, emission light; And

Display panel receives described light with display image,

Wherein, described back light unit comprises:

Driving circuit, outputting drive voltage and reference voltage; And

P light source block, be connected to described driving circuit, p is the natural number more than or equal to 2, wherein, each light source block in the described p light source block receives described driving voltage and receives described reference voltage by its second terminal by its first terminal, and to produce described light, a described p light source block is divided into a plurality of groups, each group comprises at least two light source blocks

Wherein, described driving circuit comprises:

First switch portion applies described driving voltage to the first terminal of a described p light source block; And

Second switch portion, second terminal of at least one light source block in a described p light source block applies described reference voltage.

2. display device according to claim 1, wherein, described first switch portion comprises n switching device of public connection each other, n is the natural number more than or equal to 1, each switching device in the described n switching device is connected to the first terminal of described at least two light source blocks in the group of its correspondence, and

Wherein, described second switch portion comprises m switching device of public connection each other, m is the natural number more than or equal to 1, and each switching device in the described m switching device is connected at least one in second terminal of described at least two light source blocks in each group.

3. display device according to claim 2, wherein, each light source block in the described p light source block in a described n switching device a switching device that is connected to its first terminal and a described m switching device in be connected to switching device conducting of its second terminal the time emission light.

4. display device according to claim 2, wherein, n and m's and less than p.

5. display device according to claim 2, wherein, n and m are the factors of p, and two factors of p all possible and middle obtain minimum and, wherein, the product of described two factors equals p.

6. display device according to claim 2, wherein, described driving circuit provides n first control signal to a described n switching device, and provides m second control signal to a described m switching device.

7. display device according to claim 6, wherein, the high level lasting time of second control signal in the high level lasting time of first control signal in described n first control signal and described m second control signal overlaps each other in time, and the conduction duration that receives the light source block of described first control signal and described second control signal is determined by section overlapping time of the high level lasting time of the high level lasting time of described first control signal and described second control signal.

8. display device according to claim 7, wherein, described n first control signal puts on a described n switching device simultaneously, and described m second control signal puts on a described m switching device in turn in a light modulation frame unit.

9. display device according to claim 2 comprises that further it is provided with the printed circuit board (PCB) of described light source block,

Wherein, described printed circuit board (PCB) comprises:

Q bar connecting line is applied to the described the first terminal of each light source block by described q bar connecting line with described driving voltage, and q is the natural number more than or equal to 1; And

R bar connecting line is applied to described second terminal of at least one light source block in the described light source block by described r bar connecting line with described reference voltage, and r is the natural number more than or equal to 1,

Wherein, q and r's and less than p.

10. display device according to claim 9, wherein, q and r are two factors of p, and two factors of p all possible and middle defined minimum and, wherein, the product of described two factors equals p.

11. display device according to claim 9, wherein, described printed circuit board (PCB) comprises double-sided printed-circuit board, and every connecting line in described q bar connecting line and the described r bar connecting line is set at least one surface of described double-sided printed-circuit board.

12. display device according to claim 9, further comprise connector, described connector is connected to described first switch portion with the described q bar connecting line of described printed circuit board (PCB), and the described r bar connecting line of described printed circuit board (PCB) is connected to described second switch portion.

13. display device according to claim 9 further comprises light guide plate, described light guide plate receives from the light of described back light unit output by its at least one side, and exports described light by its exit facet.

14. display device according to claim 13, further comprise a plurality of light emitting diodes that are arranged on the described top surface of printed circuit board, wherein, the light-emitting area of each light emitting diode in described a plurality of light emitting diode is substantially perpendicular to described top surface of printed circuit board.

15. display device according to claim 13, further comprise a plurality of light emitting diodes that are arranged on the described top surface of printed circuit board, wherein, the light-emitting area of each light emitting diode in described a plurality of light emitting diode is arranged essentially parallel to described top surface of printed circuit board.

16. display device according to claim 1, wherein, described display panel is divided into a plurality of light modulations zone corresponding to a described p light source block, and regulates the brightness of each light source block in the described p light source block based on the representative luminance value in each corresponding light modulation zone of each light source block with in the described p light source block in described a plurality of light modulations zone.

17. display device according to claim 16 further comprises timing controller, described timing controller provides picture signal to described display panel,

Wherein, described timing controller comprises:

The typical value determiner calculates and determines the representative luminance value in each the light modulation zone in described a plurality of light modulations zone based on described picture signal;

The typical value compensator is by compensating the luminance compensation value of calculating each the light modulation zone in described a plurality of light modulations zone to described representative luminance value; And

The pixel correction device is proofreaied and correct the picture signal that each the light modulation zone to described a plurality of light modulations zone is provided based on described luminance compensation value.

18. display device according to claim 17, wherein, described pixel correction device carries out comparison to the target light modulation level of each light source block and the actual light modulation level of this light source block, and do not proofread and correct providing to the described picture signal in each light modulation zone in described actual light modulation level and described target light modulation level not simultaneously, based on the difference between described actual light modulation level and the described target light modulation level.