Embodiment
Carry out the processing of optical transmission frame overhead for the scheme that solves available technology adopting CPU, the problem that efficient is lower, the embodiment of the invention provides a kind of processing unit of optical transmission frame overhead, n*Per bits overhead data to n road optical transmission frame extracts, the overhead data that extracts need transmit continuously, sending to programmable logic device handles, overhead data after the processing need transmit continuously and be inserted in the optical transmission frame of n road again, and wherein transmission is in order to guarantee treatment effeciency more efficiently continuously.Processing unit with the optical transmission frame overhead among Fig. 2 is that example describes below, the processing unit of this optical transmission frame overhead comprises: overhead extraction module 11, expense insert module 12, buffer 13, buffer 14, transmission expense line 15, reception expense line 16, control module 17, receiver module 18, sending module 19 and programmable logic device 20, overhead extraction module 11, be used for the overhead data of optical transmission frame is extracted, programmable logic device 20 is used for the overhead data that extracts is carried out overhead processing; Expense insert module 12 is used for the overhead data after handling is inserted into the optical transmission frame.Further, overhead extraction module 11 also is used for the overhead data of the parallel optical transmission frame in n road is extracted, n is a positive integer, also comprises: buffer 13 is used for the storage overhead data, sending module 19 is used for the overhead data to programmable logic device 20 transmit buffers 13; Receiver module 18 is used to receive the overhead data after the processing; Buffer 14 is used for the overhead data after the stores processor; Expense insert module 12 also is used for the overhead data after handling is inserted into parallel optical transmission frame from buffer 14 taking-ups.Further, buffer 13, the whole overhead datas that also are used for memory parallel optical transmission frame, buffer 14, the whole overhead datas that also are used for the parallel transmission frame after the stores processor, also comprise: control module 17, be used for transmitting control signal to sending module after parallel optical transmission frame insertion is finished, control sending module 19 begins whole overhead datas of extracting in the follow-up parallel optical transmission frame synchronously in programmable logic device 20 transmit buffers 13, and control receiver module 18 begins to receive the whole overhead datas that extract after the processing synchronously from other follow-up parallel optical transmission frame.Further, overhead extraction module 11 also is used for whole overhead datas of the parallel optical transmission frame in n road are successively extracted by the expense type, and overhead data extraction time of same expense type is identical; Buffer 13 also is used for storing successively the whole overhead datas that successively extract by the expense type; Expense insert module 12 also is used for whole overhead datas of the parallel optical transmission frame in n road are successively inserted by the expense type, and it is identical that the overhead data of same expense type inserts the time.Further, buffer 13 also is used for the overhead data of memory parallel optical transmission frame part expense type, and buffer 14 also is used for the overhead data of the parallel optical transmission frame part expense type after the stores processor.Further, sending module, the overhead data that also is used for extracting transmits continuously, sends to programmable logic device; Receiver module, the overhead data that also is used to receive after programmable logic device is handled transmits continuously.
Have the parallel optical transmission frame in n road transmitting in the present embodiment, every road optical transmission frame comprises Per bits overhead data, is two-way expense line and programmable logic device 20 swap datas of w by a unidirectional bit wide.The working clock frequency that adopts is clock.For Per*n bits overhead data, by unidirectional bit wide is the expense line locking output of w, present embodiment proposes a kind of expense line frame structure, the data structure that the overhead data that promptly extracts is stored in buffer, referring to Fig. 3, at n road optical transmission frame, when organizing expense line frame, according to the sequencing that extracts expense, be filled into successively in the expense line frame structure, for example, because expense 1 is extracted out earlier, what deposit buffer memory earlier in is n expense 1, be n expense 2 then, up to n expense u, according to this configuration n road overhead data is organized, export successively and receive.If the same expense sequence of n road expense (comprising n overhead data such as n expense 1 that the expense type is identical) Mx is extracted out simultaneously, then according to filling expense line frame from the 1 the road to the order on n road, promptly Mx-1, Mx-2 ..., Mx-n.
In the present embodiment, after overhead data all is inserted into current optical transmission frame, puts expense and insert that to finish signal RDY effective, begin to trigger the transmission and the reception of overhead data, its transmission sequence transmits from first byte successively according to the frame structure of expense line frame.The overhead data that sends extracts from current optical transmission frame, and the overhead data that receives is to transmit to send through FPGA (Field Programmable Gate Array) before to handle.Reception can be more late than the moment that sends beginning, and it is delayed duration t second (t for more than or equal to 0 real number) and is decided by the actual process of optical transmission frame.Though send and receive time difference phase tolerace t second, the total amount of data of its transmitting-receiving, time spent, speed are identical, are synchronous on the whole so expense sends and receives.
Parameter in the present embodiment is revised a little and can be realized that different rates requires and the transmission of different way optical transmission frame overhead data synchronization, and the total data (Per bits) in the expense line width (w bits) of the overhead data in programmable logic device transmission buffer memory, expense line clock frequency (clock), the optical transmission frame, the transmission rate V of optical transmission frame, the relation between the optical transmission frame frame length (N bits) can be passed through following formulate:
(Per*n)/(w*clock)<(N/V)
By revising expense line width w or expense line clock frequency clock, can make the scheme of present embodiment be applicable to that the overhead data under the different situations transmits according to above-mentioned formula.
Overhead data is extracted and inserted to overhead extraction module 11 and expense insert module 12 from the optical transmission frame, at same optical transmission frame, the insertion of overhead data be after extracting X (X>=1) the individual clock cycle carry out (the insertion overhead data is to extract) from optical transmission frame before.The insertion data that overhead data that buffer 13, buffer 14 extract according to expense line frame structure storage overhead extraction module 11 and expense insert module 12 need, the size of buffer 13, buffer 14 is respectively Per*n bits.Two-way expense line is that receiver module 18, sending module 19 are connected with programmable logic device 20, comprises the transmission expense line 15 of w bit wide and the reception expense line 16 of w bit wide, is the connecting path of overhead data, and its bit wide is 2*w.Programmable logic device 20 is finished the processing of overhead data.Because the characteristic of programmable logic device 20 can be changed processing logic in real time according to the demand of overhead processing.
After expense insert module 12 is finished expense and is inserted, put id signal RDY when effective, control module 17 produces the control signal of receiver modules 18 and sending module 19.Control module also is responsible for restarting counting, and work clock done once resets.
Sending module 19 and receiver module 18 require to extract w bits overhead data by per clock cycle of expense line frame structure from buffer 13 according to control and are sent to transmission expense line 15 and are saved in buffer 14 from receiving expense line 16 sampling wbits overhead datas.During actual enforcement, can adjust the zero hour of sampled data by parameter adjust is set, and the value of adjust is by receiving time-delay t decision.
Handle at the parallel optical transmission frame overhead in n road, after determining parameters such as good unidirectional expense live width w, expense line clock frequency clock according to formula 1, its processing procedure is summarized as follows:
1, overhead extraction module 11 is extracted overhead datas and is stored in the buffer 13, and expense insert module 12 is taken out other from buffer 14 overhead data is inserted in this optical transmission frame, and after a frame overhead inserted and finishes, putting insertion, to finish signal RDY effective.
2, when control module 17 investigate rdy signal effectively after, promptly export control signal CS to programmable logic device 20, sending module 19, receiver module 18, begin the transmission and the processing of overhead data.The speed of transmission data is overhead datas that each clock cycle T (1/clock) sent and received w bits respectively.Particularly be exactly that sending module 19 takes out the overhead data of w bits successively by the order of expense line frame structure from memory 13, deliver to programmable logic device 20 by sending the expense line, until sending a frame overhead line frame.Receiver module 18 begins sampling and receives expense line 16 after sending module 19 begins to send adjust period T, sampling rate afterwards is identical with the speed that sends expense, and its overhead data that samples stores buffer 14 into by expense line frame structure.When being sent completely adjust clock week after date, receiver module 18 is also finished the reception of overhead data.
3, programmable logic device 20 receives overhead data and processing after the control information that receives the transmission beginning, and the overhead data after the processing is temporarily stored in the buffer 21, takes away the pin data simultaneously and send to receiver module 18 from buffer 21.Buffer 21 is programmable logic device 20 internal components, and size can be Per+adjust+y, y>=1.
In the parallel optical transmission frame overhead processing procedure of said n routes, only finish signal RDY Pulse-trigger control module and start working by an insertion, can finish the processing of an optical transmission frame overhead automatically, its control logic is simple and reliable.After a frame overhead is finished dealing with, control module 17 and programmable logic device 20 all return to a fixing state, after next rdy signal is effective, and resume operations, simultaneously the clock clock is carried out primary calibration, make the transmission of optical transmission frame synchronous with clock.By above-mentioned processing, make the processing of current overhead data can not feed through to the overhead data of back, further improved the reliability and the restorability of this device.
Be specifically described by following embodiment, the concrete implementation step of flow process comprises as shown in Figure 4:
Step 101, the n*Per bits overhead data of the parallel optical transmission frame 1 in 11 pairs of n roads of overhead extraction module extracts, and n is a positive integer.
Step 102 stores n*Per bits overhead data in the buffer 13 into.
Step 103, sending module 19 be by reading n*Per bits overhead data in the buffer 13, and send to programmable logic device 20 by sending expense line 15.
Step 104, the n*Per bits overhead data by 20 pairs of extractions of programmable logic device carries out overhead processing.
Step 105, the n*Per bits overhead data that receiver module 18 receives after handling by reception expense line 16, and deposit in the buffer 14.
Step 106, the n*Per bits overhead data after expense insert module 12 will be handled are taken out from buffer 14 and are inserted into parallel optical transmission frame 3.
Step 107, insert finish after, need put and insert that to finish signal RDY effective, control module 17 transmits control signal to sending module 19 and receiver module 18.
The work clock of each module of hypothesis is clock1 in the present embodiment, and for example clock1 is 336M.The transmission sequence of optical transmission frame is optical transmission frame 1, optical transmission frame 2, optical transmission frame 3, optical transmission frame 4 ..., in the optical transmission frame of n road, the optical transmission frame that transmits simultaneously is parallel optical transmission frame.
Wherein in the step 101,11 pairs of overhead datas of overhead extraction module extract, overhead data at 11 pairs of optical transmission frames 1 of same optical transmission frame 1 overhead extraction module extracts, and expense insert module 12 can be with overhead data (the treated overhead data that extracts before in the buffer 14, the optical transmission frame should transmit prior to optical transmission frame 1 under when this overhead data is extracted) be inserted into optical transmission frame 1, insert on the sequential be after extracting X (X>=1) the individual clock cycle carry out.During concrete enforcement, can be by the processing policy of programmable logic device 20, the optical transmission frame of insertion is selected in control, for example, increase buffer 21 in the programmable logic device 20, by increasing the memory space of overhead data in the buffer 21, make the overhead data that from optical transmission frame 1, extracts to be inserted in the optical transmission frame 3 of back transmission, or by from overhead data, extracting characteristic of correspondence information, according to predetermined policy, in needs, reduce overhead data, and then be inserted in the predetermined optical transmission frame 4 by characteristic information.
Wherein in the step 102, overhead data in the buffer 13 can be stored by frame structure as shown in Figure 4, promptly the n*Per bits overhead data in the parallel optical transmission frame in n road is successively extracted by the expense type, overhead data extraction time of same expense type is identical, and will be stored in successively by the n*Perbits overhead data that the expense type is successively extracted in the buffer 13, for example earlier the expense 1 in the parallel optical transmission frame in n road is extracted simultaneously, and then the expense 2 in the parallel optical transmission frame in n road extracted, during storage, earlier n expense 1 deposited in the buffer 13, again n expense 2 deposited in the buffer 13.
Wherein in the step 103, in the present embodiment, because the work clock of sending module 19 is clock1, be 336Mbps promptly at every message transmission rate F that sends on the expense line 15, Per=192, n=80, the number of data bits N=4080*4*8bit that the optical transmission frame comprises, the transmission rate V=5.4Gbps of optical transmission frame, owing to need to satisfy (Per*n)/(w*F)<(N/V), the data wire of the overhead data in the present embodiment in programmable logic device transmit buffer 13 promptly sends the bit wide w=8 of expense line 15, and wherein sending module 19 is transferred to programmable logic device 20 continuously with the overhead data in the buffer 13.
Wherein in the step 105, similarly the overhead data of buffer 14 can be stored by frame structure as shown in Figure 4, the same bit wide w=8 that receives expense line 15, n*Per bits overhead data after programmable logic device is handled need transmit continuously, receiver module 18 receives the n*Per bits overhead data after handling continuously, and deposits in the buffer 14.
Wherein in the step 106,, make that overhead data can't be inserted in the optical transmission frame 1 of overhead extraction, can be inserted in the subsequent optical transmission frame 3 when expense was inserted owing to from the overhead extraction to the expense, insert the processing delay of overall optical transmission frame expense in the present embodiment.And the extraction of the overhead data in optical transmission frame 3 can carried out than inserting Zao several work clock period T.
Wherein in the step 107, RDY is effective according to signal, control module is after the overhead data of parallel optical transmission frame 1 all is inserted into optical transmission frame 3, to sending module 19 CS that transmits control signal, control sending module 19 begins in programmable logic device 20 transmit buffers 13 whole n*Per bits overhead datas of extracting in the parallel optical transmission frame 3 synchronously, simultaneously, control receiver module 18 begins whole n*Per bits overhead datas of extraction from the parallel optical transmission frame 2 that programmable logic device 20 receives after handling synchronously.
Certainly, in the foregoing description, be that the whole n*Per bits overhead datas with the parallel transmission frame store in the buffer 13, whole n*Per bits overhead datas of the parallel transmission frame after handling are stored in the buffer 14.Also can be that the expense 1 in the parallel optical transmission frame is stored in the buffer 13, expense 1 in the parallel optical transmission frame after handling is stored in the buffer 13, expense 1 in programmable logic device 20 transmit buffers 13 is taken out the expense 1 after handling and to be inserted into the optical transmission frame that walks abreast from buffer 13.Expense 2 and expense 3 are also carried out similar operations, perhaps, expense 1 expense 2 in the parallel optical transmission frame is together stored in the buffer 13, expense 1 expense 2 in the parallel optical transmission frame after handling is together stored in the buffer 13, expense 1 and expense 2 in programmable logic device 20 transmit buffers 13 are together taken out the expense 1 after handling and expense 2 and to be inserted into parallel optical transmission frame from buffer 13.
Certainly, in the foregoing description, buffer 13 and buffer 14 have been adopted, this is when all not being transmitted immediately for the overhead data that guarantees to extract, data can not lost, if can guarantee that the overhead data that extracts can all be transmitted immediately, then do not need buffer 13, buffer 14, receiver module 18 and sending module 19, for example once extract the overhead data of 24bits, can change 24 into by the bit wide that will send expense line 15, make the transmission that to finish the overhead data of extraction at a work clock in the cycle, and can not influence the processing of overhead data.The workflow of this moment is that the overhead data of 11 pairs of optical transmission frames 1 of overhead extraction module extracts, and directly is transferred to programmable logic device 20 by sending expense line 15 afterwards, carries out overhead processing by 20 overhead datas to extraction of programmable logic device; The overhead data that expense insert module 12 receives after handling by reception expense line 16, and be inserted into optical transmission frame 1.
In above-mentioned method embodiment, can realize the overhead processing of the optical transmission frame of different ways, different rates by the different values of adjusting parameter w, clock in the formula (Per*n)/(w*clock)<(N/V).Below realizing 80 road 5.4Gbps, a kind of optical transmission frame of 24 overhead bytes of every frame, frame structure as shown in Figure 5, the optical transmission frame sign is 4080*4byte.The example that is treated to of expense illustrates this processing method, and wherein step 3 is in order to improve the well designed that restorability is done.This example adopts work clock 336M,, then according to formula (Per*n)/(w*clock)<(N/V), can obtain sending expense line 15 and receive that expense line 16 is wide to be all 8.20 pairs of overhead datas of the programmable logic device of this embodiment do not process, and send back to behind the initial value buffer memory, can realize by the buffer 21 that a 1920+1+1byte is set.The expense line frame structure that present embodiment is formed is referring to Fig. 6.The concrete implementation step that 80 tunnel parallel optical transmission frame overheads are handled is as follows:
Step 1, when rdy signal is effective, 336M expense line clock is done the calibration of rising edge, make this clock and send data sync.
Step 2, overhead extraction module 11 are extracted 80 the tunnel and are total to 80*24bytes overhead data, store in the buffer 13 by the requirement of expense line frame structure.Expense insert module 12 is taken out the overhead data that receives and is inserted into 80 road ODU frame relevant positions from buffer 14, to finish signal RDY effective when postposition is finished in insertion.
Step 3, control module 17 are detecting RDY when effective, and output continues the useful signal FP of 1 expense line clock cycle, and beginning with the 336M clock simultaneously is unit count, and it is effective to put transmitting-receiving commencing signal work (control signal).Count value is input to expense with control signal and sends and the expense receiver module.
Step 4, sending module 19 are when control signal work is effective, and the every increase by 1 of counter counter value from buffer 13, is got the 8bits data successively by expense line frame structure and sent to programmable logic device 20.
Step 5, programmable logic device 20 begin every 336M clock sampling and once send the expense line detecting FP when effective, and sampled data is stored into buffer 14.Getting the 8bits data by same frequency from buffer 21 simultaneously sends on the reception expense line.The order of read-write cache device 21 all is the first byte from buffer 21, write-after-read, but for read-write motion, first address differs 1+1.
Step 6, receiver module 18 are when control signal work is effective, adjust signal adjust value when identical in the low level numerical value of count value counter and sampling, begin receiving the sampling of expense line, every afterwards 336M clock cycle once sampling, the gained data are the overhead data of handling, and these data are inserted and taken by the temporary time expense of getting ready in the buffer 14 of expense frame structure.Adjust is the 2bits bit wide.
Step 7, control module 17counter value are write 1920*4 all over, and the work Signal Fail is finished the transmission and the processing of this overhead data.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.