CN102237370A - TFT (thin-film transistor) substrate and forming method therefore as well as display device - Google Patents

TFT (thin-film transistor) substrate and forming method therefore as well as display device Download PDF

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CN102237370A
CN102237370A CN2011100971505A CN201110097150A CN102237370A CN 102237370 A CN102237370 A CN 102237370A CN 2011100971505 A CN2011100971505 A CN 2011100971505A CN 201110097150 A CN201110097150 A CN 201110097150A CN 102237370 A CN102237370 A CN 102237370A
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pole plate
layer
grid
doped silicon
tft
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毛剑宏
唐德明
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Lexvu Opto Microelectronics Technology Shanghai Co Ltd
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Lexvu Opto Microelectronics Technology Shanghai Co Ltd
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Abstract

The invention provides a TFT (thin film transistor) substrate and a forming method thereof and a display device. The TFT substrate comprises a base and a TFT switch which is arranged on the base. The TFT switch comprises a grid electrode, a source region, a drain region, a conducting channel, a grid dielectric layer, a source electrode, a drain electrode and a capacitor, wherein the conducting channel is used to electrically conduct the source region and the drain region; the grid dielectric layer is arranged between the grid electrode and the conducting channel; the source electrode is electrically connected with the source region; the drain electrode is electrically connected with the drain region; the capacitor comprises a first pole plate, a second pole plate and a capacitance dielectric layer which is arranged between the first pole plate and the second pole plate; the first pole plate and the grid electrode are arranged on the same layer, and are made of a same conducting material of which the light transmittance is less than 50%; the second pole plate, the source electrode and the drain electrode are arranged on the same layer, the second pole plate, and are made of a same conducting material of which the light transmittance is less than 50%; and the second pole plate is electrically connected with the source electrode or the drain electrode. According to the invention, the compatibility between the TFT switch and the display device with an MEMS (micro-electro mechanical system) light valve and the performances of the TFT switch are improved.

Description

TFT substrate and forming method thereof, display unit
Technical field
The present invention relates to field of display devices, particularly TFT switch and forming method thereof, display unit and forming method thereof.
Background technology
In recent years, along with developing rapidly of information communication field, increasing to the demand of various types of display devices.The display unit of main flow mainly contains at present: cathode-ray tube display (CRT), LCD (LCD), plasma scope (PDP), electroluminescent display (ELD) and vacuum fluorescent display (VFD) etc.Because liquid crystal indicator has: advantage such as light, thin, that occupation of land is little, power consumption is little, radiation is little is widely used in the various data processing equipments, for example TV, notebook computer, mobile phone, personal digital assistant etc.
In the liquid crystal indicator, the backlight that uses is white light, and have only polarised light just can pass through liquid crystal layer, this will lose 50% light, make the utilance of light only have 50%, when light by color filter on, the efficient of light has only 33% at most, so the utilance of light is lower in the liquid crystal indicator.In addition, liquid crystal indicator also has otherwise defective: for example angular field of view is little, and complex structure, cost are high.
The TFT switch uses the most general in liquid crystal indicator.In the prior art, the formation method of TFT switch is: the first step forms the grid thin layer in substrate; Behind mask, exposure, development, dry etching grid thin layer, form grid and scan line (not shown) then; In second step, form dielectric layer, low-doped silicon layer, highly doped silicon layer; And then the low-doped silicon layer of dry etching, highly doped silicon layer forms conducting channel, source region, drain region, and the dielectric layer between conducting channel and the grid is a gate dielectric layer; In the 3rd step, form transparency electrode (ITO film) up and down, as electric capacity; The 4th step formed conductive membrane layer, formed source electrode, drain electrode and the data wire of TFT switch with mask exposure, etch process etching conductive thin layer; The 5th step formed passivation layer with the PECVD method, carried out the etching forming of passivation layer again with mask exposure and dry etching, and this passivation layer is used for the TFT switch is protected as diaphragm.
Yet, above-described TFT switch formation method complexity.
Many patent documentations about the TFT substrate are arranged in the prior art, and for example application number is disclosed " manufacture method of TFT substrate and TFT substrate " in the Chinese patent application of " 200680052263.0 ", yet does not all solve above-described technical problem.
Summary of the invention
The problem that the present invention solves is the method complexity of the formation TFT switch of prior art.
For addressing the above problem, the invention provides a kind of TFT substrate, comprise substrate, be positioned at suprabasil TFT switch; Described TFT switch comprises:
Grid, source region, drain region, be used to conduct the conducting channel in source region and drain region, gate dielectric layer between described grid and conducting channel, the source electrode that is electrically connected with described source region, with the drain electrode that described drain region is electrically connected, electric capacity, described electric capacity comprises first pole plate, second pole plate and the capacitor dielectric layer between first pole plate and second pole plate;
Described first pole plate and described grid are positioned at same one deck, and described first pole plate is identical with the material of described grid, for light transmittance less than 50% electric conducting material;
Described second pole plate and described source electrode and drain electrode are positioned at same one deck, and described second pole plate is identical with the material of described source electrode and drain electrode, for light transmittance less than 50% electric conducting material, described second pole plate is electrically connected with source electrode or drain electrode.
Optionally, the material of described first pole plate, second pole plate, grid, source electrode and drain electrode is selected from metal.
Optionally, the material of described first pole plate, second pole plate, grid, source electrode and drain electrode is selected from the combination in any of gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt one of them or they.
Optionally, the material of described first pole plate, second pole plate, grid, source electrode and drain electrode is selected from the combination arbitrarily of gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt, amorphous silicon, polysilicon, amorphous germanium silicon, poly-SiGe one of them or they.
Optionally, described TFT switch also comprises passivation layer, and described passivation layer covers the surface of described TFT switch.
Optionally, the material of described passivation layer is selected from silica, silicon nitride, carborundum or silicon oxynitride or their combination in any.
Optionally, described conducting channel is low-doped silicon layer, is highly doped silicon layer between described low-doped silicon layer and the gate dielectric layer, and described highly doped silicon layer has opening, and the opening both sides are respectively source region and drain region, and described opening exposes described low-doped silicon layer.
The present invention also provides a kind of display unit, comprises above-described TFT substrate.
Optionally, also comprise fixed grating and MEMS light valve; Described fixed grating is between described substrate and described TFT switch; Described MEMS light valve is positioned on the described TFT switch.
The present invention also provides a kind of method of the TFT of formation substrate, comprising:
Substrate is provided, forms first conductive layer, cover described substrate, the material of described first conductive layer is a light transmittance less than 50% electric conducting material;
Graphical described first conductive layer forms grid, first pole plate;
Form dielectric layer, cover described grid, first pole plate;
Form low-doped silicon layer, highly doped silicon layer on the dielectric layer on institute's grid successively, described highly doped silicon layer has opening, and the opening both sides are source region and drain region, and described opening exposes described low-doped silicon layer, and described low-doped silicon layer is a conducting channel;
Form second conductive layer, cover described dielectric layer and low-doped silicon layer, highly doped silicon layer, the material of described second conductive layer is a light transmittance less than 50% electric conducting material;
Graphical described second conductive layer, form the source electrode, the drain electrode that is electrically connected with the drain region and second pole plate that are electrically connected with the source region, dielectric layer on described second pole plate, first pole plate and first pole plate is formed electric capacity, and described second pole plate is electrically connected with source electrode or drain electrode.
Optionally, the material of described first conductive layer, second conductive layer is selected from metal.
Compared with prior art, the present invention has the following advantages:
The TFT substrate of the technical program, first pole plate of its electric capacity, second pole plate and the capacitor dielectric layer between first pole plate and second pole plate have been formed electric capacity, because first pole plate and grid are positioned at same one deck, first pole plate is identical with the material of grid, for light transmittance less than 50% electric conducting material; Second pole plate and source electrode and drain electrode are positioned at same one deck, and second pole plate is identical with the material of source electrode and drain electrode, for light transmittance less than 50% electric conducting material.In the time of in being applied to have the display unit of MEMS light valve, because MEMS light valve display unit does not need big aperture opening ratio, therefore the TFT switch can be formed on and not be used in the display unit carrying out on the position of printing opacity, and first pole plate, second pole plate, grid, source electrode and the light transmittance that leaks electricity very less than 50% electric conducting material, be preferably metal, TFT switch and MEMS light valve is compatible better like this, can improve the performance of display unit.
The formation method of the TFT substrate of the technical program, the grid and first pole plate form in same etching technics, source electrode, drain electrode and second pole plate form in same technology, gate dielectric layer and capacitor dielectric layer form in same technology, therefore the formation method of TFT substrate is simple, and good with the processing compatibility of the display unit that forms the MEMS light valve.
Description of drawings
Fig. 1 is the flow chart of method of the formation TFT substrate of the specific embodiment of the invention;
Fig. 2 a, Fig. 3 a, Fig. 4 a are for forming the floor map of TFT substrate;
Fig. 2 b, Fig. 3 b, Fig. 4 b are that Fig. 2 a, Fig. 3 a, Fig. 4 a are accordingly along the cross-sectional view of c-c ';
Fig. 5 is the cross-sectional view of bottom gate TFT substrate;
Fig. 6 is the cross-sectional view of top grid TFT switch;
Fig. 7 is the electrical block diagram of the display unit of the embodiment of the invention.
Embodiment
For those skilled in the art be can better understand the present invention, describe the TFT substrate of the specific embodiment of the invention in detail below in conjunction with specific embodiment.
Fig. 1 is the flow chart of method of the formation TFT substrate of the specific embodiment of the invention, and with reference to figure 1, the method for the formation TFT substrate of the specific embodiment of the invention comprises:
Step S10 provides substrate, forms first conductive layer, covers described substrate, and the material of described first conductive layer is a light transmittance less than 50% electric conducting material;
Step S20, graphical described first conductive layer forms grid, first pole plate;
Step S30 forms dielectric layer, covers described grid, first pole plate;
Step S40, form low-doped silicon layer, highly doped silicon layer on the dielectric layer on the described grid successively, described highly doped silicon layer has opening, and the highly doped silicon layer of opening both sides is respectively source region and drain region, described opening exposes described low-doped silicon layer, and described low-doped silicon layer is a conducting channel;
Step S50 forms second conductive layer, covers described dielectric layer and low-doped silicon layer, highly doped silicon layer, and the material of described second conductive layer is a light transmittance less than 50% electric conducting material;
Step S60, graphical described second conductive layer, form the source electrode, the drain electrode that is electrically connected with the drain region and second pole plate that are electrically connected with the source region, the dielectric layer on described second pole plate, first pole plate and first pole plate is formed electric capacity, and described second pole plate is electrically connected with drain electrode or source electrode.
Fig. 2 a, Fig. 3 a, Fig. 4 a are the planar structure schematic diagram that forms the method for TFT substrate, Fig. 2 b, Fig. 3 b, Fig. 4 b are that Fig. 2 a, Fig. 3 a, Fig. 4 a are accordingly along the cross-sectional view of c-c ', Fig. 5 for the bottom gate TFT substrate that forms along Fig. 2 a, Fig. 3 a, Fig. 4 a accordingly along the cross-sectional view of c-c ' direction, in conjunction with the method that describes the formation TFT substrate of the specific embodiment of the invention with reference to figure 1, Fig. 2 a, Fig. 3 a, Fig. 4 a, Fig. 2 b, Fig. 3 b, Fig. 4 b, Fig. 5 in detail.
In conjunction with reference to figure 1 and Fig. 2 a, Fig. 2 b, Fig. 2 b be among Fig. 2 a along the cross-sectional view of c-c ' direction, execution in step S10, substrate 40 is provided, form first conductive layer, cover described substrate 40, the material of described first conductive layer is a light transmittance less than 50% electric conducting material; Step S20, graphical described first conductive layer forms grid 41, first pole plate 45.
In the specific embodiment of the invention, substrate 40 is a substrate of glass, in the described substrate 40 backlight is arranged, and backlight comprises blue light source, red-light source and green-light source, described blue light source, red-light source and green-light source can be provided by blue-ray LED, red-light LED and green light LED respectively, also can provide, and redgreenblue laser is provided by laser.
In specific embodiments of the invention, be formed with the fixed grating (not shown) in the substrate 40.Described grid 41, first pole plate 45 are formed on the described fixed grating.Described fixed grating has reflectivity greater than 60% towards the one side of backlight.
In the specific embodiment of the invention, at graphical described first conductive layer, form in the technology of the grid and first pole plate, also form scan line 48, described scan line 48 is electrically connected with described grid 41.Among the present invention, utilize the method for sputter to form first conductive layer, first conductive layer is a light transmittance less than 50% electric conducting material, preferable alloy, and this metal is selected from gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt one of them or theys' combination in any.The material of first conductive layer also can be selected from gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt, amorphous silicon, polysilicon, amorphous germanium silicon, poly-SiGe one of them or theys' combination arbitrarily.In the specific embodiment of the invention, first conductive layer is preferably the laminated construction of titanium layer, aluminium lamination and titanium layer (Ti/Al/Ti), also can be the laminated construction of aluminium lamination, molybdenum layer (Al/Mo), chromium (Cr) layer, molybdenum (Mo) layer, tantalum layer.Utilize photoetching, graphical described first conductive layer of etching technics (promptly through mask, exposure, development, dry etching) to form grid 41, first pole plate 45 and scan line 48 then, wherein scan line 48 is electrically connected with grid 41.
In conjunction with reference to figure 1 and Fig. 3 a, Fig. 3 b, Fig. 3 b is along the cross-sectional view of c-c ' direction among Fig. 3 a, execution in step S30, form dielectric layer 441, cover described grid 41, first pole plate 45, step S40 forms low-doped silicon layer 442, highly doped silicon layer 443 successively on the dielectric layer 441 on the described grid 41; Described highly doped silicon layer 443 has opening (among the figure not label), and the highly doped silicon layer of opening both sides is respectively source region and drain region, and described opening exposes described low-doped silicon layer 442, and described low-doped silicon layer 442 is a conducting channel.Dielectric layer 441 on the described grid 41 is as gate dielectric layer, is positioned at dielectric layer 441 on described first pole plate 45 as the capacitor dielectric layer.
Among the present invention, the material of dielectric layer 441 can be silica (SiO 2), silicon nitride (SiN), silicon oxynitride (SiON) or silicon oxide carbide (SiOC) etc., also can be their combination in any.Utilize PECVD method (enhancing plasma activated chemical vapour deposition) to carry out continuous film forming, form dielectric layer 441, low-doped silicon 442, highly doped silicon layer 443, just at first utilize the PECVD method to form dielectric layer 441, cover first pole plate 45, grid 41 and scan line 48, then on dielectric layer 441, form low-doped silicon layer 442, on low-doped silicon layer 442, form highly doped silicon layer 443 afterwards.Then, utilize the graphical low-doped silicon layer 442 of photoetching (mask, exposure) and dry etching, highly doped silicon layer 443, keep low-doped silicon layer 442, highly doped silicon layer 443 on the dielectric layer 441 that is positioned on the described grid 41; Afterwards, graphical described highly doped silicon layer 443 forms opening (among the figure not label), and the highly doped silicon layer 443 of opening both sides is respectively source region, drain region, and described opening exposes described low-doped silicon layer 442, and this low-doped silicon layer 442 is as conducting channel.
In conjunction with reference to figure 1 and Fig. 4 a, Fig. 4 b, Fig. 4 b is along the cross-sectional view of c-c ' direction among Fig. 4 a, execution in step S50, form second conductive layer, cover described dielectric layer 441 and low-doped silicon layer 442, highly doped silicon layer 443, the material of described second conductive layer is a light transmittance less than 50% electric conducting material; Step S60, graphical described second conductive layer, form the source electrode, the drain electrode that is electrically connected with the drain region and second pole plate 46 that are electrically connected with the source region, dielectric layer on described second pole plate 46, first pole plate 45 and first pole plate 45 is formed electric capacity, and described second pole plate 46 is electrically connected with source electrode or drain electrode.In the specific embodiment of the invention, second pole plate 46 is electrically connected with source electrode 42, and data wire 49 is electrically connected with drain electrode, in other embodiments, second pole plate 46 also can be electrically connected with drain electrode 43, and data wire 49 is electrically connected with the source electrode, determines according to the type in source region and drain region.
Among the present invention, the material of second conductive layer is selected from metal, and this metal can be gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt one of them or theys' combination in any.The material of second conductive layer also can be selected from gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt, amorphous silicon, polysilicon, amorphous germanium silicon, poly-SiGe one of them or theys' combination arbitrarily.Utilize for example sputter of physical vapour deposition (PVD), deposit second conductive layer, use photoetching (mask, exposure), etch process etching second conductive layer to form source electrode 42, drain electrode 43, second pole plate 46 of TFT switch then.In the specific embodiment of the invention, at graphical described second conductive layer, when forming source electrode 42 and drain electrode 43, also form data wire 49, described data wire 49 is electrically connected with described source electrode 42, and is different according to the type in source region and drain region, and data wire 49 also can be electrically connected with drain electrode 43.In the specific embodiment of the invention, second conductive layer is preferably the laminated construction of titanium layer, aluminium lamination and titanium layer (Ti/Al/Ti), also can be the laminated construction of aluminium lamination, molybdenum layer (Al/Mo), chromium (Cr) layer, molybdenum (Mo) layer, tantalum layer.
With reference to figure 5, the present invention has among the embodiment, after forming the TFT switch, also forms passivation layer 47, and passivation layer 47 covers described TFT switch.Form passivation layer 47 with the PECVD method, the material of passivation layer 47 is selected from silica, silicon nitride, carborundum or silicon oxynitride or their combination in any.Carry out the etching forming of passivation layer afterwards again with mask exposure and dry etching, this passivation layer is used for the TFT switch is protected as diaphragm.
Electric capacity in the TFT switch on the TFT substrate of the present invention, its first pole plate forms with grid, second pole plate forms with source electrode, drain electrode, the capacitor dielectric layer forms in forming the process of gate dielectric layer, belongs to same one deck with dielectric layer in the gate dielectric layer, like this in the process that forms grid, source electrode, drain electrode and gate dielectric layer, just can form electric capacity together, thereby can simplify technology, enhance productivity, save cost.
Fig. 5 is the cross-sectional view of bottom gate TFT substrate, and with reference to figure 5, the TFT substrate among the present invention comprises substrate 40, is positioned at suprabasil TFT switch; Described TFT switch comprises: grid 41, source region, drain region, be used to conduct the conducting channel in source region and drain region, gate dielectric layer 441 between described conducting channel and grid 41, the source electrode 42 that is electrically connected with the source region, the drain electrode 43 that is electrically connected with the drain region, electric capacity; Described electric capacity comprises first pole plate 45, second pole plate 46 and the capacitor dielectric layer between first pole plate and second pole plate (among the figure not label); Described first pole plate 45 is positioned at same one deck with described grid 41, and described first pole plate is identical with the material of described grid, for light transmittance less than 50% electric conducting material; Described second pole plate 46 is positioned at same one deck with described source electrode 42 and drain electrode 43, and described second pole plate is identical with the material of described source electrode and drain electrode, for light transmittance less than 50% electric conducting material, described second pole plate is electrically connected with source electrode or drain electrode.
In the specific embodiment of the invention, described conducting channel is low-doped silicon layer 442, it between described low-doped silicon layer 442 and the gate dielectric layer highly doped silicon layer 443, described highly doped silicon layer 443 has opening (among the figure not label), the highly doped silicon layer 443 of opening both sides is respectively source region and drain region, and described opening exposes described low-doped silicon layer 442.In the specific embodiment of the invention, capacitor dielectric layer and gate dielectric layer are at same one deck, and material is identical, in manufacture craft, on the grid 41 and first pole plate 45, form dielectric layer, be positioned at dielectric layer on the grid 41, be positioned at dielectric layer on first pole plate 45 as the capacitor dielectric layer as gate dielectric layer.
The TFT substrate of the technical program, first pole plate of its electric capacity, second pole plate and the capacitor dielectric layer between first pole plate and second pole plate have been formed electric capacity, because first pole plate and grid are positioned at same one deck, first pole plate is identical with the material of grid, for light transmittance less than 50% electric conducting material; Second pole plate and source electrode and drain electrode are positioned at same one deck, and second pole plate is identical with the material of source electrode and drain electrode, for light transmittance less than 50% electric conducting material.In the time of in being applied to have the display unit of MEMS light valve, because MEMS light valve display unit does not need big aperture opening ratio, therefore the TFT switch can be formed on and not be used in the display unit carrying out on the position of printing opacity, compare as the TFT switch of electric capacity with formation ito transparent electrode in the prior art, the compatibility of TFT switch of the present invention and MEMS light valve is better, can improve the performance of display unit.
In the specific embodiment of the invention, the TFT substrate also comprises scan line 48 and data wire 49, and described grid 41 is electrically connected with described scan line 48, and described source electrode 42 is electrically connected with described data wire 49.Among the present invention, the TFT substrate also comprises the fixed grating (not shown), and described fixed grating is between described substrate 40 and described TFT switch.
In the specific embodiment of the invention, the material of described first pole plate 45, second pole plate 46, grid 41, source electrode 42, drain electrode 43 is a metal, and this metal is selected from gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt one of them or theys' combination in any.Also can be selected from gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt, amorphous silicon, polysilicon, amorphous germanium silicon, poly-SiGe one of them or theys' combination arbitrarily.In this specific embodiment, first pole plate 45, second pole plate 46 are preferably, and the laminated construction of titanium layer, aluminium lamination and titanium layer (Ti/Al/Ti) also can be the laminated construction of aluminium lamination, molybdenum layer (Al/Mo), chromium (Cr) layer, molybdenum (Mo) layer, tantalum layer.Source electrode 42, drain electrode 43 preferred aluminium.The material of described capacitor dielectric layer and gate dielectric layer is selected from silica, silicon nitride, carborundum or silicon oxynitride or their combination in any.
In the specific embodiment of the invention, described TFT substrate also comprises passivation layer 47, and described passivation layer 47 covers the surface of described TFT switch.The material of described passivation layer is selected from silica, silicon nitride, carborundum or silicon oxynitride or their combination in any.
Above-described TFT switch is a bottom gate TFT switch, and promptly grid 41 is between substrate and source electrode, drain electrode.In other embodiments, the TFT switch also can be top grid TFT switch, and Fig. 6 is the cross-sectional view of top grid TFT switch, and its position of dissecing is identical with slice location among Fig. 5.With reference to figure 6, in this specific embodiment, grid 51 is positioned at the top of TFT switch, that is to say that grid 51 is positioned on the gate dielectric layer 541, gate dielectric layer 541 is positioned on the conducting channel 542, also comprises: source region 544 and drain region 543, conducting channel 542 are used to conduct source region 544 and drain region 543, source electrode 52 is electrically connected with source region 544, and drain electrode 53 is electrically connected with drain region 543.Also comprise electric capacity, this electric capacity comprises: first pole plate 55, second pole plate 56 and the capacitor dielectric layer between first pole plate 56 and second pole plate 55 (among the figure not label), wherein second pole plate 55 is positioned at same one deck with drain electrode 53, source electrode 52, its material is light transmittance less than 50% electric conducting material, first pole plate, 56 grids 51 are positioned at same one deck, its material is light transmittance less than 50% electric conducting material, and capacitor dielectric layer and gate dielectric layer 541 are positioned at same one deck, and its material is identical.Also be formed with passivation layer on the TFT switch, all the TFT switch with bottom gate is identical for the material of first pole plate 56, second pole plate 55, grid 51, drain electrode 53, source electrode 52, gate dielectric layer, capacitor dielectric layer.Second pole plate 55 is electrically connected with source electrode or drain electrode.In the specific embodiment of the invention, second pole plate 55 is electrically connected with drain electrode 53, and in other embodiments, second pole plate 55 also can be electrically connected with source electrode 52, determines according to the type in source region and drain region.
Based on above-described TFT substrate, the present invention also provides display unit.
Fig. 7 is the electrical block diagram of the display unit of the embodiment of the invention, with reference to figure 7, display unit of the present invention comprises: substrate, be positioned at suprabasil multi-strip scanning line G1, G2 ... Gm, be positioned at suprabasil many data wire D1, D2 ... Dn is arranged in capacitor C and MEMS light valve 30 that suprabasil a plurality of TFT switches (thin film transistor switch), TFT switch comprise; The multi-strip scanning line is parallel to each other, and many data wires are parallel to each other, and data wire is vertical mutually with scan line; Data wire is electrically connected with the source electrode of TFT switch, scan line is electrically connected with the grid of TFT switch, the unlatching by scan line control TFT switch, closes, and imposes on the voltage of TFT switch by data wire control, the TFT switch is electrically connected with the MEMS light valve, and control imposes on the voltage of MEMS light valve; The TFT switch also is electrically connected with capacitor C, and capacitor C is electrically connected with the MEMS light valve.Also comprise the fixed grating (not showing among Fig. 6) that cooperates with MEMS light valve 30 in the display unit of the present invention.
Wherein, substrate, be arranged in capacitor C that suprabasil scan line, data wire and TFT switch, TFT switch comprise and be substrate, scan line, data wire and the TFT switch that above-described TFT substrate comprises, the electric electric capacity that the TFT switch comprises.That is to say that display unit of the present invention comprises: above-described TFT substrate.
Among the present invention, display unit also comprises fixed grating (not shown) and MEMS light valve 30; Described fixed grating is between described substrate and described TFT switch (combining with reference to figure 6 and Fig. 5); Described MEMS light valve 30 is positioned on the described TFT switch.Corresponding TFT switch is electrically connected with the MEMS light valve, imposes on the voltage of MEMS light valve by data wire control, thereby can make the MEMS light valve mobile under the effect of electrostatic force, to control the light transmittance of the light transmission fixed grating that backlight sends.And the electric capacity in the TFT switch also is electrically connected with the MEMS light valve, continues to power to the MEMS light valve when the TFT switch with the MEMS light valve is in off-state.Do not need big aperture opening ratio owing to have the display unit of MEMS light valve, therefore can utilize TFT switch of the present invention, it is formed on lighttight position.
In other embodiments of the invention, also can be for described MEMS light valve is positioned on the described TFT switch, described fixed grating is positioned on the described MEMS light valve switch.That is to say, with the upper-lower position exchange of MEMS light valve and fixed grating.Among the present invention, have backlight in the described substrate, described fixed grating has reflectivity greater than 60% towards the one side of backlight.
Need to prove all TFT switches that do not have signal to be electrically connected in the diagram for each MEMS light valve.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made possible change and modification; therefore; every content that does not break away from technical solution of the present invention; to any simple modification, equivalent variations and modification that above embodiment did, all belong to the protection range of technical solution of the present invention according to technical spirit of the present invention.

Claims (11)

1. a TFT substrate comprises substrate, is positioned at suprabasil TFT switch; Described TFT switch comprises:
Grid, source region, drain region, be used to conduct the conducting channel in source region and drain region, gate dielectric layer between described grid and conducting channel, the source electrode that is electrically connected with described source region, with the drain electrode that described drain region is electrically connected, electric capacity, described electric capacity comprises first pole plate, second pole plate and the capacitor dielectric layer between first pole plate and second pole plate; It is characterized in that,
Described first pole plate and described grid are positioned at same one deck, and described first pole plate is identical with the material of described grid, for light transmittance less than 50% electric conducting material;
Described second pole plate and described source electrode and drain electrode are positioned at same one deck, and described second pole plate is identical with the material of described source electrode and drain electrode, for light transmittance less than 50% electric conducting material, described second pole plate is electrically connected with source electrode or drain electrode.
2. TFT substrate as claimed in claim 1 is characterized in that, the material of described first pole plate, second pole plate, grid, source electrode and drain electrode is selected from metal.
3. TFT substrate as claimed in claim 2 is characterized in that, the material of described first pole plate, second pole plate, grid, source electrode and drain electrode is selected from the combination in any of gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt one of them or they.
4. TFT substrate as claimed in claim 1, it is characterized in that the material of described first pole plate, second pole plate, grid, source electrode and drain electrode is selected from the combination arbitrarily of gold, silver, copper, aluminium, titanium, chromium, molybdenum, cadmium, nickel, cobalt, amorphous silicon, polysilicon, amorphous germanium silicon, poly-SiGe one of them or they.
5. TFT substrate as claimed in claim 1 is characterized in that, described TFT switch also comprises passivation layer, and described passivation layer covers the surface of described TFT switch.
6. TFT substrate as claimed in claim 5 is characterized in that, the material of described passivation layer is selected from silica, silicon nitride, carborundum or silicon oxynitride or their combination in any.
7. as each described TFT substrate of claim 1~6, it is characterized in that, described conducting channel is low-doped silicon layer, be highly doped silicon layer between described low-doped silicon layer and the gate dielectric layer, described highly doped silicon layer has opening, the opening both sides are respectively source region and drain region, and described opening exposes described low-doped silicon layer.
8. a display unit is characterized in that, comprises each described TFT substrate of claim 1~7.
9. display unit as claimed in claim 8 also comprises fixed grating and MEMS light valve; Described fixed grating is between described substrate and described TFT switch; Described MEMS light valve is positioned on the described TFT switch.
10. a method that forms the TFT substrate is characterized in that, comprising:
Substrate is provided, forms first conductive layer, cover described substrate, the material of described first conductive layer is a light transmittance less than 50% electric conducting material;
Graphical described first conductive layer forms grid, first pole plate;
Form dielectric layer, cover described grid, first pole plate;
On the dielectric layer on institute's grid, form low-doped silicon layer, highly doped silicon layer successively, described highly doped silicon layer has opening, the highly doped silicon layer of opening both sides is respectively source region and drain region, and described opening exposes described low-doped silicon layer, and described low-doped silicon layer is a conducting channel;
Form second conductive layer, cover described dielectric layer and low-doped silicon layer, highly doped silicon layer, the material of described second conductive layer is a light transmittance less than 50% electric conducting material;
Graphical described second conductive layer, form the source electrode, the drain electrode that is electrically connected with the drain region and second pole plate that are electrically connected with the source region, dielectric layer on described second pole plate, first pole plate and first pole plate is formed electric capacity, and described second pole plate is electrically connected with source electrode or drain electrode.
11. the method for formation TFT substrate as claimed in claim 10 is characterized in that the material of described first conductive layer, second conductive layer is selected from metal.
CN2011100971505A 2011-04-18 2011-04-18 TFT (thin-film transistor) substrate and forming method therefore as well as display device Pending CN102237370A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107210534A (en) * 2015-10-09 2017-09-26 夏普株式会社 The manufacture method of TFT substrate, the scanning antenna using the TFT substrate and TFT substrate
CN109727901A (en) * 2019-01-02 2019-05-07 京东方科技集团股份有限公司 Transfer substrate and preparation method thereof, micro- light emitting diode transfer method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030071931A1 (en) * 2001-10-15 2003-04-17 Hitachi, Ltd. Liquid crystal display device, display device and manufacturing method thereof
CN1763617A (en) * 2004-10-21 2006-04-26 三星电子株式会社 Metal wire and manufacture method, substrate and manufacture method and display device
CN101013705A (en) * 2006-02-03 2007-08-08 三星电子株式会社 Thin film transistor substrate and method of manufacturing the same and mask for manufacturing thin film transistor substrate
CN101330087A (en) * 2004-07-07 2008-12-24 三星电子株式会社 Array substrate, manufacturing method thereof and display device having the same
CN101425543A (en) * 2007-10-31 2009-05-06 三星电子株式会社 Thin-film transistor substrate and method of manufacturing the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030071931A1 (en) * 2001-10-15 2003-04-17 Hitachi, Ltd. Liquid crystal display device, display device and manufacturing method thereof
CN101330087A (en) * 2004-07-07 2008-12-24 三星电子株式会社 Array substrate, manufacturing method thereof and display device having the same
CN1763617A (en) * 2004-10-21 2006-04-26 三星电子株式会社 Metal wire and manufacture method, substrate and manufacture method and display device
CN101013705A (en) * 2006-02-03 2007-08-08 三星电子株式会社 Thin film transistor substrate and method of manufacturing the same and mask for manufacturing thin film transistor substrate
CN101425543A (en) * 2007-10-31 2009-05-06 三星电子株式会社 Thin-film transistor substrate and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107210534A (en) * 2015-10-09 2017-09-26 夏普株式会社 The manufacture method of TFT substrate, the scanning antenna using the TFT substrate and TFT substrate
CN107210534B (en) * 2015-10-09 2018-10-09 夏普株式会社 TFT substrate uses the scanning antenna of the TFT substrate and the manufacturing method of TFT substrate
CN109727901A (en) * 2019-01-02 2019-05-07 京东方科技集团股份有限公司 Transfer substrate and preparation method thereof, micro- light emitting diode transfer method
CN109727901B (en) * 2019-01-02 2021-08-24 京东方科技集团股份有限公司 Transfer printing substrate, manufacturing method thereof and micro light-emitting diode transfer printing method

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Application publication date: 20111109