CN102236221A - Display substrate and manufacturing method thereof and thin film transistor driving method - Google Patents
Display substrate and manufacturing method thereof and thin film transistor driving method Download PDFInfo
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- CN102236221A CN102236221A CN 201010143960 CN201010143960A CN102236221A CN 102236221 A CN102236221 A CN 102236221A CN 201010143960 CN201010143960 CN 201010143960 CN 201010143960 A CN201010143960 A CN 201010143960A CN 102236221 A CN102236221 A CN 102236221A
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Abstract
The invention discloses a display substrate and a manufacturing method thereof and a thin film transistor driving method, relating to the technical field of liquid crystal display and aiming at better preventing a threshold voltage of a thin film transistor from shifting. The display substrate is provided with a grid line, a data line is arranged vertical to the grid line, a pixel region is limited between the grid line and the data line, the thin film transistor and a pixel electrode are arranged in the pixel region, a grid of the thin film transistor is connected with the grid line, a source of the thin film transistor is connected with the data line, a drain of the thin film transistor is connected with the pixel electrode, the grid line comprises a forward grid line and a reverse grid line which are parallel, the grid of the thin film transistor comprises a forward grid arranged below the source and the drain of the thin film transistor and a reverse grid arranged above the source and the drain of the thin film transistor, the forward grid is connected with the forward grid line, and the reverse grid is connected with the reverse grid line. The display substrate disclosed by the invention can be used for displaying an image.
Description
Technical field
The present invention relates to technical field of liquid crystal display, relate in particular to a kind of display base plate and manufacture method thereof, and the thin film transistor (TFT) driving method.
Background technology
The pel array of liquid crystal panel comprises multirow grid line and the multi-column data line that is crisscross arranged, in real work, can provide switching signal for the multirow grid line of pel array by grid line drive device, thereby controlling this multirow grid line opens in regular turn, and by the pixel electrode charging in pel array of the data line of corresponding row, to show each two field picture.
From the above, liquid crystal panel when work grid line drive device be to open the grid line switch in regular turn line by line, the voltage that is carried on this row grid line when the grid line switch opens of certain delegation is 27V, the voltage on this moment other row grid lines is-8V.Because what the driving of grid line was adopted is the mode of opening line by line in regular turn, therefore the grid line of certain delegation all is in off state in the most of the time, promptly be in-negative bias of 8V under.As shown in Figure 1, Fig. 1 is the sectional view of display base plate of the prior art along its thin film transistor (TFT), utilizing a grid line (to be positioned at one deck and with grid 11 with grid 11 and to link to each other for a long time, not shown) after below the thin film transistor (TFT) this thin film transistor (TFT) (comprise grid 11, source electrode 12, drain electrode 13 and the active layer that formed by semiconductor layer 14 and doping semiconductor layer 15 etc.) being carried out monolateral driving, be in thin film transistor (TFT) under this negative bias and make easily and open the required threshold voltage of grid line switch and produce skew, thereby influence the job stability of this thin film transistor (TFT).
Fig. 2 to Fig. 5 has illustrated respectively when loading negative bias and positive bias on grid line, I
D-V
GThe threshold voltage shift situation of the drift condition of curve and drive thin film transistors.As shown in Figure 2, when on grid line, loading negative bias, (as 7200s) I after a period of time
D-V
GCurve is offset left, and this moment, the threshold voltage of drive thin film transistors reduced along with the increase of bearing the negative bias time as shown in Figure 3.As shown in Figure 4, when on grid line, loading positive bias, (as 7200s) I after a period of time
D-V
GCurve is offset to the right, and this moment, the threshold voltage of drive thin film transistors increased along with the increase of bearing the positive bias time as shown in Figure 5.
Hence one can see that, long-time like this thin film transistor (TFT) is carried out monolateral driving (only below thin film transistor (TFT) this thin film transistor (TFT) being loaded negative bias or positive bias as long-time) afterwards, to make the threshold voltage of drive thin film transistors produce skew, and this skew is difficult to disappear at short notice, finally causes the bad of liquid crystal panel display frame.
Summary of the invention
Embodiments of the invention provide a kind of display base plate, produce skew with the threshold voltage that prevents drive thin film transistors preferably.For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of display base plate, comprise substrate, described substrate is provided with grid line, be provided with data line perpendicular to described grid line, be limited with pixel region between described grid line and the described data line, be provided with thin film transistor (TFT) and pixel electrode in the described pixel region, the grid of described thin film transistor (TFT) is connected with described grid line, source electrode is connected with described data line, drain electrode is connected with described pixel electrode, wherein said grid line comprises parallel forward grid line and reverse grid line, the grid of described thin film transistor (TFT) comprises source electrode and the forward grid of drain electrode below and the reverse grid of the source electrode of being located at described thin film transistor (TFT) and drain electrode top of being located at described thin film transistor (TFT), described forward grid is connected with described forward grid line, and described reverse grid is connected with described reverse grid line.
The display base plate that the embodiment of the invention provides, owing to below the source electrode of described thin film transistor (TFT) and drain electrode, be provided with the forward grid, the top is provided with reverse grid, therefore the negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention can prevent preferably that the threshold voltage of drive thin film transistors from producing skew.
Embodiments of the invention also provide the manufacture method of display base plate, produce skew with the threshold voltage that prevents drive thin film transistors preferably.For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of display substrate manufacturing method comprises:
One substrate is provided;
Deposition grid metal level on described substrate carries out composition technology to described grid metal level and forms forward grid line, reverse grid line and forward grid, and described forward grid line is connected with described forward grid;
Form the source electrode and the drain electrode of thin film transistor (TFT) on the substrate that is formed with described forward grid line, reverse grid line and forward grid, the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top;
Form reverse grid on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode, described reverse grid is positioned at the source electrode and the drain electrode top of described thin film transistor (TFT), and described reverse grid is connected with described reverse grid line.
A kind of display substrate manufacturing method comprises:
One substrate is provided;
Deposition grid metal level carries out composition technology to described grid metal level and forms forward grid line and forward grid on described substrate, and described forward grid line is connected with described forward grid;
Form the source electrode and the drain electrode of thin film transistor (TFT) on the substrate that is formed with described forward grid line and forward grid, the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top;
Form reverse grid line and reverse grid on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode, the source electrode that described reverse grid is positioned at described thin film transistor (TFT) is connected with the drain electrode top and with described reverse grid line.
The display substrate manufacturing method that the embodiment of the invention provides, wherein said forward grid is in the source electrode and the drain electrode below of described thin film transistor (TFT), described reverse grid then is in the source electrode and the drain electrode top of described thin film transistor (TFT), negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention can prevent preferably that the threshold voltage of drive thin film transistors from producing skew.
Embodiments of the invention also provide a kind of driving method of thin film transistor (TFT), produce skew with the threshold voltage that prevents drive thin film transistors preferably.For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of thin film transistor (TFT) driving method, the grid of described thin film transistor (TFT) comprises source electrode and the forward grid of drain electrode below and the reverse grid of the source electrode of being located at described thin film transistor (TFT) and drain electrode top of being located at described thin film transistor (TFT), described forward grid is connected with the forward grid line, and described reverse grid is connected with reverse grid line; Described method comprises:
Power on;
In first scan period, thin film transistor (TFT) is driven by the forward grid line;
In second scan period, thin film transistor (TFT) is driven by reverse grid line.
The thin film transistor (TFT) driving method that the embodiment of the invention provides, owing to below the source electrode of described thin film transistor (TFT) and drain electrode, be provided with the forward grid, the top is provided with reverse grid, therefore the negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention prevent that preferably the threshold voltage of drive thin film transistors from producing skew.
Description of drawings
Fig. 1 is the schematic cross-section of display base plate of the prior art along its thin film transistor (TFT);
Fig. 2 is I when loading negative bias in the prior art on grid line
D-V
GThe drift condition synoptic diagram of curve;
Fig. 3 is the threshold voltage shift situation synoptic diagram of drive thin film transistors when loading negative bias in the prior art on grid line;
Fig. 4 is I when loading positive bias in the prior art on grid line
D-V
GThe drift condition synoptic diagram of curve;
Fig. 5 is the threshold voltage shift situation synoptic diagram of drive thin film transistors when loading positive bias in the prior art on grid line;
Fig. 6 is the structural representation of an embodiment of display base plate of the present invention;
Fig. 7 is the A-A line amplification view of Fig. 6;
Fig. 8 is the B-B line amplification view of Fig. 6;
Fig. 9 is the structural representation of another embodiment of display base plate of the present invention;
Figure 10 is the structural representation of another embodiment of display base plate of the present invention;
Figure 11 is the synoptic diagram of an embodiment of display substrate manufacturing method of the present invention;
Figure 12 is the synoptic diagram of another embodiment of display substrate manufacturing method of the present invention;
Figure 13 is the synoptic diagram of thin film transistor (TFT) driving method embodiment of the present invention.
Reference numeral:
The 11-grid, 12-source electrode, 13-drain electrode, 14-semiconductor layer, 15-doping semiconductor layer;
The 6-array base palte, 61-substrate, 62-grid line, 621-forward grid line, the reverse grid line of 622-, 63-data line, 65-thin film transistor (TFT), 651-grid, 6511-forward grid, 6512-reverse grid, 652-source electrode, the 653-drain electrode, 66-pixel electrode, 67-reverse grid via hole, 68-gate signal input end, 681-first grid signal input part, the 682-second gate signal input end, the 69-signal distributor, the reverse grid line link of 610-, 611-link via hole.
Embodiment
Below in conjunction with accompanying drawing embodiment of the invention display base plate and manufacture method thereof, thin film transistor (TFT) driving method are described in detail.
Should be clear and definite, described embodiment only is a part of embodiment of the present invention, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making all other embodiment that obtained under the creative work prerequisite.
As shown in Figure 6, be a specific embodiment of display base plate of the present invention.In the present embodiment, described display base plate is specially array base palte 6, this array base palte 6 comprises substrate 61, substrate 61 is provided with grid line 62, be provided with data line 63 perpendicular to grid line 62, be limited with pixel region between grid line 62 and the data line 63, be provided with thin film transistor (TFT) 65 and pixel electrode 66 in the pixel region, the grid 651 of thin film transistor (TFT) 65 is connected (seen in fig. 6 is that reverse grid 6512 is connected with reverse grid line 622) with grid line 62, source electrode 652 is connected with data line 63, drain electrode 653 is connected with pixel electrode 66, wherein grid line 62 comprises parallel forward grid line 621 and reverse grid line 622, in conjunction with shown in Figure 7, the grid 651 of thin film transistor (TFT) 65 comprises source electrode 652 and the forward grid 6511 of drain electrode 653 belows and the reverse grid 6512 of the source electrode 652 of being located at thin film transistor (TFT) 65 and drain electrode 653 tops of being located at thin film transistor (TFT) 65, forward grid 6511 is connected with forward grid line 621, and reverse grid 6512 is connected with reverse grid line 622.
Display base plate in the present embodiment, owing to below the source electrode 652 of described thin film transistor (TFT) 65 and drain electrode 653, be provided with forward grid 6511, the top is provided with reverse grid 6512, therefore the negative bias (positive bias) on being carried in forward grid 6511 makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the reverse grid 6512 then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention can prevent preferably that the threshold voltage of drive thin film transistors from producing skew.
For the composition position of reverse grid line 622, following two kinds of structures are arranged particularly:
First kind of structure, referring to Fig. 6 as can be known, above-mentioned parallel forward grid line 621 and reverse grid line 622 form in a composition technology, and all are positioned on the surface of substrate 61.Wherein forward grid line 621 directly is connected with forward grid 6511, and oppositely grid line 622 is connected with reverse grid 6512 by reverse grid via hole 67 as shown in Figure 8.
That is to say, can on the surface of substrate 61, deposit the grid metal level, this grid metal level is carried out composition technology form forward grid line 621, oppositely grid line 622 and forward grid 6511, wherein forward grid line 621 directly is connected during composition with forward grid 6511.After this, can on the substrate that is formed with forward grid line 621, reverse grid line 622 and forward grid 6511, deposit gate insulation layer.Can in pixel region, form the source electrode 652 of data line 63, active layer, thin film transistor (TFT) 65 and drain 653 by composition technology being formed with on the substrate of gate insulation layer afterwards.Deposit passivation layer on the substrate of source electrode 652 that is formed with thin film transistor (TFT) 65 and drain electrode 653 then, and form the passivation layer via hole (be used to drain 653 be connected with pixel electrode 66) of drain electrode 653 tops and the reverse grid via hole 67 (being used for reverse grid line 622 is connected with reverse grid 6512) of reverse grid line 622 tops by composition technology.Because reverse grid via hole 67 need penetrate passivation layer and gate insulation layer, thus in this composition technology, need be to two via holes (passivation layer via hole and reverse grid via hole) thus the position carry out the hole that in various degree exposure forms different depth.Be formed with on the substrate of passivation layer by composition technology formation pixel electrode 66 and reverse grid 6512 at last, wherein reverse grid 6512 is positioned at the source electrode 652 of thin film transistor (TFT) 65 and the top of drain electrode 653, and oppositely grid line 622 can be connected with reverse grid 6512 by reverse grid via hole 67.The step that the step that this structure will be made forward grid line 621 and reverse grid line 622 merges, also will make reverse grid 6512 and pixel electrode 66 merges, and has saved operation, has improved production efficiency.
Second kind of structure, referring to Fig. 9 as can be known, forward grid line 621 is positioned on the surface of substrate 61, and directly is connected with forward grid 6511; Oppositely grid line 622 forms in a composition technology with pixel electrode 66, and is positioned at same one deck, and oppositely grid line 622 directly is connected with reverse grid 6512.
Wherein, the manufacture craft of grid line and grid is identical in the manufacture craft of forward grid line 621 and forward grid 6511 and the prior art.Different with existing manufacture craft is, when making pixel electrode 66, pixel deposition electrode layer on the substrate 61 that is formed with forward grid line 621, forward grid 6511 and thin film transistor (TFT) 65 at first, when forming pixel electrode 66, form reverse grid line 622 and reverse grid 6512 by composition technology then, and reverse grid line 622 directly is connected with reverse grid 6521.In this structure, because oppositely grid line 622, reverse grid 6512 and pixel electrode 66 form in a composition technology simultaneously, the material of therefore making reverse grid line 622 and reverse grid 6512 is identical with the material of making pixel electrode 66.
Except that above-mentioned two kinds of structures, can also on the substrate 61 that is formed with forward grid line 621, forward grid 6511 and thin film transistor (TFT) 65, make pixel electrode 66 earlier, utilize insulation course or passivation layer that pixel electrode 66 is protected then, make reverse grid line 622 and reverse grid 6512 again, more described insulation course and passivation layer are removed at last; Perhaps also can make reverse grid line 622 and reverse grid 6512 earlier on the substrate 61 that is formed with forward grid line 621, forward grid 6511 and thin film transistor (TFT) 65, profit uses the same method and makes pixel electrode 66 then.Though can use different materials to make reverse grid line 622, reverse grid 6512 and pixel electrode 66 like this, its manufacture craft process is comparatively loaded down with trivial details.
In the present embodiment, for to grid line 62 input drive signals, be provided with gate signal input end 68 in the lead-in wire zone of substrate 61 1 sides, this gate signal input end 68 is connected with reverse grid line 622 with forward grid line 621 by signal distributor 69.The effect of this signal distributor 69 is to be forward grid line 621 and reverse grid line 622 distribution drive signals, promptly, in first scan period, distribute drive signal, and in second scan period, distribute drive signal to reverse grid line 622 to forward grid line 621, and alternate repetition like this.Wherein, this gate signal input end 68 can form with forward grid line 621 and forward grid 6511 in a composition technology.This signal distributor 69 then can be the circuit structure of being made up of shift register, and the described shift register that wherein is positioned at the lead-in wire zone of substrate 61 also can be made when the pattern-making of the viewing area of substrate 61 together.
Wherein for the described first kind of structure showing of top Fig. 6, signal distributor 69 links to each other with gate signal input end 68 on the one hand, can directly link to each other with forward grid line 621, reverse grid line 622 on the other hand.For the described second kind of structure showing of top Fig. 9, can also make reverse grid line link 610 simultaneously when in the lead-in wire zone of substrate 61, making gate signal input end 68, can link to each other with reverse grid line link 610 by link via hole 611 with the reverse grid line 622 that pixel electrode 66 is positioned at one deck like this, and then can link to each other with signal distributor 69.Wherein should be understood that, the structure of described link via hole 610 and manufacturing process and embodiment illustrated in fig. 6 described in the structure and the manufacturing process of reverse grid via hole 67 similar.
In addition as shown in figure 10, in another embodiment of the present invention, be provided with in the lead-in wire zone of substrate 61 1 sides in the lead-in wire zone of first grid signal input part 681, another opposite side and be provided with the second gate signal input end 682, first grid signal input part 681 is connected with forward grid line 621, and the second gate signal input end 682 is connected with reverse grid line 622.The gate signal input end is set like this can need to use signal distributor, and in first scan period, pass through first grid signal input part 681 to forward grid line 621 input drive signals, and in second scan period, pass through the second gate signal input end 682, and alternate repetition like this to reverse grid line 622 input drive signals.
Wherein, for top first kind of structure shown in Figure 6, this first grid signal input part 681 and the second gate signal input end 682 can form (this structure as shown in figure 10) with forward grid line 621 and reverse grid line 622 in a composition technology.For top second kind of structure shown in Figure 9, this first grid signal input part 681 can form with forward grid line 621 in a composition technology, and this second gate signal input end 682 can form (this structure is accompanying drawing not) with reverse grid line 622 in another time composition technology.
Need to prove in the foregoing description, not have specific division between described forward grid line and the reverse grid line, only is the difference of call.When will be wherein when a grid line is as the forward grid line, then another grid line be just as reverse grid line.In like manner, the definition to described forward grid and reverse grid also is like this.
In sum as can be known, the display base plate that the embodiment of the invention provides, owing to below the source electrode of described thin film transistor (TFT) and drain electrode, be provided with the forward grid, the top is provided with reverse grid, therefore the negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention can prevent preferably that the threshold voltage of drive thin film transistors from producing skew.
As shown in figure 11, body of the present invention also provides a kind of embodiment of display substrate manufacturing method, and described manufacture method comprises:
This substrate can adopt glass substrate or quartz base plate.
Wherein, the grid metal level is carried out composition technology formation forward grid line, reverse grid line and forward grid to be specially, magnetron sputtering, thermal evaporation or other film build method deposition one deck grid metallic film at first are provided on the substrate that is provided, the material of grid metallic film can use metals such as molybdenum, aluminium, aluminium neodymium alloy, tungsten, chromium, copper, or the mixing of above metal.Use mask plate by composition technology the grid metallic film to be carried out composition then, this composition technology comprises exposure, development, etching, photoresist lift off etc., thereby forward grid line, oppositely grid line and forward grid are provided on the substrate that is provided.
Wherein step 1103 and step 1104 specifically comprise:
Step 101 deposits gate insulation layer on the substrate that is formed with described forward grid line, reverse grid line and forward grid.Wherein, can adopt chemical vapor deposition or other film build method deposition gate insulation layer film, to form gate insulation layer.
Step 102 is being formed with source electrode and the drain electrode that forms thin film transistor (TFT) on the substrate of gate insulation layer, and the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top.Wherein, the source electrode of the source electrode of described formation thin film transistor (TFT) and the processing step of drain electrode and existing formation thin film transistor (TFT) is identical with the processing step of drain electrode, no longer describes in detail.
Step 103, deposit passivation layer on the substrate of source electrode that is formed with thin film transistor (TFT) and drain electrode is carried out composition technology to described substrate and is formed the reverse grid via hole that penetrates described passivation layer and gate insulation layer.That is, described reverse grid via hole not only sees through described gate insulation layer but also see through described passivation layer.
Step 104, be formed with pixel deposition electrode layer on the substrate of passivation layer, described pixel electrode layer is carried out composition technology in pixel region, form pixel electrode and reverse grid, described reverse grid is positioned at the source electrode and the drain electrode top of thin film transistor (TFT), and described reverse grid is connected with described reverse grid line by described reverse grid via hole.In this step, the material of making reverse grid is identical with the material of making pixel electrode, as using tin indium oxide ITO material.
Display substrate manufacturing method in the present embodiment, wherein said forward grid is in the source electrode and the drain electrode below of described thin film transistor (TFT), described reverse grid then is in the source electrode and the drain electrode top of described thin film transistor (TFT), negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention can prevent preferably that the threshold voltage of drive thin film transistors from producing skew.
In addition, it should be noted that, step 1101 in the present embodiment, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line, reverse grid line and forward grid, also be formed with the gate signal input end in the lead-in wire zone of described substrate one side, described gate signal input end is connected with reverse grid line with described forward grid line by signal distributor.That is, in step 1101, on the surface of substrate, form forward grid line, reverse grid line, forward grid and gate signal input end by a composition technology.
Perhaps in the step 1101 of another embodiment of the present invention, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line, reverse grid line and forward grid, also in the lead-in wire zone of described substrate one side, be formed with in the lead-in wire zone of first grid signal input part, another opposite side and be formed with the second gate signal input end, described first grid signal input part is connected with described forward grid line, and the described second gate signal input end is connected with described reverse grid line.That is, in step 1101, on the surface of substrate, form forward grid line, oppositely grid line, forward grid by composition technology, and the first grid signal input part that is connected with the forward grid line, the second gate signal input end that is connected with reverse grid line.
As shown in figure 12, the present invention also provides the embodiment of another kind of display substrate manufacturing method, and manufacture method comprises described in the present embodiment:
Equally, this substrate can adopt glass substrate or quartz base plate.
Furthermore, in this step, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line and forward grid, can also form gate signal input end and reverse grid line link in the lead-in wire zone of described substrate one side, described gate signal input end is connected with described reverse grid line link with described forward grid line by signal distributor.That is, in step 1102, on substrate surface, form forward grid line, forward grid, gate signal input end and reverse gate signal link by a composition technology.
Wherein step 1203 and step 1204 specifically comprise:
Step 201 deposits gate insulation layer on the substrate that is formed with described forward grid line and forward grid.Wherein technology in this step and the technology in the above-mentioned steps 101 are similar.
Step 202 is being formed with source electrode and the drain electrode that forms thin film transistor (TFT) on the substrate of gate insulation layer, and the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top.The source electrode of the source electrode of described formation thin film transistor (TFT) and the processing step of drain electrode and existing formation thin film transistor (TFT) is identical with the processing step of drain electrode, also no longer describes in detail.
Step 203, deposit passivation layer on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode is carried out composition technology to described substrate and is formed the link via hole that penetrates described passivation layer and gate insulation layer.That is, described link via hole not only sees through described gate insulation layer but also see through described passivation layer.Hence one can see that, and the processing step of making described link via hole in the present embodiment is similar to the processing step of making described reverse grid via hole.
Step 204, be formed with pixel deposition electrode layer on the substrate of passivation layer, described pixel electrode layer is carried out composition technology form pixel electrode, reverse grid line and reverse grid, the source electrode that described reverse grid is positioned at described thin film transistor (TFT) also is connected with described reverse grid line with the drain electrode top, and described reverse grid line is connected with described reverse grid line link by described link via hole.
That is, when making pixel electrode in this step, can produce reverse grid line and reverse grid simultaneously, and the material of making reverse grid line and reverse grid is identical with the material of making pixel electrode.Wherein it should be noted that, in this step when making reverse grid line, can reverse grid line and reverse grid line link be linked together by the link via hole above the reverse grid line link of making in step 201 and the step 203, and then reverse grid line is linked together by signal distributor and gate signal input end.
In addition, in another embodiment of the present invention, described display substrate manufacturing method and embodiment illustrated in fig. 12 described in the difference of display substrate manufacturing method be:
(1) in the step 1202, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line and forward grid, also be formed with first grid signal input part in the lead-in wire zone of described substrate one side, described first grid signal input part is connected with described forward grid line.That is, in a composition technology, in the lead-in wire zone of substrate one side, form the first grid signal input part that only is connected with the forward grid line.
(2) in the step 1204, pixel deposition electrode layer on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode, described pixel electrode layer is carried out composition technology form pixel electrode, oppositely grid line, reverse grid and be positioned at the second gate signal input end in lead-in wire zone of another opposite side of described substrate, described reverse grid line is connected with described reverse grid, and is connected with the described second gate signal input end.That is, in composition technology, form in the pixel electrode, on the surface of substrate, form reverse grid line, reverse grid simultaneously, and the second gate signal input end that links to each other with reverse grid line.
In sum as can be known, the display substrate manufacturing method that the embodiment of the invention provides, wherein said forward grid is in the source electrode and the drain electrode below of described thin film transistor (TFT), described reverse grid then is in the source electrode and the drain electrode top of described thin film transistor (TFT), negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention can prevent preferably that the threshold voltage of drive thin film transistors from producing skew.
In addition, the present invention also provides a kind of embodiment of thin film transistor (TFT) driving method.In the present embodiment, the grid of described thin film transistor (TFT) comprises source electrode and the forward grid of drain electrode below and the reverse grid of the source electrode of being located at described thin film transistor (TFT) and drain electrode top of being located at described thin film transistor (TFT), described forward grid is connected with the forward grid line, and described reverse grid is connected with reverse grid line; Described driving method comprises:
And in the present embodiment, step 1302 by described forward grid line thin film transistor (TFT) is driven and step 1303 drives thin film transistor (TFT) by described reverse grid line, can alternately repeat.
Thin film transistor (TFT) driving method in the present embodiment, owing to below the source electrode of described thin film transistor (TFT) and drain electrode, be provided with the forward grid, the top is provided with reverse grid, therefore the negative bias (positive bias) on being carried in described forward grid makes the threshold voltage of drive thin film transistors when a certain direction is offset, the negative bias (positive bias) that is carried on the described reverse grid then makes the threshold voltage of drive thin film transistors be offset in the opposite direction, skew on this both direction can be cancelled out each other, thereby makes the embodiment of the invention prevent that preferably the threshold voltage of drive thin film transistors from producing skew.
Here need to prove that though the present invention does not provide specific embodiment, the thin film transistor (TFT) among the present invention can also use other driving method.That is, only thin film transistor (TFT) is driven, or only thin film transistor (TFT) is driven by reverse grid line by the forward grid line.Wherein, when only thin film transistor (TFT) being driven by the forward grid line, forward grid line and reverse grid line need guarantee oppositely loading the bias voltage identical on the grid line, so that can make the threshold voltage of drive thin film transistors produce the opposite skew of direction under this bias effect with the forward grid line.Correspondingly, when only thin film transistor (TFT) being driven, need guarantee on the forward grid line, to load and the reverse identical bias voltage of grid line by reverse grid line.
The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by described protection domain with claim.
Claims (16)
1. display base plate, comprise substrate, described substrate is provided with grid line, be provided with data line perpendicular to described grid line, be limited with pixel region between described grid line and the described data line, be provided with thin film transistor (TFT) and pixel electrode in the described pixel region, the grid of described thin film transistor (TFT) is connected with described grid line, source electrode is connected with described data line, drain electrode is connected with described pixel electrode, it is characterized in that, described grid line comprises parallel forward grid line and reverse grid line, the grid of described thin film transistor (TFT) comprises source electrode and the forward grid of drain electrode below and the reverse grid of the source electrode of being located at described thin film transistor (TFT) and drain electrode top of being located at described thin film transistor (TFT), and described forward grid is connected with described forward grid line, and described reverse grid is connected with described reverse grid line.
2. display base plate according to claim 1 is characterized in that, described parallel forward grid line and reverse grid line form in a composition technology, and are positioned at the surface of described substrate;
Described forward grid line directly is connected with described forward grid, and described reverse grid line is connected with described reverse grid by the reverse grid via hole.
3. display base plate according to claim 1 is characterized in that described forward grid line is positioned at the surface of described substrate, and directly is connected with described forward grid;
Described reverse grid line and described pixel electrode form in a composition technology and are positioned at same one deck, and described reverse grid line directly is connected with described reverse grid.
4. according to claim 2 or 3 described display base plates, it is characterized in that, be provided with the gate signal input end in the lead-in wire zone of described substrate one side, described gate signal input end is connected with reverse grid line with described forward grid line by signal distributor.
5. according to claim 2 or 3 described display base plates, it is characterized in that, be provided with in the lead-in wire zone of described substrate one side in the lead-in wire zone of first grid signal input part, another opposite side and be provided with the second gate signal input end, described first grid signal input part is connected with described forward grid line, and the described second gate signal input end is connected with described reverse grid line.
6. display base plate according to claim 1 is characterized in that, described reverse grid and described pixel electrode are made from a variety of materials.
7. a display substrate manufacturing method is characterized in that, comprising:
One substrate is provided;
Deposition grid metal level on described substrate carries out composition technology to described grid metal level and forms forward grid line, reverse grid line and forward grid, and described forward grid line is connected with described forward grid;
Form the source electrode and the drain electrode of thin film transistor (TFT) on the substrate that is formed with described forward grid line, reverse grid line and forward grid, the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top;
Form reverse grid on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode, described reverse grid is positioned at the source electrode and the drain electrode top of described thin film transistor (TFT), and described reverse grid is connected with described reverse grid line.
8. display substrate manufacturing method according to claim 7 is characterized in that, forms the source electrode and the drain electrode of thin film transistor (TFT) on the substrate that is formed with described forward grid line, reverse grid line and forward grid; Forming reverse grid on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode comprises:
On the substrate that is formed with described forward grid line, reverse grid line and forward grid, deposit gate insulation layer;
Be formed with source electrode and the drain electrode that forms thin film transistor (TFT) on the substrate of gate insulation layer, the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top;
Deposit passivation layer on the substrate of source electrode that is formed with thin film transistor (TFT) and drain electrode is carried out composition technology to described substrate and is formed the reverse grid via hole that penetrates described passivation layer and gate insulation layer;
Be formed with pixel deposition electrode layer on the substrate of passivation layer, described pixel electrode layer is carried out composition technology in pixel region, form pixel electrode and reverse grid, described reverse grid is positioned at the source electrode and the drain electrode top of thin film transistor (TFT), and described reverse grid is connected with described reverse grid line by described reverse grid via hole.
9. according to claim 7 or 8 described display substrate manufacturing methods, it is characterized in that, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line, reverse grid line and forward grid, also be formed with the gate signal input end in the lead-in wire zone of described substrate one side, described gate signal input end is connected with reverse grid line with described forward grid line by signal distributor.
10. according to claim 7 or 8 described display substrate manufacturing methods, it is characterized in that, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line, reverse grid line and forward grid, also in the lead-in wire zone of described substrate one side, be formed with in the lead-in wire zone of first grid signal input part, another opposite side and be formed with the second gate signal input end, described first grid signal input part is connected with described forward grid line, and the described second gate signal input end is connected with described reverse grid line.
11. a display substrate manufacturing method is characterized in that, comprising:
One substrate is provided;
Deposition grid metal level carries out composition technology to described grid metal level and forms forward grid line and forward grid on described substrate, and described forward grid line is connected with described forward grid;
Form the source electrode and the drain electrode of thin film transistor (TFT) on the substrate that is formed with described forward grid line and forward grid, the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top;
Form reverse grid line and reverse grid on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode, the source electrode that described reverse grid is positioned at described thin film transistor (TFT) is connected with the drain electrode top and with described reverse grid line.
12. display substrate manufacturing method according to claim 11, it is characterized in that, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line and forward grid, also be formed with gate signal input end and reverse grid line link in the lead-in wire zone of described substrate one side, described gate signal input end is connected with described reverse grid line link with described forward grid line by signal distributor.
13. display substrate manufacturing method according to claim 12 is characterized in that, forms the source electrode and the drain electrode of thin film transistor (TFT) on the substrate that is formed with described forward grid line and forward grid; Reverse grid line of formation and reverse grid comprise on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode:
On the substrate that is formed with described forward grid line and forward grid, deposit gate insulation layer;
Be formed with source electrode and the drain electrode that forms thin film transistor (TFT) on the substrate of gate insulation layer, the source electrode of described thin film transistor (TFT) and drain electrode are positioned at described forward grid top;
Deposit passivation layer on the substrate of source electrode that is formed with described thin film transistor (TFT) and drain electrode is carried out composition technology to described substrate and is formed the link via hole that penetrates described passivation layer and gate insulation layer;
Be formed with pixel deposition electrode layer on the substrate of passivation layer, described pixel electrode layer is carried out composition technology form pixel electrode, reverse grid line and reverse grid, the source electrode that described reverse grid is positioned at described thin film transistor (TFT) also is connected with described reverse grid line with the drain electrode top, and described reverse grid line is connected with described reverse grid line link by described link via hole.
14. display substrate manufacturing method according to claim 11, it is characterized in that, deposition grid metal level on described substrate, when described grid metal level is carried out composition technology formation forward grid line and forward grid, also be formed with first grid signal input part in the lead-in wire zone of described substrate one side, described first grid signal input part is connected with described forward grid line; With
Pixel deposition electrode layer on the substrate that is formed with described forward grid line and forward grid, described pixel electrode layer is carried out composition technology form pixel electrode, oppositely grid line, reverse grid and be positioned at the second gate signal input end in lead-in wire zone of another opposite side of described substrate, described reverse grid line is connected with described reverse grid, and is connected with the described second gate signal input end.
15. thin film transistor (TFT) driving method, it is characterized in that, the grid of described thin film transistor (TFT) comprises source electrode and the forward grid of drain electrode below and the reverse grid of the source electrode of being located at described thin film transistor (TFT) and drain electrode top of being located at described thin film transistor (TFT), described forward grid is connected with the forward grid line, and described reverse grid is connected with reverse grid line; Described method comprises:
Power on;
In first scan period, thin film transistor (TFT) is driven by the forward grid line;
In second scan period, thin film transistor (TFT) is driven by reverse grid line.
16. thin film transistor (TFT) driving method according to claim 15 is characterized in that, alternately repeats thin film transistor (TFT) is driven by described forward grid line and described reverse grid line.
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| CN 201010143960 CN102236221B (en) | 2010-04-08 | 2010-04-08 | Display substrate and manufacturing method thereof and thin film transistor driving method |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103681514A (en) * | 2013-12-23 | 2014-03-26 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof and display device |
| CN104425545A (en) * | 2013-09-10 | 2015-03-18 | 群创光电股份有限公司 | Display device |
| US9653608B2 (en) | 2013-12-23 | 2017-05-16 | Boe Technology Group Co., Ltd. | Array substrate and manufacturing method thereof, display device and thin film transistor |
| CN111613637A (en) * | 2019-02-26 | 2020-09-01 | 京东方科技集团股份有限公司 | Display substrate, bad adjusting method thereof and display device |
-
2010
- 2010-04-08 CN CN 201010143960 patent/CN102236221B/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104425545A (en) * | 2013-09-10 | 2015-03-18 | 群创光电股份有限公司 | Display device |
| CN104425545B (en) * | 2013-09-10 | 2017-12-08 | 群创光电股份有限公司 | Display device |
| CN103681514A (en) * | 2013-12-23 | 2014-03-26 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof and display device |
| CN103681514B (en) * | 2013-12-23 | 2016-01-27 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display unit |
| US9653608B2 (en) | 2013-12-23 | 2017-05-16 | Boe Technology Group Co., Ltd. | Array substrate and manufacturing method thereof, display device and thin film transistor |
| CN111613637A (en) * | 2019-02-26 | 2020-09-01 | 京东方科技集团股份有限公司 | Display substrate, bad adjusting method thereof and display device |
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| Publication number | Publication date |
|---|---|
| CN102236221B (en) | 2013-03-27 |
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