CN102231831A - Bit plane coding method based on fork form coding path for image compression - Google Patents
Bit plane coding method based on fork form coding path for image compression Download PDFInfo
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Abstract
The invention provides a bit plane coding method based on a fork form coding path for image compression, and especially provides a high rate bit plane coding method based on a fork form coding path, wherein the method is accord with a Joint Photographic Experts Group (JPEG) 2000 image compression standard. According to the fork form coding path which is applied to a significance propagation path and a clear path, a path length of completing 4*N strip coding is reduced to (N+1)/2N of standard length and degree of parallelism of a circuit is effectively raised. By designing a two windows pipeline structure based on the path, 16 sample points bit plane coding is completed in each clock on average, which is executed in parallel between bit planes. A largest characteristic of the structure is that a key coding module is realized by adopting a combination circuit, through pipelining, coding of a plurality of points is completed within one clock, and clock waste and complex control logic are avoided. A consumed clock periodicity is only 1/7.8 of a standard algorithm, which satisfies a requirement of image real-time processing.
Description
Technical field
The present invention relates to be used for the Bit-Plane Encoding method based on fork-shaped coding path of image compression, particularly be applied to meet JPEG (joint photographic experts group) (JPEG) 2000 Standard of image compression, two-forty, based on the Bit-Plane Encoding method in fork-shaped coding path.
Background technology
At present international up-to-date image compression standard JPEG 2000 (list of references [1]) possess intraframe coding, compression effectiveness good, support qualities such as encoding region of interest and progressive transmission, thereby in high-end digital picture is used, obtained popularization.In image compression process, at first adopt and promote structure two-dimensional discrete wavelet conversion (DWT) original image, adopt bit plane encoder (BPC) to handle the wavelet coefficient subband afterwards and generate context and code value (CX/D), send into arithmetic encoder (AC) again and carry out compressed encoding.Because BPC need set up context to each bit of the wavelet transform result of image, computation complexity is high, and needs to consume great internal memory.Along with the application popularization of all kinds of high-definition digital images, how to improve the full degree of concurrence of Bit-Plane Encoding method, and effectively reduce memory consumption and become one of this area research focus.
The BPC method that the JPEG2000 Standard of image compression adopts is proposed by David Taubman, P position after this method will quantize has the symbol wavelet coefficient to be organized as the code block of N * N size, downward from sign bit then, the symbol segmentation of wavelet coefficient is become an independently sign plane, the bit of wavelet coefficient is divided in proper order the bit plane of (P-1) layer N * N size; In single bit plane, per 4 row of bit are divided into a band.Encoder is according to raster order, and from the highest order plane, from top to bottom from left to right, bit-plane by bit-plane is one by one with the coding by bit.
Wall scroll band Nepit position encryption algorithm is as follows:
1) judge whether current bit belongs to conspicuousness propagation ducts (SPP): if bit is not current remarkable, have at least one to be significant and face in 8 bits in territory, then it belongs to this passage, carries out Zero-code (ZC) and computational context.And then judge whether itself is remarkable; If then upgrade the conspicuousness state, carry out symbolic coding (SC); Otherwise do not carry out.If bit face the territory neither significantly or bit itself remarkable, then it does not belong to this passage, skips this point and removes to judge next point.All bits in the band are carried out this operation, get back to starting point then and carry out 2);
2) judge whether current bit belongs to amplitude refinement (MRP): if bit is significantly current and coding not, then belong to this passage, carry out amplitude refinement coding; Otherwise do not belong to this passage, skip this point and remove to judge next point.All bits in the band are carried out this operation, get back to starting point then and carry out 3);
3) carry out removing passage (CLP): use Run-Length Coding (RLC), Zero-code and symbolic coding to be encoded in all remaining bits positions that do not belong to conspicuousness propagation ducts and amplitude refinement.
Standard BP C algorithm is from the highest order plane, and from top to bottom from left to right, bit-plane by bit-plane is with one by one by the bit coding, and pursues channel coding according to the order of SPP passage, MRP passage, CLP passage.This sequential encoding mode speed is very slow, and the intermediate data that storage need be a large amount of, therefore how effectively to improve the coding rate of bit plane encoder and reduces storage inside consumption, becomes one of academic focus of Chinese scholars concern.
The representative achievement in research in this field has: document [1] has proposed the Bit-Plane Encoding implementation algorithm based on pixel the earliest, and is adopted by the JPEG2000 standard; Document [2] adopts the state machine structure to realize bit-plane coding; Document [3] proposes per-column cataloged procedure parallel organization, promptly adopts two window code devices that 3 passages are carried out scanning encoding simultaneously.Have sequencing because passage scans, after first window conspicuousness state renewal, second window just can begin coding by the time, and needing between two window code devices has increased the control complexity alternately; Document [4] has proposed that bit is skipped and the row skip algorithm, promptly skips the bit and the row of no context output, to reduce calculation times.This method can't be brought into play the advantage of circuit parallelization, and the optimization degree depends on view data, the performance big rise and fall.Document [5] has proposed the bit plane parallel algorithm, and is parallel between the bit plane of having realized encoding.But the coding unit of single bit plane has adopted the scheme of document [3] and [4] simultaneously, and the control complexity is higher, and consumption of natural resource is bigger, and this shortcoming is particularly outstanding after carrying out hardware multiplexing realizing the bit plane parallel encoding.
[1]Taubman?D.High?performance?scalable?image?compression?with?EBCOT.IEEE?Trans.on?Image?Processing,2000,9(7):1158-1170
[2]Andra?K.,Chakrabarti?C.,Acharya?T.,A?high-performance?JPEG?2000architecture.IEEE?Trans.on?Circuits?and?System?for?Video?Technology,2003,13(3):209-218
[3]Chiang?J.-S.,Lin?Y.-S.,Hsieh?C.-Y.,Efficient?pass-parallel?architecture?for?EBCOT?in?JPEG?2000.In:IEEE?International?Symposium?on?Circuits?and?Systems,2002.773-776
[4]Lian?C.-J.,Chen?K.-F.,Chen?H.-H.,et?al.Analysis?and?architecture?design?of?block-coding?engine?for?EBCOT?in?JPEG?2000.IEEE?Trans.on?Circuits?and?System?for?Video?Technology,2003,13(3):219-230
[5]Liu?K.,Li?Y.-S.,Wu?C.-K.,A?high?performance?EBCOT?coding?and?its?VLSI?architecture.Journal?of?Software,2006,17(7):1553-1560
Summary of the invention
Technical problem: the objective of the invention is to propose to be applicable to the fork-shaped coding path of SPP and CLP, made the path of finishing 4 * N size strip coding be reduced to (the N+1)/2N of canonical algorithm, effectively improved the circuit parallel degree; Carry out streamline scanning by two coding windows, can average each clock finish the Bit-Plane Encoding of 16 sample points, and can interplanar executed in parallel on the throne, clock waste and complicated control logic avoided.
Technical scheme: the Bit-Plane Encoding method based on fork-shaped coding path that is used for image compression of the present invention is the coding path of following fork-shaped when it carries out conspicuousness propagation ducts SPP and removes channel C LP coding; By two coding windows based on fork-shaped coding path, the Bit-Plane Encoding of finishing 16 bits of streamline in single clock, and then further finish the Bit-Plane Encoding of whole band, whole bit plane according to the order of raster scan.
Described conspicuousness propagation ducts is followed fork-shaped coding path, is meant when judging whether current bit belongs to the conspicuousness propagation ducts whether will judge bit and face territory conspicuousness state s is 1; The territory conspicuousness of facing of four bits is contributed available formula 1 statement in the same row:
In the formula 1, "+" represents XOR;
Be the bit amplitude of the capable n row of m in the l band,
With
Be respectively the preceding conspicuousness state of this bit renewal, the conspicuousness state after the renewal, face territory conspicuousness contribution, context and code value; M, n and l are natural numbers; The conspicuousness state of bit more new formula is:
In the formula 2, " " representative and computing;
The standard bit plane coding method should be according to from left to right the judgement n row from top to bottom of raster order serial
With
After, just can adjudicate n+1 row
With
But finish
With
Judgement after,
With
Through type (2) is updated to
With
Promptly
Judgment condition satisfied, can with
The judgement executed in parallel; In like manner,
With
Also can parallel judgment;
When encoding, adopt Zero-code and symbolic coding for the bit in the conspicuousness passage; The Zero-code context calculates available formula 3 expressions, and the symbolic coding context calculates available formula 4 expressions:
When calculating the Zero-code context, try to achieve according to formula 3
With
After, in like manner
With
Also be updated to by formula 2
With
Promptly further calculate
With
Condition satisfy simultaneously; Afterwards
With
Also like this; Symbolic coding is tried to achieve according to formula 4
With
After,
Be updated to by formula 2
Promptly can calculate simultaneously
With
Afterwards
With
Also like this.That is to say that the bit coding of conspicuousness propagation ducts is all finished along fork-shaped coding path.
Described removing passage is followed fork-shaped coding path, is meant judging whether current bit belongs to when removing passage, and whether the conspicuousness state s that judge a row bit and face the territory is 1, explains as formula 5:
If
Be 1, then directly obtain coding result by the heavy look-up method of JPEG2000 Standard of image compression, if
Be 0, carry out Zero-code and symbolic coding; The Zero-code context calculates available formula 3 expressions, and the symbolic coding context calculates available formula 4 expressions; When calculating the Zero-code context, try to achieve according to formula 3
With
After, in like manner
With
Also be updated to by formula 2
With
Promptly further calculate
With
Condition satisfy simultaneously; Afterwards
With
Also like this; Symbolic coding is tried to achieve according to formula 4
With
After,
Be updated to by formula 2
Promptly can calculate simultaneously
With
Afterwards
With
Also like this;
Can walk abreast and carry out Run-Length Coding, and Zero-code and symbolic coding, according to
Value coding result is selected to get final product; That is to say, remove the bit coding of passage and all finish along fork-shaped coding path.
Described by two coding windows based on fork-shaped coding path, the Bit-Plane Encoding of finishing 16 bits of streamline in single clock, and then further finish the Bit-Plane Encoding of whole band, whole bit plane according to the order of raster scan, two coding windows refer to realize the SPP window of conspicuousness propagation ducts respectively and realize amplitude refinement and the MRP﹠amp that removes passage simultaneously; The CP window; With 4 * 4 bits in the single band is that elementary cell is operated, and adopts combinational logic to realize coding, makes two windows all can finish operation separately in a clock; During coding, in first clock, read in first 4 * 4 sample point piece, carry out the SPP window, carry out conspicuousness propagation ducts coding; In second clock, read in second 4 * 4 sample point piece, carry out the SPP window, carry out conspicuousness propagation ducts coding; First 4 * 4 sample point piece is executed in parallel MRP﹠amp then; The CP window carries out the amplitude thinning process simultaneously and removes channel coding; Because adopted pile line operation, on average each clock can be finished the Bit-Plane Encoding of 16 sample points, successively 4 * 4 sample point pieces in the band is repeated above operation and finishes the Bit-Plane Encoding of whole band, and then finish whole bit plane.
Beneficial effect: the fork-shaped coding path that is applicable to the conspicuousness propagation ducts and removes passage that the present invention proposes, make the path of finishing 4 * N size strip coding be reduced to (the N+1)/2N of standard, effectively improved the circuit parallel degree; Designed two window pipeline organizations, can finish the Bit-Plane Encoding of 16 sample points by average each clock based on this path, and can interplanar executed in parallel on the throne.The maximum characteristics of this structure are that crucial coding module adopts combinational circuit to realize, finish the coding of multiple spot by pipelining in single clock, have avoided clock waste and complicated control logic; The clock periodicity that is consumed only is 1/7.8 of canonical algorithm, satisfies the requirement that image is handled in real time.
Description of drawings
The present invention will be further described below in conjunction with drawings and Examples.
Fig. 1 adopts the Bit-Plane Encoding algorithm of standard, the serial order coding path of bit.
Fig. 2 fork-shaped coding of the present invention path, for becoming 4 * N size strip, the path of coding is reduced to (the N+1)/2N of canonical algorithm.
Fig. 3 two coding window streamlines coding schematic diagram.
Fig. 4 is based on the concrete structure schematic diagram of two coding windows in fork-shaped coding path.
Embodiment
The embodiment that provides below in conjunction with accompanying drawing and inventor is described in further details the present invention.
Coding structure of the present invention mainly comprises two coding windows, control module, clock module and buffer memorys.Complete bit plane encoder is formed by the single bit plane encoder of some isomorphisms is parallel.Buffer memory be used for prestoring conspicuousness state, coefficient symbols and the refinement state of each bit plane and other process variables.After wavelet coefficient after the quantification was divided into a plurality of bit planes, the every surface encoder of parallel inflow was encoded, and gives the arithmetic encoder of back level with code value and context transfer at last.
Concrete embodiment is as follows:
The SPP window mainly comprises Zero-code unit and symbolic coding unit.For the Zero-code unit, the disposable territory conspicuousness of facing of finishing 16 points of its combinational circuit contributes judgement and conspicuousness state to upgrade, and the conspicuousness state cache after will upgrading; Calculate level, vertical and oblique angle conspicuousness contribution degree that sample point faces the territory afterwards respectively, and then calculate the Zero-code context of 16 points; The Zero-code code value is the sample point amplitude.For the symbolic coding unit, directly calculate level and vertical conspicuousness contribution degree that 16 sample points face the territory, thereby obtain its sign prediction value and symbol context; Obtain the output of symbolic coding code value behind sign prediction value and the former value of symbol XOR.
MRP﹠amp; The CP window comprises amplitude refinement unit, Run-Length Coding unit, Zero-code unit and symbolic coding unit.Wherein, amplitude refinement unit is contributed and refinement state computation amplitude refinement context according to the territory conspicuousness of facing of 16 sample points; Amplitude refinement coding code value is the sample point amplitude.Identical in this window in the circuit structure of Zero-code unit and symbolic coding unit and the SPP window.For the Run-Length Coding unit, its coded object is a row sample point, and entry condition is that these row and totally 18 sample points that face the territory are current all not remarkable; After the startup,, then stop Run-Length Coding, and residue sample point in the row is carried out Zero-code and symbolic coding if sample point is updated to significantly in the row.Obviously, the result of this coded system has very strong regularity, and sample point Zero-code and symbolic coding result's splicing can realize based on the thought of tabling look-up in can be considered the Run-Length Coding result and being listed as.For improving the circuit parallel degree, this structure is directly exported to control module after the sample row are carried out Run-Length Coding, utilize the output of Zero-code unit and symbolic coding unit to finish the combination of coding result by it.
SPP window and MRP﹠amp; All coding units in the CP window all read in the related data line operate of going forward side by side at first at each clock, except that the mode bit and the process variables of necessity are put back to the buffer memory, all coding results are directly passed to the control module of next stage, finish further processing by it.
Control module mainly comprises SPP and selects output unit, MRP to select output unit and CP to select output unit.These hardware cells read in the parallel coding result of importing of prime to be handled, and the bit coding result that adheres to the different coding passage separately is selected, and corresponding arithmetic encoder is exported in buffering back serial.
Claims (4)
1. the Bit-Plane Encoding method based on fork-shaped coding path that is used for image compression is characterized in that the coding path of following fork-shaped when it carries out conspicuousness propagation ducts SPP and removes channel C LP coding; By two coding windows based on fork-shaped coding path, the Bit-Plane Encoding of finishing 16 bits of streamline in single clock, and then further finish the Bit-Plane Encoding of whole band, whole bit plane according to the order of raster scan.
2. the Bit-Plane Encoding method that is used for image compression as claimed in claim 1 based on fork-shaped coding path, it is characterized in that described conspicuousness propagation ducts follows fork-shaped coding path, be meant when judging whether current bit belongs to the conspicuousness propagation ducts whether will judge bit and face territory conspicuousness state s is 1; The territory conspicuousness of facing of four bits is contributed available formula 1 statement in the same row:
In the formula 1, "+" represents XOR;
Be the bit amplitude of the capable n row of m in the l band,
With
Be respectively the preceding conspicuousness state of this bit renewal, the conspicuousness state after the renewal, face territory conspicuousness contribution, context and code value; M, n and l are natural numbers; The conspicuousness state of bit more new formula is:
In the formula 2, " " representative and computing;
The standard bit plane coding method should be according to from left to right the judgement n row from top to bottom of raster order serial
With
After, just can adjudicate n+1 row
With
But finish
With
Judgement after,
With
Through type (2) is updated to
With
Promptly
Judgment condition satisfied, can with
The judgement executed in parallel; In like manner,
With
Also can parallel judgment;
When encoding, adopt Zero-code and symbolic coding for the bit in the conspicuousness passage; The Zero-code context calculates available formula 3 expressions, and the symbolic coding context calculates available formula 4 expressions:
When calculating the Zero-code context, try to achieve according to formula 3
With
After, in like manner
With
Also be updated to by formula 2
With
Promptly further calculate
With
Condition satisfy simultaneously; Afterwards
With
Also like this; Symbolic coding is tried to achieve according to formula 4
With
After,
Be updated to by formula 2
Promptly can calculate simultaneously
With
Afterwards
With
Also like this.That is to say that the bit coding of conspicuousness propagation ducts is all finished along fork-shaped coding path.
3. the Bit-Plane Encoding method that is used for image compression described in claim 1 based on fork-shaped coding path, it is characterized in that described removing passage follows fork-shaped coding path, be meant when judging whether current bit belongs to the removing passage, whether the conspicuousness state s that judges a row bit and face the territory is 1, as formula 5 statements:
If
Be 1, then directly obtain coding result by the heavy look-up method of JPEG2000 Standard of image compression, if
Be 0, carry out Zero-code and symbolic coding; The Zero-code context calculates available formula 3 expressions, and the symbolic coding context calculates available formula 4 expressions; When calculating the Zero-code context, try to achieve according to formula 3
With
After, in like manner
With
Also be updated to by formula 2
With
Promptly further calculate
With
Condition satisfy simultaneously; Afterwards
With
Also like this; Symbolic coding is tried to achieve according to formula 4
With
After,
Be updated to by formula 2
Promptly can calculate simultaneously
With
Afterwards
With
Also like this;
4. the Bit-Plane Encoding method that is used for image compression described in claim 1 based on fork-shaped coding path, it is characterized in that described by two coding windows based on fork-shaped coding path, the Bit-Plane Encoding of finishing 16 bits of streamline in single clock, and then further finish the Bit-Plane Encoding of whole band, whole bit plane according to the order of raster scan, two coding windows refer to realize the SPP window of conspicuousness propagation ducts respectively and realize amplitude refinement and the MRP﹠amp that removes passage simultaneously; The CP window; With 4 * 4 bits in the single band is that elementary cell is operated, and adopts combinational logic to realize coding, makes two windows all can finish operation separately in a clock; During coding, in first clock, read in first 4 * 4 sample point piece, carry out the SPP window, carry out conspicuousness propagation ducts coding; In second clock, read in second 4 * 4 sample point piece, carry out the SPP window, carry out conspicuousness propagation ducts coding; First 4 * 4 sample point piece is executed in parallel MRP﹠amp then; The CP window carries out the amplitude thinning process simultaneously and removes channel coding; Because adopted pile line operation, on average each clock can be finished the Bit-Plane Encoding of 16 sample points, successively 4 * 4 sample point pieces in the band is repeated above operation and finishes the Bit-Plane Encoding of whole band, and then finish whole bit plane.
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CN113691362A (en) * | 2021-09-07 | 2021-11-23 | 西南大学 | Bit plane image compression encryption algorithm based on hyperchaotic system and DNA coding |
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CN113691362A (en) * | 2021-09-07 | 2021-11-23 | 西南大学 | Bit plane image compression encryption algorithm based on hyperchaotic system and DNA coding |
CN113691362B (en) * | 2021-09-07 | 2023-05-16 | 西南大学 | Bit plane image compression encryption method based on hyperchaotic system and DNA coding |
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