CN102420989B - Intra-frame prediction method and device - Google Patents

Abstract

The invention discloses an intra-frame prediction method and device. The intra-frame prediction method comprises the following steps of: carrying out mode prediction on a 16*16 macro block input to an intra-frame prediction buffer area according to the regulated 4*4 subblock prediction order to obtain a prediction value under each mode, calculating an SAD (Sum of Absolute Differences) value under each prediction mode, selecting a mode with minimum SAD value as an optimal prediction mode of 16 subblocks to obtain an optical prediction mode of the 16 subblocks and a Sun_SAD4 of the SADs of the macro block under the optimal prediction mode of the corresponding subblocks; obtaining the optimal 16*16 prediction mode and the macro block SAD16 under the corresponding optimal mode; and finally comparing the Sum_SAD4 value with the SAD16 value, determining a prediction mode adopted by the macro block, and after the prediction is completed, sending the optical prediction mode and a prediction residual error to a subsequent processing module. According to the invention, reestablishment waiting time in the prediction process is reduced, and intra-frame prediction in a high-resolution video compression process can be processed in real time.

Description

Intra-frame prediction method and device

Technical field

The present invention relates to a kind of infra-prediction techniques, particularly a kind of intra-frame prediction method and device.

Background technology

H.264/AVC the video encoding standard of new generation that the joint video team being comprised of ISO/IEC and ITU-T (JVT) is formulated.H.264/AVC standard and MPEG-4 standard, H.263++ the coded system of standard regulation is compared, and has more outstanding PSNR performance.H.264/AVC PSNR(Y-PSNR) than the average high 2dB of MPEG-4, than average high 3dB H.263++.Under identical reconstructed image quality, the data volume after H.264/AVC encoding compares H.263++ and MPEG-4 (SP) at least reduces 60%.Under identical reconstructed image quality, H.264/AVC the data after coding are stronger to the adaptability of channel delay.H.264/AVC standard both can be applicable to low time delay pattern (as video conferencing) to meet real time business, can work in again the occasion (as video storage) without time delay restriction.Compare former video encoding standard, H.264/AVC standard has been introduced the advanced technology of inter prediction technology etc. of estimation, multi-reference frame and the multiple block size of the infra-frame prediction that comprises in 4 * 4 integer transforms, spatial domain, 1/4 pixel precision.Quoting of new technology brought higher code efficiency, but greatly improved the complexity of algorithm simultaneously.

Infra-frame prediction is as one of key technology of standard H.264, it has very high complexity, each macro block will carry out 9 kind of 4 * 4 model prediction and 4 kind of 16 * 16 prediction, for high-definition picture, its amount of calculation is huge, to process the image of a frame 1920 * 1080, just need to carry out several hundred million time add subtract computing, need in addition a large amount of memory access operation.

At present more and more higher to the requirement of image compression system in military applications, as multiway images compression and transmission, the bottleneck of traditional infra-frame prediction implementation method based on software aspect processing speed also progressively highlights, research can hard-wired real-time intra-frame prediction method becomes the important component part of Development Engineering with device, is also one of the core component of realizing the SoC chip of HD video compressing and coding system future.

In prior art, H.264 intraframe prediction algorithm is having description in standard, but there is no unified requirement for how to realize, often according to concrete application requirements to standard H.264 do corresponding delete or change after, then realize.

Find by prior art documents that application number is 201010231760.5, name is called the Chinese patent of " a kind of quick 4 * 4 block selection method of intra-frame prediction mode ", this patent proposes 4 * 4 sub-blocks first to carry out seven edge direction coefficient calculations, according to fringing coefficient, image block is divided into nine kinds of edge pattern again and predicts, selection rate distortion cost is adjudicated optimal mode.The Chinese patent that application number is 200910100537.4, name is called " method and apparatus of infra-frame prediction " proposes in prediction process, select in advance the not execution predictive mode that reference pixel has been rebuild to carry out prediction processing, reduce the stand-by period, improved infra-frame prediction efficiency.

In prior art, there is following defect: adopt rate distortion costs function to be unfavorable for that the flowing water of hardware realizes, every kind of model prediction such as all needs to be reconstructed the completing substantially; Although the Chinese patent that application number is 200910100537.4 can effectively reduce the stand-by period, its control procedure is complicated, is unfavorable for hardware realization.

Summary of the invention

Technical problem to be solved by this invention is to provide a kind of intra-frame prediction method and device, and it reduces in forecasting process rebuilds the stand-by period, and processing sequence is consistent, is convenient to hardware and realizes, and can process in real time the infra-frame prediction in high-resolution video compression process.

For solveing the technical problem, the invention provides a kind of intra-frame prediction method, intra-frame prediction method comprises the following steps: to being input to 16 * 16 macro blocks of infra-frame prediction buffering area, first according to 4 * 4 sub-block prediction order after adjusting, carry out model prediction, obtain the predicted value under various patterns, again according to SAD interpretational criteria, calculate the sad value under each predictive mode, choose the pattern of sad value minimum as the optimum prediction mode of 16 sub-blocks, handle after 16 sub-blocks, the optimum prediction mode of 16 sub-blocks and the macro block SAD sum Sum_SAD4 under corresponding sub-block optimum prediction mode have been obtained, then carry out 16 * 16 predictive mode predictions, obtain the macro block SAD16 under best 16 * 16 predictive modes and corresponding optimal mode, finally compare Sum_SAD4 value and SAD16 value, determine the predictive mode that macro block should adopt, after prediction, will obtain optimum prediction mode and prediction residual and deliver to subsequent treatment module.

Preferably, described Sum_SAD4 value is less than SAD16 value, and macro block adopts 4 * 4 predictive modes, if Sum_SAD4 value is greater than SAD16 value, adopts 16 * 16 predictive modes.

Preferably, described intra-frame prediction method adopts SAD criterion as optimal mode evaluation criterion, for 4 * 4 predictive modes, adopts SAD4, specifically suc as formula (1):

$\mathrm{SAD}4=\underset{i=0}{\overset{i=3}{\mathrm{\Σ}}}\underset{j=0}{\overset{j=3}{\mathrm{\Σ}}}|\mathrm{Psrc}(i,j)-\mathrm{Ppre}(i,j)|$ Formula (1)

For 16 * 16 predictive modes, adopt SAD16, specifically suc as formula (2):

$\mathrm{SAD}16=\underset{i=0}{\overset{i=15}{\mathrm{\Σ}}}\underset{j=0}{\overset{j=15}{\mathrm{\Σ}}}|\mathrm{Psrc}(i,j)-\mathrm{Ppre}(i,j)|$ Formula (2)

In formula (1) and formula (2), Psrc represents source pixel, and Ppre represents predict pixel, | x| represents to ask absolute value.

The present invention also provides a kind of infra-frame prediction device, it comprises control module, predictor computation module, mode adjudging module, order mapping block, residual error output module, control module is carried out infra-frame prediction control according to the sub-block processing order after adjusting to macro block, and controls the water operation of other modules; Mode adjudging module completes the accumulation calculating of sad value, and judgement optimum prediction mode adopts parallel organization to realize the calculating of SAD, the result of calculating according to SAD is carried out the SAD judgement of macro block, upgrades optimal mode register and best sad value, and the predictive mode of conclusive judgement macro block employing; Order mapping block is realized the mapping of sub-block memory address and is processed; Residual error output module completes the output of residual error parameter after prediction completes; Predictor computation module realizes the calculating of pixel predictors under various predictive modes, and described sub-block processing order is for to be treated to non-zigzag from " Z " font, and sub-block label order from left to right, more from top to bottom, is followed successively by Isosorbide-5-Nitrae, 5,2,3,6,7,8,9,12,13,10,11,14,15, be treated as sub-block label order from left to right, more from top to bottom, be followed successively by 1,5,9,2,4,8,12,3,7,11,14,6,10,13,15.

Preferably, described predictor computation module comprises data distributor, control unit, the first processing unit to the 16 processing units, the first predicted value buffering area, the second predicted value buffering area, data distributor, the first processing unit to the 16 processing units, the first predicted value buffering area, the second predicted value buffering area are connected with control unit, and the first processing unit to the 16 processing units are connected between data distributor and the first predicted value buffering area, the second predicted value buffering area.

Positive progressive effect of the present invention is: the present invention reduces in forecasting process and rebuilds the stand-by period, and processing sequence is consistent, is convenient to hardware and realizes, and can process in real time the infra-frame prediction in high-resolution video compression process.In addition, the present invention improves infra-frame prediction efficiency, is easy to hardware and realizes, and also can be embedded in chip.

Accompanying drawing explanation

Fig. 1 is the exemplary flow schematic diagram of infra-frame prediction optimization method in the embodiment of the present invention.

Fig. 2 is that the sub-block prediction order of infra-frame prediction optimization method in the embodiment of the present invention is adjusted schematic diagram.

Fig. 3 is 4 * 4 sub-block prediction pattern diagram.

Fig. 4 is the structured flowchart of infra-frame prediction device in the embodiment of the present invention.

Fig. 5 is the structured flowchart of predictor computation module in infra-frame prediction device in the embodiment of the present invention.

Embodiment

Lift a preferred embodiment below, and carry out by reference to the accompanying drawings the clearer the present invention that intactly illustrates.

Embodiment

As shown in Figure 1, the intra-frame prediction method in the present embodiment comprises the steps and function: sub-block prediction order is adjusted; Brightness 4 * 4 model predictions; Brightness 16 model predictions; Colourity 8 * 8 model predictions; Mode adjudging; Rebuild macro block.

This intra-frame prediction method specifically comprises the steps: first according to 4 * 4 sub-block prediction order after adjusting, to carry out model prediction to being input to 16 * 16 macro blocks of infra-frame prediction buffering area, obtain the predicted value under various patterns, again according to the absolute error of SAD(prediction piece and source images with, Sum of Absolute Differences) interpretational criteria, calculate the sad value under each predictive mode, choose the pattern of sad value minimum as the optimum prediction mode of 4 * 4 sub-blocks (16 sub-blocks), handle after 16 sub-blocks, the optimum prediction mode of 16 sub-blocks and the macro block SAD sum Sum_SAD4 under corresponding sub-block optimum prediction mode have been obtained, then carry out 16 * 16 predictive mode predictions, obtain the macro block SAD16 under best 16 * 16 predictive modes and corresponding optimal mode, finally compare Sum_SAD4 value and SAD16 value, determine the predictive mode that macro block should adopt, if specifically Sum_SAD4 value is less than SAD16 value, macro block adopts 4 * 4 predictive modes, if Sum_SAD4 value is greater than SAD16 value, adopts 16 * 16 predictive modes, after prediction, will obtain optimum prediction mode and prediction residual and deliver to subsequent treatment module.

Before luminance macroblock is predicted, first the order of sub-block prediction processing is adjusted.Sub-block order before and after adjusting as shown in Figure 2.Fig. 2 the first half, for the sub-block processing sequence before adjusting, the sub-block label in figure is sequentially the order that sub-block prediction is processed, is Z " font order (sub-block label order from left to right, more from top to bottom, be followed successively by Isosorbide-5-Nitrae, 5; 2,3,6,7,8,9; 12,13,10,11,14,15).Fig. 2 the latter half is the sub-block processing sequence after adjusting, and is non-" Z " font (sub-block label order from left to right, more from top to bottom, be followed successively by 1,5,9,2,4,8,12,3,7,11,14,6,10,13,15).From Fig. 2, in the figure of the latter half, can find out, after sub-block order is processed, originally need to when prediction, wait for that prediction sub-block 5,7,9,11,13 sub-blocks that just can carry out prediction and calculation after its left side sub-block has been rebuild no longer needed to wait for, and it is to be reconstructed to only have sub-block 1,3,15 to wait.Thereby greatly improved the efficiency of prediction processing.Then luminance macroblock is predicted, according to the sub-block prediction order after adjusting, first carry out 4 * 4 sub-block model predictions, by Least-cost (adopting SAD) principle, from seven kinds of patterns (mode 3 and mode 7 are not done, and see Fig. 3), find the best 4 * 4 patterns of each sub-block in macro block; And then the macro block (mb) type using macro block as 16 * 16, by Least-cost principle, from four kinds of predictive modes, find out 16 * 16 best patterns; The cost value of the optimum prediction mode that finally relatively two kinds of macro block (mb) types are corresponding, the macro block (mb) type of selecting Least-cost is the type of coding of current macro the most, and the intraframe predictive coding pattern using corresponding optimum prediction mode as macro block.

The present invention adopts SAD criterion as optimal mode evaluation criterion, for 4 * 4 predictive modes, adopts SAD4, specifically suc as formula (1):

$\mathrm{SAD}4=\underset{i=0}{\overset{i=3}{\mathrm{\Σ}}}\underset{j=0}{\overset{j=3}{\mathrm{\Σ}}}|\mathrm{Psrc}(i,j)-\mathrm{Ppre}(i,j)|$ Formula (1)

For 16 * 16 predictive modes, adopt SAD16, specifically suc as formula (2):

$\mathrm{SAD}16=\underset{i=0}{\overset{i=15}{\mathrm{\Σ}}}\underset{j=0}{\overset{j=15}{\mathrm{\Σ}}}|\mathrm{Psrc}(i,j)-\mathrm{Ppre}(i,j)|$ Formula (2)

In formula (1) and formula (2), Psrc represents source pixel, and Ppre represents predict pixel, | x| represents to ask absolute value.

For chrominance macroblock, by Least-cost principle, from four kind of 8 * 8 pattern, find out optimum prediction mode.

The concrete prediction steps of the present invention is as follows:

(1) brightness Intra4 * 4 prediction, comprises the following steps:

(1.1) from rebuild macro block, reading 16 left margin pixels puts in left margin register (LeftB_Reg); Put register Intra16_PreMode=0;

(1.2) carry out 0 sub-block pattern 0 prediction, obtain the minimum sad value of predicted value and SAD_Min(, when pattern 0 prediction, the minimum sad value of initialization is the sad value of pattern 0), deposit correspondence position in prediction buffering area A in, put 4x4 predictive mode register in predictive mode register Intra4x4PredMode(frame) [0]=0;

(1.3) carry out pattern 1 prediction, obtain predicted value and the current SAD of SAD_Cur() value, predicted value is temporary in prediction shift register (32bit * 4);

(1.4) compare SAD_Min and SAD_Cur value, if SAD_Min>SAD_Cur, upgrade SAD_Min=SAD_Cur, Intra4x4PredMode[0]=1, and predicted value is shifted out from prediction shift register, write the corresponding sub-block position in prediction buffering area A, replace former predicted value; Otherwise, constant;

(1.5) repeating step (1.3)～(1.4), complete predictive mode 2～8, obtain sub-block 0 optimum prediction mode and predicted value;

(1.6) output sub-block 0 residual sum predictive mode Intra4x4PredMode[0] to the conversion of DCT(discrete cosine limit) module;

(1.7) residual values of wait IDCT(inverse discrete cosine transformation) returning, rebuild sub-block 0, deposit in and rebuild macro block correspondence position, the right margin pixel of sub-block 0 is deposited in bounds register (Temp_LeftB1_Reg (32bits)), during standby sub-block 1 prediction, use;

(1.8) repeating step (1.2)～(1.6), complete the prediction of sub-block 1;

(1.9) repeating step (1.2)～(1.8), complete prediction and the reconstruction of sub-block 2～15, obtain SAD4x4 and.

(2) brightness 16 * 16 model predictions, comprise the following steps:

(2.1) carry out the prediction of 16x16 pattern 0, the continuous and SAD4x4 comparison by the value of SAD16, if SAD16>SAD4x4, the prediction of stop mode 0, otherwise complete the prediction of pattern 0, and predicted value is deposited in prediction buffering area B, Intra16_PreMode is set to 1;

(2.2) carry out the prediction of 16x16 pattern 1, if Intra16_PreMode=1 deposits the predicted value of pattern 1 in prediction buffering area A, otherwise in PreMB_B, with best sad value comparison, stops this model prediction as being greater than in forecasting process;

(2.3) repeating step (2.2), completes the prediction of mode 3～4, obtains Intra16_PreMode and predicted value;

(2.4) if Intra16_PreMode=1, the final macro block in surface adopts Intra16x16 pattern, enters step (2.5), otherwise adopts Intra4x4 pattern, enters step (2.6); Send Ready signal, show that MB has predicted.

(2.5) export successively sub-block residual error to DCT module, wait for that IDCT returns to residual error and rebuilds macro block, write in reconstruction buffer district, upgrade upper line buffer (Up Line Buffer) the correspondence position boundary value of coboundary row buffer;

(2.6) enter the prediction of colourity Intra8 * 8.

(3) colourity Intra8 * 8 prediction, comprises the following steps:

(3.1) carry out 0 prediction of chrominance C r macro block mode, predicted value is deposited in prediction buffering area A, SAD is deposited in SAD16, optimal mode register is set to 0;

(3.2) carry out the prediction of pattern 1, predicted value is deposited in prediction buffering area B, if the SAD of pattern 1 is greater than the SAD of pattern 0, the prediction of stop mode 1, is 1 and the value of SAD otherwise upgrade optimal mode register value;

(3.3) repeating step (3.1)～(3.2) complete the prediction of pattern 2,3, draw optimum prediction mode and predicted value;

(3.4) export successively sub-block residual error to DCT module, wait for that IDCT returns to residual error and rebuilds chrominance macroblock, write in reconstruction, upgrade coboundary row buffer (Up Line Buffer) corresponding sides dividing value.

As shown in Figure 4, infra-frame prediction device comprises control module, predictor computation module, mode adjudging module, order mapping block, residual error output module, current macro buffering area, rebuilds macro block buffer, optimal mode buffering area etc.

Wherein, current macro buffering area is for depositing the macro block pixels data when pre-treatment; Rebuild macro block buffer for depositing the macro block pixels data after reconstruction; Optimal mode buffering area is used for depositing best predictive mode; Control module completes control and the data dispatch of whole device and processes, and according to the sub-block processing order after adjusting, macro block is carried out to infra-frame prediction control, and controls the water operation of other modules; Mode adjudging module completes the accumulation calculating of sad value, and judgement optimum prediction mode adopts parallel organization to realize the calculating of SAD, the result of calculating according to SAD is carried out the SAD judgement of macro block, upgrades optimal mode register and best sad value, and the predictive mode of conclusive judgement macro block employing; Order mapping block is realized the mapping of sub-block memory address and is processed, and realizes the correct access visit of sub-block data; Residual error output module completes the output of residual error parameter after prediction completes.Predictor computation module realizes the calculating of pixel predictors under various predictive modes, this module is the nucleus module of infra-frame prediction device, its structure as shown in Figure 5, predictor computation module comprises data distributor, control unit, the first processing unit to the 16 processing units, the first predicted value buffering area A, the second predicted value buffering area B, data distributor, the first processing unit to the 16 processing units, the first predicted value buffering area A, the second predicted value buffering area B is connected with control unit, the first processing unit to the 16 processing units are connected to data distributor and the first predicted value buffering area A, between the second predicted value buffering area B.In figure, data distributor will calculate six processing units of data allocations to ten that need use according to predictive mode, pixel of each processing unit alignment processing, control unit control forecasting value specifically stores the first predicted value buffering area A or the second predicted value buffering area B into, and the address that produces the first predicted value buffering area A or the second predicted value buffering area B storage is processed in output.In predictor computation module, adopted parallel and flowing structure, can within a clock cycle, complete the predictor calculation of a sub-block, can process in real time the infra-frame prediction of high-definition picture.

Although more than described the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, do not deviating under the prerequisite of principle of the present invention and essence, can make various changes or modifications to these execution modes.Therefore, protection scope of the present invention is limited by appended claims.

Claims (4)

1. an intra-frame prediction method, it is characterized in that, intra-frame prediction method comprises the following steps: first the sub-block prediction order being input in 16 * 16 macro blocks of infra-frame prediction buffering area is treated to non-zigzag from " Z " font, be sub-block label order from left to right, again from top to bottom, be followed successively by 1, 4, 5, 2, 3, 6, 7, 8, 9, 12, 13, 10, 11, 14, 15, be treated as sub-block label order from left to right, again from top to bottom, be followed successively by 1, 5, 9, 2, 4, 8, 12, 3, 7, 11, 14, 6, 10, 13, 15, secondly 16 * 16 macro blocks that are input to infra-frame prediction buffering area are carried out to model prediction according to 4 * 4 sub-block prediction order after adjusting, obtain the predicted value under various patterns, again according to SAD interpretational criteria, calculate the sad value under each predictive mode, choose the pattern of sad value minimum as the optimum prediction mode of 16 sub-blocks, handle after 16 sub-blocks, the optimum prediction mode of 16 sub-blocks and the macro block SAD sum Sum_SAD4 under corresponding sub-block optimum prediction mode have been obtained, then carry out 16 * 16 predictive mode predictions, obtain the macro block SAD16 under best 16 * 16 predictive modes and corresponding optimal mode, finally compare Sum_SAD4 value and SAD16 value, determine the predictive mode that macro block should adopt, after prediction, will obtain optimum prediction mode and prediction residual and deliver to subsequent treatment module.

2. intra-frame prediction method as claimed in claim 1, is characterized in that, described Sum_SAD4 value is less than SAD16 value, and macro block adopts 4 * 4 predictive modes, if Sum_SAD4 value is greater than SAD16 value, adopts 16 * 16 predictive modes.

3. an infra-frame prediction device, it is characterized in that, it comprises control module, predictor computation module, mode adjudging module, order mapping block, residual error output module, control module is carried out infra-frame prediction control according to the sub-block processing order after adjusting to macro block, and controls the water operation of other modules; Mode adjudging module completes the accumulation calculating of sad value, and judgement optimum prediction mode adopts parallel organization to realize the calculating of SAD, the result of calculating according to SAD is carried out the SAD judgement of macro block, upgrades optimal mode register and best sad value, and the predictive mode of conclusive judgement macro block employing; Order mapping block is realized the mapping of sub-block memory address and is processed; Residual error output module completes the output of residual error parameter after prediction completes; Predictor computation module realizes the calculating of pixel predictors under various predictive modes, and described sub-block processing order is for to be treated to non-zigzag from " Z " font, and sub-block label order from left to right, more from top to bottom, is followed successively by Isosorbide-5-Nitrae, 5,2,3,6,7,8,9,12,13,10,11,14,15, be treated as sub-block label order from left to right, more from top to bottom, be followed successively by 1,5,9,2,4,8,12,3,7,11,14,6,10,13,15.

4. infra-frame prediction device as claimed in claim 3, it is characterized in that, described predictor computation module comprises data distributor, control unit, the first processing unit to the 16 processing units, the first predicted value buffering area, the second predicted value buffering area, data distributor, the first processing unit to the 16 processing units, the first predicted value buffering area, the second predicted value buffering area are connected with control unit, and the first processing unit to the 16 processing units are connected between data distributor and the first predicted value buffering area, the second predicted value buffering area.

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