CN102222754A - LED (light-emitting diode) chip packaging structure and packaging method thereof - Google Patents

LED (light-emitting diode) chip packaging structure and packaging method thereof Download PDF

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Publication number
CN102222754A
CN102222754A CN 201010154758 CN201010154758A CN102222754A CN 102222754 A CN102222754 A CN 102222754A CN 201010154758 CN201010154758 CN 201010154758 CN 201010154758 A CN201010154758 A CN 201010154758A CN 102222754 A CN102222754 A CN 102222754A
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China
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type
type thermoelectric
conductive film
semiconductor substrate
led chip
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CN 201010154758
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CN102222754B (en
Inventor
三重野文健
郭景宗
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Abstract

The invention provides an LED (light-emitting diode) chip packaging structure and a packaging method thereof. The LED chip packaging method comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate is provided with a first surface and a second surface opposite to the first surface; forming a conductive film on the first surface of the semiconductor substrate; forming a radiating component on the surface of the conductive film, wherein the radiating component comprises a p-type thermoelectric structure, an n-type thermoelectric structure and an isolated layer which is adjacent to the p-type thermoelectric structure and the n-type thermoelectric structure and arranged between the p-type thermoelectric structure and the n-type thermoelectric structure; and forming an opening which is exposed out of the conductive film in the semiconductor substrate along the second surface of the semiconductor substrate, wherein the opening is used for accommodating an LED unit. The LED chip packaging method is compatible with a semiconductor technology.

Description

Led chip encapsulating structure and method for packing thereof
Technical field
The present invention relates to field of photoelectric technology, particularly led chip encapsulating structure and method for packing thereof.
Background technology
(Light Emitting Diode is a kind of solid-state semiconductor device that electric energy can be converted into visible light LED) to light-emitting diode, and it can directly be converted into light signal to the signal of telecommunication.
Light-emitting diode mainly is made up of two parts, one end of light-emitting diode is the p N-type semiconductor N, be the p district, is main charge carrier at the p N-type semiconductor N with the hole, the other end is the n N-type semiconductor N, is the n district, is main charge carrier at N type semiconductor with electronics, when these two kinds of semiconductors are coupled together, just form one " p-n junction " between them.When electric current acted on this light-emitting diode by lead, electronics will flow to the p district from the n district, with hole-recombination, sent energy with the form of photon, the luminous principle of LED that Here it is in the p district.And the luminous color of LED is to be determined by the material that forms p-n junction.
The light source little power consumption of the led chip that is made of LED, the life-span is long and do not contain Toxic matter, makes LED be widely used, and for example is applied in backlight, display screen, auto lamp and various Landscape Lightings place.
But led chip is encapsulated into present challenging research focus, led chip encapsulation key issue is heat radiation and combines with integrated circuit, in application number is the Chinese patent of 200810002321.X, provide a kind of led chip encapsulation, please refer to Fig. 1, comprising: led chip 21; Package body 22; The first lead frame 23a and the second lead frame 23b; Be formed on the sealer 24 of the depressed part of package body 22.
The encapsulation of existing led chip all can't be directly dispelled the heat to the led chip of chip-scale, need the extra element that connects heat radiation, for example fan or radiating copper sheet are sticked to the led chip surface, perhaps adopt extra line to connect the heat radiation source electrode, above-mentioned heat dissipation element all can't be integrated with chip technology.
Summary of the invention
The invention provides a kind of and integrated led chip encapsulating structure and the method for packing thereof of chip technology.
For addressing the above problem, the invention provides a kind of led chip method for packing: Semiconductor substrate is provided, described Semiconductor substrate have first surface and with the first surface opposing second surface; First surface in described Semiconductor substrate forms conductive film; Form heat dissipation element on the surface of described conductive film, described heat dissipation element comprises p type thermoelectric structure, n type thermoelectric structure, and p type thermoelectric structure is adjacent with n type thermoelectric structure and the separator between p type thermoelectric structure and n type thermoelectric structure; Second surface along described Semiconductor substrate forms the opening that exposes conductive film in described Semiconductor substrate, described opening is used to hold the LED unit.
The present invention also provides a kind of led chip encapsulating structure, comprising: Semiconductor substrate, described Semiconductor substrate have first surface and with the first surface opposing second surface; Be formed on the conductive film of Semiconductor substrate first surface; Be formed on the heat dissipation element on conductive film surface, described heat dissipation element comprises p type thermoelectric structure, n type thermoelectric structure, and p type thermoelectric structure is adjacent with n type thermoelectric structure and the separator between p type thermoelectric structure and n type thermoelectric structure; Opening, described opening exposes conductive film along the second surface of described Semiconductor substrate, and described opening is used to hold the LED unit.
Compared with prior art, the present invention has the following advantages: heat dissipation element is formed directly into the led chip back side, can combine with chip technology, avoids extra line and extra method of attachment, and led chip encapsulating structure radiating efficiency height provided by the invention.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing, focus on illustrating purport of the present invention by actual size equal proportion convergent-divergent.
Fig. 1 is existing led chip encapsulating structure;
Fig. 2 is a led chip method for packing flow chart provided by the invention;
Fig. 3 to Fig. 7 is a led chip method for packing process schematic diagram provided by the invention.
Embodiment
By background technology as can be known, existing led chip encapsulating structure all can't be directly dispels the heat to the led chip of chip-scale, need the extra element that connects heat radiation, connecting heat dissipation element can't be integrated with chip technology, heat dissipation element needs extra adhesion method of attachment or extra line, increases the led chip encapsulation difficulty.
To this, the present inventor provides the led chip encapsulating structure of optimization through a large amount of experiments, and heat dissipation element is formed directly into the led chip back side, can combine with chip technology, avoids extra line and extra method of attachment.
Followingly describe specific embodiment in detail according to accompanying drawing, above-mentioned purpose and advantage of the present invention will be clearer.
The present inventor also proposes a kind of led chip method for packing, and its idiographic flow please refer to shown in Figure 2, comprising:
Step S101 provides Semiconductor substrate, described Semiconductor substrate have first surface and with the first surface opposing second surface;
Step S102 is at the first surface formation conductive film of described Semiconductor substrate;
Step S103 forms heat dissipation element on the surface of described conductive film, described heat dissipation element comprises p type thermoelectric structure, n type thermoelectric structure, and p type thermoelectric structure is adjacent with n type thermoelectric structure and the separator between p type thermoelectric structure and n type thermoelectric structure;
Step S104 forms the opening that exposes conductive film along the second surface of described Semiconductor substrate in described Semiconductor substrate, described opening is used to hold the LED unit.
With reference to the accompanying drawings, above-mentioned led chip method for packing is elaborated.
At first with reference to Fig. 3, described Semiconductor substrate 200 is a silicon-based substrate, for example is n type silicon substrate or p type silicon substrate.Described Semiconductor substrate 200 shapes are preferably discoid, the based semiconductor industrywide standard, and the diameter of Semiconductor substrate 200 can be 450 millimeters, 300 millimeters, 200 millimeters.Described Semiconductor substrate 200 has upper surface and lower surface, particularly, the upper surface of described Semiconductor substrate 200 is the aufwuchsplate of semiconductor device, the lower surface of Semiconductor substrate 200 is the base face relative with aufwuchsplate, the upper surface of described semiconductor 200 is defined as first surface I, and the lower surface of described semiconductor 200 is defined as second surface II.
With reference to figure 4, form conductive film 210 at the first surface I of described Semiconductor substrate 200.
The formation technology of described conductive film is physical vapour deposition (PVD) or chemical vapour deposition (CVD), and described conductive film 210 materials are Ti, Ta, W, Cu, polysilicon or doped polycrystalline silicon, and described conductive film 210 can be single coating or multiple-level stack structure.
When described conductive film 210 materials were polysilicon or doped polycrystalline silicon, described conductive film 210 can be single coating, to save processing step.
When conductive film 210 materials are metal, for prevent that metal from spreading in Semiconductor substrate 200, conductive film can be the multiple-level stack structure, before forming conductive metal film, can also form one deck resilient coating earlier at the first surface I of Semiconductor substrate 200, described cushioning layer material is TiN, TaN or WSi, at this moment the electron mobility height of conductive film.
Described conductive film 210 is used to be electrically connected p type thermoelectric structure, the n type thermoelectric structure of follow-up formation, etching barrier layer when described conductive film 210 can also be as the subsequent etching opening, savings forms the processing step of etching barrier layer outward, and the electron mobility height of conductive film, can improve the radiating efficiency of the encapsulating structure of follow-up formation, further, when conductive film 210 materials are metal, the heat conductivity height of metal, better heat-radiation effect.
With reference to figure 5, form heat dissipation elements on described conductive film 210 surfaces, described heat dissipation element comprises p type thermoelectric structure 211, n type thermoelectric structure 212, and p type thermoelectric structure 211 and n type the thermoelectric structure 212 adjacent and separators 213 between p type thermoelectric structure 211 and n type thermoelectric structure 212.
Described p type thermoelectric structure 211 materials can be p type SiGe, p type Si, p type B4C or p type B9C, and described n type thermoelectric structure 212 materials can be n type Si or n type SiGe, described separator 213 materials are aluminium oxide, silica or silicon nitride.
Be p type SiGe with p type thermoelectric structure 211 materials below, n type thermoelectric structure 212 materials are n type SiGe, and insolated layer materials is that aluminium oxide is an example, does exemplary illustrated.
At first, adopt chemical vapor deposition method to form aluminum oxide film (not shown) on described conductive film 210 surfaces.
Then, form the photoresist figure (not shown) corresponding on described isolated film surface with described p type SiGe layer 211; With described photoresist figure is mask, removes isolated film, until exposing described conductive film 210 surfaces; Exposing described conductive film 210 surfaces at the photoresist figure adopts chemical vapour deposition (CVD) to form p type SiGe layer; Remove the photoresist figure.
It needs to be noted that when removing the photoresist figure, the p type SiGe film that is formed on the photoresist patterned surface also can be removed simultaneously, and p type SiGe layer 211 is retained.
Subsequently, at the corresponding photoresist figure (not shown) of described isolated film surface and the 211 surface formation of p type SiGe layer and described n type SiGe layer 212; With described photoresist figure is mask, removes isolated film, until exposing described conductive film 210 surfaces, forms separator 213; Expose described SiGe superlattice film 210 surfaces at the photoresist figure and form n type SiGe layer 212; Remove the photoresist figure.
The concrete formation technology of described n type SiGe layer 212 can here repeat no more with reference to the formation technology of p type SiGe layer 211.
It needs to be noted, in other embodiments, also can form n type SiGe layer 212 earlier, form p type SiGe layer 211 again, form separator 213 at last with reference to present embodiment; Perhaps form p type SiGe layer 211 earlier, form n type SiGe layer 212 again, form separator 213 at last.
Adopt above-mentioned technology, formation includes p type SiGe layer, n type SiGe layer, and p type SiGe layer is adjacent with n type SiGe layer and the separator between p type SiGe layer and n type SiGe layer, in other embodiments, can also form dielectric layer in p type SiGe layer, n type SiGe layer and insulation surface, in dielectric layer, form conductive plunger then, in heat dissipation element, feed electric current by conductive plunger.
With reference to figure 6, in described Semiconductor substrate 200, form the opening 221 that exposes described conductive film 210 along the second surface II of described Semiconductor substrate 200.
Particularly, form the photoresist figure corresponding at the second surface II of Semiconductor substrate 200 with opening 221; The using plasma etching technics along the described Semiconductor substrate 200 of second surface II etching of described Semiconductor substrate 200, until exposing described conductive film 210, forms opening 221.
Described opening 221 is used to the luminous efficiency protecting the LED unit and avoid influencing the LED unit that is formed on opening 221 bottoms.
With reference to figure 7, form LED unit 220 in the bottom of described opening 221.
Described LED unit 220 adopts existing processes directly to form the bottom that the adhesion material that adopts conduction then sticks to opening 221.
Photoetching, deposition, the etching technics of the complete based semiconductor technology of the method for packing of the encapsulating structure that present embodiment provides with the conventional semiconductor process compatible, do not need extra adhesion method of attachment or extra line, have reduced the led chip encapsulation difficulty.
Encapsulating structure based on above-mentioned method for packing forms please refer to Fig. 7, comprising: Semiconductor substrate 200, described Semiconductor substrate 200 have first surface I and with first surface I opposing second surface II; Be formed on the conductive film 210 of Semiconductor substrate 200 first surface I; Be formed on the heat dissipation element on conductive film 210 surfaces, described heat dissipation element comprises p type thermoelectric structure 211, n type thermoelectric structure 212, and p type thermoelectric structure 211 and n type the thermoelectric structure 212 adjacent and separators 213 between p type thermoelectric structure 211 and n type thermoelectric structure 212; Opening 221, described opening 221 exposes conductive film 210 along the second surface II of described Semiconductor substrate 200, and described opening 221 is used to hold the LED unit.
Particularly, described conductive film 210 materials are Ti, Ta, W, Cu, polysilicon or doped polycrystalline silicon, and described conductive film 210 can be single coating or multiple-level stack structure.
When described conductive film 210 materials were polysilicon or doped polycrystalline silicon, described conductive film 210 can be single coating, to reduce the encapsulating structure complexity.
When conductive film 210 materials are metal, for prevent that metal from spreading in Semiconductor substrate 200, conductive film can be the multiple-level stack structure, between the first surface I that forms conductive metal film and Semiconductor substrate 200, be formed with resilient coating, described cushioning layer material is TiN, TaN or WSi, the conductive film electron mobility height of metal.
Particularly, described p type thermoelectric structure 211 materials can be p type SiGe, p type Si, p type B4C or p type B9C, and described n type thermoelectric structure 212 materials can be n type Si or n type SiGe, described separator 213 materials are aluminium oxide, silica or silicon nitride.
Encapsulating structure below in conjunction with present embodiment, simply introduce the operation principle of encapsulating structure: apply one and flow to the electric current of p type film 211 from n type film 212, according to peltier effect, applying direct current at two different storerooms fails to be convened for lack of a quorum and makes heat be absorbed in the junction of these two kinds of materials, can absorb heat in the conductive metal film position so, the LED unit that is formed on superlattice film 210 tops is lowered the temperature.
Described encapsulating structure also comprises the cover layer that is formed on n type film 212 or p type SiGe layer, the metal plug that formation runs through described cover layer and is electrically connected with n type film 212 or p type SiGe layer, the described electric current that applies can feed electric current realization to described metal plug.
The invention provides a kind of led chip encapsulating structure and method for packing thereof, the wherein method for packing of led chip and semiconductor technology compatibility, adopting the present invention to form the led chip encapsulating structure does not need the element of extra extra connection heat radiation just can cool off led chip, led chip encapsulating structure provided by the invention adopts the high conductive film of electron mobility, and led chip is positioned on the conductive film, and cooling effect is good.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.

Claims (12)

1. a led chip method for packing is characterized in that, comprising:
Semiconductor substrate is provided, described Semiconductor substrate have first surface and with the first surface opposing second surface;
First surface in described Semiconductor substrate forms conductive film;
Form heat dissipation element on the surface of described conductive film, described heat dissipation element comprises p type thermoelectric structure, n type thermoelectric structure, and p type thermoelectric structure is adjacent with n type thermoelectric structure and the separator between p type thermoelectric structure and n type thermoelectric structure;
Second surface along described Semiconductor substrate forms the opening that exposes conductive film in described Semiconductor substrate, described opening is used to hold the LED unit.
2. led chip method for packing as claimed in claim 1 is characterized in that, the formation technology of described conductive film is physical vapour deposition (PVD) or chemical vapour deposition (CVD).
3. led chip method for packing as claimed in claim 1 is characterized in that, described conductive film material is Ti, Ta, W, Cu, polysilicon or doped polycrystalline silicon.
4. led chip method for packing as claimed in claim 1 is characterized in that, described conductive film is single coating or multiple-level stack structure.
5. led chip method for packing as claimed in claim 1 is characterized in that, described p type thermoelectric structure material is p type SiGe, p type Si, p type B 4C or p type B 9C.
6. led chip method for packing as claimed in claim 1 is characterized in that, described n type thermoelectric structure material is n type Si or n type SiGe.
7. led chip method for packing as claimed in claim 1 is characterized in that insolated layer materials is selected from aluminium oxide, silica or silicon nitride.
8. a led chip encapsulating structure is characterized in that, comprising:
Semiconductor substrate, described Semiconductor substrate have first surface and with the first surface opposing second surface;
Be formed on the conductive film of Semiconductor substrate first surface;
Be formed on the heat dissipation element on conductive film surface, described heat dissipation element comprises p type thermoelectric structure, n type thermoelectric structure, and p type thermoelectric structure is adjacent with n type thermoelectric structure and the separator between p type thermoelectric structure and n type thermoelectric structure;
Opening, described opening exposes conductive film along the second surface of described Semiconductor substrate, and described opening is used to hold the LED unit.
9. led chip encapsulating structure as claimed in claim 8 is characterized in that, described conductive film material is Ti, Ta, W, Cu, polysilicon or doped polycrystalline silicon.
10. led chip encapsulating structure as claimed in claim 8 is characterized in that, described p type thermoelectric structure material is p type SiGe, p type Si, p type B 4C or p type B 9C.
11. led chip encapsulating structure as claimed in claim 8 is characterized in that, described n type thermoelectric structure material is n type Si or n type SiGe.
12. led chip encapsulating structure as claimed in claim 8 is characterized in that insolated layer materials is selected from aluminium oxide, silica or silicon nitride.
CN 201010154758 2010-04-14 2010-04-14 LED (light-emitting diode) chip packaging structure and packaging method thereof Active CN102222754B (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201110527Y (en) * 2007-11-09 2008-09-03 孙海城 High power LED light source device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201110527Y (en) * 2007-11-09 2008-09-03 孙海城 High power LED light source device

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