CN102194354B - Modular singlechip experimental development platform and application method thereof - Google Patents

Modular singlechip experimental development platform and application method thereof Download PDF

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Publication number
CN102194354B
CN102194354B CN 201110115408 CN201110115408A CN102194354B CN 102194354 B CN102194354 B CN 102194354B CN 201110115408 CN201110115408 CN 201110115408 CN 201110115408 A CN201110115408 A CN 201110115408A CN 102194354 B CN102194354 B CN 102194354B
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wire
wire jumper
power supply
pin
jumper groove
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CN102194354A (en
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胡建人
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Hangzhou Dianzi University
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Hangzhou Dianzi University
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Abstract

The invention relates to a modular singlechip experimental development platform and an application method thereof. The traditional singlechip teaching instrument has high cost and is disconnected from a mainstream development mode. In the modular singlechip experimental development platform, each pin of an integrated circuit (IC) locking socket corresponds to two double-wire jumper grooves and is connected with one ends of the two double-wire jumper grooves respectively; the other end of one of the two double-line jumper grooves is grounded; the other end of the other double-wire jumper groove is connected with a core wire of a power supply socket; a grounding core in a downloading wire interface is grounded; a power supply core in the downloading wire interface is connected with the core wire of the power supply socket; the two ends of a decoupling capacitor are respectively grounded and connected with the core line of the power supply socket; the anode of a light-emitting diode is connected with the other end of a power supply indication current-limiting resistor; the cathode of the light-emitting diode is grounded; and one end of the power supply indication current-limiting diode is connected with the core line of the power supply interface. The invention provides a basic singlechip circuit structure, and the hardware combination can be changed by inserting different modules and selecting different jumper policies to realize a complicated system from the simplest singlechip system.

Description

One-chip machine modular experiment and development platform and using method thereof
Technical field
The invention belongs to field of computer technology, relate to one-chip machine modular experiment and development platform and using method thereof.
Background technology
The every field that single-chip microcomputer has been deep into life, household electrical appliance and has controlled automatically.Single-chip microcomputer divides 4,8,16,32, adopts 4 single-chip microcomputers as toy, digital clock more; Domestic popular 8 single-chip microcomputers at present as 8051, each Series chip of AVR, PIC, 16 the mixed signal processing single chip as the MSP430 of American TI Company series super low-power consumption, 32 single-chip microcomputer or to be referred to as the application of DSP also increasingly extensive, typical in ARM, become the universal cpu of mobile phone, panel computer etc., even Windows also begins to turn to support ARM chip.Exploitation for convenience and study single-chip microcomputer, design, produced all kinds of microcomputer development devices, all kinds of instruments used for education both at home and abroad, they have made contribution for popularizing the single-chip microcomputer application with knowledge, but each manufacturer's product structure, layout difference, software design style difference, too much set of hardware have 1. increased the complexity of instrument on the single chip computer teaching instrument, make the single chip computer teaching instrument directly perceived inadequately, difficulty is used in study; 2. reduced student's learning efficiency; 3. more seriously, the using method of single chip computer teaching instrument and the development tool of social popularity disconnect, and have greatly increased learner's cost of professional skill migration at work, have improved and have gone into gate threshold, have hindered popularizing of technology; 4. cause the cost of single chip computer teaching instrument too high, be difficult to spread to one of numerous students' staff.
In-system programming ISP(In-System Programming), blank device on the finger circuit board can be programmed and be write final user's code, and do not need from circuit board, to plug repeatedly device, the device of having programmed also can directly be wiped or programming again with the ISP mode, and it has represented the technological development direction of single-chip microcomputer.ISP development technique relatively in the past is simpler, and the storer of single-chip microcomputer inside can be rewritten by serial ports by the software of host computer.Single-chip microcomputer is inner by SPI or other serial line interface, in the data and write store that the reception host computer transmits.Even directly be welded on chip on the circuit board, as long as reserve interface with host computer at circuit board, just can realize the rewriting of singlechip chip internal storage easily, take off the classic method that chip is put into programming program on the special-purpose programmable device again and need not adopt.
The advantage of ISP technology is not need programmable device just can carry out microcomputer development, singlechip chip can be welded direct on the circuit board, debugging finishes namely to become finished product, reach chip and circuit board infringement owing to inserting the inconvenience of taking out chip continually when having removed debugging from, single-chip microcomputer directly is welded on the generation that has reduced loose contact on the circuit board.Present SCM ISP download technology has been popularized, and it is with low cost that ISP downloads line, make simple, the Jia Ge $8.00/ bar that minimum download gauze is purchased, quality is middle-grade download Xian $20.00~30.00/ preferably.The ISP download technology is easy to use, is widely used, and hardware price is cheap, connects simple.Download line as a kind of ISP commonly used, one links to each other with computer parallel port, with downloading the ISP mouth of line 10PIN or 6PIN plug insertion Target Board, powers on to Target Board then.Open ISP and download software, port is selected LPT1, and select target singlechip chip model can operation such as wipe, read to target microcontroller by PC, perhaps the HEX file is write the program storage (Flash ROM) of single-chip microcomputer.EEPROM operation to single-chip microcomputer is similar with the HEX file operation.At present, the ISP download technology uses at multiple singlechip chip, with the connected mode of host computers such as PC parallel port, RS232 serial ports, USB is arranged, etc.Downloading line also has multiple standards, and as by SPI, JTAG waits interface.As AVR studio software and JTAG combination of hardware, can carry out program and download (programming) and program on-line debugging.
Carry out man-machine interaction by PC and demonstration thereof, directly emulation, assemble software, in operations such as the enterprising line program modification of circuit board, downloads, this debugging and upgrading to Single Chip Microcomputer (SCM) program is all very convenient.The circuit that ISP downloads line is very simple, is fit to do it yourself make.AVR, 89S51 single-chip microcomputer can be downloaded line by a general ISP, can utilize the work of third party's freeware in general performance history.The traditional mode of production flow process must be carried out pre-programmed to chip earlier, and by programmable device program is write singlechip chip, and technology is loaded down with trivial details, specialized equipment is expensive, and then installs on the pcb board; The appearance of ISP technology is reduced to first immobilising device to circuit board, programmes with instruments such as JTAG again.The programming mode of downloading line has changed traditional mode in the past, has become the development mode of main flow.
Existing microcomputer development, instruments used for education damage core devices---the singlechip chip of microcomputer development device, single chip computer teaching instrument easily based on manual operation, so the I/O mouth periphery of single-chip microcomputer all adds impact damper or the peripheral chip of 74 series, the protection singlechip chip; In the learning process, the repeated multiple times debugged program, all error feedback, result's indication show by the display module of developing engine or learning machine.The existence of these components and parts and parts has caused the total system complexity, various similar microcomputer development devices, instruments used for education are different software and hardware configuration and interface separately, can form corresponding use habit, these use habits developing instrument in most of and the work again are not close, it is too high to make that the learner learns-form the cost of practical technical ability, the mortality height that the learner is potential.
PC software practicality and the adaptability of IT industry are more and more higher, utilize the PC software emulation, can realize many hardware capabilitys.As, can freely obtain AVR integrated form development environment AVR Studio from Atmel company's site.In recent years, the retail price retail price $3 of some singlechip chips~5/ is more or less the same with the retail price of 74LS middle small scale integrated circuit, but the plate-making expense of pcb board and labour cost, marketing expenses accounting constantly raise.
And some peripheral hardwares show as LCD, and core circuit all adopts the scale programmable logic device design, and the devices at full hardware realization is stable and reliable for performance, good product consistency.Adopt the CPU element of simple parallel bus mode and 51, single-chip microcomputers such as AVR, PIC, DSP, ARM directly to be connected, signal comprises data D0~D7, address A0~A1, sheet choosing/CS, writes/WR, reads/RD; Some LCD shows and adopts serial wiring, only needs Vcc, GND, three lines of RXD, uses very simply, and the developer only need be familiar with the communications protocol of product, does not need to write the driver of bottom, carries out secondary development and gets final product.
Summary of the invention
The deficiency that the present invention is directed to existing single chip computer teaching instrument cost height, disconnect with the main flow development mode, the technical ability after the study is difficult to move to the main flow development mode adopts the download line mode of main flow to form one-chip machine modular experiment and development platform and the using method thereof of downloading line based on the third party in conjunction with third party's freeware.
One-chip machine modular experiment and development platform among the present invention comprises IC locking socket, a plurality of two-wire wire jumper groove, a plurality of wire jumper groove, outlet, download line interface, decoupling capacitor, power supply indication current-limiting resistance and light emitting diode.Corresponding two the two-wire wire jumper grooves of each pin of IC locking socket, this pin is connected with an end of two two-wire wire jumper grooves respectively, the other end ground connection of a two-wire wire jumper groove in two two-wire wire jumper grooves, the heart yearn of another termination outlet of another two-wire wire jumper groove; Download the ground connection core ground connection in the line interface, the heart yearn that the power supply core connects outlet, other data heart yearns of downloading line link to each other with two-wire wire jumper groove one end outside the I/O mouth wire pin of single-chip microcomputer corresponding function title respectively through wire jumper groove, connecting line; The two ends difference ground connection of decoupling capacitor and the heart yearn of outlet; The positive pole of light emitting diode connects the other end of power supply indication current-limiting resistance, the minus earth of light emitting diode, the heart yearn of a termination power socket of power supply indication current-limiting resistance.
The using method of above-mentioned platform is: can adapt to different single-chip microcomputer kinds or realize circuit software and hardware function at the external different circuit module of two-wire wire jumper groove adjunction of the pin of IC locking socket by the external two-wire wire jumper groove wire jumper of pin of adjusting the IC locking socket.
Experiment and development platform of the present invention can adapt to the singlechip chip of various different brands, dissimilar, different pin arrangements order, experiment and development platform provides basic single chip circuit structure, by the different module of pegging graft the wire jumper strategy different with selection, can change hardware combinations, the system of realization from the simplest Single Chip Microcomputer (SCM) system to complexity, realize the experiment and development platform of single-chip microcomputer by the PC software and hardware, be used for the exploitation Single Chip Microcomputer (SCM) system, perhaps carry out various education experiments and programming, the debugging of single-chip microcomputer and train; Can change dissimilar singlechip chips easily, stride study, the exploitation teaching platform of dissimilar single-chip microcomputers by modular implementation.
Description of drawings
Fig. 1 is platform basic framework circuit diagram of the present invention.
Fig. 2 is RST module diagram of the present invention.
Fig. 3 is oscillation module circuit diagram of the present invention.
Fig. 4 is I/O state indicating module circuit diagram of the present invention.
Fig. 5 is VFC module diagram of the present invention.
Fig. 6 specifically implements circuit diagram for a kind of 8051 single-chip microcomputers of the present invention.
Embodiment
Below in conjunction with accompanying drawing the present invention is carried out detailed description.
Basic design of the present invention: the software function by third party's freeware realizes exploitation or learning functionalities such as program debug, error correction, data transmission, demonstration, download at PC; Based on singlechip chip self certain I/O driving force is arranged all, cheap, singlechip chip as the expendable device, is omitted peripheral driver, buffer circuit, directly use single-chip processor i/o mouth line to drive peripheral circuit, and with LED as the I/O positioning indicator; The SCM peripheral hardware circuit moduleization, the wire jumper groove Jx socket by experiment and development platform of the present invention builds out different exploitations, education experiment combination thereof;
Basic framework circuit diagram of the present invention as shown in Figure 1.All pin Pin of IC locking socket S3 connect similar circuit---and process A two-wire wire jumper groove JA and power Vcc foundation contact and B two-wire wire jumper groove JB contacts with ground (GND) foundation, wherein two of two-wire wire jumper groove ports (end and the other end) be separated from each other, mutually insulated on the circuit, but the module that can insert short-circuiting plug or need, constitute network, that is:
Any one x pin Pinx of IC locking socket S3 connects the end of corresponding xA two-wire wire jumper groove JAx and the end of xB two-wire wire jumper groove JBx, another termination power Vcc of xA two-wire wire jumper groove JAx, the other end ground connection (GND) of xB two-wire wire jumper groove JBx;
The end (heart yearn) of outlet S1 connects power Vcc, the other end ground connection of outlet S1; The termination power Vcc of decoupling capacitor C, the other end ground connection of decoupling capacitor C; The termination power Vcc of power supply indication current-limiting resistance R, the positive pole of another termination power indication LED of power supply indication current-limiting resistance R, power supply indication LED minus earth;
The Vcc core of downloading line interface S2 connects power Vcc (end (heart yearn) of outlet S1), download the GND core ground connection of line interface S2, the RST core of downloading line interface S2 meets 4C wire jumper groove JC4, the SL1 core of downloading line interface S2 meets 1C wire jumper groove JC1, the SL2 core of downloading line interface S2 meets 2C wire jumper groove JC2, and the SL3 core of downloading line interface S2 meets 3C wire jumper groove JC3; SLx core wherein is that ISP downloads the universal serial bus that line adopts, and with the interface difference, different titles is arranged in single-chip microcomputer; If ISP downloads the interface line of line employing greater than 3, can increase the SLx core, and increase numbering since the wire jumper groove in kind of 5C wire jumper groove JC5.
During use, the singlechip chip of selecting is inserted in the pin groove of IC locking socket S3 the set lever H of locking IC locking socket S3; According to the heart yearn title principle consistent with corresponding interface microcontroller line title of downloading line interface S2, one end of wire jumper is inserted the 4C wire jumper groove JC4 of the RST core of downloading line interface S2, the other end of x ' the A two-wire wire jumper groove JAx ' that the RST pin Pinx ' of the other end insertion singlechip chip of wire jumper is continuous or the end of x ' B two-wire wire jumper groove JBx ' are connected this pin Pinx '; One end of another wire jumper is inserted the x 〞 C wire jumper groove JCx 〞 that download line interface S2 is numbered SLx 〞 core, the other end insertion singlechip chip of wire jumper has the corresponding function title, is numbered the other end of the continuous xA two-wire wire jumper groove JAx of x pin Pinx or the end of xB two-wire wire jumper groove JBx, connect x pin Pinx, connect all SLx 〞 cores and single-chip microcomputer separately function name cite approvingly the x pin Pinx of the IC locking socket S3 of pin correspondence, make the function that platform of the present invention possesses PC control or downloads.
Form the simplest Single Chip Microcomputer (SCM) system and need insert corresponding RST module, oscillation module at the single-chip microcomputer pin of corresponding function.
As can with the supporting RST module of the present invention, can be referring to shown in Figure 2.One end of connection-peg SP1 termination RST K switch and an end of RST capacitor C 1, one end of the other end of the other end of RST K switch, RST capacitor C 1, RST resistance R 4, connection-peg SP3 end, connection-peg SP4 hold in parallel, and the other end of RST resistance R 4 patches joint SP2 end.
During use, if RST is at x pin Pinx, and high level is effective, connect by the following method: connection-peg SP1 end inserts the other end of the xA two-wire wire jumper groove JAx that connects power Vcc, the other end (ground connection) of connection-peg SP2 termination xB two-wire wire jumper groove JBx, the x pin Pinx(of connection-peg SP3 end or connection-peg SP4 termination single-chip microcomputer RST end are looked the particular location that single-chip microcomputer specification, model are determined pin Pinx) end of corresponding xA two-wire wire jumper groove JAx or the end of xB two-wire wire jumper groove JBx;
If the RST low level is effective, connect by the following method: connection-peg SP1 end inserts the other end (ground connection) of xB two-wire wire jumper groove JBx, connection-peg SP2 termination connects the other end of the xA two-wire wire jumper groove JAx of power Vcc, connection-peg SP3 end or connection-peg SP4 ending are constant, connect the end of xA two-wire wire jumper groove JAx of x pin Pinx correspondence of single-chip microcomputer RST end or the end of xB two-wire wire jumper groove JBx.
As can with the supporting oscillation module circuit of the present invention, can be referring to Fig. 3, the end of connection-peg SP5 termination crystal oscillator JZ, the end of the first oscillating capacitance C2; The other end of connection-peg SP6 termination crystal oscillator JZ, the end of the second oscillating capacitance C3; The other end of the other end of the first oscillating capacitance C2, the second oscillating capacitance C3, connection-peg SP7 end and connection-peg SP8 end are in parallel.
During use, connection-peg SP5 end inserts the end of the x2A two-wire wire jumper groove JAx2 that connects single-chip microcomputer XTAL2 pin Pinx2 or the end of x2B two-wire wire jumper groove JBx2, connection-peg SP6 end inserts the end of the x1A two-wire wire jumper groove JAx1 that connects single-chip microcomputer XTAL1 pin Pinx1 or the end of x1B two-wire wire jumper groove JBx1, connection-peg SP7 end and connection-peg SP8 end itself are in parallel, connection-peg SP7 end or connection-peg SP8 end insert the other end (ground connection) of x2B two-wire wire jumper groove JBx2, the perhaps other end (ground connection) of x1B two-wire wire jumper groove JBx1.
As with the supporting I/O state indicating module circuit of the present invention, can be referring to Fig. 4.The end of connection-peg SP9 termination x current-limiting resistance Rx, the positive pole of another termination x light emitting diode Dx of x current-limiting resistance Rx, the negative pole of x light emitting diode Dx patch joint SP10 end.
During use, the end of x3 ' the A two-wire wire jumper groove JAx3 ' that the single-chip microcomputer x3 I/O mouth line I/Ox3 that connection-peg SP10 end inserts needs the state indication is connected, connection-peg SP9 end inserts the other end of x3 ' the A two-wire wire jumper groove JAx3 ' that connects power Vcc.When I/Ox3 end output low level, perhaps the I/Ox3 end is drawn by external circuits and is low level, the lumination of light emitting diode on the external x3 I/O state indicating module.
As with the supporting VFC module of the present invention, can be referring to Fig. 5.The VFC circuit is common circuit, and multiple VFC universal integrated circuit has been arranged, and the VFC module of making on the basis of VFC integrated circuit, as LM331 integrated circuit and VFC module thereof.Fig. 5 VFC module is by voltage input end Vin, analog/digital is GND publicly, pulsed frequency output Fo, VFC module working power V four ends are formed, connection-peg SP11 end is the voltage input end Vin of VFC module, and connection-peg SP12 end is analog/digital GND publicly, and connection-peg SP13 end is pulsed frequency output Fo, connection-peg SP14 end is VFC module working power V, V 〉=5V.
During use, the tested aanalogvoltage of connection-peg SP11 termination (entering the voltage input end Vin of VFC module) of VFC module, connection-peg SP12 end (analog/digital of VFC module is GND publicly) connects the other end (ground connection) of xB two-wire wire jumper groove JBx, connection-peg SP13 end (the pulsed frequency output Fo of VFC module) connects the end of xB two-wire wire jumper groove JBx, the perhaps end of xA two-wire wire jumper groove JAx, it is the I/O mouth line of the x pin Pinx of IC locking socket S3, connection-peg SP14 end (the working power V of VFC module) meets positive supply V, typical connection is the Vcc that meets 5V, namely connects the other end of xA two-wire wire jumper groove JAx.
Other peripheral circuit modules of the present invention adopt the finished product module, directly link to each other with the I/O of singlechip chip, as, the LCD display module, adopt commercially available character LCD module, with the LCD module of Chinese and English character library, its interface divides parallel port and serial ports two classes, and the parallel port comprises data D0~D7, address A0~A1, sheet choosing/CS, writes/WR, reads/RD etc., generally be no more than 20 pins; The LCD that is arranged to serial line interface shows, have as long as Vcc, GND, three lines of RXD, real and single-chip processor i/o is come into contacts with has only a RXD line, every kind of LCD module is all with instructions and interface wiring diagram, driving method and program;
As adopt the 89S51 single-chip microcomputer, the LCD display module of serial line interface can be realized by following connection: the 11st pin I/O P3.1(TXD of single-chip microcomputer) corresponding to the 11st pin Pin11 of (40Pin) IC locking socket S3, the end (the perhaps end of 11B two-wire wire jumper groove JB11) of the RXD termination 11A two-wire wire jumper groove JA11 of LCD display module, the other end of LCD display module Vcc termination 11A two-wire wire jumper groove JA11, the other end of the GND termination 11B two-wire wire jumper groove JB11 of LCD display module; After connection is finished, load suitable Micro Controller Unit (MCU) driving program and just can finish LCD demonstration task.
Other 8 sections character modules; The LED lattice module; The A/D modular converter; The transformation from serial to parallel module; The parallel serial module that changes, etc., nearly all single-chip microcomputer books, data are all on the books, all belong to those skilled in the art's known technology, not narration one by one.After adopting these modules, can enlarge scope of experiment of the present invention and experimental project number.
A kind of typical 40 pins, 8051 single-chip microcomputers of the present invention are specifically implemented circuit diagram as shown in Figure 6, be described below, download the SPI interface that line interface S2 adopts 89S51 series, each heart yearn is respectively Vcc, GND, MOSI, MISO, SCK, RST, formed 89S51 pattern experiment development platform programming, with the communication port of PC
The end (heart yearn) of outlet S1 connects:
Download the Vcc core of line interface S2, the end of decoupling capacitor C4, (40Pin) the 40th pin of IC locking socket S3, the end of power supply indication current-limiting resistance R8,
The end of the 0.0th current-limiting resistance R0.0, the end of the 0.1st current-limiting resistance R0.1 ..., the end of the 0.7th current-limiting resistance R0.7,
The end of the 1.0th current-limiting resistance R1.0, the end of the 1.1st current-limiting resistance R1.1 ..., the end of the 1.7th current-limiting resistance R1.7,
The end of the 2.0th current-limiting resistance R2.0, the end of the 2.1st current-limiting resistance R2.1 ..., the end of the 2.7th current-limiting resistance R2.7,
The end of the 3.0th current-limiting resistance R3.0, the end of the 3.1st current-limiting resistance R3.1 ..., the end of the 3.7th current-limiting resistance R3.7,
The end of the 9th two-wire wire jumper groove J9, an end of RST capacitor C 1, the end of the 4th current-limiting resistance R5, the end of the 5th current-limiting resistance R6, the end of the 6th current-limiting resistance R7;
The other end ground connection of outlet S1, and connect:
Download the GND core of line interface S2, the other end of decoupling capacitor C4, (40Pin) the 20th pin of IC locking socket S3, the end of the 20th two-wire wire jumper groove J20, the other end of the first oscillating capacitance C2, the other end of the second oscillating capacitance C3, the negative pole of the other end of RST resistance R 4 and power supply indication light emitting diode D8;
The other end of the 1st two-wire wire jumper groove J1, the other end of the 2nd two-wire wire jumper groove J2 ..., the other end of the 8th two-wire wire jumper groove J8, the other end of the 10th two-wire wire jumper groove J10, the other end of the 11st two-wire wire jumper groove J11 ..., the other end of the 17th two-wire wire jumper groove J17, the other end of the 20th two-wire wire jumper groove J20, the other end of the 21st two-wire wire jumper groove J21 ..., up to the other end of the 39th two-wire wire jumper groove J39;
The loop relevant with system:
The positive pole of another termination power indication light emitting diode D8 of power supply indication current-limiting resistance R8, the minus earth of power supply indication light emitting diode D8;
The end of a termination first oscillating capacitance C2 of crystal oscillator JZ, the end of the 18th two-wire wire jumper groove J18, the other end of the 18th two-wire wire jumper groove J18, the 18th pin of IC locking socket S3; The end of another termination second oscillating capacitance C3 of crystal oscillator JZ, the end of the 19th two-wire wire jumper groove J19, the other end of the 19th two-wire wire jumper groove J19, the 19th pin of IC locking socket S3;
The RST branch road: the other end of another termination RST capacitor C 1 of the 9th two-wire wire jumper groove J9 and the positive pole of isolating diode D4, the negative pole of isolating diode D4 connects the 9th pin of (40Pin) IC locking socket S3, downloads the RST core of line interface S2 and an end of RST resistance R 4;
The positive pole of another termination the 4th light emitting diode D5 of the 4th current-limiting resistance R5, the negative pole of the 4th light emitting diode D5 connects the 29th pin of (40Pin) IC locking socket S3, the end of the 29th two-wire wire jumper groove J29,
The positive pole of another termination the 5th light emitting diode D6 of the 5th current-limiting resistance R6, the negative pole of the 5th light emitting diode D6 connects the 30th pin of (40Pin) IC locking socket S3, the end of the 30th two-wire wire jumper groove J30,
The positive pole of another termination the 6th light emitting diode D7 of the 6th current-limiting resistance R7, the negative pole of the 6th light emitting diode D7 connects the 31st pin of (40Pin) IC locking socket S3, the end of the 31st two-wire wire jumper groove J31;
Each loop relevant with each I/O pin of (40Pin) IC locking socket S3:
Another termination the 0.0th light emitting diode D0.0 positive pole of the 0.0th current-limiting resistance R0.0, the negative pole of the 0.0th light emitting diode D0.0 connects the 39th pin of (40Pin) IC locking socket S3 and the end of the 39th two-wire wire jumper groove J39, another termination the 0.7th light emitting diode D0.7 positive pole of the 0.7th current-limiting resistance R0.7, the negative pole of the 0.7th light emitting diode D0.7 connects the 32nd pin of (40Pin) IC locking socket S3 and the end of the 32nd two-wire wire jumper groove J32;
Another termination the 1.0th light emitting diode D1.0 positive pole of the 1.0th current-limiting resistance R1.0, the negative pole of the 1.0th light emitting diode D1.0 connects the 1st pin of (40Pin) IC locking socket S3 and the end of the 1st two-wire wire jumper groove J1, another termination the 1.4th light emitting diode D1.4 positive pole of the 1.4th current-limiting resistance R1.4, the negative pole of the 1.4th light emitting diode D1.4 connects the 5th pin of (40Pin) IC locking socket S3 and the end of the 5th two-wire wire jumper groove J5;
Another termination the 1.5th light emitting diode D1.5 positive pole of the 1.5th current-limiting resistance R1.5, the 1.5th light emitting diode D1.5 negative pole connects first K switch, 1 one ends, the 6th pin of another termination (40Pin) IC locking socket S3 of first K switch 1, download the MOSI core of line interface S2 and the end of the 6th two-wire wire jumper groove J6
The positive pole of another termination of the 1.6th current-limiting resistance R1.6 the 1.6th light emitting diode D1.6, the 1.6th light emitting diode D1.6 negative pole connects second switch K2 one end, another termination (40Pin) IC locking socket S3 the 7th pin of second switch K2, download the MISO core of line interface S2 and the end of the 7th two-wire wire jumper groove J7
Another termination the 1.7th light emitting diode D1.7 positive pole of the 1.7th current-limiting resistance R1.7, the 1.7th light emitting diode D1.7 negative pole connects an end of the 3rd K switch 3, another termination (40Pin) IC locking socket S3 the 8th pin of the 3rd K switch 3 is downloaded the SCK core of line interface S2 and the end of the 8th two-wire wire jumper groove J8;
Another termination the 2.0th light emitting diode D2.0 positive pole of the 2.0th current-limiting resistance R2.0, the negative pole of the 2.0th light emitting diode D2.0 connects the 21st pin of (40Pin) IC locking socket S3 and the end of the 21st two-wire wire jumper groove J21, another termination the 2.7th light emitting diode D2.7 positive pole of the 2.7th current-limiting resistance R2.7, the negative pole of the 2.7th light emitting diode D2.7 connects the 28th pin of (40Pin) IC locking socket S3 and the end of the 28th two-wire wire jumper groove J28;
Another termination the 3.0th light emitting diode D3.0 positive pole of the 3.0th current-limiting resistance R3.0, the negative pole of the 3.0th light emitting diode D3.0 connects the 10th pin of (40Pin) IC locking socket S3 and the end of the 10th two-wire wire jumper groove J10, another termination the 3.7th light emitting diode D3.7 positive pole of the 3.7th current-limiting resistance R3.7, the negative pole of the 3.7th light emitting diode D3.7 connects the 17th pin of (40Pin) IC locking socket S3 and the end of the 17th two-wire wire jumper groove J17;
The end of the termination RST two-wire wire jumper groove JR of RST K switch R, the other end of another termination RST two-wire wire jumper groove JR of RST K switch R, both have formed independently RST button.During use, the end of RST two-wire wire jumper groove JR is connect the end of the 9th two-wire wire jumper groove J9 by connecting line, the other end of RST two-wire wire jumper groove JR connects the other end of the 9th two-wire wire jumper groove J9 by another connecting line.
First K switch 1, second switch K2, the 3rd K switch 3 are isolated MOSI core and the 1.5th light emitting diode D1.5, the MISO core of downloading line interface S2 and the 1.6th light emitting diode D1.6 that downloads line interface S2 respectively and are downloaded the SCK core of line interface S2 and contacting of the 1.7th light emitting diode D1.7, guarantee to download the enough driving forces of line.
The main cable termination core of downloading line interface S2 is RST, MOSI, MISO, SCK, Vcc, GND, and the some vacant end cores of NC; The line end of downloading line interface S2 has several general arrangement modes, and as the arrangement of AT89S download line, the arrangement of AVR download line, the arrangement of two dragon download line of Atmel, other aligning method can be changed mutually in addition.
Among the present invention, the reference parameter of each components and parts of circuit is as follows: the IC socket of IC locking socket S3-band locking handle, as 40 cores, outlet S1-coaxial socket, download line interface S2-10 core or 6 core contact pins, K switch 1~K3-toggle switch, RST switch-pushbutton switch, two-wire wire jumper groove Jx, JAx, JBx-double contact pin or double socket connector, decoupling capacitor-0.1~1 μ F, RST electric capacity-1~10 μ F, RST resistance---4.3~10k Ω, current-limiting resistance Rx-2.4~3.1k Ω/1/8W, light emitting diode Dx-redness/orange-yellow light emitting diode, isolating diode-Si diode, crystal oscillator JZ-quartz (controlled) oscillator, 1~40MHz, oscillating capacitance C2, C3-several pF, VFC module-LM331 forms, the LCD display module-and as HS12864-15 series, 8,4 bit parallel interfaces and serial line interface are optional, other modules-directly choose, perhaps by figure assembling, single-chip microcomputer-AT89S51/52/53, AT89S8252/8253 or AVR, PIC etc.
Present embodiment is implemented convenient, downloading line and software obtains easily, the learner can obtain various basic software and hardware training and spread training in the pattern experiment development platform, the use habit that forms is consistent with the development tool of current popular, platform powerful, extensibility is strong, have the ability of striding dissimilar single-chip microcomputer platform work, all I/O states of single-chip microcomputer are directly indicated by LED, but peripheral circuit all is reduced to the module that brick pattern is installed, build connecting circuit voluntarily, visual pattern, the operation user of service understands easily and grasps, and the required components and parts kind of development platform is few, with low cost, realize easily.

Claims (2)

1. the one-chip machine modular experiment and development platform comprises IC locking socket, a plurality of two-wire wire jumper groove, a plurality of wire jumper groove, outlet, download line interface, decoupling capacitor, power supply indication current-limiting resistance and light emitting diode; It is characterized in that: corresponding two the two-wire wire jumper grooves of each pin of IC locking socket, this pin is connected with an end of two two-wire wire jumper grooves respectively, the other end ground connection of a two-wire wire jumper groove in two two-wire wire jumper grooves, the heart yearn of another termination outlet of another two-wire wire jumper groove; Download the ground connection core ground connection in the line interface, the heart yearn that the power supply core connects outlet, other data heart yearns of downloading line link to each other with two-wire wire jumper groove one end outside the I/O mouth wire pin of single-chip microcomputer corresponding function title respectively through wire jumper groove, connecting line; The two ends difference ground connection of decoupling capacitor and the heart yearn of outlet; The positive pole of light emitting diode connects the other end of power supply indication current-limiting resistance, the minus earth of light emitting diode, the heart yearn of a termination power socket of power supply indication current-limiting resistance.
2. a method of using one-chip machine modular experiment and development platform as claimed in claim 1 is characterized in that: can adapt to different single-chip microcomputer kinds or realize circuit software and hardware function at the external different circuit module of two-wire wire jumper groove adjunction of the pin of IC locking socket by the external two-wire wire jumper groove wire jumper of pin of adjusting the IC locking socket.
CN 201110115408 2011-05-05 2011-05-05 Modular singlechip experimental development platform and application method thereof Expired - Fee Related CN102194354B (en)

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