CN102185562A - Chaotic oscillator and application thereof as random bit generator - Google Patents

Chaotic oscillator and application thereof as random bit generator Download PDF

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CN102185562A
CN102185562A CN2011100518568A CN201110051856A CN102185562A CN 102185562 A CN102185562 A CN 102185562A CN 2011100518568 A CN2011100518568 A CN 2011100518568A CN 201110051856 A CN201110051856 A CN 201110051856A CN 102185562 A CN102185562 A CN 102185562A
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transistor
collector electrode
constant
current source
chaotic
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CN102185562B (en
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王丽丹
段书凯
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Southwest University
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Abstract

The invention discloses a chaotic oscillator, which comprises a negative transconductance sinusoidal oscillator circuit and a differential amplification circuit unit, wherein an output signal of the sinusoidal oscillator circuit is amplified by the differential amplification circuit unit, and the amplified signal is taken as output to obtain a continuous chaotic oscillation signal. Meanwhile, the invention discloses the application of the chaotic oscillator as a random bit generator. A sinusoidal oscillator provided by the invention is suitable to be realized on a single integrated circuit chip, and has a compact structure, low manufacturing cost, very high output frequency, high balance performance and high source suppression and noise immunity functions. The random bit generator designed according to the sinusoidal oscillator inherits the advantages. As a design scheme of a real random bit generator, the invention has a very high practical value.

Description

Chaotic oscillator and as the application of random bit generator
Technical field
The present invention relates to information technology and field of communication security, particularly a kind of chaotic oscillator, and with the application of this chaotic oscillator as a kind of random bit generator.
Background technology
Along with the remarkable development of high-level information and communication security, it is very important that the protection of information becomes.The random bit generator is widely used for many fields such as Computer Simulation, numerical analysis, algorithm assessment, statistical sampling, image discriminating, encryption, digital watermarking.
At present, the method for generation random number mainly comprises two kinds: arithmetic method and physics method.The arithmetic random number is that the mode by repeated calculation obtains, and this just might exist periodically, and this factor has hindered their application in cryptographic system.On the other hand, physical random number produces by physical phenomenon at random, owing to periodically do not exist, can realize high security.
Along with the fast development of electronic technology, produce random number by integrated circuit and more and more be subject to people's attention.At present, the researcher who has utilizes discrete chaotic maps to design and Implement digital random bit generator, is made into integrated circuit (IC) chip.On the other hand, in order to improve the speed that produces random bit stream, the researcher who also has utilizes analog integrated circuit to realize that the chaotic oscillator of continuous time is to produce random bit.But, the present circuit that proposes is more complicated on the whole, cost is higher, and the chaos degree of the chaotic signal that produces is not enough, be easy to crack, therefore be necessary along this research direction, propose a kind ofly to be easy to realize, simulation chaotic oscillator that cost is low, novel, and and utilize this chaotic oscillator to realize the development of random bit generator.
Summary of the invention
In view of this, one of purpose of the present invention provides a kind of chaotic oscillator of simulation, and it is simple for structure, be easy to make, and cost is lower; Two of purpose of the present invention is the application as the random bit generator of the aforesaid chaotic oscillator of protection.
One of purpose of the present invention is achieved through the following technical solutions:
This chaotic oscillator comprises a negative transconductance sinusoidal oscillator circuit and a differential amplifier circuit unit; By the output signal of negative transconductance sinusoidal oscillator circuit is amplified the back as exporting through the differential amplifier circuit unit, obtain continuous chaotic oscillation signal.
Further, described negative transconductance sinusoidal oscillator circuit comprises the bipolar transistor I and the transistor I I of two NPN types, the base stage of described transistor I I and the collector electrode of transistor I link, the collector electrode of described transistor I I and the base stage of transistor I link, and the emitter of described transistor I I connects back ground connection with the emitter of transistor I; Be parallel with second electric capacity between the collector electrode of described transistor I I and the emitter, be parallel with first electric capacity between the collector electrode of described transistor I and the emitter; The collector electrode of described transistor I is attached to constant-current source II by first inductance, and the collector electrode of described transistor I I is attached to constant-current source I by second inductance, is provided with isolation resistance between described constant-current source I and the constant-current source II;
Described differential amplifier circuit unit comprises the bipolar transistor III and the transistor I V of two NPN types, the base stage of described transistor I II is attached to the common point of first electric capacity and transistor I collector electrode, and the base stage of described transistor I V is attached to the common point of second electric capacity and transistor I I collector electrode; The emitter of described transistor I II and transistor I V is coupled to each other, and is attached to common ground point by constant-current source; The collector electrode of described transistor I II is attached to the common junction of second inductance and constant-current source I, and the collector electrode of described transistor I V is attached to the common junction of first inductance and constant-current source II.
Two of purpose of the present invention be by with aforesaid chaotic oscillator as the random bit generator should be used for realize.
The invention has the beneficial effects as follows:
The sinusoidal oscillator that the present invention proposes is adapted at realizing on the integrated circuit (IC) chip of monolithic, its compact conformation, cheap, and have very high output frequency; Its balance quality is good simultaneously, has high source and suppresses and noise immunologic function, has inherited above advantage according to the random signal generator of this sinusoidal oscillator design, as a kind of random bit generator scheme, has higher utility.
Other advantages of the present invention, target and feature will be set forth to a certain extent in the following description, and to a certain extent, based on being conspicuous to those skilled in the art, perhaps can obtain instruction from the practice of the present invention to investigating hereinafter.Target of the present invention and other advantages can realize and obtain by following specification and claims.
Description of drawings
In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing, wherein:
Fig. 1 is a chaotic oscillator circuit connecting figure of the present invention;
Fig. 2 is voltage V in the chaotic oscillator circuit C1-V C2Phasor;
Fig. 3 is voltage V in the chaotic oscillator circuit C1Power spectrum chart;
Fig. 4 is figure time response of system (2) middle state variable x, y and z;
Fig. 5 is the phasor between system (2) middle state variable x, y and the z;
Fig. 6 is the phasor of variable after by conversion in the system (2);
Fig. 7 is the Lyapunov index map of system (2);
Fig. 8 is the generation schematic diagram of random bit stream.
Embodiment
Hereinafter with reference to accompanying drawing, the preferred embodiments of the present invention are described in detail.Should be appreciated that preferred embodiment only for the present invention is described, rather than in order to limit protection scope of the present invention.
As shown in Figure 1, chaotic oscillator of the present invention comprises a negative transconductance sinusoidal oscillator circuit and a differential amplifier circuit unit; By the output signal of sinusoidal oscillator circuit is amplified the back as exporting through the differential amplifier circuit unit, obtain continuous chaotic oscillation signal.
In the present embodiment, described negative transconductance sinusoidal oscillator circuit comprises the bipolar transistor I T1 and the transistor I I T2 of two NPN types, the collector electrode of the base stage of transistor I I T2 and transistor I T1 links, the base stage of the collector electrode of transistor I I T2 and transistor I T1 links, and the emitter of transistor I I T2 connects back ground connection with the emitter of transistor I T1; Be parallel with second capacitor C 2 between the collector electrode of described transistor I I T2 and the emitter, be parallel with first capacitor C 1 between the collector electrode of transistor I T1 and the emitter; The collector electrode of described transistor I T1 is attached to constant-current source II Im2 by first inductance L 1, and the collector electrode of transistor I I D2 is attached to constant-current source I Im1 by second inductance L 2, is provided with isolation resistance R between constant-current source I Im1 and the constant-current source II Im2;
In the present embodiment, the differential amplifier circuit unit comprises the bipolar transistor III T3 and the transistor I V T4 of two NPN types, the base stage of described transistor I II T3 is attached to the common point of first capacitor C 1 and transistor I T1 collector electrode, and the base stage of described transistor I V T4 is attached to the common point of second capacitor C 2 and transistor I I T2 collector electrode; The emitter of described transistor I II T3 and transistor I V T4 is coupled to each other, and is attached to common ground point by constant-current source IO; The collector electrode of described transistor I II T3 is attached to the common junction of second inductance L 2 and constant-current source I Im1, and the collector electrode of described transistor I V T4 is attached to the common junction of first inductance L 1 and constant-current source II Im2.
Because the inductance value that bipolar transistor requires is less, therefore be more suitable in monolithic integrated circuit, realizing.In addition, it should be noted that this chaotic oscillator is a balance, have high source and suppress and noise immunologic function.
By circuit shown in Figure 1 is carried out the node voltage analysis, can obtain following circuit equation:
Figure BDA0000048755710000041
Wherein, V TAnd I SCut-in voltage and the saturation current of representing bipolar transistor respectively.I 0For constant-current source I0, bias current, I mBe the bias current of constant-current source Im1 and Im2, V C1And V C2Represent capacitor C respectively 1And C 2The voltage at two ends.In experiment, selecting all crystals pipe model is 2N1711, capacitor C 1=C 2=10nF, inductance L 1=L 2=10mH, constant-current source I O=280uA, I M1=I M2=170uA, resistance R=1k Ω can be observed V C1-V C2Phasor and V C1Power spectrum chart, as shown in Figures 2 and 3.As can be seen from Figure 3, power spectrum is a continuous spectrum, noise background and broad peak occur, has tangible chaotic motion feature.
In order further this circuit to be carried out numerical analysis, formula (1) is standardized order
Figure BDA0000048755710000042
t n=t/RC selects the value of R to equal
Figure BDA0000048755710000045
V sBe ratio-voltage arbitrarily, formula (1) is transformed to following form:
Figure BDA0000048755710000046
Wherein, a = V S V T , b = I S R 2 V S , c = I o R 2 V S , d = ( 2 I m - I o ) R 2 V S . Work as a=1, b=0.5 * 10 -6, c=3,
During d=1, the system (2) of expression shows tangible chaotic behavior in the formula (2), and the time response of state variable and phasor are as shown in Figure 4 and Figure 5.
It should be noted that formula (1) when standardizing, is being made
Figure BDA0000048755710000051
Figure BDA0000048755710000052
So will obtain the phasor similar with Experiment of Electrical Circuits, suitable processing is carried out in output that must logarithm value emulation, thereby can obtain phasor as shown in Figure 6.Comparison diagram 6 and Fig. 2 find that easily numerical simulation and Experiment of Electrical Circuits result are very approximate.The Lyapunov index map of system (2) as shown in Figure 7, system has a positive Lyapunov index, illustrates that this system is a chaos system.
Another object of the present invention is to utilize this chaotic oscillator as a random bit generator, adopts the method for propositions such as Yalcin to produce bit stream.At first, the state space with chaos attractor is divided into three sub spaces S 0, S 1And S 2, as shown in Figure 8.When system trajectory from S 0To S 1Produce 0 bit, from S 1To S 2Then produce 1 bit.Yet the bit stream that obtains like this has bias in statistical test.In order to eliminate unknown bias, can adopt the phase difference technology (de-skewing technique) between two coherent signals of well-known Von Neumann ' s separation.In this technology, comprise 01 bit being converted to 0 bit, 10 bits to being converted to 1 bit, and are removed 00 bit to right with 11 bits.In experiment, get C0=-5.0, C1=0 then can obtain length and be 8626 bit sequence, and this bit sequence has been carried out statistical test, and test result sees Table 1.
Table 1 system statistics test result
This system has passed through 9 kinds of tests of NIST (National Institute of Standards and Technology) SpecialPublication 800-22, has randomness preferably.
Explanation is at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the aim and the scope of the technical program, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (3)

1. chaotic oscillator, it is characterized in that: described chaotic oscillator comprises a negative transconductance sinusoidal oscillator circuit and a differential amplifier circuit unit; By the output signal of negative transconductance sinusoidal oscillator circuit is amplified the back as exporting through the differential amplifier circuit unit, obtain continuous chaotic oscillation signal.
2. chaotic oscillator according to claim 1, it is characterized in that: described negative transconductance sinusoidal oscillator circuit comprises the bipolar transistor I (T1) and the transistor I I (T2) of two NPN types, the collector electrode of the base stage of described transistor I I (T2) and transistor I (T1) links, the base stage of the collector electrode of described transistor I I (T2) and transistor I (T1) links, and the emitter of described transistor I I (T2) connects back ground connection with the emitter of transistor I (T1); Be parallel with second electric capacity (C2) between the collector electrode of described transistor I I (T2) and the emitter, be parallel with first electric capacity (C1) between the collector electrode of described transistor I (T1) and the emitter; The collector electrode of described transistor I (T1) is attached to constant-current source I (Im2) by first inductance (L1), the collector electrode of described transistor I I (T2) is attached to constant-current source II (Im1) by second inductance (L2), is provided with isolation resistance (R) between described constant-current source I (Im1) and the constant-current source II (Im2);
Described differential amplifier circuit unit comprises the bipolar transistor III (T3) and the transistor I V (T4) of two NPN types, the base stage of described transistor I II (T3) is attached to the common point of first electric capacity (C1) and transistor I (T1) collector electrode, and the base stage of described transistor I V (T4) is attached to the common point of second electric capacity (C2) and transistor I I (T2) collector electrode; The emitter of described transistor I II (T3) and transistor I V (T4) is coupled to each other, and is attached to common ground point by constant-current source (IO); The collector electrode of described transistor I II (T3) is attached to the common junction of second inductance (L2) and constant-current source I (Im1), and the collector electrode of described transistor I V (T4) is attached to the common junction of first inductance (L1) and constant-current source II (Im2).
3. with the application of claim 1 or 2 described chaotic oscillators as the random bit generator.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103888239A (en) * 2013-04-25 2014-06-25 江苏理工学院 Chaotic circuit composed of RC oscillator and LC resonant loop
CN104065343A (en) * 2014-06-23 2014-09-24 太原理工大学 Current mode chaotic oscillator
CN104065343B (en) * 2014-06-23 2016-11-30 太原理工大学 A kind of current-mode chaotic oscillator

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1527476A (en) * 2003-03-04 2004-09-08 ��ʽ���������Ƽ� Oscillating circuit and L loading differential circuit
US20080143446A1 (en) * 2006-12-15 2008-06-19 Chih-Wei Yao Low Phase-Noise Oscillator
US20090072916A1 (en) * 2006-12-27 2009-03-19 Analogies S.A. Integrated Circuit Distributed Oscillator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1527476A (en) * 2003-03-04 2004-09-08 ��ʽ���������Ƽ� Oscillating circuit and L loading differential circuit
US20080143446A1 (en) * 2006-12-15 2008-06-19 Chih-Wei Yao Low Phase-Noise Oscillator
US20090072916A1 (en) * 2006-12-27 2009-03-19 Analogies S.A. Integrated Circuit Distributed Oscillator

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
LIDAN WANG,SHUKAI DUAN: "Generation and Circuitry Implementation of an N-double Scroll Delayed Chaotic Neuron", 《FOURTH INTERNATIONAL CONFERENCE ON NATURAL COMPUTATION》, 31 December 2008 (2008-12-31), pages 389 - 393 *
SHUKAI DUAN,LIDAN WANG: "Chaos Synchronization between Coupled Hyperchaotic Systems and Its Circuitry Implementation", 《FOURTH INTERNATIONAL CONFERENCE ON NATURAL COMPUTATION》, 31 December 2008 (2008-12-31), pages 618 - 621 *
周燕，覃朝玲: "用混沌法产生随机数发生器的研究", 《西南师范大学学报》, vol. 25, no. 2, 30 April 2000 (2000-04-30), pages 150 - 154 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103888239A (en) * 2013-04-25 2014-06-25 江苏理工学院 Chaotic circuit composed of RC oscillator and LC resonant loop
CN103888239B (en) * 2013-04-25 2017-02-22 江苏理工学院 Chaotic circuit composed of RC oscillator and LC resonant loop
CN104065343A (en) * 2014-06-23 2014-09-24 太原理工大学 Current mode chaotic oscillator
CN104065343B (en) * 2014-06-23 2016-11-30 太原理工大学 A kind of current-mode chaotic oscillator

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