CN102185502A - Constant current output control circuit for switching power supply controller and switching power supply - Google Patents
Constant current output control circuit for switching power supply controller and switching power supply Download PDFInfo
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Abstract
The invention provides a constant current output control circuit for a switching power supply controller and a switching power supply. The output current Io of the switching power supply can be accurately controlled to be constant. Because the Io depends on a ratio of Tons (a signal reflecting secondary conduction time) to the period Tsw of a primary switch, that the Io is a constant value can be guaranteed by keeping Tons/Tsw be a fixed value only, and Tsw is the period of pulse frequency modulation (PFM), and the sum of Tons and a complementary signal of the Tons is just Tsw. Therefore, the Tons/Tsw is controlled to be a fixed value, which can be realized by controlling the Tons only. A secondary conduction time control unit generates the Tons, and a PFM signal is generated through a constant current control unit 200. Therefore, the control circuit can accurately control the Io to be constant current.
Description
Technical field
The present invention relates to the switch power technology field, particularly a kind of constant current output control circuit and Switching Power Supply of switch power controller.
Background technology
It is little that Switching Power Supply has a volume, and therefore the advantage that efficient height and electric current are big is widely used in occasions such as charger for mobile phone and notebook adapter.Along with reaching its maturity of led lighting technology, Switching Power Supply also is widely used in the driven for emitting lights diode.When Switching Power Supply is used for the driven for emitting lights diode,, need Switching Power Supply to have the function of constant current output for the brightness that guarantees light-emitting diode keeps constant.
Referring to Fig. 1, this figure is a kind of Switching Power Supply schematic diagram with constant current output function in the prior art.
Input voltage vin is the former limit power supply of the transformer 114 of Switching Power Supply successively by dimmer 108 and PFC109.
The controller 110 (hereinafter to be referred as controller) of Switching Power Supply is designated as DIM by the average amplitude of sampling input voltage (output voltage of dimmer 108).Controller 110 is followed the DIM variation according to the output current that DIM adjusts Switching Power Supply OUT end.
Below simple introduction how to realize that output current follows DIM and change.
After switch 101 conductings of the former limit of transformer 114, former limit peak current converts the CS end of voltage signal to controller 110 to by peak current detection resistance R cs.When the voltage of CS end arrived the 3rd reference voltage, the OUT end of controller 110 stopped output drive signal, thereby former limit switch 101 turn-offs.
The FB terminal voltage is followed output voltage V out and is changed, and the voltage on the sampling resistor 112 is as the feedback voltage input FB end of Vout.After the FB terminal voltage is handled through controller 110 internal circuits, produce the signal Tons (the signal Tons that is called for short reflection secondary ON time) of the ON time of reflection secondary rectifying tube 115, Tons controls the charging and discharging currents of corresponding ratio, this charging and discharging currents can be controlled the ON time of the control signal of former next time limit switch 101, thereby adjust the ratio of Tons/Tsw, Tsw is the switch periods of former limit switch 101.The computational methods of the output current Io of the Switching Power Supply of former limit control shown in Figure 1 are as shown in Equation (1): wherein, Ipk is that former limit winding peak value detects electric current, and Ipks is a secondary winding peak current; Vcs is the reference voltage of the inside peak comparator of described controller, and Rcs is a peak current detection resistance, and N is the turn ratio of the former limit winding and the secondary winding of transformer; Can be got by formula (1), because Vcs and Rcs are fixed value, therefore, when ratio one timing of Tons/Tsw, Io just can fix.
But, how to control the ratio of Tons/Tsw, be that a constant electric current is the problem that those skilled in the art need solve thereby control Io.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of constant current output control circuit and Switching Power Supply of switch power controller, and can accurately control Io is a constant electric current.
The invention provides a kind of constant current output control circuit of switch power controller, comprising: first comparator, second comparator, secondary ON time control unit, constant current control unit and driver element;
An input of described first comparator connects the FB end of controller, and another input connects first reference voltage, and output connects the first input end of secondary ON time control unit;
Described secondary ON time control unit is used to produce the signal that reflects the secondary ON time;
Second input of described secondary ON time control unit connects the output signal of the 3rd comparator, an input of the 3rd comparator connects an end of first electric capacity, the other end ground connection of first electric capacity, another input of the 3rd comparator connects the 3rd reference voltage, and the voltage on first electric capacity is discharged and recharged by the recombination current source;
When the output signal of described the 3rd comparator was high level, the output signal of described secondary ON time control unit was forced to keep high level; When the output signal of the 3rd comparator becomes low level, judge whether the secondary ON time finishes,
An input of second comparator connects the CS end of controller, another input connects second reference voltage, output connects the first input end of constant current control unit, second input of described constant current control unit connects the output of described secondary ON time control unit, and the 3rd input of described constant current control unit connects the output of the 3rd comparator; The 3rd input of described secondary ON time control unit connects the output signal of described constant current control unit; Described constant current control unit output PFM signal is given driver element, and described driver element is used for the drive signal of the on off state of limit, output control switch power supply Central Plains switch;
The rising edge of the rising edge decision PFM signal of the output signal of the 3rd comparator, the trailing edge of the output signal decision PFM signal of second comparator.
Preferably, described secondary ON time control unit comprises: first delay cell, first not gate, first rest-set flip-flop, second rest-set flip-flop, second not gate, the 5th NAND gate, the 6th NAND gate, the 3rd rest-set flip-flop and the 3rd not gate;
Described first rest-set flip-flop comprises first NAND gate and second NAND gate;
Described second rest-set flip-flop comprises the 3rd NAND gate and the 4th NAND gate;
Described the 3rd rest-set flip-flop comprises the 7th NAND gate and the 8th NAND gate;
The input of first delay cell connects the control signal of former limit switch, and output connects an input of first rest-set flip-flop through first not gate; Another input of first rest-set flip-flop connects the output signal of the enable signal and first comparator;
The output of described first rest-set flip-flop connects an input of second rest-set flip-flop, and another input of second rest-set flip-flop connects the output signal of second comparator;
The output of second rest-set flip-flop connects an input of the 5th NAND gate through second not gate, and another input of the 5th NAND gate connects the output of first rest-set flip-flop;
The output of the 5th NAND gate is connected the input of the 6th NAND gate with the output of first comparator;
The output of the output of the 6th NAND gate and the 5th NAND gate is connected two inputs of the 3rd rest-set flip-flop respectively, the output of the 3rd rest-set flip-flop connects the input of the 3rd not gate, and the output of the 3rd not gate is as the output of secondary ON time control unit.
Preferably, described secondary ON time control unit comprises: first delay cell, first not gate, first rest-set flip-flop, second rest-set flip-flop, second not gate, the 5th NAND gate, the 6th NAND gate, the 3rd rest-set flip-flop, the 3rd not gate, second delay cell, the 4th not gate, the 9th NAND gate and first and door;
Described first rest-set flip-flop comprises first NAND gate and second NAND gate;
Described second rest-set flip-flop comprises the 3rd NAND gate and the 4th NAND gate;
Described the 3rd rest-set flip-flop comprises the 7th NAND gate and the 8th NAND gate;
The input of first delay cell connects the control signal of former limit switch, and output connects an input of first rest-set flip-flop through first not gate; Another input of first rest-set flip-flop connects the output signal of the enable signal and first comparator;
The output of described first rest-set flip-flop connects an input of second rest-set flip-flop, and another input of second rest-set flip-flop connects the output signal of second comparator;
The output of second rest-set flip-flop connects an input of the 5th NAND gate through second not gate, and another input of the 5th NAND gate connects the output of first rest-set flip-flop;
The output of second rest-set flip-flop is connected an input of the 9th NAND gate successively with the 4th not gate through second delay cell, another input of the 9th NAND gate connects the output of second rest-set flip-flop;
The output of the output of the 5th NAND gate and the 9th NAND gate be connected respectively first with two inputs of door, first with output be connected an input of the 3rd rest-set flip-flop;
Another input of the 3rd rest-set flip-flop connects the output of the 6th NAND gate, and an input of the 6th NAND gate connects the output of first comparator, another input connection first of the 6th NAND gate and the output of door;
The output of the 3rd rest-set flip-flop connects the input of the 3rd not gate, and the output of the 3rd not gate is as the output of secondary ON time control unit.
Preferably, described constant current control unit comprises first NOR gate, second NOR gate, the 3rd NOR gate, four nor gate and the 5th NOR gate;
Described first NOR gate and second NOR gate are formed a rest-set flip-flop, and the 3rd NOR gate and four nor gate are formed another rest-set flip-flop;
The input of described first NOR gate connects the output of described secondary ON time control unit;
The input of described second NOR gate connects the output of described the 3rd comparator;
The input of described the 3rd NOR gate connects the output of first NOR gate;
The input of described four nor gate connects the output of second comparator;
An input of described the 5th NOR gate connects the output of the protected location of controller inside, and another input connects the output of the 3rd NOR gate;
The output of described the 5th NOR gate is as the output of constant current control unit.
Preferably, the charging interval of described first electric capacity is controlled by the complementary signal of the output signal of secondary ON time control unit, and the first capacitance discharges time is by the output signal control of secondary ON time control unit.
Preferably, when guard mode is not triggered, described protected location output low level; After guard mode is triggered, described protected location output high level.
The present invention also provides a kind of Switching Power Supply, comprising: transformer and controller, described controller comprise the constant current output control circuit of described switch power controller.
Compared with prior art, the present invention has the following advantages:
The constant current output control circuit of switch power controller provided by the invention, output current Io that can accurately controlling switch power supply keep constant.Because Io depends on the ratio of Tons (signal of reflection secondary ON time) and former limit switch periods Tsw, therefore, is a definite value as long as keep Tons/Tsw, can guarantee that Io is a definite value.And Tsw is the cycle of PFM, and the complementary signal sum of Tons and Tons is Tsw just, and therefore, control Tons/Tsw is a definite value, only needs control Tons to realize.The present invention produces Tons by secondary ON time control unit 100, produces the PFM signal by constant current control unit 200.Can accurately control Io is a constant electric current.
Description of drawings
Fig. 1 is a kind of Switching Power Supply schematic diagram with constant current output function in the prior art;
Fig. 2 is constant current output control circuit embodiment one structure chart of switch power controller provided by the invention;
Fig. 3 is secondary ON time control unit embodiment one structure chart provided by the invention;
Fig. 4 is a secondary ON time control unit structure chart of the prior art;
Fig. 5 is secondary ON time control unit embodiment two structure charts provided by the invention;
Fig. 6 is a constant current control unit structure chart provided by the invention;
Fig. 7 is the oscillogram of each main node in the switching power source control circuit provided by the invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Referring to Fig. 2, this figure is constant current output control circuit embodiment one structure chart of switch power controller provided by the invention.
The constant current output control circuit of the switch power controller that present embodiment provides comprises: the first comparator IC1, the second comparator IC2, secondary ON time control unit 100, constant current control unit 200 and driver element 300;
The input of the described first comparator IC1 connects the FB end of controller, and another input connects first reference voltage Vref 1, and output connects the first input end of secondary ON time control unit 100;
The output signal of the first comparator IC1 represents that with Demag Demag has reflected the period of FB positive voltage.
Described secondary ON time control unit 100 is used to produce the signal Tons that reflects the secondary ON time.
Second input of described secondary ON time control unit 100 connects the output signal of the 3rd comparator IC3, the input of the 3rd comparator IC3 connects first capacitor C 1, the voltage that another input of the 3rd comparator IC3 connects on the 3rd reference voltage Vref 3, the first capacitor C 1 is discharged and recharged by the recombination current source;
The output signal of the 3rd comparator IC3 represents that with CC_CTRL CC_CTRL has reflected that the voltage on the C1 surpasses the period of the 3rd reference voltage Vref 3.
The discharge time of C1 is by Tons control, and the charging interval is by the complementary signal Tons_n control of Tons.Since Tons+Tons_n=Tsw, therefore, as long as control Tons promptly can control the ratio of Tons/Tsw.
The input of the described second comparator IC2 connects the CS end of controller, another input connects second reference voltage Vref 2, output connects the first input end of constant current control unit 200, second input of described constant current control unit 200 connects the output of described secondary ON time control unit 100, and the 3rd input of described constant current control unit 200 connects the output of the 3rd comparator IC3;
The output signal of the second comparator IC2 is represented with PEAK_CTRL.
The 3rd input of described secondary ON time control unit 100 connects the output signal of described constant current control unit 200;
Described constant current control unit 200 output PFM signals are given driver element, and described driver element is used for the drive signal of the on off state of limit, output control switch power supply Central Plains switch.
Because CC_CTRL has reflected the time period of the voltage on the C1 greater than the 3rd reference voltage Vref 3.In secondary ON time control unit 100, the signal Tons of reaction secondary ON time can be modulated by the CC_CTRL signal, before the upset of CC_CTRL signal is for low level, the Tons signal is to be forced to remain on high level, after having only the CC_CTRL high level signal to remove, allow just to judge whether the secondary ON time really finishes;
Constant current control unit 200 is in order to calculate the logic control signal PFM that exports to driver element 300 accurately; The rising edge of the rising edge decision PFM of CC_CTRL, and the trailing edge of PEAK_CTRL decision PFM.
Wherein the PEAK_CTRL signal reaction former limit peak current arrive logic state behind its peak value, the high level period of Tons and CC_CTRL signal have determined the ratio of Tons/Tsw jointly.
Can accurately calculate reaction secondary ON time Tons, and the setting of peak current, the ratio of Tons/Tsw is determined thereupon, can be calculated constant output current.
The constant current output control circuit of switch power controller provided by the invention, output current Io that can accurately controlling switch power supply keep constant.Because Io depends on the ratio of Tons (signal of reflection secondary ON time) and former limit switch periods Tsw, therefore, is a definite value as long as keep Tons/Tsw, can guarantee that Io is a definite value.And Tsw is the cycle of PFM, and the complementary signal sum of Tons and Tons is Tsw just, and therefore, control Tons/Tsw is a definite value, only needs control Tons to realize.The present invention produces Tons by secondary ON time control unit 100, produces the PFM signal by constant current control unit 200.Can accurately control Io is a constant electric current.
Referring to Fig. 3, this figure is secondary ON time control unit embodiment one structure chart provided by the invention.
This secondary ON time control unit comprises four input signals, is respectively Demag, CC_CTRL, Enable and PFM;
Wherein, Demag is the output signal of the first comparator IC1 among Fig. 2, the time period of the positive voltage of FB end in the reflection switch power controller.
CC_CTRL is the output signal of constant current control comparator IC3, has reflected that the voltage on first capacitor C 1 surpasses the time period of the 3rd reference voltage Vref 3.
Enable is an enable signal, and the output signal for startup and reference voltage module is used to control secondary ON time control unit and constant current control unit startup work.Before startup and reference voltage module startup, the Enable signal is a low level.
PFM is the switching drive signal of switch power controller.
Before startup and reference voltage unit startup, the Enable signal is a low level, and CC_CTRL is a low level.Therefore, the 4th NAND gate 306 is output as high level.Through after second not gate 307 and the 5th NAND gate 308, the output signal A of the 5th NAND gate 308 is a high level to this high level successively.
Demag is a high level, and as two input signals of the 6th NAND gate 309,309 are output as low level jointly for Demag and A, the 7th NAND gate 310 output high level, and behind the 3rd not gate 312, the Tons signal of generation is a low level.
After startup and reference voltage unit startup, the Enable signal becomes high level.C1 begins charging, and when the voltage on the C1 surpassed the 3rd reference voltage Vref 3, the CC_CTRL upset was high level.CC_CTRL is as the input signal of constant current control unit, and the output signal PFM of constant current control unit becomes high level, and this moment, the drive circuit of controller inside was started working, and FB is dragged down is negative voltage.When the voltage of controller CS end rose to second reference voltage Vref 2, the output signal PEAK_CTRL upset of the second comparator IC2 was high level.PEAK_CTRL is with the PFM signal at stop, and PFM becomes low level.At this moment, FB upset is positive voltage, becomes low level greater than the output signal Demag signal of first reference voltage Vref, 1, the first comparator of the first comparator IC1.
PFM delivers to first NAND gate 303 through after the delay of first delay cell 301 and first not gate 302 anti-phase successively, because first NAND gate 303 and second NAND gate 304 are formed rest-set flip-flops, has therefore kept 304 to be output as high level.Because the 3rd NAND gate 305 and the 4th NAND gate 306 are formed rest-set flip-flops, 304 output signal is as 305 input signal, and therefore 306 output also is high level.
Through 307 negates of second not gate, after exporting the NAND Logic computings with second NAND gate 304 again, the output signal A of the 5th NAND gate 308 is a low level, this A remains low level always, become low level up to CC_CTRL, the 4th NAND gate 306 output high level, second not gate 307 is changed to low level, and the output signal A of the 5th NAND gate 308 becomes high level.When A in the low level period, the output of the 6th NAND gate 309 remains high level, 311 outputs of the 8th NAND gate remain high level, 310 outputs of the 7th NAND gate remain low level, behind the 3rd not gate 312, Tons remains high level.
CC_CTRL has reflected the time period of the voltage on the C1 greater than the 3rd reference voltage Vref 3.
Before the voltage on the C1 was less than the 3rd reference voltage Vref 3, Tons kept high level.After Tons became low level, C1 voltage was recharged again, and after the voltage on the C1 was greater than Vref3, CC_CTRL was changed to high level again, and PFM is changed to high level.
The effect of signal A is to force the high level time section of Tons must be later than capacitor C 1 voltage to drop to below the Vref1, can guarantee the normal unlatching of PFM signal next time like this.
After FB became low level, the Demag signal became high level, the 6th NAND gate 309 output low levels, and the 7th NAND gate 310 output high level, behind the 3rd not gate 312, Tons becomes low level.
The secondary ON time control unit that the embodiment of the invention provides can accurately be exported Tons.But secondary ON time control unit can not correctly be exported Tons in the prior art, under special circumstances, logic error can occur.Referring to Fig. 4, this figure is a secondary ON time control unit structure chart of the prior art.
Signal A among this figure is a fixed delay, is the low level moment when the significant level time of signal A less than the upset of CC_CTRL signal, and then the high level of Tons is locked, can not be changed to low level.Capacitance voltage will be always by continuous discharge, and the charging path can not be opened, and will cause CC_CTRL to remain low level like this.Have only when CC_CTRL is changed to high level, PFM just can be changed to high level once more, just begins to enter next switch periods.
Therefore, the present invention is in order to guarantee the control signal of each correct calculation reflection secondary ON time, added the CC_CTRL control signal, the A that is provided with is controlled by CC_CTRL, effect is to drop to moment below the Vref3 for voltage that the high level period of forcing Tons must be later than C1, can guarantee the Tons signal of correct calculation reaction secondary ON time like this, and the normal unlatching of PFM switching signal next time.
Referring to Fig. 5, this figure is secondary ON time control unit embodiment two structure charts provided by the invention.
Secondary ON time control unit shown in Figure 5 is compared with Fig. 3, has increased other one tunnel control signal A2, and the A among Fig. 3 changes A1 in Fig. 4.
Among Fig. 5 A1 and A2 are carried out logic and operation, define a compound control signal A and force Tons in the A level is the low level time period, to remain high level.
Introduce A2 below and how to produce, increased by second delay cell 413, the 4th not gate 414, the 9th NAND gate 415 and first and door 416 among Fig. 5.
The output signal of second NAND gate 304 is as the input signal of second delay cell 413, and the output of second delay cell 413 connects an input of the 9th NAND gate 415, and another input connects the output of second NAND gate 304.The output signal of the 9th NAND gate 415 is A2.A2 and A1 as first with door two input signals of 416.First with door 416 output signal be A.
The purpose that present embodiment is introduced the A2 signal is a discharging current during much larger than charging current of guaranteeing C1, causing the too fast upset of CC_CTRL is low level, A1 low level time section is too short like this, under the very poor situation of the transformer coupled coefficient of Switching Power Supply, cause easily to make PFM in the next cycle be changed to the moment of high level too early.
Referring to Fig. 6, this figure is a constant current control unit structure chart provided by the invention.
The input signal of the constant current control unit that present embodiment provides comprises five, is respectively Enable, Tons, CC_CTRL, PEAK_CTRL and PRO.
Wherein, the PRO signal is a controller internal protection control signal, and when not reaching guard mode, PRO is a low level, and after guard mode was triggered, PRO was a high level.
First NOR gate 501 and second NOR gate 502 are formed a rest-set flip-flop; The 3rd NOR gate 503 and four nor gate 504 are formed another rest-set flip-flop.
The first input end of the 5th NOR gate 505 connects PRO, and second output connects the output of the 3rd NOR gate 503.
Enable and Tons are as the input signal of first NOR gate 501;
CC_CTRL is as the input signal of second NOR gate 502;
PEAK_CTRL is as the input signal of four nor gate 504;
After capacitor C 1 voltage surpasses Vref1, CC_CTRL becomes high level, behind the rest-set flip-flop through first NOR gate 501 and second NOR gate, 502 compositions, first NOR gate 501 is output as high level, again behind the rest-set flip-flop of the 3rd NOR gate 503 and four nor gate 504 compositions, the 3rd NOR gate 503 output low levels, after the 5th NOR gate 505, PFM is changed to high level.
When PFM was high level, the driver element among Fig. 2 was started working, former limit switch 101 conductings in the control chart 1, and the voltage of the former sampling edge resistance 111 among Fig. 1 begins to rise and delivers to the CS end.After the CS terminal voltage is higher than Vref3, produce the PEAK_CTRL signal, this signal is changed to high level with the output of the 3rd NOR gate 503, and after the 5th NOR gate 505, PFM is changed to low level.
Constant current control unit shown in Fig. 6, the rising edge of CC_CTRL has determined the rising edge of PFM, and PEAK_CTRL has determined the trailing edge of PFM.
Referring to Fig. 7, this figure is the oscillogram of each main node in the switching power source control circuit provided by the invention.
The high level time segment record of Tons the discharge time of capacitor C 1, the charging interval that the low level time section of Tons (being the high level time section of the complementary signal Tons_n of Tons) has write down capacitor C 1.
As can be seen, the rising edge of CC_CTRL has determined the rising edge of PFM among Fig. 7, and PEAK_CTRL has determined the trailing edge of PFM.
PFM is used to control the on off state of former limit switch, when PFM is high level, and former limit switch closure; When PFM was low level, former limit switch disconnected.
The rising edge of corresponding Tons of the moment of the trailing edge of PFM constantly.
Switching Power Supply is applied to the light-emitting diode field, major technique when realizing light modulation just need change the output current of Switching Power Supply according to the output voltage of dimmer, promptly supply with the electric current of light-emitting diode, follow the output voltage of dimmer and change with the output current of realizing Switching Power Supply.For Switching Power Supply schematic diagram shown in Figure 1, how Chinese patent application number realizes that for the application of " 201010273288.1 " discloses output current follows the voltage of DIM end and change.When but the voltage of DIM is got each value, need the output current of corresponding Switching Power Supply also to keep a constant value.Therefore the application's technical scheme is when how to realize that DIM is a definite value, and corresponding Io is a definite value.
By formula (1) as can be known, how will control Io is a definite value, and only needing control Tons/Tsw is that a definite value gets final product, and promptly Tons and Tsw keep changing in proportion.The high level of Tons has write down the discharge time of C1, and low level has write down the charging interval of C1, therefore, sets different DIM voltage, can obtain corresponding percentage of T ons.
In sum, circuit provided by the invention both can realize that Io was a definite value, can realize again when this circuit is used for light modulation, according to DIM voltage, made Io be stabilized in some definite values, realized light modulation.
The present invention also provides a kind of Switching Power Supply, and this Switching Power Supply comprises transformer and controller, and described controller comprises the constant current output control circuit of the described switch power controller of above embodiment.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (7)
1. the constant current output control circuit of a switch power controller is characterized in that, comprising: first comparator, second comparator, secondary ON time control unit, constant current control unit and driver element;
An input of described first comparator connects the FB end of controller, and another input connects first reference voltage, and output connects the first input end of secondary ON time control unit;
Described secondary ON time control unit is used to produce the signal that reflects the secondary ON time;
Second input of described secondary ON time control unit connects the output signal of the 3rd comparator, an input of the 3rd comparator connects an end of first electric capacity, the other end ground connection of first electric capacity, another input of the 3rd comparator connects the 3rd reference voltage, and the voltage on first electric capacity is discharged and recharged by the recombination current source;
When the output signal of described the 3rd comparator was high level, the output signal of described secondary ON time control unit was forced to keep high level; When the output signal of the 3rd comparator becomes low level, judge whether the secondary ON time finishes,
An input of second comparator connects the CS end of controller, another input connects second reference voltage, output connects the first input end of constant current control unit, second input of described constant current control unit connects the output of described secondary ON time control unit, and the 3rd input of described constant current control unit connects the output of the 3rd comparator; The 3rd input of described secondary ON time control unit connects the output signal of described constant current control unit; Described constant current control unit output PFM signal is given driver element, and described driver element is used for the drive signal of the on off state of limit, output control switch power supply Central Plains switch;
The rising edge of the rising edge decision PFM signal of the output signal of the 3rd comparator, the trailing edge of the output signal decision PFM signal of second comparator.
2. the constant current output control circuit of switch power controller according to claim 1, it is characterized in that described secondary ON time control unit comprises: first delay cell, first not gate, first rest-set flip-flop, second rest-set flip-flop, second not gate, the 5th NAND gate, the 6th NAND gate, the 3rd rest-set flip-flop and the 3rd not gate;
Described first rest-set flip-flop comprises first NAND gate and second NAND gate;
Described second rest-set flip-flop comprises the 3rd NAND gate and the 4th NAND gate;
Described the 3rd rest-set flip-flop comprises the 7th NAND gate and the 8th NAND gate;
The input of first delay cell connects the control signal of former limit switch, and output connects an input of first rest-set flip-flop through first not gate; Another input of first rest-set flip-flop connects the output signal of the enable signal and first comparator;
The output of described first rest-set flip-flop connects an input of second rest-set flip-flop, and another input of second rest-set flip-flop connects the output signal of second comparator;
The output of second rest-set flip-flop connects an input of the 5th NAND gate through second not gate, and another input of the 5th NAND gate connects the output of first rest-set flip-flop;
The output of the 5th NAND gate is connected the input of the 6th NAND gate with the output of first comparator;
The output of the output of the 6th NAND gate and the 5th NAND gate is connected two inputs of the 3rd rest-set flip-flop respectively, the output of the 3rd rest-set flip-flop connects the input of the 3rd not gate, and the output of the 3rd not gate is as the output of secondary ON time control unit.
3. the constant current output control circuit of switch power controller according to claim 1, it is characterized in that described secondary ON time control unit comprises: first delay cell, first not gate, first rest-set flip-flop, second rest-set flip-flop, second not gate, the 5th NAND gate, the 6th NAND gate, the 3rd rest-set flip-flop, the 3rd not gate, second delay cell, the 4th not gate, the 9th NAND gate and first and door;
Described first rest-set flip-flop comprises first NAND gate and second NAND gate;
Described second rest-set flip-flop comprises the 3rd NAND gate and the 4th NAND gate;
Described the 3rd rest-set flip-flop comprises the 7th NAND gate and the 8th NAND gate;
The input of first delay cell connects the control signal of former limit switch, and output connects an input of first rest-set flip-flop through first not gate; Another input of first rest-set flip-flop connects the output signal of the enable signal and first comparator;
The output of described first rest-set flip-flop connects an input of second rest-set flip-flop, and another input of second rest-set flip-flop connects the output signal of second comparator;
The output of second rest-set flip-flop connects an input of the 5th NAND gate through second not gate, and another input of the 5th NAND gate connects the output of first rest-set flip-flop;
The output of second rest-set flip-flop is connected an input of the 9th NAND gate successively with the 4th not gate through second delay cell, another input of the 9th NAND gate connects the output of second rest-set flip-flop;
The output of the output of the 5th NAND gate and the 9th NAND gate be connected respectively first with two inputs of door, first with output be connected an input of the 3rd rest-set flip-flop;
Another input of the 3rd rest-set flip-flop connects the output of the 6th NAND gate, and an input of the 6th NAND gate connects the output of first comparator, another input connection first of the 6th NAND gate and the output of door;
The output of the 3rd rest-set flip-flop connects the input of the 3rd not gate, and the output of the 3rd not gate is as the output of secondary ON time control unit.
4. the constant current output control circuit of switch power controller according to claim 1 is characterized in that, described constant current control unit comprises first NOR gate, second NOR gate, the 3rd NOR gate, four nor gate and the 5th NOR gate;
Described first NOR gate and second NOR gate are formed a rest-set flip-flop, and the 3rd NOR gate and four nor gate are formed another rest-set flip-flop;
The input of described first NOR gate connects the output of described secondary ON time control unit;
The input of described second NOR gate connects the output of described the 3rd comparator;
The input of described the 3rd NOR gate connects the output of first NOR gate;
The input of described four nor gate connects the output of second comparator;
An input of described the 5th NOR gate connects the output of the protected location of controller inside, and another input connects the output of the 3rd NOR gate;
The output of described the 5th NOR gate is as the output of constant current control unit.
5. the constant current output control circuit of switch power controller according to claim 1, it is characterized in that, the charging interval of described first electric capacity, the first capacitance discharges time was by the output signal control of secondary ON time control unit by the complementary signal control of the output signal of secondary ON time control unit.
6. the constant current output control circuit of switch power controller according to claim 4 is characterized in that, when guard mode is not triggered, and described protected location output low level; After guard mode is triggered, described protected location output high level.
7. a Switching Power Supply is characterized in that, comprising: transformer and controller, described controller comprise the constant current output control circuit of each described switch power controller of claim 1-6.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102983554A (en) * | 2012-12-31 | 2013-03-20 | 杭州士兰微电子股份有限公司 | Sampling short-circuit protection circuit for high-power factor driving system and method |
| CN103337943A (en) * | 2013-07-02 | 2013-10-02 | 上海新进半导体制造有限公司 | Conducting time generating circuit, method, as well as control circuit and switching power supply employing same |
| CN109298224A (en) * | 2018-09-13 | 2019-02-01 | 广州金升阳科技有限公司 | A kind of primary side detection circuit and primary side detection method |
| CN111585448A (en) * | 2020-06-22 | 2020-08-25 | 上海新进芯微电子有限公司 | Constant current output control circuit, switching power supply controller and switching power supply system |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090295348A1 (en) * | 2008-05-30 | 2009-12-03 | Active-Semi, Inc. | Constant current and voltage controller in a three-pin package with dual-use power pin |
| US20100238689A1 (en) * | 2009-03-20 | 2010-09-23 | Bcd Semiconductor Manufacturing Limited | Method and apparatus for controlling a constant current output in a switching mode power supply |
| CN101883461A (en) * | 2010-06-09 | 2010-11-10 | 北京交通大学 | LED adaptive constant current controller with power factor correction function |
| EP2259418A1 (en) * | 2009-06-02 | 2010-12-08 | Power Integrations, Inc. | Method and apparatus for input charge control of a power supply |
| CN101951177A (en) * | 2010-09-06 | 2011-01-19 | Bcd半导体制造有限公司 | Switch power supply system and switching power source control circuit |
-
2011
- 2011-05-06 CN CN 201110116519 patent/CN102185502B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090295348A1 (en) * | 2008-05-30 | 2009-12-03 | Active-Semi, Inc. | Constant current and voltage controller in a three-pin package with dual-use power pin |
| US20100238689A1 (en) * | 2009-03-20 | 2010-09-23 | Bcd Semiconductor Manufacturing Limited | Method and apparatus for controlling a constant current output in a switching mode power supply |
| EP2259418A1 (en) * | 2009-06-02 | 2010-12-08 | Power Integrations, Inc. | Method and apparatus for input charge control of a power supply |
| CN101883461A (en) * | 2010-06-09 | 2010-11-10 | 北京交通大学 | LED adaptive constant current controller with power factor correction function |
| CN101951177A (en) * | 2010-09-06 | 2011-01-19 | Bcd半导体制造有限公司 | Switch power supply system and switching power source control circuit |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102983554A (en) * | 2012-12-31 | 2013-03-20 | 杭州士兰微电子股份有限公司 | Sampling short-circuit protection circuit for high-power factor driving system and method |
| CN103337943A (en) * | 2013-07-02 | 2013-10-02 | 上海新进半导体制造有限公司 | Conducting time generating circuit, method, as well as control circuit and switching power supply employing same |
| CN103337943B (en) * | 2013-07-02 | 2016-05-18 | 上海新进半导体制造有限公司 | ON time produces circuit, method and applies its control circuit, Switching Power Supply |
| CN109298224A (en) * | 2018-09-13 | 2019-02-01 | 广州金升阳科技有限公司 | A kind of primary side detection circuit and primary side detection method |
| CN109298224B (en) * | 2018-09-13 | 2020-12-18 | 广州金升阳科技有限公司 | Primary side detection circuit and primary side detection method |
| CN111585448A (en) * | 2020-06-22 | 2020-08-25 | 上海新进芯微电子有限公司 | Constant current output control circuit, switching power supply controller and switching power supply system |
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Effective date of registration: 20210127 Address after: No. 1600, Zixing Road, Minhang District, Shanghai 200241 Patentee after: BCD (SHANGHAI) MICRO-ELECTRONICS Ltd. Address before: 200241 no.800, Yishan Road, Xuhui District, Shanghai Patentee before: BCD Semiconductor Manufacturing Ltd. |