CN102184159A - Base is {2n-1, 2n+1,2n} and {2n-1, 2n+1,22n+1} remainder system backward conversion device and method - Google Patents
Base is {2n-1, 2n+1,2n} and {2n-1, 2n+1,22n+1} remainder system backward conversion device and method Download PDFInfo
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- CN102184159A CN102184159A CN201110138465XA CN201110138465A CN102184159A CN 102184159 A CN102184159 A CN 102184159A CN 201110138465X A CN201110138465X A CN 201110138465XA CN 201110138465 A CN201110138465 A CN 201110138465A CN 102184159 A CN102184159 A CN 102184159A
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Abstract
The invention discloses a backward conversion (R2B) device and method of a residue number system (RNS) with bases of M1=[2<n-1>,2<n+1>,2<n>] and M2=[2<n-1>,2<n+1>,2<2n+1>]. An integer of the RNS is converted into a binary integer. In the invention, according to the characteristics of M2 and M1, M1 and M2 have one common group of sub residue bases MS=[2<n-1>,2<n+1>], firstly, backward conversion of the MS is completed, and then backward conversions of M12=[2<2n-1>,2<n>] and M22=[2<2n-1>,2<2n+1>] are respectively completed, and results of the backward conversions are conversion results of M1 and M2. In addition, the form of M22 is similar to the form of MS, therefore, M22 is realized by adopting the structure similar to MS, the module design is better reused, and the trouble of repeated design is avoided. The invention plays a positive pole in application of the RNS with a base of M1 or M2 in a digital signal processing system.
Description
Technical field
The present invention relates to the signal Processing field, specifically, relate to a kind of be used for communicating by letter and signal Processing back to conversion based on residue number system (RNS)---the RNS integer is to the conversion equipment and the method for bigit.
Background technology
Traditional binary numeration system has chain carry, has often limited the arithmetic speed of computing machine.Residue number system (RNS) is a kind of concurrent working mechanism and the system that follows free carry.Because this characteristic, in the past decade residue number system is being subjected to suitable attention aspect arithmetical operation and the signal Processing.At signal processing method based on residue number system, in Fourier transform, FIR wave filter, matrix inversion etc., the back is to conversion must go on foot through as the conversion from the remainder space to binary space, playing the part of important role, because it not only influences the speed of place system, also the hardware complexity to total system has a significant impact.Therefore, at a high speed, the back of low complex degree plays a part positive to transformational structure to the application of residue number system.
Summary of the invention
The purpose of this invention is to provide a kind of base and be respectively M
1={ 2
n-1,2
n+ 1,2
nAnd M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} back to conversion equipment and method thereof.
Particularly, one of purpose of the present invention provides a kind of base and is respectively M
1={ 2
n-1,2
n+ 1,2
nAnd M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} (RNS) back is to conversion (R2B) device, and it comprises:
The data pretreatment unit, it is based on remainder base M
1And M
2Have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} is with M
1Be decomposed into M
SAnd M
12={ 2
2n-1,2
n, with M
2Be decomposed into M
SAnd M
22={ 2
2n-1,2
2n+ 1};
The back is finished M respectively to converting unit
S, M
12And M
22Back to conversion.
Further, M
Safterwards adopt binary addition, shifting function, LUT etc. to conversion.
Further, above-mentioned M
Safterwards specifically comprise as lower member to conversion equipment:
(Ripple Carry Adder RCA), is used for calculating (x to the ripple carry adder 201 of a n+1 bit
1-x
2) value, Xi is meant, for N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N
The data cutout unit is used to intercept the high n bit of the output of this ripple carry adder, thereby obtains
The data shift cells left, it is right to be used for realizing
The operation of n bit moves to left;
The data splicing unit is used for the output result of data interception unit and data shift cells left unit is spliced, thereby obtains
In
Data storage cell is used to store h * (2
n+ 1) LUT, the degree of depth of LUT is 4, width is 2n;
(Carry Save Adder CSA), is used for finishing the carry save adder of a 2n bit
In the operation on last equal sign the right;
The output of the carry save adder of 2n bit is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
Further, the present invention according to Chinese remainder theorem to M
12Carry out the back to conversion.
Further, M
12afterwards further comprise following content to conversion equipment:
A CSA processor, it comprises three input items: the x of n bit
3Correspond to remainder base 2
n, the SUM of 2n bit and CARRY are that the back is to transformation result T;
N bit ripple carry adder RCA is used for the result of CSA processor is carried out carry addition;
The data cutout unit is used for the low n bit of the output of interception unit n bit ripple carry adder RCA, and its output is
In Y (n bit), its as final output result's high n bit, participates on the one hand on the other hand
In the computing of T-Y, the computing of T-Y is as final output result's low 2n bit.
Further, M
22Adopt and M
SSimilarly structure realizes.
Another object of the present invention is to, provide a kind of base to be respectively M
1={ 2
n-1,2
n+ 1,2
nAnd M
3={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} (RNS) back is to conversion (R2B) method, and it comprises following steps:
The data pre-treatment step, it is based on remainder base M
1And M
2Have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} is with M
1Be decomposed into M
SAnd M
13={ 2
2n-1,2
n, with M
2Be decomposed into M
SAnd M
23={ 2
2n-1,2
2n+ 1}:
The back is finished M respectively to switch process
S, M
12And M
22Back to conversion.
Further, M
Safterwards adopt binary addition, shifting function, LUT etc. to conversion.
Further, M
Safterwards specifically comprise to switch process:
(Ripple Carry Adder RCA) is used for calculating (x with the ripple carry adder 201 of a n+1 bit
1-x
2) value, Xi is meant, for N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N
Above-mentioned intercepting and the output result that moves to left are spliced, thereby obtain
Storage h * (2
n+ 1) in LUT, the degree of depth of LUT is 4, and width is 2n;
Realize by CSA
In the operation on last equal sign the right;
The output of CSA is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
Further, according to Chinese remainder theorem to M
12Carry out the back to conversion.
Further, M
12afterwards specifically comprise to switch process:
A CSA processor is imported 3: the x of n bit
3Correspond to remainder base 2
n, the part of 2n bit and SUM and carry CARRY are that the back is to transformation result T;
Result to the CSA processor carries out carry addition;
The low n bit of intercepting abovementioned steps output, its output is
In Y (n bit), its as final output result's high n bit, participates on the one hand on the other hand
In the computing of T-Y, the computing of T-Y is as final output result's low 2n bit.
Further, M
22afterwards adopt and M to conversion
SSimilarly step realizes.
Generally speaking, the back of residue number system is that (Chinese Remainder Theory CRT) finishes by Chinese remainder theorem to conversion.CRT is described below:
For N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N, note X (x
1, x
2..., x
N), if known x
1, x
2..., x
N, then X can calculate by following formula
Below be an inference of Chinese remainder theorem:
Given remainder base { m
1, m
2..., m
NAnd one group of remainder (x
1, x
2..., x
N), then the binary representation of this group remainder can be calculated by following formula
Wherein
...,
When N=2, make m
1<m
2, get by formula (2)
By formula (3),
X=x
2+k(x
1-x
2)m
2+tm
1m
2 (4)
T ∈ wherein.Select suitable t can guarantee X ∈ [0, m
1m
2-1].Formula (4) both sides are with multiply by (m
2-m
1), delivery m then
1m
2
Wherein α=-k (x
1-x
2)+t (m
2-m
1).Same on formula (5) both sides divided by (m
2-m
1), then
If m
2-m
1=2
k(k ∈), then formula (6) can be rewritten as
Wherein
And n=max (n
1, n
2),
(x is got in expression
1-x
2) high n-k bit,
(x is got in expression
1-x
2) low k bit.In formula (8), because x
1, x
2Be known with k, therefore, can pass through (x
1-x
2) sign bit Sign (x
1-x
2) and low k position, calculate in advance the value of h.
In conjunction with M
1And M
2The characteristics of these two groups of remainder bases, the present invention at first divides into groups { (2 with three mould remainder bases
n-1,2
n+ 1), 2
nAnd { (2
n-1,2
n+ 1), 2
2n+ 1} is promptly earlier M
s={ 2
n-1,2
n+ 1} handles as a sub-remainder base, then with 2
n-1 and 2
n+ 1 multiplies each other obtains a new remainder base, is designated as m
t=(2
n-1) * (2
n+ 1)=2
2n-1, at last more respectively to M
12={ 2
2n-1,2
nAnd M
22={ 2
2n-1,2
2n+ 1} handles, and can obtain required M
1And M
2Back to conversion.
For M
s={ 2
n-1,2
n+ 1}, m
2-m
1=2, by formula (7) and formula (8),
Wherein
And Sign (x
1-x
2),
Relation between α and the h is as shown in table 1.
Therefore, can be with h * (2
n+ 1) calculate in advance, (Lookup table is LUT) or among the ROM, then according to Sign (x to be stored in look-up table
1-x
2) and
Retrieve corresponding value.In addition, because
Be the integer of n bit, therefore,
Be will
The integral body n bit (the right mend 0) that moves to left.So,
Value can obtain by simple concatenation, be about to two n bits
Being connected together gets final product, and does not need extra addition or multiply operation.
So far, tried to achieve and finished M
s={ 2
n-1,2
n+ 1}'s is back to conversion.For M
1And M
2, need respectively to M
12={ 2
2n-1,2
nAnd M
22={ 2
2n-1,2
2n+ 1} carries out the back can obtain final result to conversion.Introduce M below respectively
12And M
22Back to conversion.
For M
12={ 2
2n-1,2
n, get by formula (3)
Make Y=T-x
3, T is the number of a 2n bit, so the scale-of-two of Y can be expressed as (y
2n-1Y
N-1Y
1y
0)
2Therefore, formula (11) can be rewritten as
Therefore, M
1Final back to transformation result X can with
Splice in (y
N-1Y
1y
0)
2Obtain afterwards.That is to say that the high n bit of X is (y
N-1Y
1y
0)
2, low 2n bit is
Contrast M
22={ 2
2n-1,2
2n+ 1} and M
s={ 2
n-1,2
n+ 1} can find, M
22Afterwards can adopt and be similar to M to conversion
sMethod realize.Therefore
Wherein
In like manner, calculate in advance
Be stored among LUT or the ROM.
Also can be by with two 2n bits
Being stitched together obtains, and does not need extra additions and multiply operation.
In the present invention, at first according to M
1And M
2Characteristics, promptly they have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} finishes M earlier
SBack to conversion, finish M then on this basis more respectively
13={ 2
2n-1,2
nAnd M
33={ 2
2n-1,2
2n+ 1}'s is back to conversion, and their result promptly is respectively M
1And M
3Transformation result.In addition, M
22Form and M
SSimilar, therefore can adopt similar structure to realize, thereby make modular design be reused well, avoided the trouble of design iterations.To based on M
1Or M
2The application of this residue number system in digital information processing system played positive effect.
Description of drawings
Fig. 1 is that base is M
1={ 2
n-1,2
n+ 1,2
nResidue number system back to the conversion scantling plan;
Fig. 2 is that base is M
S={ 2
n-1,2
nThe residue number system of+1} back to the Change-over knot composition;
Fig. 3 is that base is M
12={ 2
2n-1,2
nResidue number system back to the Change-over knot composition;
Fig. 4 is that base is M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} back to the conversion scantling plan;
Fig. 5 is that base is M
22={ 2
2n-1,2
2nThe residue number system of+1} back to the Change-over knot composition.
Embodiment
Below in conjunction with embodiment foregoing invention content of the present invention is described in further detail.
But this should be interpreted as that the scope of the above-mentioned theme of the present invention only limits to following embodiment.Not breaking away under the above-mentioned technological thought situation of the present invention, according to ordinary skill knowledge and customary means, make various replacements and change, all should comprise within the scope of the invention.
A kind of base is respectively M
1={ 2
n-1,2
n+ 1,2
nAnd M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} (RNS) back is to conversion (R2B) device, and it comprises:
The data pretreatment unit, it is based on remainder base M
1And M
2Have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} is with M
1Be decomposed into M
SAnd M
12={ 2
2n-1,2
n, with M
2Be decomposed into M
SAnd M
22={ 2
2n-1,2
2n+ 1};
The back is finished M respectively to converting unit
S, M
12And M
22Back to conversion.
Further, M
Safterwards adopt binary addition, shifting function, LUT etc. to conversion.
Further, above-mentioned M
Safterwards specifically comprise as lower member to conversion equipment:
(Ripple Carry Adder RCA), is used for calculating (x to the ripple carry adder 201 of a n+1 bit
1-x
2) value, Xi is meant, for N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N;
Data cutout unit 202 is used to intercept the high n bit of the output of this ripple carry adder, thereby obtains
Data shift cells left 203, it is right to be used for realizing
The operation of n bit moves to left;
Data splicing unit 204 is used for the output result of data interception unit 202 and data shift cells left unit 203 is spliced, thereby obtains
In
Data storage cell 205 is used to store h * (2
n+ 1) LUT, the degree of depth of LUT is 4, width is 2n;
(Carry Save Adder CSA), is used for finishing the carry save adder 206 of a 2n bit
In the operation on last equal sign the right;
The output of the carry save adder 206 of 2n bit is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
Further, the present invention according to Chinese remainder theorem to M
12Carry out the back to conversion.
Further, M
12afterwards further comprise following content to conversion equipment:
A CSA processor, it comprises three input items: the x of n bit
3Correspond to remainder base 2
n, the SUM of 2n bit and CARRY are that the back is to transformation result T;
N bit ripple carry adder RCA 302 (1) is used for the result of CSA processor is carried out carry addition;
Further, M
22Adopt and M
SSimilarly structure realizes.
Another object of the present invention is to, provide a kind of base to be respectively M
1={ 2
n-1,2
n+ 1,2
nAnd M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} (RNS) back is to conversion (R2B) method, and it comprises following steps:
The data pre-treatment step, it is based on remainder base M
1And M
2Have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} is with M
1Be decomposed into M
SAnd M
13={ 2
2n-1,2
n, with M
2Be decomposed into M
SAnd M
22={ 2
2n-1,2
2n+ 1};
The back is finished M respectively to switch process
S, M
12And M
22Back to conversion.
Further, M
Safterwards adopt binary addition, shifting function, LUT etc. to conversion.
Further, M
Safterwards specifically comprise to switch process:
(Ripple Carry Adder RCA) is used for calculating (x with the ripple carry adder 201 of a n+1 bit
1-x
2) value, Xi is meant, for N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N
Intercept the high n bit of the output of this ripple carry adder, thereby obtain
Above-mentioned intercepting and the output result that moves to left are spliced, thereby obtain
Storage h * (2
n+ 1) in LUT, the degree of depth of LUT is 4, and width is 2n;
Realize by CSA
In the operation on last equal sign the right;
The output of CSA is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
Further, according to Chinese remainder theorem to M
12Carry out the back to conversion.
Further, M
12afterwards specifically comprise to switch process:
A CSA processor is imported 3: the x of n bit
3Correspond to remainder base 2
n, the part of 2n bit and SUM and carry CARRY are that the back is to transformation result T;
Result to the CSA processor carries out carry addition;
The low n bit of intercepting abovementioned steps output, its output is
In Y (n bit), its as final output result's high n bit, participates on the one hand on the other hand
In the computing of T-Y, the computing of T-Y is as final output result's low 2n bit.
Further, M
22afterwards adopt and M to conversion
SSimilarly step realizes.
Fig. 1 shows base for { 2
n-1,2
n+ 1,2
nResidue number system back to the conversion general structure.It is made up of 101 and 102 two big unit.According to formula (9), (10) and table 1, unit 101 is used for finishing M
s={ 2
n-1,2
n+ 1}'s is back to conversion.Unit 102 is for to finish M according to formula (12) and (13)
12={ 2
2n-1,2
nBack to conversion, thereby obtain { 2
n-1,2
n+ 1,2
nFinal back to the result of conversion.
Fig. 2 shows base for { 2
n-1,2
nThe residue number system of+1} back to the Change-over knot composition is corresponding to the unit among Fig. 1 101.Unit 201 is that (Ripple Carry Adder RCA), is used for calculating (x for the ripple carry adder of a n+1 bit
1-x
2) value.The high n bit of the output of unit 202 interceptings 201, thus obtain
It is right that unit 203 is used for realizing
The move to left operation of n bit, unit 204 is used for the output result of unit 202 and unit 203 is spliced, thereby in the formula of obtaining (9)
Unit 205 comes with storage h * (2
n+ 1) LUT, wherein h has only 4 values, sees Table 1.The degree of depth of LUT is 4, and width is 2n.According to (x
1-x
2) sign bit Sign (x
1-x
2) and lowest order
Can find corresponding h * (2
n+ 1) value.206 is that (Carry Save Adder CSA), is used for the operation on last equal sign the right in the perfect (9) for the carry save adder of a 2n bit.Because the operation on last the equal sign the right in the formula (9) is obtained by three number additions, is therefore realized by CSA.The output of unit 206 is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
Fig. 3 shows base for { 2
2n-1,2
nResidue number system back to conversion implementation structure view, corresponding to the unit among Fig. 1 102.X in three inputs
3(n bit) corresponds to remainder base 2
n, two other input SUM and CARRY (being the 2n bit) are 101 output T.Unit 302 (1) is n bit ripple carry adder RCA.Unit 301 (1) is output as the number of 2n bit, and why unit 302 (1) selects the RCA of n bit, is because 303 of unit need the low n bit of the output of interception unit 302 (1).The output of unit 303 is the Y (n bit) in the formula (12), and it is on the one hand as the final high n bit of exporting the result, the computing of the T-Y in the participatory (12) on the other hand.The computing of T-Y is as final output result's low 2n bit.
Fig. 4 shows base for { 2
n-1,2
n+ 1,2
2nThe residue number system of+1} back to the Change-over knot composition.Unit 401 is just the same with unit 101 or Fig. 2 among Fig. 1, is used for finishing base for { 2
n-1,2
n+ 1}'s is back to conversion.Unit 402 is used for finishing base for { 2
2n-1,2
2n+ 1}'s is back to conversion.Because { 2
2n-1,2
2n+ 1} and { 2
n-1,2
n+ 1} similarity, { 2
2n-1,2
2nBack can the employing to conversion of+1} is similar to { 2
n-1,2
nThe structure of+1} realizes.
Fig. 5 is that base is for { 2
2n-1,2
2nThe residue number system of+1} back to conversion implementation structure view, corresponding to unit among Fig. 4 402.It has three input x
3, SUM and CARRY, wherein x
3Corresponding to remainder base 2
2n+ 1, SUM and CARRY are part and and the carry of the output T of unit 401.Unit 501 (1) is a 2n+1 bit CSA, is used for T-x in the perfect (13)
3Computing.Unit 502 (1) is exported to do to merge to unit 501 (1) and is handled, and obtains a 2n+1 bit output.Unit 503 is used for finishing
Operation, the i.e. high 2n bit of interception unit 502 (1).It is right that unit 504 is used for realizing
The operation of the 2n bit that moves to right, unit 505 is used for finishing the concatenation to unit 503 and unit 504 output results, obtains in the formula (13)
Unit 506 is that a degree of depth is 4, and width is the LUT of 4n bit, is used for storing
Value; It is by T-x
3Sign bit Sign (T-x
3) and lowest order
Common retrieval, thus obtain corresponding
With Sign (T-x
3),
Relation see Table 2.Unit 501 (2) and unit 501 (3) are the CSA of 4n bit, and 502 (2) is the RCA of 4n bit.Their threes are used in the common perfect (13)
Operation, thus M obtained
2Final back to transformation result.
Claims (10)
1. a base is M
1={ 2
n-1,2
n+ 1,2
nAnd M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} (RNS) back is characterized in that to conversion (R2B) device, comprises:
The data pretreatment unit, it is based on remainder base M
1And M
2Have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} is with M
1Be decomposed into M
SAnd M
12={ 2
2n-1,2
n, with M
2Be decomposed into M
SAnd M
22={ 2
2n-1,2
2n+ 1};
The back is finished M respectively to converting unit
S, M
12And M
22Back to conversion.
2. device according to claim 1 is characterized in that: M
Safterwards adopt binary addition, shifting function, LUT to conversion.
3. device according to claim 2 is characterized in that M
Safterwards specifically comprise as lower member to conversion equipment:
The ripple carry adder 201 of a n+1 bit is used for calculating (x
1-x
2) value, Xi is meant, for N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N;
Data cutout unit 202 is used to intercept the high n bit of the output of this ripple carry adder, thereby obtains
Data shift cells left 203, it is right to be used for realizing
The operation of n bit moves to left;
Data splicing unit 204 is used for the output result of data interception unit 202 and data shift cells left unit 203 is spliced, thereby obtains
In
Data storage cell 205 is used to store h * (2
n+ 1) LUT, the degree of depth of LUT is 4, width is 2n;
(Carry Save Adder CSA), is used for finishing the carry save adder 206 of a 2n bit
In the operation on last equal sign the right;
The output of the carry save adder 206 of 2n bit is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
4. according to claim 1 or 2 or 3 described devices, it is characterized in that: according to Chinese remainder theorem to M
12Carry out the back to conversion.
5. device according to claim 4 is characterized in that: M
12afterwards further comprise following content to conversion equipment:
A CSA processor, it comprises three input items: the x of n bit
3Correspond to remainder base 2
n, the part of 2n bit and SUM and carry CARRY are that the back is to transformation result T;
N bit ripple carry adder RCA 302 (1) is used for the result of CSA processor is carried out carry addition;
Data cutout unit 303 is used for the low n bit of the output of interception unit n bit ripple carry adder RCA 302 (1), and its output is
In the Y of n bit, its as final output result's high n bit, participates on the one hand on the other hand
In the computing of T-Y, the computing of T-Y is as final output result's low 2n bit.
6. according to the wherein any described device of claim 1,2,3,5, it is characterized in that: M
22Adopt and M
SSimilarly structure realizes.
7. a base is M
1={ 2
n-1,2
n+ 1,2
nAnd M
2={ 2
n-1,2
n+ 1,2
2nThe residue number system of+1} (RNS) back is characterized in that to conversion (R2B) method, comprises following steps:
The data pre-treatment step, it is based on remainder base M
1And M
2Have one group of common sub-remainder base M
S={ 2
n-1,2
n+ 1} is with M
1Be decomposed into M
SAnd M
12={ 2
2n-1,2
n, with M
2Be decomposed into M
SAnd M
22={ 2
2n-1,2
2n+ 1};
The back is finished M respectively to switch process
S, M
12And M
22Back to conversion.
8. method according to claim 7 is characterized in that: described M
Safterwards specifically comprise to switch process:
(Ripple Carry Adder RCA) is used for calculating (x with the ripple carry adder 201 of a n+1 bit
1-x
2) value, Xi is meant, for N coprime in twos positive integer m
1, m
2..., m
N, make M=m
1* m
2* ... * m
N, any one positive integer X in interval [0, M-1], it is about m
1, m
2..., m
NRemainder be respectively
I=1,2 ..., N;
Above-mentioned intercepting and the output result that moves to left are spliced, thereby obtain
Storage h * (2
n+ 1) in LUT, the degree of depth of LUT is 4, and width is 2n;
Realize by CSA
In the operation on last equal sign the right;
The output of CSA is { 2
n-1,2
n+ 1}'s is back to transformation result T, and it is made up of two parts: part and SUM and carry CARRY.
9. according to claim 7 or 8 described methods, it is characterized in that: according to Chinese remainder theorem to M
12Carry out the back to conversion, described M
12afterwards specifically comprise to switch process:
A CSA processor is imported 3: the x of n bit
3Correspond to remainder base 2
n, the part of 2n bit and SUM and carry CARRY are that the back is to transformation result T;
Result to the CSA processor carries out carry addition;
The low n bit of intercepting abovementioned steps output, its output is
In the Y of n bit, its as final output result's high n bit, participates on the one hand on the other hand
In the computing of T-Y, the computing of T-Y is as final output result's low 2n bit.
10. according to any described method in the claim 7,8,9, it is characterized in that: M
22afterwards adopt and M to conversion
SSimilarly step realizes.
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CN103001605A (en) * | 2012-11-02 | 2013-03-27 | 同济大学 | DA-RNS (distributed arithmetic-residue number system) algorithm based FIR (finite impulse response) filter realizing method |
CN109787585A (en) * | 2019-01-31 | 2019-05-21 | 电子科技大学 | A kind of FIR filtering system based on nested type residue number system |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103001605A (en) * | 2012-11-02 | 2013-03-27 | 同济大学 | DA-RNS (distributed arithmetic-residue number system) algorithm based FIR (finite impulse response) filter realizing method |
CN103001605B (en) * | 2012-11-02 | 2015-04-15 | 同济大学 | DA-RNS (distributed arithmetic-residue number system) algorithm based FIR (finite impulse response) filter realizing method |
CN109787585A (en) * | 2019-01-31 | 2019-05-21 | 电子科技大学 | A kind of FIR filtering system based on nested type residue number system |
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