CN109787585A - A kind of FIR filtering system based on nested type residue number system - Google Patents
A kind of FIR filtering system based on nested type residue number system Download PDFInfo
- Publication number
- CN109787585A CN109787585A CN201910097500.4A CN201910097500A CN109787585A CN 109787585 A CN109787585 A CN 109787585A CN 201910097500 A CN201910097500 A CN 201910097500A CN 109787585 A CN109787585 A CN 109787585A
- Authority
- CN
- China
- Prior art keywords
- residue number
- result
- remainder
- number system
- nested type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
The present invention provides a kind of FIR filtering systems based on nested type residue number system, belong to digital signal processing technique field.The binary number of input is converted to remainder to converting unit before and indicated by the present invention, and the remainder converted by biggish remainder base expression is passed through into the modulus again of embedded remainder method again, then the multiplication of script and add operation are replaced using mode multiplier and mould adder, binary system output is converted back to converting unit after finally final result is passed through, resource required for constructing traditional filter is reduced, and reduces its time delay.
Description
Technical field
The invention belongs to digital signal processing technique field, in particular to a kind of FIR filter based on nested type residue number system
Wave system system.
Background technique
Corresponding (Finite Impulse Response, the FIR) filter of finite impulse may be designed to any width because of it
Frequency characteristic, while guaranteeing accurate, stringent linear phase characteristic, it is one stable that unit sample respo, which is time-limited,
System, therefore it is one of the most frequently used, most important filter in digital information processing system.Realize Finite Impulse Response filter most
Main target is not only to obtain the filter coefficient for meeting performance indicator, while also to economize on resources or reduce as much as possible institute
The hardware resource of consumption.
Residue number system (Residue Number System, RNS) is a non-weighted value characterization system.In remainder system
In system, integer X one big passes through one group of relatively prime remainder base { m two-by-two1,m2,m3…mLIt is divided into one group of independent parallel operation
Small integer { x1,x2,x3…xL, in additions and multiplications, no-carry is propagated between each parallel modules, to reduce pass
The key path delay of time, therefore be widely used and study in the Digital Signal Processing with a large amount of multiply-add operations.
Since the remainder base in residue number system is made of integer relatively prime two-by-two, we have no idea to look into using unified
Table (Look-Up Tables, LUTs) structure is looked for realize the arithmetic element of residue number system.And nested type residue number system (Nested
Residue Number System, NRNS) it then can be very good to solve this problem, save more resources.
Summary of the invention
It is an object of the invention to reduce resource required for constructing traditional filter, and reduce its time delay.
A kind of FIR filtering system based on nested type residue number system, comprising:
Binary system to residue number system (Residue Number System, RNS) forward direction converting unit, according to generation
First remainder base { m1,m2,m3,…,mi,…,mLThe binary number X of input is converted, obtain transformation result { x1,x2,
x3,…,xi,…,xL}；
Residue number system is extended to the two of nested type residue number system (Nested Residue Number System, NRNS)
Secondary converting unit, according to the second remainder base to the transformation result { x1,x2,x3,…,xi,…,xLIn the i-th item data xiInto
Row two times transfer obtains two times transfer result { x1,x2,x3,…,{xi1,xi2,…,xij}i,…,xL}；
Arithmetic element under corresponding filtering channel, based on corresponding look-up table (Look-Up-Table, LUT) corresponding
The mould that data are carried out in channel sums it up modular multiplication, obtains operation result；
Operation result is converted to binary system output, obtains filter result by backward converting unit.
Further, the step of generation the first remainder base includes:
Finite impulse response (FIR) (Finite Impulse Response, FIR) filtering system is constructed, is generated corresponding
Verilog code selects the first remainder base according to the digit of the output data of filtering system described in the code, makes defeated
The digit of data is in the first remainder base dynamic range out.
Further, when output data is 32, the first remainder base for using is { 24-1,24,24+1,211-1,211+1}。
Further, when output data is 32, the second remainder base for using is { 24-1,24,24+ 1 }, to described first
2 in remainder base11- 1 and 211Result after+1 conversion carries out two times transfer.
Further, the step of two times transfer unit progress two times transfer includes:
According to the second remainder base to the transformation result { x1,x2,x3,…,xi,…,xLIn the i-th item data xiCarry out two
Secondary conversion, obtains { x1,x2,x3,…,{xi1,xi2,…,xij}i,…,xL, wherein the i-th item data in the transformation result is
Binary number X passes through biggish one or several m in the first remainder baseiObtained result xi。
Further, the arithmetic element calls LUT to carry out mould adduction modular multiplication under each channel, obtains operation knot
Fruit.
Further, operation result is converted to binary system output by the backward converting unit, and preferential conversion is by secondary
The operation result of conversion, obtains filter result.
Beneficial effects of the present invention: the present invention provides a kind of FIR filtering systems based on nested type residue number system, will be defeated
The binary number entered is converted to remainder to converting unit before and indicates, and the remainder converted by biggish remainder base is indicated
Again by the modulus again of embedded remainder method, the multiplication of script and add operation are then used into mode multiplier and Mo Jia
Musical instruments used in a Buddhist or Taoist mass replacement converts back binary system output to converting unit after finally passing through final result, reduces and construct traditional filtering
Resource required for device, and reduce its time delay.
Detailed description of the invention
Fig. 1 is the structure chart for the FIR filtering system based on nested type residue number system that the embodiment of the present invention is supplied to.
Fig. 2 is 8 input, 4 output look-up table means figure.
Fig. 3 is 10 output, 5 output look-up table means figure.
In figure: 10-FIR filtering system；To converting unit before 110-；120- two times transfer unit；130- arithmetic element；
To converting unit after 140-.
Specific embodiment
The embodiment of the present invention is described further with reference to the accompanying drawing.
Referring to Fig. 1, a kind of FIR filtering system 10 based on nested type residue number system provided by the invention, comprising: forward direction
Converting unit 110, two times transfer unit 120, arithmetic element 130 and backward converting unit 140.
Input terminal input is binary number X, is handled via forward direction converting unit 110.
The first remainder base { m in forward direction converting unit 1101,m2,m3,…,mi,…,mLBinary number X is converted to it is remaining
Number { x1,x2,x3,…,xi,…,xLIndicate.
In the present embodiment, the first remainder base can be obtained by following steps:
FIR filter needed for being constructed using the FDATOOL of MATLAB, generates corresponding Verilog code, according in code
The digit of the output data of filter selects the first remainder base, and the product of remainder base is made to be greater than the value of maximum bit wide, i.e. output number
According to digit in the first remainder base dynamic range.
In addition, according to the building of other units in code completion system.
In the preferred embodiment of the present embodiment, use output data for 32 FIR filters, the first remainder base of use
It is { 24-1,24,24+1,211-1,211+ 1 }, the dynamic range that can be indicated isIt is by the binary number X after the conversion of the first remainder base
{x1,x2,x3,x4,x5}。
Two times transfer unit 120, according to the second remainder base to transformation result { x1,x2,x3,…,xi,…,xLIn i-th
Data xiTwo times transfer is carried out, two times transfer result { x is obtained1,x2,x3,…,{xi1,xi2,…,xij}i,…,xL, wherein turn
Changing the i-th item data in result is that binary number X passes through biggish one or several m in the first remainder baseiObtained result
xi。
In the present embodiment, since the remainder base in residue number system is made of integer relatively prime two-by-two, we have no idea
The arithmetic element 130 of residue number system is realized using unified look-up table (Look-Up Table, LUT) structure.And more than nested type
Number system (Nested Residue Number System, NRNS) then can be very good to solve this problem, by residue number system
In remainder base { m1,m2,m3,…,mi,…,mLIn i-th again using one group two-by-two relatively prime remainder basis representation be { m1,
m2,m3,…,{mi1,mi2,…,mij}i,…,mL, it is smaller size by modulus factorization, i.e., by m on integer X mouldiDistinguish again afterwards
M on mouldi1,mi2,…,mij, unified LUT can be used based on the arithmetic element 130 in NRNS in this way, save more moneys
Source, wherein mi1×mi2×…×mij>mi。
Preferably, the second remainder base used is { 24-1,24,24+ 1 }, on X mould 211-1,211Value x after+14,x5Again
Once pass through the second remainder base { 24-1,24,24+ 1 } conversion, is expressed as { x41,x42,x43And { x51,x52,x53, this
Sample, completes the conversion of binary number system to residue number system, and X is expressed as in residue number systemIn this way, x1、x41And x51, x2、x42And x52,
x3、x43And x53Identical LUT can be called in subsequent mould adduction modular multiplication, saves more resources.
Arithmetic element 130 carries out data based on corresponding look-up table (Look-Up-Table, LUT) in respective channel
Mould sums it up modular multiplication, obtains operation result.
In the preferred embodiment of the present embodiment, mould 2 is realized using look-up table LUT4- 1, mould 24, mould 24+ 1 adder and multiplication
Device, wherein mould 24- 1 and mould 24Adder, multiplier because bit wide be all 4, be all using 8 input 4 output lookups
Table structure is as shown in Figure 2.And mould 24+ 1 bit wide is 5, so mould 24+ 1 adder and multiplier uses 10 input, 5 output
Look-up tables'implementation it is as shown in Figure 3.The mould of residue number system is completed under each remainder channel by the LUT that arithmetic element 130 is realized
Sum it up modular multiplication, i.e., corresponding filtering operation.
Operation result is converted to binary system output by backward converting unit 140, and the operation of two times transfer is passed through in preferential conversion
As a result, obtaining filter result.
In the preferred embodiment of the present embodiment, first convert{24-1,24,24+1211+
1 two-part can be obtained final filter result as a result, then again converting back last result under binary system.
To sum up shown in, the present invention first with Matlab FDATOOL kit designs need FIR filter and generate phase
The Verilog code answered selects the first remainder base according to the digit of output data in the code of generation, makes to export digit first
In the dynamic range of remainder base；Then the building that other units are completed according to code, the forward direction conversion including binary system to remainder
Unit 110, two times transfer unit 120, the mould adder and mode multiplier in each channel, remainder to binary converting unit；
Binary number X enters in the FIR system that the present invention constructs, and remainder expression is converted to converting unit 110 by preceding, by remainder table
Show again by the method for embedded remainder modulus again, the multiplication of script and add operation are then used into mode multiplier and mould
Adder replacement converts back binary system output to converting unit 140 after finally passing through final result, obtains filter result.
Those of ordinary skill in the art will understand that embodiment here be to help reader understand it is of the invention
Principle, it should be understood that protection scope of the present invention is not limited to such specific embodiments and embodiments.This field it is common
Technical staff disclosed the technical disclosures can make the various various other tools for not departing from essence of the invention according to the present invention
Body variations and combinations, these variations and combinations are still within the scope of the present invention.
Claims (7)
1. a kind of FIR filtering system based on nested type residue number system characterized by comprising
Binary system to residue number system (Residue Number System, RNS) forward direction converting unit, according to the first of generation
Remainder base { m1,m2,m3,…,mi,…,mLThe binary number X of input is converted, obtain transformation result { x1,x2,x3,…,
xi,…,xL}；
Residue number system is extended to secondary turn of nested type residue number system (Nested Residue Number System, NRNS)
Unit is changed, according to the second remainder base to the transformation result { x1,x2,x3,…,xi,…,xLIn the i-th item data xiCarry out two
Secondary conversion obtains two times transfer result { x1,x2,x3,…,{xi1,xi2,…,xij}i,…,xL}；
Arithmetic element under corresponding filtering channel, based on corresponding look-up table (Look-Up-Table, LUT) in respective channel
The interior mould for carrying out data sums it up modular multiplication, obtains operation result；
Operation result is converted to binary system output, obtains filter result by backward converting unit.
2. as described in claim 1 based on the FIR filtering system of nested type residue number system, which is characterized in that generate described the
The step of one remainder base includes:
Finite impulse response (FIR) (Finite Impulse Response, FIR) filtering system is constructed, corresponding Verilog generation is generated
Code selects the first remainder base according to the digit of the output data of filtering system described in the code, makes output data
Digit is in the first remainder base dynamic range.
3. as claimed in claim 2 based on the FIR filtering system of nested type residue number system, which is characterized in that output data is
At 32, the first remainder base for using is { 24-1,24,24+1,211-1,211+1}。
4. as claimed in claim 3 based on the FIR filtering system of nested type residue number system, which is characterized in that output data is
At 32, the second remainder base for using is { 24-1,24,24+ 1 }, to 2 in the first remainder base11- 1 and 211After+1 conversion
Result carry out two times transfer.
5. as described in claim 1 based on the FIR filtering system of nested type residue number system, which is characterized in that described secondary turn
Changing the step of unit carries out two times transfer includes:
According to the second remainder base to the transformation result { x1,x2,x3,…,xi,…,xLIn the i-th item data xiCarry out secondary turn
It changes, obtains { x1,x2,x3,…,{xi1,xi2,…,xij}i,…,xL, wherein the i-th item data in the transformation result be two into
Number X processed passes through biggish one or several m in the first remainder baseiObtained result xi。
6. as described in claim 1 based on the FIR filtering system of nested type residue number system, which is characterized in that the operation list
Member calls LUT to carry out mould adduction modular multiplication under each channel, obtains operation result.
7. as described in claim 1 based on the FIR filtering system of nested type residue number system, which is characterized in that described backward turn
It changes unit and operation result is converted into binary system output, preferential conversion passes through the operation result of two times transfer, obtains filter result.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910097500.4A CN109787585A (en) | 2019-01-31 | 2019-01-31 | A kind of FIR filtering system based on nested type residue number system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910097500.4A CN109787585A (en) | 2019-01-31 | 2019-01-31 | A kind of FIR filtering system based on nested type residue number system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109787585A true CN109787585A (en) | 2019-05-21 |
Family
ID=66503963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910097500.4A Pending CN109787585A (en) | 2019-01-31 | 2019-01-31 | A kind of FIR filtering system based on nested type residue number system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109787585A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112614079A (en) * | 2020-12-31 | 2021-04-06 | 东方红卫星移动通信有限公司 | Light spot image processing method and system based on remainder system and computer storage medium |
| CN113378110A (en) * | 2021-06-11 | 2021-09-10 | 电子科技大学 | FFT system based on RNS dynamic range extension |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0166563A2 (en) * | 1984-06-21 | 1986-01-02 | Texas Instruments Incorporated | Residue number system universal digital filter |
| JPH10208395A (en) * | 1996-11-18 | 1998-08-07 | Cirrus Logic Inc | Sample amplitude read channel |
| CN102184159A (en) * | 2011-05-26 | 2011-09-14 | 电子科技大学 | Base is {2n-1, 2n+1,2n} and {2n-1, 2n+1,22n+1} remainder system backward conversion device and method |
| CN102214083A (en) * | 2011-05-19 | 2011-10-12 | 电子科技大学 | Backward conversion method and device for residue number system |
| CN103647522A (en) * | 2013-11-19 | 2014-03-19 | 吕晓兰 | Four-mold remainder system based FIR filter and design method thereof |
| US20170187561A1 (en) * | 2015-12-28 | 2017-06-29 | Solid, Inc. | Method and devices for reducing peak to average power ratio |
| US20180218275A1 (en) * | 2017-01-27 | 2018-08-02 | Stmicroelectronics S.R.L. | Method of operating neural networks, corresponding network, apparatus and computer program product |
| CN108616265A (en) * | 2018-05-04 | 2018-10-02 | 重庆邮电大学 | A kind of circuit structure of the RNS DWT filter groups based on five mould remainder bases |
-
2019
- 2019-01-31 CN CN201910097500.4A patent/CN109787585A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0166563A2 (en) * | 1984-06-21 | 1986-01-02 | Texas Instruments Incorporated | Residue number system universal digital filter |
| JPH10208395A (en) * | 1996-11-18 | 1998-08-07 | Cirrus Logic Inc | Sample amplitude read channel |
| CN102214083A (en) * | 2011-05-19 | 2011-10-12 | 电子科技大学 | Backward conversion method and device for residue number system |
| CN102184159A (en) * | 2011-05-26 | 2011-09-14 | 电子科技大学 | Base is {2n-1, 2n+1,2n} and {2n-1, 2n+1,22n+1} remainder system backward conversion device and method |
| CN103647522A (en) * | 2013-11-19 | 2014-03-19 | 吕晓兰 | Four-mold remainder system based FIR filter and design method thereof |
| US20170187561A1 (en) * | 2015-12-28 | 2017-06-29 | Solid, Inc. | Method and devices for reducing peak to average power ratio |
| US20180218275A1 (en) * | 2017-01-27 | 2018-08-02 | Stmicroelectronics S.R.L. | Method of operating neural networks, corresponding network, apparatus and computer program product |
| CN108364064A (en) * | 2017-01-27 | 2018-08-03 | 意法半导体股份有限公司 | Operate method, corresponding network, device and the computer program product of neural network |
| CN108616265A (en) * | 2018-05-04 | 2018-10-02 | 重庆邮电大学 | A kind of circuit structure of the RNS DWT filter groups based on five mould remainder bases |
Non-Patent Citations (2)
| Title |
|---|
| HIROKI NAKAHARA等: "A deep convolutional neural network based on nested residue number system", 《2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)》 * |
| 陈建文: "基于余数系统的FIR滤波器的研究", 《中国博士学位论文全文数据库信息科技辑》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112614079A (en) * | 2020-12-31 | 2021-04-06 | 东方红卫星移动通信有限公司 | Light spot image processing method and system based on remainder system and computer storage medium |
| CN112614079B (en) * | 2020-12-31 | 2023-06-16 | 东方红卫星移动通信有限公司 | Light spot image processing method, system and computer storage medium based on remainder system |
| CN113378110A (en) * | 2021-06-11 | 2021-09-10 | 电子科技大学 | FFT system based on RNS dynamic range extension |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Mohanty et al. | A high-performance FIR filter architecture for fixed and reconfigurable applications | |
| Pun et al. | On the design and efficient implementation of the Farrow structure | |
| TWI263402B (en) | Reconfigurable fir filter | |
| CN109787585A (en) | A kind of FIR filtering system based on nested type residue number system | |
| Shenoy et al. | Residue to binary conversion for RNS arithmetic using only modular look-up tables | |
| Mehrnia et al. | Optimal factoring of FIR filters | |
| CN111835671A (en) | Method and device for generating four-phase Z complementary sequence pair with low PMEPR | |
| Kumar et al. | Performance analysis of FIR filter using booth multiplier | |
| US8090013B2 (en) | Method and system of providing a high speed Tomlinson-Harashima Precoder | |
| Kumar et al. | FPGA Implementation of Systolic FIR Filter Using Single-Channel Method | |
| Ghosh et al. | FPGA implementation of RNS adder based MAC unit in ternary value logic domain for signal processing algorithm and its performance analysis | |
| Balaji et al. | Design of FIR filter with Fast Adders and Fast Multipliers using RNS Algorithm | |
| Zhang et al. | Parallel distributed arithmetic FIR filter design based on 4: 2 compressors on Xilinx FPGAs | |
| Kaluri et al. | FPGA hardware implementation of an RNS FIR digital filter | |
| Ghosh et al. | A new architecture for FPGA implementation of a MAC unit for digital signal processors using mixed number system | |
| Ghosh et al. | FPGA implementation of MAC unit for double base ternary number system (DBTNS) and its performance analysis | |
| Reddy et al. | Shift add approach based implementation of RNS-FIR filter using modified product encoder | |
| Ali | Cascaded ripple carry adder based SRCSA for efficient FIR filter | |
| Wang et al. | Low power FIR filter FPGA implementation based on distributed arithmetic and residue number system | |
| Smitha et al. | A reconfigurable high-speed rns-fir channel filter for multi-standard software radio receivers | |
| Smitha et al. | A reconfigurable channel filter for software defined radio using RNS | |
| Wang et al. | Novel design and FPGA implementation of DA-RNS FIR filters | |
| Zhu et al. | ASIC implementation architecture for pulse shaping FIR filters in 3G mobile communications | |
| Sahoo et al. | Multichannel Filters for Wireless Networks: Lookup-Table-Based Efficient Implementation | |
| Dinesh et al. | Survey on reconfigurable fir filter architecture |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190521 |
|
| RJ01 | Rejection of invention patent application after publication |