CN102169459A - Method, device and intelligent card for accessing data - Google Patents

Method, device and intelligent card for accessing data Download PDF

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CN102169459A
CN102169459A CN2010105650525A CN201010565052A CN102169459A CN 102169459 A CN102169459 A CN 102169459A CN 2010105650525 A CN2010105650525 A CN 2010105650525A CN 201010565052 A CN201010565052 A CN 201010565052A CN 102169459 A CN102169459 A CN 102169459A
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ram
instruction
address
memory
data access
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CN102169459B (en
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贾庆刚
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Beijing Watchdata Co ltd
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Beijing WatchData System Co Ltd
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Abstract

The invention discloses a method, a device and an intelligent card for accessing data, which realize data access of the virtual memory space of the intelligent card without using a memory management unit (MMU). The method comprises the following steps of: receiving a data access command, and determining a command type and a target address to be accessed according to the data access command; when the target address is determined to be a virtual address and the virtual address is in a set virtual address range, determining the offset amount of the target address in an page index of a non-volatile memory; and performing corresponding data access operation in storage space corresponding to the offset amount, wherein the data access operation corresponds to the determined command type. By adopting the technical scheme, the data access of the virtual memory space of the intelligent card is realized without using the MMU; the difficulty in performing the data access on the virtual memory space of the intelligent card is reduced; the method can be used for the intelligent cards without an MMU function; therefore, the universality is improved.

Description

A kind of method of visit data, device and smart card
Technical field
The present invention relates to technical field of intelligent card, relate in particular to a kind of method, device and smart card of visit data.
Background technology
From hardware configuration, smart card as shown in Figure 1, comprise CPU (Central Processing Unit, central processing unit), RAM (Random Access Memory, random access memory), EEPROM (Electrically Erasable Programmable Read-Only Memory, EEPROM (Electrically Erasable Programmable Read Only Memo)) and ROM (Read-Only Memory, ROM (read-only memory)) form.But, development along with the smart card hardware technology, non-volatile NorFlash flash memory that EEPROM is lower by cost gradually, storage space is bigger replaces, NandFlash is as the supplementary storage of NorFlash, therefore, the structure of smart card comprises that CPU, RAM, NorFlash and NandFlash form as shown in Figure 2 at present.
RAM on the smart card is used to store the data that are used for program run, is the space of program run, and the data that RAM preserves are volatibility, and smart card power down or the data that restart its preservation of back will be lost fully; The space of RAM is generally about tens KB or tens KB, therefore when adopting RAM to move bigger program, program to write difficulty bigger, sometimes even be difficult to realize.And NorFlash is provided with general RAM interface, can be articulated on the address bus or data bus of CPU, and the storage space of NorFlash is bigger than the storage space of RAM, therefore, can be in NorFlash code and some non-volatile data of save routine operation; Application program can directly be moved in the NorFlash flash memory, does not need program code to be read among the RAM again.
NandFlash uses I/O (Input/Output, input and output) port to come access data serially, and 8 pins of this NandFlash can be used to communicating control information, address information and data message.NandFlash cannot be articulated on the address bus of CPU, and therefore, the user can not need to adopt special-purpose driver to come to read or write data by piece on NandFlash by mode save routine code on NandFlash of address read-write.Though the Nand structure can provide higher cell density promptly can reach higher storage density, and the speed of data and obliterated data of writing is also very fast, when using the Nand structure, for the special system interface of the managerial demand of flash.
Because the storage space of the RAM of smart card is comparatively limited, and the storage space of NandFlash is very big and to read or write the speed of data not slow, therefore, can utilize part storage space among the NandFlash, use when the working procedure with chip cards as the virtual memory space of RAM.
At present, during the virtual memory space of visit RAM, the MMU (Memory Management Unit, memory management unit) by this smart card realizes, and is specific as follows in smart card:
The page table that is provided with a multilevel data structure in the smart card (generally speaking, the page table that is provided with when memory headroom is less than or equal to 4GB is 2 grades a data structure, the page table that is provided with during greater than 4GB when memory headroom is 3 grades a data structure), memory headroom as smart card is 4GB, this memory headroom can be divided into 1024 groups, every group comprises 1024 pages, every page of 4KB.In system when operation,, the CPU of smart card directly reads memory address from the page table that is provided with, if when the memory address that reads is virtual address, need read the data in the memory headroom of virtual address correspondence by the MMU in this smart card.
Though adopting aforesaid way has realized data access has been carried out in the virtual memory space of smart card, but there is following defective in it: this mode only is applicable to the smart card with MMU function, can't come by the way data access is carried out in the virtual memory space of smart card for the smart card that can not support the MMU function, and present most smart card does not have the function of MMU, versatility is lower, promoted extension is narrow, and prior art does not provide the method for how to visit Virtual Space in the smart card with MMU function yet.
Summary of the invention
The invention provides a kind of method, device and smart card of visit data, to realize not needing MMU to come data access is carried out in the virtual memory space of smart card, reduced the difficulty of the virtual memory space of smart card being carried out data access, and can use for the smart card that does not have the MMU function, thereby improve versatility.
A kind of method of visit data comprises:
The reception data access instructs, and determines instruction type and destination address to be visited according to described data access instruction;
Determining that described destination address is in the virtual address range that is being provided with of virtual address and described virtual address the time, determines the side-play amount of described destination address in the page or leaf index of nonvolatile memory;
Carry out corresponding data access operation in described side-play amount corresponding memory space, described data access operation is corresponding with the described instruction type of determining.
A kind of device of visit data comprises:
Receiving element is used to receive the data access instruction, and determines instruction type and destination address to be visited according to described data access instruction;
Determining unit, being used in described destination address is in the virtual address range that is being provided with of virtual address and described virtual address the time, determines the side-play amount of described destination address in the page or leaf index of nonvolatile memory;
The data access unit is used for carrying out corresponding data access operation in the described side-play amount corresponding memory space that described determining unit is determined, and described data access operation is corresponding with the described instruction type of determining.
A kind of smart card comprises the device of aforementioned access data.
In the embodiment of the invention, when receiving the data access instruction, instruction type and destination address to be visited are determined in instruction according to data access; And determining that destination address to be visited is in the virtual address range that is being provided with of virtual address and described virtual address the time, determines the side-play amount of destination address in the page or leaf index of nonvolatile memory; In described side-play amount corresponding memory space, carry out corresponding data access operation again.Adopt technical solution of the present invention, on the one hand, realized data access is carried out in the virtual memory space of smart card, thereby to realize not needing MMU to come data access is carried out in the virtual memory space of smart card, reduced the difficulty of the virtual memory space of smart card being carried out data access, and can use for the smart card that does not have the MMU function, thereby improve versatility; On the other hand, with the virtual memory space of the part storage space in the nonvolatile memory as smart card, expanded the memory headroom of RAM, thereby guaranteed that the smart card virtual memory headroom is relatively more sufficient, can provide running memory for bigger application program, improve the success ratio that runs application.
Description of drawings
Fig. 1 is one of structural representation of smart card in the prior art;
Fig. 2 be smart card in the prior art structural representation two;
Fig. 3 is the method flow diagram of data access in the embodiment of the invention;
The detail flowchart of the data access that provides in the embodiment of the invention is provided Fig. 4;
Fig. 5 is the structural representation of the device of visit data in the embodiment of the invention.
Embodiment
Above-mentioned technical matters at the prior art existence, the embodiment of the invention provides a kind of method, device and smart card of visit data, to realize not needing MMU to come data access is carried out in the virtual memory space of smart card, reduced the difficulty of the virtual memory space of smart card being carried out data access, and can use for the smart card that does not have the MMU function, thereby improve versatility.The method of this visit data comprises: receive the data access instruction, and determine instruction type and destination address to be visited according to described data access instruction; Determining that described destination address is in the virtual address range that is being provided with of virtual address and described virtual address the time, determines the side-play amount of described destination address in the page or leaf index of nonvolatile memory; Carry out corresponding data access operation in described side-play amount corresponding memory space, described data access operation is corresponding with the described instruction type of determining.Adopt technical solution of the present invention, on the one hand, realized data access is carried out in the virtual memory space of smart card, thereby to realize not needing MMU to come data access is carried out in the virtual memory space of smart card, reduced the difficulty of the virtual memory space of smart card being carried out data access, and can use for the smart card that does not have the MMU function, thereby improve versatility; On the other hand, with the virtual memory space of the part storage space in the nonvolatile memory as smart card, expanded the memory headroom of RAM, thereby guaranteed that the smart card virtual memory headroom is relatively more sufficient, can provide running memory for bigger application program, improve the success ratio that runs application.
Below in conjunction with Figure of description technical solution of the present invention is described in detail.
Referring to Fig. 3, be the method flow diagram of data access in the embodiment of the invention, this method comprises:
Step 301, reception data access instruct, and determine instruction type and destination address to be visited according to this data access instruction.
Step 302, determining that destination address to be visited is a virtual address and in the virtual address range that this virtual address is provided with the time, determines the side-play amount of this destination address in the page or leaf index of nonvolatile memory (as EEPROM, NorFlash or NandFlash).
Step 303, carry out corresponding data access operation in the described side-play amount corresponding memory space of determining, this data access operation is corresponding with the described instruction type of determining.
In the above-mentioned process step 301, determine the destination address of instruction type and needs visit according to this data access instruction, comprise: the instruction address of obtaining described data access instruction, and from the mapping relations of instruction address, order number value, destination address, determine order number value and the destination address corresponding, and determine described instruction type according to the order number value of described instruction address correspondence with described instruction address.
In the embodiment of the invention, can obtain the instruction address of described data access instruction by the link register in the smart card (being the R13 register).
Preferably, before the above-mentioned process step 303, can also comprise step:
When the pairing page or leaf of destination address index is inconsistent in the index of the current buffering page or leaf of RAM and the nonvolatile memory, with in the described nonvolatile memory with the index page at described destination address place in data be read in the current buffering page or leaf of RAM.
In the above-mentioned steps 303, in the described side-play amount corresponding memory space of determining, carry out corresponding data access operation, comprising:
When definite instruction type is data when holding instruction (be STR instruction), data to be preserved are written in the memory headroom at respective offsets amount place in the buffering page or leaf of described RAM, this side-play amount is corresponding with described destination address; The data described to be preserved of storing among the RAM are written in the nonvolatile memory in the respective offsets amount corresponding memory space, this side-play amount is the side-play amount of described destination address in the page or leaf index of NandFlash again.
Above-mentioned process step 301 also comprises step: the order number value according to described instruction address correspondence is determined destination register;
In the above-mentioned process step 303, in the described side-play amount corresponding memory space of determining, carry out corresponding data access operation, comprise: when definite instruction type is data read instruction (being the LDR instruction), data with in the side-play amount place memory headroom of the described destination address correspondence in the current buffering page or leaf of described RAM are saved in the described destination register of determining.
Before the above-mentioned process step 301, also comprise:
The Memory Allocation request that step 300, reception application program send, carry the amount of ram that needs distribution in this Memory Allocation request, and be the physical memory space or the virtual memory space of the corresponding size of this application assigned, and give described application program with the physical memory space physical address corresponding of distribution or the virtual memory space corresponding virtual address assignment of distribution.
In this step 300, specifically can comprise: when receiving the Memory Allocation request of application program transmission, when judging the spendable memory headroom of RAM more than or equal to described amount of ram, be the physical memory space of the corresponding size of this application assigned from the used memory headroom of RAM, and the physical memory space physical address corresponding of distributing is distributed to described application program; When judging the spendable memory headroom of RAM, be the virtual memory space of the corresponding size of this application assigned from the virtual memory space, and give described application program the virtual memory space corresponding virtual address assignment of distributing less than described amount of ram.
Preferably, the instruction of the data access in the embodiment of the invention can be the data interruption (being that DataAbort interrupts) that smart card generates.When visiting the data of the virtual address correspondence of distributing to it as application program in operational process, because virtual address is actual non-existent address in the smart card, therefore, the CPU of smart card judges this application access data exception, and produces data interruption.
Technical solution of the present invention is applicable to various types of smart cards, as ARM chip, MIPS chip etc., being clearer description technical solution of the present invention, is that ARM chip, nonvolatile memory are that NandFlash is that example is described in detail technical solution of the present invention below with the smart card.
Suppose, with the virtual memory space of the part storage space among the NandFlash as RAM, as the 1M bit, and the address realm of setting and this corresponding virtual address, virtual memory space is 0x100000~0x200000, the start address that is virtual address is 0X100000, and termination address is 0X200000.
Adopt comparatively detailed method flow that technical solution of the present invention is described in detail below; This method flow comprises as shown in Figure 4:
The CPU of step 401, smart card receives application program memory ram request for allocation (carrying the amount of ram that needs distribution in this Memory Allocation request), and from the physical memory space of RAM or virtual memory space, be the memory headroom of the corresponding size of this application assigned, and the memory headroom corresponding address of distributing is distributed to described application program.
In this step, specifically comprise: CPU invoke memory partition function checks that whether current spendable physical memory space is more than or equal to the amount of ram that carries in the Memory Allocation request among the RAM, if, then be the physical memory space of the corresponding size of this application assigned in the spendable physical memory space from RAM, and the physical memory space physical address corresponding of distributing is distributed to described application program; If not, then from the virtual memory space of RAM, distribute the virtual memory space of corresponding size, and give this application program the virtual memory space corresponding virtual address assignment of distributing.
The CPU of step 402, smart card judges when the memory address of described application access is virtual address, produces data interruption (being that DataAbort interrupts).
The CPU of step 403~step 404, smart card obtains the instruction address that causes data interruption by the link register in the smart card, and from the mapping relations of instruction address, order number value, virtual address, obtain corresponding order number value and the virtual address of instruction address that causes data interruption with this, and determine instruction type and destination register according to the order number value of obtaining.
Step 405, judge that the index of the buffering page or leaf that described RAM is current is whether consistent with the pairing page or leaf of destination address index among the NandFlash, if execution in step 407 then, otherwise execution in step 406.
Step 406, the data in the destination address place index page among the NandFlash are read in the current buffering page or leaf of RAM.
Step 407, decision instruction type are data when holding instruction, execution in step 408~step 409; When the decision instruction type is the data read instruction, execution in step 410~411.
Step 408, will data be preserved be written in the memory headroom of the respective offsets amount correspondence in the buffering page or leaf of described RAM, this side-play amount is corresponding with described destination address.
Step 409, the data described to be preserved in the RAM buffering page or leaf are written among the NandFlash in the respective offsets amount corresponding memory space, this side-play amount is the side-play amount of destination address in the page or leaf index of NandFlash.
Step 410, read the data in the side-play amount place memory headroom of the described destination address correspondence in the current buffering page or leaf of described RAM.
Step 411, the data that step 410 is read are saved in the destination register that step 404 determines.
Step 412, (be program register with the PC register, be used for storing the instruction corresponding address that current needs are carried out) value be next bar instruction corresponding address from the address modification of the instruction that causes interruption, and the CPU of indication smart card carries out next bar of indicating in the PC register and instructs.
In the embodiment of the invention, the application program of intelligent card code generally all is to adopt high level language (as adopting the C language compilation), and by the C compiler program code after writing is compiled, and obtains assembly language; At last generate the assembly instruction sign indicating number that acquires a special sense according to assembly language, as in the c language source code, realizing that virtual address 0x100000 is carried out the code of assignment can be as follows:
U32*address=(u32*) 0x100000; The virtual address 0x100000 of 32 integers of // no symbol
* address=0x100; // value of 0x100 is composed to virtual address 0x100000
It is relevant with the compiler type that program code is compiled the compilation structure that obtains, and as under the KeiluVision3 compiler, the mapping relations of the instruction address that obtains, order number value, destination address and destination register are as shown in table 1 below:
Table 1
" order number value " in the table 1 is the instruction that the CPU of smart card can directly carry out, and the form of this order number value can be as shown in table 2 below:
Table 2
Figure BDA0000034854520000091
In the above-mentioned table 2, " opcode " presentation directives operational character coding promptly characterizes instruction type; The condition that " cond " presentation directives carries out; Whether the operation of " S " expression decision instruction manipulation influences the value of CPSR (CurrentProgram Status Register, program status register); " Rd " expression is used to store the numbering of the destination register of destination address; " Rn " expression comprises the register coding of first operand; " Shifter_operand " expression shifting function number.
Based on the identical design of said method flow process, the embodiment of the invention also provides a kind of device of visit data, and the structural representation of this device as shown in Figure 5.
Referring to Fig. 5, be the structural representation of the device of visit data in the embodiment of the invention, this device comprises:
Receiving element 51 is used to receive the data access instruction, and determines instruction type and destination address to be visited according to described data access instruction;
Determining unit 52, being used in described destination address is in the virtual address range that is being provided with of virtual address and this virtual address the time, determines the side-play amount of described destination address in the page or leaf index of nonvolatile memory;
Data access unit 53 is used for carrying out corresponding data access operation in the described side-play amount corresponding memory space that determining unit 52 is determined, and described data access operation is corresponding with the described instruction type of determining.
Preferably, receiving element 51 specifically is used for: receive the data access instruction, and obtain the instruction address of described data access instruction, and from the mapping relations of instruction address, order number value, destination address, determine order number value and the destination address corresponding, and determine described instruction type according to the order number value of described instruction address correspondence with described instruction address.
Determining unit 52 is further used for, when the pairing page or leaf of destination address index is inconsistent in the index of the current buffering page or leaf of random access memory ram and nonvolatile memory, the data in the index page at destination address place described in the described nonvolatile memory are read in the current buffering page or leaf of RAM.
Preferably, above-mentioned data access unit 53, specifically be used for: determine that in determining unit 52 instruction types are data when holding instruction, data to be preserved are written in the memory headroom of the first side-play amount correspondence in the buffering page or leaf of described RAM that this first side-play amount is corresponding with described destination address; And the data described to be preserved of storing among the described RAM are written in the nonvolatile memory in the second side-play amount corresponding memory space, this second side-play amount is the side-play amount of described destination address in the page or leaf index of nonvolatile memory.
Preferably, determining unit 52 is further used for, and determines destination register according to the order number value of described instruction address correspondence;
Data access unit 53 specifically is used for: when determining unit 52 definite instruction types are the data read instruction, with the data in the side-play amount place memory headroom of the described destination address correspondence in the current buffering page or leaf of described RAM, be saved in the destination register that determining unit 52 determines.
Preferably, said apparatus also comprises Memory Allocation unit 54:
Receiving element 51 is further used for, and receives the Memory Allocation request that application program sends, and carries the amount of ram that needs distribution in this Memory Allocation request;
Memory Allocation unit 54, the amount of ram that is used for the Memory Allocation request that receives according to receiving element 51, be the physical memory space or the virtual memory space of the corresponding size of application assigned, and give described application program the physical memory space physical address corresponding of distribution or the virtual memory space corresponding virtual address assignment of distribution.
Preferably, Memory Allocation unit 54 specifically is used for: when judging the spendable memory headroom of RAM more than or equal to described amount of ram, be the physical memory space of the corresponding size of described application assigned from the used memory headroom of RAM; Judging when spendable memory headroom is less than described amount of ram among the described RAM, is the virtual memory space of the corresponding size of described application assigned from the virtual memory space of described RAM.
The embodiment of the invention also provides a kind of smart card, and this smart card is provided with the device of aforementioned access data.
Adopt technical solution of the present invention, on the one hand, realized data access is carried out in the virtual memory space of smart card, thereby to realize not needing MMU to come data access is carried out in the virtual memory space of smart card, reduced the difficulty of the virtual memory space of smart card being carried out data access, and can use for the smart card that does not have the MMU function, thereby improve versatility; On the other hand, with the virtual memory space of the partial memory space in the nonvolatile memory as smart card, expanded the memory headroom of RAM, thereby guaranteed that the smart card virtual memory headroom is relatively more sufficient, can provide running memory for bigger application program, improve the success ratio that runs application.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (17)

1. the method for a visit data is characterized in that, comprising:
The reception data access instructs, and determines instruction type and destination address to be visited according to described data access instruction;
Determining that described destination address is in the virtual address range that is being provided with of virtual address and described virtual address the time, determines the side-play amount of described destination address in the page or leaf index of nonvolatile memory;
Carry out corresponding data access operation in described side-play amount corresponding memory space, described data access operation is corresponding with the described instruction type of determining.
2. the method for claim 1 is characterized in that, the described instruction according to described data access determined instruction type and destination address to be visited, comprising:
Obtain the instruction address of described data access instruction, and from the mapping relations of instruction address, order number value, destination address, determine order number value and the destination address corresponding, and determine described instruction type according to the order number value of described instruction address correspondence with described instruction address.
3. method as claimed in claim 1 or 2 is characterized in that, in described side-play amount corresponding memory space, carry out corresponding data access operation before, described method also comprises:
When the pairing page or leaf of destination address index is inconsistent in the index of the current buffering page or leaf of random access memory ram and the nonvolatile memory, the data in the index page at destination address place described in the described nonvolatile memory are read in the current buffering page or leaf of RAM.
4. method as claimed in claim 3 is characterized in that, describedly carries out corresponding data access operation in described side-play amount corresponding memory space, comprising:
In definite instruction type is data when holding instruction, and data to be preserved is written in the memory headroom of the first side-play amount correspondence in the buffering page or leaf of described RAM, and described first side-play amount is corresponding with described destination address;
The data described to be preserved of storing among the described RAM are written in the nonvolatile memory in the second side-play amount corresponding memory space, and described second side-play amount is the side-play amount of described destination address in the page or leaf index of nonvolatile memory.
5. method as claimed in claim 2 is characterized in that, described method also comprises: the order number value according to described instruction address correspondence is determined destination register;
In described side-play amount corresponding memory space, carry out corresponding data access operation, comprising:
When definite instruction type was the data read instruction, the data with in the side-play amount place memory headroom of the described destination address correspondence in the current buffering page or leaf of described RAM were saved in the described destination register of determining.
6. the method for claim 1 is characterized in that, described method also comprises:
Receive the Memory Allocation request that application program sends, carry the amount of ram that needs distribution in this Memory Allocation request;
According to described amount of ram is the physical memory space or the virtual memory space of the corresponding size of described application assigned, and gives described application program with the physical memory space physical address corresponding of distribution or the virtual memory space corresponding virtual address assignment of distribution.
7. method as claimed in claim 6 is characterized in that, physical memory space or virtual memory space for the corresponding size of described application assigned comprise:
When spendable memory headroom is more than or equal to described amount of ram among the RAM, from the used memory headroom of RAM the physical memory space of the corresponding size of described application assigned; When spendable memory headroom is less than described amount of ram among the described RAM, from the virtual memory space of described RAM the virtual memory space of the corresponding size of described application assigned.
8. the method for claim 1 is characterized in that, described data access instruction is data interruption DataAbort.
9. the method for claim 1 is characterized in that, described nonvolatile memory is EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM, NorFlash or NandFlash.
10. the device of a visit data is characterized in that, comprising:
Receiving element is used to receive the data access instruction, and determines instruction type and destination address to be visited according to described data access instruction;
Determining unit, being used in described destination address is in the virtual address range that is being provided with of virtual address and described virtual address the time, determines the side-play amount of described destination address in the page or leaf index of nonvolatile memory;
The data access unit is used for carrying out corresponding data access operation in the described side-play amount corresponding memory space that described determining unit is determined, and described data access operation is corresponding with the described instruction type of determining.
11. device as claimed in claim 10 is characterized in that, described receiving element specifically is used for:
The instruction of reception data access, and obtain the instruction address of described data access instruction, and from the mapping relations of instruction address, order number value, destination address, determine order number value and the destination address corresponding, and determine described instruction type according to the order number value of described instruction address correspondence with described instruction address.
12. as claim 10 or 11 described devices, it is characterized in that, described determining unit is further used for, when the pairing page or leaf of destination address index is inconsistent in the index of the current buffering page or leaf of random access memory ram and nonvolatile memory, the data in the index page at destination address place described in the described nonvolatile memory are read in the current buffering page or leaf of RAM.
13. device as claimed in claim 12 is characterized in that, described data access unit specifically is used for:
Determine that in described determining unit instruction type is data when holding instruction, data to be preserved be written in the memory headroom of the first side-play amount correspondence in the buffering page or leaf of described RAM that described first side-play amount is corresponding with described destination address;
The data described to be preserved of storing among the described RAM are written in the nonvolatile memory in the second side-play amount corresponding memory space, and described second side-play amount is the side-play amount of described destination address in the page or leaf index of nonvolatile memory.
14. device as claimed in claim 11 is characterized in that, described determining unit is further used for, and determines destination register according to the order number value of described instruction address correspondence;
Described data access unit specifically is used for:
When the instruction type of determining in described determining unit is the data read instruction,, be saved in the destination register that described determining unit determines the data in the side-play amount place memory headroom of the described destination address correspondence in the current buffering page or leaf of described RAM.
15. device as claimed in claim 10 is characterized in that, also comprises the Memory Allocation unit:
Described receiving element is further used for, and receives the Memory Allocation request that application program sends, and carries the amount of ram that needs distribution in this Memory Allocation request;
The Memory Allocation unit, the amount of ram that is used for the Memory Allocation request that receives according to described receiving element, be the physical memory space or the virtual memory space of the corresponding size of described application assigned, and give described application program the physical memory space physical address corresponding of distribution or the virtual memory space corresponding virtual address assignment of distribution.
16. device as claimed in claim 15 is characterized in that, described Memory Allocation unit specifically is used for:
Judging when spendable memory headroom is more than or equal to described amount of ram among the RAM, is the physical memory space of the corresponding size of described application assigned from the used memory headroom of RAM;
Judging when spendable memory headroom is less than described amount of ram among the described RAM, is the virtual memory space of the corresponding size of described application assigned from the virtual memory space of described RAM.
17. a smart card is characterized in that, comprises aforesaid right requirement 10~16 each described devices.
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CN102591787A (en) * 2011-12-19 2012-07-18 北京握奇数据系统有限公司 Method and device for data processing of JAVA card
CN103218312A (en) * 2013-03-28 2013-07-24 中国科学院上海微系统与信息技术研究所 File access method and file access system
CN103729300A (en) * 2013-12-25 2014-04-16 华为技术有限公司 Method and related device for managing non-volatile memories
CN103853665A (en) * 2012-12-03 2014-06-11 华为技术有限公司 Storage space allocation method and device
CN104077084A (en) * 2014-07-22 2014-10-01 中国科学院上海微系统与信息技术研究所 Distributed random file accessing system and accessing control method thereof
CN104090804A (en) * 2014-07-15 2014-10-08 四川航天系统工程研究所 Virtual memory expansion method for real-time DSP embedded system
WO2015169145A1 (en) * 2014-05-06 2015-11-12 华为技术有限公司 Memory management method and device
CN106528441A (en) * 2016-10-26 2017-03-22 珠海格力电器股份有限公司 Data processing method and device of simulate EEPROM and electronic equipment
CN106649133A (en) * 2016-12-29 2017-05-10 杭州迪普科技股份有限公司 Peripheral component interconnect (PCI) memory space optimization method and device
CN106709552A (en) * 2015-11-17 2017-05-24 上海复旦微电子集团股份有限公司 Smart card security protection method and smart card security protection device
CN107045436A (en) * 2016-02-05 2017-08-15 龙芯中科技术有限公司 Access processing method and device
WO2018000300A1 (en) * 2016-06-30 2018-01-04 华为技术有限公司 Data operation method for electronic device, and electronic device
CN110554911A (en) * 2018-05-30 2019-12-10 阿里巴巴集团控股有限公司 Memory access and allocation method, memory controller and system
CN111338988A (en) * 2020-02-20 2020-06-26 西安芯瞳半导体技术有限公司 Memory access method and device, computer equipment and storage medium
CN112035379A (en) * 2020-09-09 2020-12-04 浙江大华技术股份有限公司 Method and device for using storage space, storage medium and electronic device
CN112764925A (en) * 2021-01-18 2021-05-07 苏州浪潮智能科技有限公司 Data storage method, device, equipment and storage medium based on virtual memory
CN113297111A (en) * 2021-06-11 2021-08-24 上海壁仞智能科技有限公司 Artificial intelligence chip and operation method thereof
CN113569508A (en) * 2021-09-18 2021-10-29 芯行纪科技有限公司 Database model construction method and device for data indexing and access based on ID
CN113778908A (en) * 2021-09-15 2021-12-10 清华大学 Memory access management method and system
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CN102591787B (en) * 2011-12-19 2015-09-02 北京握奇数据系统有限公司 The data processing method of JAVA card and device
CN102591787A (en) * 2011-12-19 2012-07-18 北京握奇数据系统有限公司 Method and device for data processing of JAVA card
CN103853665B (en) * 2012-12-03 2017-06-06 华为技术有限公司 Memory allocation method and apparatus
CN103853665A (en) * 2012-12-03 2014-06-11 华为技术有限公司 Storage space allocation method and device
CN103218312B (en) * 2013-03-28 2017-07-11 中国科学院上海微系统与信息技术研究所 file access method and system
CN103218312A (en) * 2013-03-28 2013-07-24 中国科学院上海微系统与信息技术研究所 File access method and file access system
CN103729300A (en) * 2013-12-25 2014-04-16 华为技术有限公司 Method and related device for managing non-volatile memories
CN103729300B (en) * 2013-12-25 2017-11-28 华为技术有限公司 The management method and relevant apparatus of nonvolatile memory
WO2015169145A1 (en) * 2014-05-06 2015-11-12 华为技术有限公司 Memory management method and device
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CN104090804A (en) * 2014-07-15 2014-10-08 四川航天系统工程研究所 Virtual memory expansion method for real-time DSP embedded system
CN104090804B (en) * 2014-07-15 2018-02-16 四川航天系统工程研究所 A kind of DSP embedded system virtual memory expansion methods in real time
CN104077084A (en) * 2014-07-22 2014-10-01 中国科学院上海微系统与信息技术研究所 Distributed random file accessing system and accessing control method thereof
CN104077084B (en) * 2014-07-22 2017-07-21 中国科学院上海微系统与信息技术研究所 Distributed random access file system and its access control method
CN106709552A (en) * 2015-11-17 2017-05-24 上海复旦微电子集团股份有限公司 Smart card security protection method and smart card security protection device
CN107045436A (en) * 2016-02-05 2017-08-15 龙芯中科技术有限公司 Access processing method and device
CN107045436B (en) * 2016-02-05 2019-09-10 龙芯中科技术有限公司 Access processing method and device
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WO2018000300A1 (en) * 2016-06-30 2018-01-04 华为技术有限公司 Data operation method for electronic device, and electronic device
CN106528441A (en) * 2016-10-26 2017-03-22 珠海格力电器股份有限公司 Data processing method and device of simulate EEPROM and electronic equipment
CN106649133A (en) * 2016-12-29 2017-05-10 杭州迪普科技股份有限公司 Peripheral component interconnect (PCI) memory space optimization method and device
CN106649133B (en) * 2016-12-29 2019-12-06 杭州迪普科技股份有限公司 Method and equipment for optimizing PCI (peripheral component interconnect) memory space
CN110554911A (en) * 2018-05-30 2019-12-10 阿里巴巴集团控股有限公司 Memory access and allocation method, memory controller and system
CN111338988A (en) * 2020-02-20 2020-06-26 西安芯瞳半导体技术有限公司 Memory access method and device, computer equipment and storage medium
CN112035379A (en) * 2020-09-09 2020-12-04 浙江大华技术股份有限公司 Method and device for using storage space, storage medium and electronic device
CN112035379B (en) * 2020-09-09 2022-06-14 浙江大华技术股份有限公司 Method and device for using storage space, storage medium and electronic device
CN112764925A (en) * 2021-01-18 2021-05-07 苏州浪潮智能科技有限公司 Data storage method, device, equipment and storage medium based on virtual memory
CN113297111A (en) * 2021-06-11 2021-08-24 上海壁仞智能科技有限公司 Artificial intelligence chip and operation method thereof
CN113778908A (en) * 2021-09-15 2021-12-10 清华大学 Memory access management method and system
CN113778908B (en) * 2021-09-15 2022-10-11 清华大学 Memory access management method and system
CN113569508A (en) * 2021-09-18 2021-10-29 芯行纪科技有限公司 Database model construction method and device for data indexing and access based on ID
WO2023206859A1 (en) * 2022-04-24 2023-11-02 苏州睿芯集成电路科技有限公司 Memory state recovery method for no-mmu environment in emulated cpu chip acceleration

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