CN102165526B - 用于硬盘驱动器内基于分配的可靠性度量选择性地保留读取信号片段的方法和装置 - Google Patents
用于硬盘驱动器内基于分配的可靠性度量选择性地保留读取信号片段的方法和装置 Download PDFInfo
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- CN102165526B CN102165526B CN200880131286XA CN200880131286A CN102165526B CN 102165526 B CN102165526 B CN 102165526B CN 200880131286X A CN200880131286X A CN 200880131286XA CN 200880131286 A CN200880131286 A CN 200880131286A CN 102165526 B CN102165526 B CN 102165526B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2948—Iterative decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6343—Error control coding in combination with techniques for partial response channels, e.g. recording
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1816—Testing
- G11B2020/183—Testing wherein at least one additional attempt is made to read or write the data when a first attempt is unsuccessful
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
- G11B2220/25—Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
- G11B2220/2508—Magnetic discs
- G11B2220/2516—Hard disks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/241,919 | 2008-09-30 | ||
| US12/241,919 US8225183B2 (en) | 2008-09-30 | 2008-09-30 | Methods and apparatus for selective data retention decoding in a hard disk drive |
| PCT/US2008/088224 WO2010039161A2 (en) | 2008-09-30 | 2008-12-23 | Methods and apparatus for selective data retention decoding in a hard disk drive |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102165526A CN102165526A (zh) | 2011-08-24 |
| CN102165526B true CN102165526B (zh) | 2013-11-27 |
Family
ID=42008512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200880131286XA Active CN102165526B (zh) | 2008-09-30 | 2008-12-23 | 用于硬盘驱动器内基于分配的可靠性度量选择性地保留读取信号片段的方法和装置 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8225183B2 (https=) |
| EP (1) | EP2356655A2 (https=) |
| JP (2) | JP5710486B2 (https=) |
| KR (1) | KR101509851B1 (https=) |
| CN (1) | CN102165526B (https=) |
| TW (1) | TWI455120B (https=) |
| WO (1) | WO2010039161A2 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8826105B2 (en) * | 2012-04-12 | 2014-09-02 | Lsi Corporation | Data processing system with out of order transfer |
| EP4317431A3 (en) | 2017-01-27 | 2024-05-22 | A-Clip Institute, Co., Ltd. | Preventive and/or therapeutic agent for infectious diseases or inflammatory diseases |
| JP7516128B2 (ja) | 2020-06-23 | 2024-07-16 | 株式会社東芝 | 磁気ディスク装置及びリード処理方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6405342B1 (en) * | 1999-09-10 | 2002-06-11 | Western Digital Technologies, Inc. | Disk drive employing a multiple-input sequence detector responsive to reliability metrics to improve a retry operation |
| US6604220B1 (en) * | 2000-09-28 | 2003-08-05 | Western Digital Technologies, Inc. | Disk drive comprising a multiple-input sequence detector selectively biased by bits of a decoded ECC codedword |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5557482A (en) | 1994-12-19 | 1996-09-17 | International Business Machines Corporation | Multipath channel apparatus and method for data storage devices and communications systems wherein a data path is selected based on errors |
| KR100300306B1 (ko) * | 1999-05-28 | 2001-09-26 | 윤종용 | 무선통신 시스템에서 채널 적응형 맵 채널 복호 장치 및 방법 |
| US6518892B2 (en) * | 2000-11-06 | 2003-02-11 | Broadcom Corporation | Stopping criteria for iterative decoding |
| US20040022336A1 (en) * | 2002-08-02 | 2004-02-05 | Xiaoyong Yu | Turbo decoder with partial interference cancellation |
| WO2004053873A1 (ja) * | 2002-12-10 | 2004-06-24 | Fujitsu Limited | データ記録再生システム |
| EP1597667A4 (en) * | 2003-02-26 | 2009-01-14 | Qualcomm Inc | PROGRAMMABLE INFORMATION HITCHING FOR ITERATIVE DECODING |
| US8341506B2 (en) * | 2007-03-30 | 2012-12-25 | HGST Netherlands B.V. | Techniques for correcting errors using iterative decoding |
-
2008
- 2008-09-30 US US12/241,919 patent/US8225183B2/en active Active
- 2008-12-23 EP EP08876524A patent/EP2356655A2/en not_active Withdrawn
- 2008-12-23 WO PCT/US2008/088224 patent/WO2010039161A2/en not_active Ceased
- 2008-12-23 KR KR1020117007252A patent/KR101509851B1/ko not_active Expired - Fee Related
- 2008-12-23 CN CN200880131286XA patent/CN102165526B/zh active Active
- 2008-12-23 JP JP2011530037A patent/JP5710486B2/ja not_active Expired - Fee Related
-
2009
- 2009-01-13 TW TW098101075A patent/TWI455120B/zh not_active IP Right Cessation
-
2013
- 2013-12-25 JP JP2013266930A patent/JP2014063563A/ja not_active Withdrawn
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6405342B1 (en) * | 1999-09-10 | 2002-06-11 | Western Digital Technologies, Inc. | Disk drive employing a multiple-input sequence detector responsive to reliability metrics to improve a retry operation |
| US6604220B1 (en) * | 2000-09-28 | 2003-08-05 | Western Digital Technologies, Inc. | Disk drive comprising a multiple-input sequence detector selectively biased by bits of a decoded ECC codedword |
Also Published As
| Publication number | Publication date |
|---|---|
| KR101509851B1 (ko) | 2015-04-06 |
| CN102165526A (zh) | 2011-08-24 |
| TW201013656A (en) | 2010-04-01 |
| KR20110069794A (ko) | 2011-06-23 |
| JP5710486B2 (ja) | 2015-04-30 |
| US8225183B2 (en) | 2012-07-17 |
| WO2010039161A3 (en) | 2010-09-16 |
| JP2014063563A (ja) | 2014-04-10 |
| TWI455120B (zh) | 2014-10-01 |
| JP2012504299A (ja) | 2012-02-16 |
| US20100083075A1 (en) | 2010-04-01 |
| WO2010039161A2 (en) | 2010-04-08 |
| EP2356655A2 (en) | 2011-08-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) CORPORAT Free format text: FORMER OWNER: INFINEON TECHNOLOGIES CORP. Effective date: 20150804 |
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| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20150804 Address after: Singapore Singapore Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd. Address before: California, USA Patentee before: LSI Corp. |
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| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20181024 Address after: Singapore Singapore Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd. Address before: Singapore Singapore Patentee before: Avago Technologies General IP (Singapore) Pte. Ltd. |
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| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20201027 Address after: Singapore Singapore Patentee after: Broadcom International Pte. Ltd. Address before: Singapore Singapore Patentee before: Avago Technologies General IP (Singapore) Pte. Ltd. |
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| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20230323 Address after: Singapore, Singapore Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd. Address before: Singapore, Singapore Patentee before: Broadcom International Pte. Ltd. |