CN102158304B - File self-repair downloading method for embedded type multi-machine system - Google Patents

File self-repair downloading method for embedded type multi-machine system Download PDF

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CN102158304B
CN102158304B CN2010105848589A CN201010584858A CN102158304B CN 102158304 B CN102158304 B CN 102158304B CN 2010105848589 A CN2010105848589 A CN 2010105848589A CN 201010584858 A CN201010584858 A CN 201010584858A CN 102158304 B CN102158304 B CN 102158304B
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module
message
sign
program
cpu module
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CN102158304A (en
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陈新之
邓洁清
叶品勇
丁泉
姚亮
兰金波
余华武
魏建功
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Guodian Nanjing Automation Co Ltd
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Guodian Nanjing Automation Co Ltd
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Abstract

The invention discloses a file self-repair downloading method for an embedded type multi-machine system. After a CPU (central processing unit) module is linked with a mainframe preposed module, the interaction of internal information in the multi-machine system is realized through 'routing bytes', 'forwarding marks' and 'target port slogans'. The CPU module is used for performing CRC (cyclic redundancy check), downloading and solidification on an FPGA (field-programmable gate array) program, an application program and a configuration file respectively, and a mode of return verification per frame is adopted during the transmission process, so that if a confirmation message is not received, the confirmation message is automatically re-sent; and if the sending of the confirmation message fails for a plurality of times, relevant warning information is prompted. After completing the check, the downloading and the solidification on three parts, namely the FPGA configuration program, the application program and the configuration file, the FPGA module is re-started, the programs are re-checked, and then updated programs are further implemented. After abnormality occurs during the downloading process, imperfect data and incorrect program files caused during the transmission process can be automatically repaired after the latest electrification of a device.

Description

Embedded multimachine system file selfreparing method for down loading
Technical field
The invention belongs to the power system automation technology field, but relate to embedded many handsets system file selfreparing method for down loading.
Background technology
Embedded system is the synthesis of software and hardware, but application-centered, based on computer technology, hardware and software cutting, be suitable for the dedicated computer system that application system is strict with function, reliability, cost, volume, power consumption.
The use of FPGA need be used configurator in the embedded system.Configurator can online change.
The program file that conventional art will be downloaded by the specific download cable is burned onto storage chip.The programming process need uses special-purpose download tool, and needs plug veneer, replacing process inconvenience.
Usually adopt this diji with telecommunication cable link embedded system module at present, adopt FTP (File Transfer Protocol) mode that program file is downloaded to assigned address, finish the program updates of system.Lack necessary verification measure, can not repair occur in the downloading process unusual automatically, need human intervention.Its process also is man-to-man mapping relations, can not realize program, the file download needs of each unit in the layer distributed system.
Summary of the invention
Technical problem to be solved by this invention provides a kind of method for down loading of embedded many handsets system file, can realize repairing automatically occur in the downloading process unusual, need not human intervention.
For addressing the above problem, the invention provides a kind of embedded multimachine system file selfreparing method for down loading, it is characterized in that, may further comprise the steps:
1) after the host CPU module links with the preposition module of main frame, realizes that by " the route byte is used sign ", " transmitting sign " and " destination port number " internal information between the multimachine system is mutual;
2) preposition module carries out verification to FPGA configurator, application program and configuration file successively, does not jump in the related application when finding mistake and carries out, but carry out the selfreparing that bottom program wait routine upgrades to realize application program.
Aforesaid embedded multimachine system file selfreparing method for down loading, it is characterized in that: in described step 1), the internal information reciprocal process between the multimachine system is:
When 11) the CPU module sends information to the handset module, " the route byte is used sign " in " route byte " put 1, and specify " destination port number ", when the preposition module of main frame receives message, after finding that " the route byte is used sign " is 1, to " transmit sign " and put 1, then the port to appointment sends data, when the handset module is received message, all be 1 according to " route byte use sign " and " transmit and identify ", determine this message to handset, and by the definite port that connects of destination port number;
When 12) the handset module sends information to the CPU module, " the route byte is used sign " extended this as 0, when the preposition module of main frame receives this message, differentiating is not the message that CPU sends, judge it is the message that need send to the CPU module thus, therefore " the route byte is used sign " and " transmitting sign " extended this as 1, and fill in the port numbers that receives message, it is 1 all that the CPU module receives behind the message according to " the route byte is used sign " and " transmitting sign ", and differentiating this message is the transmission of handset module;
When 13) the preposition module of main frame sends message to CPU, " the route byte is used sign " and " transmitting sign " all extended this as 0, the CPU module is received message, if " the route byte is used sign " and " transmitting sign " all is 0, then differentiates this message for being sent by the preposition module of main frame.
Aforesaid embedded multimachine system file selfreparing method for down loading is characterized in that: in described step 2) in, specifically may further comprise the steps:
21) the CPU module carries out FPGA program check, download and curing earlier after powering on, send configuration information CRC sign indicating number to the FPGA module, the FPGA module is checked the CRC sign indicating number that issues and the CRC of current configuration: if identical, just the CRC sign indicating number is sent to the CPU module after receiving this message; If different, then send the message that request is disposed to the CPU module, if the CPU module is received the CRC that the FPGA module sends, just enter next workflow, otherwise enter configuration flow;
22) application programs, configuration file carry out steps 21 successively again) operation;
23) if any part in the FPGA program, application program, three parts of configuration file was updated, so preposition module restarts then checks each program module again, program after checking successfully back execution renewal, the CPU module once disposes again and checks, if three parts are not all upgraded, namely all do not enter configuration flow, CPU module control module enters operating state.
Aforesaid embedded multimachine system file selfreparing method for down loading, it is characterized in that: in described step 23) in, outage or the not case of successful of upgrading if in the application program updating process, meet accident, after re-powering, the bottom program can find that FPGA program, application program module are invalid, and just do not jump in the application program and do not carry out this moment, but direct waiting for CPU module download configuration flow process, after CPU module download configuration, application program module has just been repaired fully.
Effect of the present invention is that the mode by Ethernet link, message transmission realizes file transfer between this diji and embedded multimachine system, and the mode that mutually combines by CRC check and every frame message back-checking, occur when unusual in transmission course, can repair wrong data automatically again: simplify process of downloading, improve the success rate of downloading.
Description of drawings
Program state transition graph during Fig. 1 normal flow.
State diagram when Fig. 2 repairs the program of damage.
Embodiment
1. the communication technology of multimachine system realizes
Communication between the multimachine system realizes the information interaction between the inside by " the route byte is used sign ", " transmitting sign " and " destination port number ".This method can realize the program of main frame and multilayer handset and other file are downloaded.
Figure BDA0000037822310000031
Communication process relates to three parts: CPU module, the preposition module of main frame, zero or a plurality of handset module.The handset module can the layering cascade.
When the CPU module sends information to the handset module, " the route byte is used sign " put 1, and appointment " destination port number ".After when the preposition module of main frame receives message, finding that " the route byte is used sign " is 1, will " transmit sign " and put 1, then the port to appointment sends data.When the handset module is received message, be 1 all according to " the route byte is used sign " and " transmitting sign ", determine this message to handset.And can be by the port of the clear and definite required link of destination port number.
When the handset module sends information to the CPU module, " the route byte is used sign " extended this as 0.When the preposition module of main frame receives this message, differentiating is not the message that CPU sends, can judge the message that need send to the CPU module thus, therefore " the route byte is used sign " and " transmitting sign " be extended this as 1, and fill in the port numbers that receives message.It is 1 all that the CPU module receives behind the message according to " the route byte is used sign " and " transmitting sign ", and differentiating this message is the transmission of handset module.
When the main frame module sends message to CPU, " the route byte is used sign " and " transmitting sign " all extended this as 0.The CPU module is received message, if " route byte " and " transmitting sign " all is 0, is to be sent by the preposition module of main frame according to differentiating this message.
When a plurality of level is arranged, can use a plurality of route bytes.
2. but the realization of the download technology of selfreparing
The program downloading process relates to the CPU module and comprises the module of FPGA.
Program is divided into bottom program and application program two parts, and the bottom program can realize two functions: 1. communicate by letter with the CPU module ROMPaq and other information; 2. jump in the application program and carry out.
After the FPGA module powers on, at first carry out the bottom program, the bottom program is according to configuration, which application program judgement will jump in is carried out, and then judges the validity of application program correlation module, if effectively, just jump in the application program and carry out, if a partial invalidity is arranged in the application program module, just do not carry out redirect, but waiting for CPU down load application program and other relevant configuration.When application program and relevant configuration download finish after, jump in the application program again and carry out.Also include in each application program and communicate by letter with the CPU module to check and the module of upgrade application, can finish upgrading and the configuration of application program module.
The CPU module carries out FPGA program check, download and curing earlier after powering on, application programs, configuration file carry out aforesaid operations successively again.After CPU module power-up initializing is finished, send configuration information CRC sign indicating number to the FPGA module, the FPGA module is checked the CRC sign indicating number that issues and the CRC of current configuration: if identical, just the CRC sign indicating number is sent to the CPU module after receiving this message; If different, then send the message that request is disposed to the CPU module.If the CPU module is received the CRC that the FPGA module sends, just enter normal operating conditions, otherwise enter configuration flow.
The downloading mode of FPGA configurator, application program is identical with the configuration downloading mode, can distinguish different files by " type " field in message.Check in FPGA configurator, application program, three parts of configuration, download, solidify finish after, the CPU module sends configuration to the FPGA module and finishes message, to confirm that configuration finishes to respond.If any part in FPGA program, application program, three parts of configuration file was updated, the FPGA module restarts and then checks each program module again so, the program after checking successfully back execution renewal.The CPU module once disposes again and checks.If three parts are not all upgraded, control module enters operating state.Process is shown in Figure of description 1,2.
Outage or the not case of successful of upgrading if in the application program updating process, meet accident, after re-powering, the bottom program can find that FPGA program, application program module are invalid, and just do not jump in the application program and do not carry out this moment, but direct waiting for CPU module download configuration.After CPU module download configuration, application program module has just been repaired fully.For the CPU module, and though be with the bottom interprogram communication or and interapplication communications, the whole layoutprocedure that powers on is on all four.
Adopt Ethernet message form:
1) Ethernet mac address header comprises destination address (6 bytes) and source address (6 bytes).Source address should be used unique ethernet address, and the destination address suggestion is fixed as in inner stipulation:
01-0C-CD-01-01-FF;
2) ethernet type (Ethernet type) is represented with 0x88B6, to distinguish GOOSE (0x88B8) and sampled value (0x88BA) message;
3) ethernet type PDU
APPID: application identities is as the sign in data-oriented source, and suggestion is fixed as sampling front panel 0x0001 in inner stipulation, GOOSE front panel 0x0002, and sampling GOOSE front panel is used
0x0003, the program 0x000F when dispatching from the factory.
4) message stipulations version is 0x0001
Annotate:
GOOSE:Generic?Object?Oriented?Substation?Event
PDU:Protocol?Data?Unit
FPGA:Field-Programmable?Gate?Array
CRC:Cyclic?Redundancy?Check
I. (program) message (0x01 type) is disposed in the front panel request
Figure BDA0000037822310000051
Ii. front panel is confirmed configuration (program) message (0x02 type)
Figure BDA0000037822310000052
Iii. (program) successful message (0x03 type) is disposed in the front panel programming
Figure BDA0000037822310000062
Iv. the front panel confirmation message correctly receives (0x04 type)
Figure BDA0000037822310000063
Figure BDA0000037822310000071
V. front panel confirms that configuration finishes (0x05 type)
Figure BDA0000037822310000072
Vi. (program) to be configured message (0x0F type) such as front panel
Figure BDA0000037822310000073
Vii. protect CPU configuration (program) statement message (0x11 type)
Figure BDA0000037822310000074
Figure BDA0000037822310000081
Viii. protect CPU configuration (program) dress message (0x12 type) down
Figure BDA0000037822310000082
Ix. protect the CPU layoutprocedure to finish message (0x13 type)
Figure BDA0000037822310000092
Below announced the present invention with preferred embodiment, so it is not in order to limiting the present invention, all take to be equal to replace or technical scheme that the scheme of equivalent transformation obtains, all drop in protection scope of the present invention.

Claims (2)

1. an embedded multimachine system file selfreparing method for down loading is characterized in that, may further comprise the steps:
1) after the preposition module link of host CPU module and main frame, realize that by " the route byte is used sign ", " transmitting sign " and " destination port number " internal information between the multimachine system is mutual, the internal information reciprocal process between the multimachine system is:
When 11) the CPU module sends information to the handset module, " the route byte is used sign " put 1, and specify " destination port number ", when the preposition module of main frame receives message, after finding that " the route byte is used sign " is 1, to " transmit sign " and put 1, then the port to appointment sends data, when the handset module is received message, all be 1 according to " route byte use sign " and " transmit and identify ", determine this message to handset, and determine the port of required link by destination port number;
When 12) the handset module sends information to the CPU module, " the route byte is used sign " extended this as 0, when the preposition module of main frame receives this message, differentiating is not the message that the CPU module sends, judge it is the message that need send to the CPU module thus, therefore " the route byte is used sign " and " transmitting sign " extended this as 1, and fill in the port numbers that receives message, it is 1 all that the CPU module receives behind the message according to " the route byte is used sign " and " transmitting sign ", and differentiating this message is the transmission of handset module;
When 13) the preposition module of main frame sends message to the CPU module, " the route byte is used sign " and " transmitting sign " all extended this as 0, the CPU module is received message, if " the route byte is used sign " and " transmitting sign " all is 0, is to be sent by the preposition module of main frame according to differentiating this message;
2) the CPU module carries out verification to FPGA configurator, application program and configuration file successively, preposition module does not jump in the related application when finding mistake and carries out, but carry out the selfreparing that bottom program wait routine upgrades to realize application program, specifically may further comprise the steps:
21) the CPU module carries out FPGA program check, download and curing earlier after powering on, send configuration information CRC sign indicating number to the FPGA module, the FPGA module is checked the CRC sign indicating number that issues and the CRC of current configuration: if identical, just the CRC sign indicating number is sent to the CPU module after receiving this message; If different, then send the message that request is disposed to the CPU module, if the CPU module is received the CRC that the FPGA module sends, just enter next workflow, otherwise enter configuration flow;
22) application programs, configuration file carry out steps 21 successively again) operation;
23) if any part in the FPGA program, application program, three parts of configuration file was updated, the FPGA module restarts and then checks each program module again so, program after checking successfully back execution renewal, the CPU module once disposes again and checks, if three parts are not all upgraded, namely all do not enter configuration flow, CPU module control module enters operating state.
2. embedded multimachine system file selfreparing method for down loading according to claim 1, it is characterized in that: in described step 23) in, outage or the not case of successful of upgrading if in the application program updating process, meet accident, after re-powering, the bottom program can find that FPGA program, application program module are invalid, and just do not jump in the application program and do not carry out this moment, but direct waiting for CPU module download configuration flow process, after CPU module download configuration, application program module has just been repaired fully.
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CN101141278A (en) * 2007-10-17 2008-03-12 北大方正集团有限公司 Data transmission system, data transmission method, data processing method and corresponding device
CN101510161A (en) * 2009-03-30 2009-08-19 北京中星微电子有限公司 Bootstrap implementing method, apparatus and portable electronic apparatus

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US7391237B2 (en) * 2005-04-29 2008-06-24 O2 Micro International Limited Robust and economic solution for FPGA bitfile upgrade

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CN101141278A (en) * 2007-10-17 2008-03-12 北大方正集团有限公司 Data transmission system, data transmission method, data processing method and corresponding device
CN101510161A (en) * 2009-03-30 2009-08-19 北京中星微电子有限公司 Bootstrap implementing method, apparatus and portable electronic apparatus

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Application publication date: 20110817

Assignee: Nanjing Guodian Nanjing Grid Automation Co., Ltd.

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