CN102142439A - Layout structure of driving chip - Google Patents

Layout structure of driving chip Download PDF

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Publication number
CN102142439A
CN102142439A CN2010106127987A CN201010612798A CN102142439A CN 102142439 A CN102142439 A CN 102142439A CN 2010106127987 A CN2010106127987 A CN 2010106127987A CN 201010612798 A CN201010612798 A CN 201010612798A CN 102142439 A CN102142439 A CN 102142439A
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CN
China
Prior art keywords
chip
grid
domain structure
driving
layout structure
Prior art date
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Pending
Application number
CN2010106127987A
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Chinese (zh)
Inventor
杭晓伟
张祯
彭秋平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SUZHOU HUAXIN MICROELECTRONICS CO Ltd
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SUZHOU HUAXIN MICROELECTRONICS CO Ltd
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Publication date
Application filed by SUZHOU HUAXIN MICROELECTRONICS CO Ltd filed Critical SUZHOU HUAXIN MICROELECTRONICS CO Ltd
Priority to CN2010106127987A priority Critical patent/CN102142439A/en
Publication of CN102142439A publication Critical patent/CN102142439A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a layout structure of a driving chip. Transistors of the layout structure are arranged in a curved-grid manner; namely, grid electrodes of the transistors extend in a slower bending manner at 135 DEG; namely, connected grid electrodes extend in parallel after being bent at 135 DEG for two times; and source electrode region contacts and drain electrode region contacts in diagonal distribution are respectively formed at two sides of the grid electrodes at intervals. When the layout structure in the arrangement is adopted, the widths of the grid electrodes are increased, the arrangement of grid bars is closer, and the area of a chip is reduced; and meanwhile, as contact holes of a source electrode region and a drain electrode region are arranged in a diagonal manner, the current limiting function of a source/drain electrode is increased, and the stability of an electronic device under extreme conditions is improved.

Description

The domain structure of chip for driving
Technical field
The present invention relates to technical field of integrated circuits, relate in particular to the bigger chip layout structure of a kind of driving power.
Background technology
Along with people are more and more higher to the requirement of chip, in the application process of chip, people wish chip, and not only function is correct, and good performance is arranged, and is also more and more higher to the area of chip requirement, so also can improve the requirement of domain.Generally speaking the structure of the driving domain of chip as shown in Figure 1, this polycrystalline gate transistor contacts (Source contact) by a series of source electrodes and contact interdigital composition of drain-source that (Drain contact) mutual cross arrangement forms with drain electrode.Arranging of even now is very simple, but transistorized structure is compact inadequately, and the area of chip of therefore occupying usefulness is bigger, and then has increased production cost.Especially for powerful chip, because the operating voltage of chip is constant substantially, therefore the electric current by chip is bigger, makes the chip heating easily, and then influences the performance of chip.
Summary of the invention
The objective of the invention is to propose a kind of domain structure of chip for driving, it adopts the transistorized domain arrangement mode of bent palisade, to reduce area of chip, improves the performance and the function of chip, and then improves the stability of device under maximum conditions.
For achieving the above object, the present invention proposes following technical scheme: the transistor of this domain structure adopts the arrangement mode of bent palisade, be that transistorized grid is to adopt the bend mode of mild wide-angle to extend, the respectively alternate formation source area contact in the both sides of grid contacts with the drain region.
Described transistorized grid adopts the bend mode of 135 degree;
The grid that described transistor joins carries out extending in parallel after the twice 135 degree bendings;
Described source area contact contacts to be with the drain region horn shape is distributed;
Distributed back of the body grid contact hole is easily implanted so that the transistor on the chip is expanded in the both sides of described domain structure.
Compare with background technology, the domain structure of disclosed chip for driving, owing to be the transistor arrangement that adopts bent palisade to arrange, be that transistorized grid adopts the bend mode of 135 comparatively mild degree to extend, increased the width of grid, make that arranging of gate bar is more tight, it has reduced half chip area than domain structure in the background technology, has reduced production cost.Simultaneously, place, increased source/leakage metering function, improved the stability of electronic device under maximum conditions because source area contact hole and drain region contact hole are the diagonal angle.
Description of drawings
Fig. 1 is the schematic diagram of the domain structure of existing chip for driving;
Fig. 2 is the schematic diagram of the domain structure of chip for driving of the present invention;
Fig. 3 implants the schematic diagram of the domain structure behind the back of the body grid contact hole for chip for driving of the present invention;
Embodiment
As shown in Figure 2, a kind of preferred forms for the chip structure of high-power driving of the present invention, its transistor is the arrangement mode that adopts bent palisade, the grid (poly) that is polysilicon is not the curved arrangement that adopts 90 degree among Fig. 1, but adopt the bend mode (adopting the crooked modes of 135 degree be the bend mode of optimum) of the symmetries of 135 comparatively mild degree, the grid that promptly joins be through twice 135 the degree bending after extend in parallel, form distribution form as shown in Figure 2, form source area contact (Source contact) in the alternate both sides of bending area respectively and contact (Drain contact) with the drain region, and source area contacts to contact to be with the drain region horn shape is arranged.The bent grid that such bending is arranged have increased the width of grid, make transistorized source electrode utmost point contact contact with the drain electrode utmost point, and the arrangement of gate bar is tightr, thereby reduced area of chip (this mode arrange domain can reduce general area of chip) than domain in the background technology, simultaneously, because what the bending of grid was adopted is 135 comparatively mild degree bendings, therefore also is not easy to take place local avalanche breakdown.
In addition, because being the diagonal angle, source area contact and drain region contact hole place, therefore the area of the oxide layer between source area contact and the drain region contact increases, that is the resistance that is equivalent between source electrode and the drain electrode increases, further like this increase source/leakage metering function, thereby improved the stability of electronic device under maximum conditions, for example carried out ESD (Electrostatic Discharge, static discharge) situation that may run in the test has improved the overall performance of electronic device.
Further, show as Fig. 3, when not sacrificing more chip area, the chip of this domain structure according to actual needs, the transistorized expansion of same arrangement mode is carried out in the both sides that are readily embodied in chip, promptly implant large-scale distributed back of the body grid contact hole network, make this device be applicable to the situation of frequent generation transient error in the both sides of chip.
Technology contents of the present invention and technical characterictic have disclosed as above; yet those of ordinary skill in the art still may be based on teaching of the present invention and announcements and are done all replacement and modifications that does not deviate from spirit of the present invention; therefore; protection range of the present invention should be not limited to the content that embodiment discloses; and should comprise various do not deviate from replacement of the present invention and modifications, and contained by the present patent application claim.

Claims (5)

1. the domain structure of a chip for driving, it is characterized in that: the transistor of this domain structure adopts the arrangement mode of bent palisade, be that transistorized grid is to adopt the bend mode of mild wide-angle to extend, the respectively alternate formation source area contact in the both sides of grid contacts with the drain region.
2. the domain structure of a chip for driving as claimed in claim 1 is characterized in that: the bend mode of described transistorized grid employing 135 degree.
3. the domain structure of a chip for driving as claimed in claim 2 is characterized in that: the grid that described transistor joins carries out extending in parallel after the twice 135 degree bendings.
4. the domain structure of a chip for driving as claimed in claim 1 is characterized in that: described source area contact contacts to be with the drain region horn shape is distributed.
5. the domain structure of a chip for driving as claimed in claim 1 is characterized in that: the distributed back of the body grid contact hole of the easy implantation in the both sides of described domain structure.
CN2010106127987A 2010-12-30 2010-12-30 Layout structure of driving chip Pending CN102142439A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010106127987A CN102142439A (en) 2010-12-30 2010-12-30 Layout structure of driving chip

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Application Number Priority Date Filing Date Title
CN2010106127987A CN102142439A (en) 2010-12-30 2010-12-30 Layout structure of driving chip

Publications (1)

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CN102142439A true CN102142439A (en) 2011-08-03

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CN (1) CN102142439A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111785683A (en) * 2020-07-17 2020-10-16 上海华虹宏力半导体制造有限公司 Semiconductor device forming method and layout structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4152714A (en) * 1978-01-16 1979-05-01 Honeywell Inc. Semiconductor apparatus
US5852315A (en) * 1995-04-06 1998-12-22 Ind Tech Res Inst N-sided polygonal cell layout for multiple cell transistor
CN101599505A (en) * 2008-06-03 2009-12-09 致新科技股份有限公司 Distribution mode of power transistor with high density and efficiency
CN101727526A (en) * 2009-12-23 2010-06-09 北京中星微电子有限公司 Method and device for designing MOS tube layout and chip
CN202058739U (en) * 2010-12-30 2011-11-30 苏州华芯微电子股份有限公司 Chip-driven layout structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4152714A (en) * 1978-01-16 1979-05-01 Honeywell Inc. Semiconductor apparatus
US5852315A (en) * 1995-04-06 1998-12-22 Ind Tech Res Inst N-sided polygonal cell layout for multiple cell transistor
CN101599505A (en) * 2008-06-03 2009-12-09 致新科技股份有限公司 Distribution mode of power transistor with high density and efficiency
CN101727526A (en) * 2009-12-23 2010-06-09 北京中星微电子有限公司 Method and device for designing MOS tube layout and chip
CN202058739U (en) * 2010-12-30 2011-11-30 苏州华芯微电子股份有限公司 Chip-driven layout structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111785683A (en) * 2020-07-17 2020-10-16 上海华虹宏力半导体制造有限公司 Semiconductor device forming method and layout structure
CN111785683B (en) * 2020-07-17 2024-05-03 上海华虹宏力半导体制造有限公司 Semiconductor device forming method and layout structure

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Application publication date: 20110803