CN102136885B - Parallel physical uplink shared channel (PUSCH) interleaving and scrambling realization method and system for 3rd-generation partnership project long term evolution (3GPP LTE) - Google Patents

Parallel physical uplink shared channel (PUSCH) interleaving and scrambling realization method and system for 3rd-generation partnership project long term evolution (3GPP LTE) Download PDF

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CN102136885B
CN102136885B CN 201110076521 CN201110076521A CN102136885B CN 102136885 B CN102136885 B CN 102136885B CN 201110076521 CN201110076521 CN 201110076521 CN 201110076521 A CN201110076521 A CN 201110076521A CN 102136885 B CN102136885 B CN 102136885B
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information
ack
last
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CN102136885A (en
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张秀丽
梁达成
许彤
石晶林
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Beijing Zhongke Polytron Technologies Inc
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Institute of Computing Technology of CAS
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Abstract

The invention provides a parallel physical uplink shared channel (PUSCH) interleaving and scrambling realization method and a PUSCH interleaving and scrambling realization system for 3rd-generation partnership project long term evolution (3GPP LTE). The method comprises the following steps of: 1) coding rank indication (RI) information and acknowledgement (ACK)/non-acknowledgement (NACK) information; 2) inputting the RI information, control and data information and the ACK/NACK information, storing the row index last_row_indexRI and column index last_column_indexRI of the last written RI information and the row index last_row_indexACK and column index last_column_indexACK of the last written ACK/NACK information, and performing a channel interleaving output operation according to the row index and column index of the last written RI information and the row index and column index of the last written ACK/NACK information; and 3) scrambling the RI information, the control and data information and the ACK/NACK information. In the method and the system, the high processing speed is ensured, a coding way is independent of a quadrature amplitude modulation way, and a memory space is alsosaved.

Description

A kind of 3GPP LTE PUSCH channel parallel channel interweaves and implementation method and the system of scrambling
Technical field
The present invention relates to the mobile communication technology field, be specifically related to channel interleaving and scrambling realization method and the system of Uplink Shared Channel (PUSCH) in a kind of third generation partner program long evolving system (3GPP LTE).
Background technology
The up user side (UE) that refers to of 3GPP LTE communication system sends to base station (eNodeB), and up channel comprises Uplink Shared Channel (PUSCH), ascending control channel (PUCCH) and Random Access Channel (PRACH).The main transmitting data information of PUSCH wherein, also can control information transmission, channel quality indication (CQI) information (CQI for example, channel quality indicator), rank indication information (RI, rank indication) and h-arq confirmation (HARQ-ACK), wherein h-arq confirmation (HARQ-ACK) is also referred to as ACK/NACK information.
The flow process of PUSCH coding can find out as shown in Figure 1, and the input of channel interleaving has three parts: the data after the multiplexing chnnel coding and CQI information, the RI information after the chnnel coding and the HARQ-ACK information after the chnnel coding.Because the coded system of RI and HARQ-ACK and channel interleaving and scrambling have close ties, first they are done simple the introduction.
The chnnel coding of RI information is relevant with quadrature amplitude modulation (QAM) mode, is divided into following two classes according to the input bit number, respectively as shown in Table 1 and Table 2:
The coding of table 11 bit RI information
Figure BDA0000052604910000011
The coding of table 22 bit RI information
Figure BDA0000052604910000012
Figure BDA0000052604910000021
In the table 2
Figure BDA0000052604910000022
Its Far Left is least significant bit (LSB); X and y are the placeholders for increasing the modulation symbol Euclidean distance in table 1 and the table 2.
About the chnnel coding of HARQ-ACK, at first ACK represents with binary one, and NACK represents with binary zero.Known time division multiplexing (TDD) ACK/NACK coding has binding (bundling) and multiplexing (multiplexing) two kinds of feedback models, and for the binding feedback model, HARQ-ACK is comprised of the 1-2 bit information; For multiplexing feedback model, HARQ-ACK is comprised of the 1-4 bit.The same with RI information, the coded system of the chnnel coding of HARQ-ACK is also relevant with the QAM mode, specifically describes as follows:
Multiplexing feedback 1 bits of encoded of ACK/NACK and 2 bits of encoded are respectively as shown in table 3 and table 4:
The coding of table 31 bit HARQ-ACK/NACK information
Figure BDA0000052604910000023
The coding of table 42 bit HARQ-ACK/NACK information
Figure BDA0000052604910000024
In the table 4 Its Far Left is least significant bit (LSB); X and y are the placeholders for increasing the modulation symbol Euclidean distance in table 3 and the table 4.
ACK/NACK binding feedback encoding is that the output data of the multiplexing feedback 1 of ACK/NACK or 2 bits of encoded are carried out scrambling, supposes that the output sequence of the multiplexing feedback 1 of ACK/NACK or 2 bits of encoded is
Figure BDA0000052604910000026
After it is selected and scramble sequence by certain way scrambling (XOR), the output sequence that obtains bundling feedback encoding is
Figure BDA0000052604910000027
The scrambling mode is scrambled data position and placeholder " y ", and " x " is constant for placeholder.Wherein scramble sequence is as shown in table 5:
Table 5TDD ACK/NACK bunding coding scramble sequence
Figure BDA0000052604910000031
Wherein, i=(N Bundled-1) mod 4, wherein N BundledBe input parameter.
Table 6 (32, basic sequence O)
i M i,0 M i,1 M i,2 M i,3 M i,4 M i,5 M i,6 M i,7 M i,8 M i,9 M i,10
0 1 1 0 0 0 0 0 0 0 0 1
1 1 1 1 0 0 0 0 0 0 1 1
2 1 0 0 1 0 0 1 0 1 1 1
3 1 0 1 1 0 0 0 0 1 0 1
4 1 1 1 1 0 0 0 1 0 0 1
5 1 1 0 0 1 0 1 1 1 0 1
6 1 0 1 0 1 0 1 0 1 1 1
7 1 0 0 1 1 0 0 1 1 0 1
8 1 1 0 1 1 0 0 1 0 1 1
9 1 0 1 1 1 0 1 0 0 1 1
10 1 0 1 0 0 1 1 1 0 1 1
11 1 1 1 0 0 1 1 0 1 0 1
12 1 0 0 1 0 1 0 1 1 1 1
13 1 1 0 1 0 1 0 1 0 1 1
14 1 0 0 0 1 1 0 1 0 0 1
15 1 1 0 0 1 1 1 1 0 1 1
16 1 1 1 0 1 1 1 0 0 1 0
17 1 0 0 1 1 1 0 0 1 0 0
18 1 1 0 1 1 1 1 1 0 0 0
19 1 0 0 0 0 1 1 0 0 0 0
20 1 0 1 0 0 0 1 0 0 0 1
21 1 1 0 1 0 0 0 0 0 1 1
22 1 0 0 0 1 0 0 1 1 0 1
23 1 1 1 0 1 0 0 0 1 1 1
24 1 1 1 1 1 0 1 1 1 1 0
25 1 1 0 0 0 1 1 1 0 0 1
26 1 0 1 1 0 1 0 0 1 1 0
27 1 1 1 1 0 1 0 1 1 1 0
28 1 0 1 0 1 1 1 0 1 0 0
29 1 0 1 1 1 1 1 1 1 0 0
30 1 1 1 1 1 1 1 1 1 1 1
31 1 0 0 0 0 0 0 0 0 0 0
For the multiplexing feedback 3 of ACK/NACK or 4 bits of encoded, suppose that list entries is
Figure BDA0000052604910000032
Output sequence is
Figure BDA0000052604910000033
Then coded system is:
Figure BDA0000052604910000041
M wherein I, oAs shown in table 6.
The effect of channel interleaving is that interleaving process of the prior art is described below with data message, control information weave in:
Step 1 is calculated columns and the line number of this subframe interleaver matrix, columns
Figure BDA0000052604910000042
Wherein
Figure BDA0000052604910000043
Represent the SC-OFDM symbol numbers that is used for the PUSCH transmission in the subframe, Represent the number of SC-OFDM symbol in the time slot, N SRSRepresent the SC-OFDM symbol numbers that is used for the SRS transmission in the subframe; Line number R Mux=H "/C Mux, wherein H " represents the number of all modulation symbols in the subframe;
Step 2 if RI information is transmitted in this subframe, just begins the information behind the RI coding up to fill from last column according to the order of the row shown in the table 7;
The row set of table 7RI information in the channel interleaving matrix
Cyclic Prefix configuration (CP configuration) The column number at RI place
Normal condition (common) {1,10,7,4}
Extended mode (expansion) {0,8,5,3}
Step 3 after RI has filled, begins the data after multiplexing and the CQI information the first row from matrix down to fill successively, if run into RI information, then skips;
Step 4 if HARQ-ACK information is transmitted in this subframe, begins up to fill from last column according to the row shown in the table 8 orders, if the data that fill in 3 in steps the position of filling then cover;
The row set of table 8HARQ-ACK information in the channel interleaving matrix
Cyclic Prefix configuration (CP configuration) The column number at HARQ-ACK place
Normal condition (common) {2,9,8,3}
Extended mode (expansion) {1,7,6,2}
Step 5: from interleaver matrix (R Mux* C Mux) in one be listed as and read bit sequence as the output of channel interleaver.
At last, scrambling module carries out scrambling to the output of channel interleaving, and the scrambling rule is:
If be placeholder " x " by scrambled data, then be " 1 " after the scrambling.
If be placeholder " y " by scrambled data, then be " the scrambling value of last bit " after the scrambling.
If non-placeholder then is random sequence and by the XOR value of scrambled data after the scrambling.
In aforesaid prior art, because the scrambling module after the channel interleaving will adopt different method for scrambling according to the difference of data type, so each data in the interleaver need two bits of extra storage to come the designation data type, wherein data type comprises as mentioned above: RI, HARQ-ACK, data and CQI information after multiplexing, and this has wasted a large amount of memory spaces; The RI coding is all relevant with QAM with the HARQ-ACK coding; There are x, y placeholder, increased complexity; Simultaneously, interweave and scrambling partial data amount large, operate by bit in the prior art, the length that expends time in affects the speed of whole system.
Summary of the invention
The needs that the objective of the invention is to solve above-mentioned prior art take a large amount of memory spaces and slow shortcoming, utilize the characteristics of control information RI and HARQ-ACK coded system to propose that a kind of 3GPP LTE PUSCH channel parallel channel interweaves and the implementation method of scrambling.
According to an invention of the present invention, provide a kind of 3GPP LTE PUSCH channel parallel channel to interweave and the implementation method of scrambling, comprise the following steps:
1) RI information and ACK/NACK information are encoded;
2) input RI information, control and data message and ACK/NACK information, and store the line number last_row_index at the RI information place that writes at last RIWith column number last_column_index RIThe line number last_row_index at the ACK/NACK information place that writes at last ACKWith column number last_column_index ACK, according to the line number at the line number at the RI information place that writes at last and column number and the ACK/NACK information place that writes at last and the output function that column number carries out channel interleaving;
3) RI information, control after multiplexing and data message and ACK/NACK information are carried out scrambling.
In said method, described step 2) further comprise:
21) calculate the row, column number of the interleaver matrix that subframe takies in the channel interleaving memory;
22) last column from the channel interleaving memory matrix begins up to write the line number last_row_index that RI information is also stored the RI information place that writes at last RIWith column number last_column_index RI
23) write data and CQI information after multiplexing according to the line number at the RI information place that writes at last and column number;
24) write ACK/NACK information;
25) according to line number and the column number at the line number at the RI information place that writes at last and column number and/or the ACK/NACK information place that writes at last, press all information and data in the row delivery channel interleaver matrix.
The step of in said method, described step 1) RI information being encoded comprises: be 6 Bit datas with the RI information coding, wherein front 4 are 1, and rear two is least significant bit.
The step of in said method, described step 1) ACK/NACK information being encoded comprises: 1 or 2 bit ACK in the multiplexing feedback model/nack message is encoded to 6 Bit datas, and wherein front 4 are 1, and rear two is least significant bit.
The step of in said method, described step 1) ACK/NACK information being encoded comprises: at first, 1 in the tie-in mode or 2 bit ACK/nack message are encoded according to the coded system that multiplexing feedback model adopts; Then scramble sequence is used as 12 circulating register, each rising edge clock dibit that moves to right adds the high order end of this register to, and the 2 bits output data of acquisition and 2 minimum bits of output data of multiplexing feedback model carry out scrambling.
In said method, described step 1) in during to 3 or 4 bit ACK in the multiplexing feedback model/nack message coding, with list entries and basic sequence carry out step-by-step with, the sequence that obtains is finished mould 2 by the step-by-step XOR again and is added up.
In said method, described step 3) comprising:
31) the mode initializing pseudo random scramble sequence of employing 31 parallel-by-bits;
32) generate the pseudorandom scramble sequence according to initialized pseudorandom scramble sequence Parallel Recursive;
33) utilize the pseudorandom scramble sequence that generates to carry out data scrambling.
According to a further aspect of the invention, also provide a kind of 3GPP LTE PUSCH channel parallel channel to interweave and scrambling system, having comprised:
The RI channel encoder is used for RI information is carried out chnnel coding;
The HARQ-ACK channel encoder is used for ACK/NACK information is carried out chnnel coding;
The channel interleaving system, input RI information, control and data message and ACK/NACK information, the line number last_row_index at the RI information place that storage writes at last RIWith column number last_column_index RIThe line number last_row_index at the ACK/NACK information place that writes at last ACKWith column number last_column_index ACK, according to the line number at the line number at the RI information place that writes at last and column number and/or the ACK/NACK information place that writes at last and the output function that column number carries out channel interleaving;
Scrambling apparatus is used for RI information, control and data message, ACK/NACK information after multiplexing are carried out scrambling.
In above-mentioned channel interleaving and scrambling system, described channel interleaving system comprises channel interleaving writing controller, channel interleaving memory and channel interleaving Read Controller, wherein
The channel interleaving writing controller, at first, the row, column number of the interleaver matrix that the calculating subframe takies in the channel interleaving memory; Then, the last column from the channel interleaving memory matrix begins up to write the line number last_row_index that RI information is also stored the RI information place that writes at last RIWith column number last_column_index RI, write data and CQI information after multiplexing according to the line number at the RI information place that writes at last and column number, write ACK/NACK information;
The channel interleaving memory is used for storage RI information, the data after multiplexing and control information, ACK/NACK information;
The channel interleaving Read Controller is used for the receive channel row, column number of the channel interleaving matrix that writing controller calculates that interweaves, and presses all information of the storage in the row delivery channel interleaver memory.
In above-mentioned channel interleaving and scrambling system, described channel interleaving memory comprises 12 quantum memories, and each quantum memory is stored 1 column information.
In the present invention, RI coding, HARQ-ACK coding, channel interleaving and scrambling module are compared with the bit-level operation by symbol manipulation, have significantly improved processing speed; Coding and the stage that interweaves need not to generate and storage " x " and " y " placeholder, so that coded system and QAM adjustment mode are irrelevant; The RI and the HARQ-ACK address that write at last when interweaving judge whether it is RI and HARQ-ACK information, have saved memory space; Parallel scrambling mode is adopted in scrambling, judges element type by the index signal that generates previously, carries out the symbol scrambling, has reduced hardware spending, has further accelerated scrambling speed.
Description of drawings
Fig. 1 is the data flow schematic diagram of 3GPP LTE PUSCH chnnel coding;
Fig. 2 is that 3GPP LTE PUSCH channel parallel channel interweaves and the block diagram of scrambling system according to the preferred embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with accompanying drawing, to interweaving according to an embodiment of the invention and method for scrambling and system's further description.Should be appreciated that specific embodiment described herein only in order to explain the present invention, is not intended to limit the present invention.
According to a preferred embodiment of the invention, the method comprises the following steps:
(101.RI Rank indicator) chnnel coding
RI has at most the effective information of 2 bits, particularly, when pressing symbol interleaving and scrambling, only has low dibit effective in the symbol behind the coding, and high order bit is x or invalid.Therefore, in a preferred embodiment of the invention, data bit width is decided to be 6 bits, wherein high 4 bits are fixed as 1, thereby so that RI chnnel coding and QAM modulating mode are irrelevant, specific implementation is as follows: if only have 1 bit RI information, then a symbol behind the coding is
Figure BDA0000052604910000081
Rightmost is least significant bit (LSB), with its continuous wave output, until the output symbol number reaches specified number or amount.If 2 bit RI information are arranged, then the symbol behind the coding is
Figure BDA0000052604910000082
Wherein
Figure BDA0000052604910000083
Rightmost is least significant bit (LSB), with they output that circulates successively, until the output symbol number reaches specified number or amount.
One of ordinary skill in the art will appreciate that, the above has provided a kind of preferred RI (Rankindicator) channel coding method, but it also can realize with other method, for example defined in the 3GPP agreement.
102.HARQ-ACK chnnel coding
For the multiplexing feedback 1 of ACK/NACK, 2 bits of encoded, during by symbol manipulation, only have low dibit effective in the symbol behind the coding, high order bit is x or invalid.Therefore, in a preferred embodiment of the invention, data bit width is decided to be 6 bits, wherein high 4 bits are fixed as 1, thereby so that HARQ-ACK chnnel coding and QAM modulating mode are irrelevant.Implementation is identical with the RI implementation in such cases, no longer repeats at this.Because RI coding and HARQ-ACK coding do not need to carry out simultaneously, therefore can utilize the circuit of RI coding to realize the HARQ-ACK coding.
For ACK/NACK binding feedback, coded system is the coding that carries out first the multiplexing feedback 1 of ACK/NACK or 2 bits, then the output data of the multiplexing feedback of ACK/NACK is carried out scrambling (XOR).During realization, being once to read a scrambling bit according to the scrambling mode when 1 bits of encoded, is to read same scrambling bit three times during 2 bits of encoded, with scramble sequence w ACKBe used as one 12 circulating register, each rising edge clock dibit that moves to right adds the high order end (MSB) of register to, 2 bits that obtain output data w ACK2 bits that the output data of [1:0] and the multiplexing feedback of ACK/NACK are minimum carry out scrambling.
Scramble sequence w ACKInitial value as shown in table 9 when 1 bits of encoded, as shown in table 10 during 2 bits of encoded, i=(N wherein Bundled-1) mod 4, wherein N BundledBe input parameter.
Table 9HARQ-ACK/NACK 1-bit binding feedback encoding scramble sequence
i w ACK[11:0]
0 1111_1111_1111
1 0101_0101_0101
2 0011_0011_0011
3 1001_1001_1001
Table 10HARQ-ACK/NACK 2-bit binding feedback encoding scramble sequence
i w ACK[11:0]
0 1111_1111_1111
1 0001_1100_0111
2 0000_0011_1111
3 1110_0000_0111
For the multiplexing feedback 3 of ACK/NACK, 4 bits of encoded, suppose that list entries is
Figure BDA0000052604910000091
Output sequence is
Figure BDA0000052604910000092
Then coded system is:
Preferably, with list entries and [M (i mod 32), 0, M (i mod 32), 1, M (i mod 32), 2, M (i mod 32), 3,] carrying out step-by-step and, the sequence that obtains, to finish mould 2 by the step-by-step XOR more cumulative, obtains output sequence Thus, cataloged procedure just can be finished through a clock cycle.
One of ordinary skill in the art will appreciate that, the above has provided a kind of preferred HARQ-ACK channel coding method, but it also can realize with other method, for example defined in the 3GPP agreement.
103. channel interleaving
Idiographic flow is as follows.
Step 1: the row, column number that calculates this subframe matrix in the channel interleaving memory.
Columns
Figure BDA0000052604910000103
Wherein
Figure BDA0000052604910000104
Represent the SC-OFDM symbol numbers that is used for the PUSCH transmission in the subframe,
Figure BDA0000052604910000105
Represent the number of SC-OFDM symbol in the time slot, N SRSRepresent the SC-OFDM symbol numbers that is used for the SRS transmission in the subframe; Line number R Mux=H "/C Mux, wherein H " represents the number of all modulation symbols in the subframe.
Step 2: if RI information is transmitted in this subframe, then begin up to write the position at the RI place that RI information and storage write at last from last column of channel interleaving memory matrix, wherein last_row_index RIAnd last_column_index RIBe respectively the residing row and column numbering of the RI that writes at last.The position at the RI place that writes at last can be used for subsequent step, thereby needing to have avoided two bits of extra storage to indicate the data type of RI, thereby has saved a large amount of memory spaces.
Step 3: write data and CQI information after multiplexing.Wherein CQI information is front, and data message is rear.Write fashionable needs skip the RI information of inputting previously this moment, and this just need to by the row and column positional information at the RI place that writes at last, judge the position of all RI.Make that row_index is the line number that present input data is write.
Step 3.1 is as row_index<last_row_index RIThe time, this journey does not have RI information, and the data after multiplexing and CQI information are write interleaver in order;
Step 3.2 is worked as row_index=last_row_index RI, when namely arriving last column that RI writes, the residing column position of all RI symbols of this row as shown in table 11:
The residing column number of the RI that table 11 writes at last
Relation table with the numbering of the row that have RI in the residing row of the RI that writes at last
Figure BDA0000052604910000111
Wherein
Figure BDA0000052604910000112
The numbering that has the row of RI in the residing row of RI that writes at last of expression need to be skipped these positions when the data after multiplexing and CQI information are write interleaver.
Step 3.3 is worked as R Mux>=row_index>last_row_index RIThe time, use
Figure BDA0000052604910000113
Represent the residing column position of all RI symbols of this row.For common CP,
Figure BDA0000052604910000114
10,7 or 4; For expansion CP, 8,5 or 3, when being write interleaver, the data after multiplexing and CQI information need to skip these positions.
Step 4 if HARQ-ACK information is transmitted in this subframe, then writes HARQ-ACK information.
Step 5, the output of channel interleaving: data reading is undertaken by row, from the first row the first row, runs through first row, forwards secondary series to again, is performed until c MuxRow, total data is read.
When reading RI information, the RI index signal is set high, when reading HARQ-ACK information, the HARQ-ACK index signal is set high.
If current column number be the common CP situation 1,10,7,4 or expansion CP situation 0,8,5,3, and line number satisfies row_index 〉=last_row_index RI+ 1-ri_indicator[i]), just represent that current sign is the RI information symbol, need to set high the RI index signal.Ri_indicator[i wherein] by the residing column position last_column_index of last RI symbol RIDetermine, as shown in table 12:
Table 12
Figure BDA0000052604910000121
I=0,1,2,3, represented current 4 positions in the possible RI row that are listed in, when setting the common CP situation, the 1st classifies i=0 as; The 4th classifies i=1 as; The 7th classifies i=2 as; The 10th classifies i=3 as; During expansion CP situation, the 0th classifies i=0 as; The 3rd classifies i=1 as; The 5th classifies i=2 as; The 8th classifies i=3 as.
If current column number be the common CP situation 2,9,8,3 or expansion CP situation 1,7,6,2, and line number satisfies row_index 〉=last_row_index ACK+ 1-ack_indicator[i], just represent that current sign is the HARQ-ACK information symbol, need to set high the HARQ-ACK index signal.Ack_indicator[i wherein] by the residing column position last_column_index of last HARQ-ACK symbol ACKDetermine, as shown in table 13:
Table 13
Figure BDA0000052604910000122
I=0,1,2,3, represented current 4 positions in the possible HARQ-ACK row that are listed in, when setting the common CP situation, the 2nd classifies i=0 as; The 3rd classifies i=1 as; The 8th classifies i=2 as; The 9th classifies i=3 as; During expansion CP situation, the 1st classifies i=0 as; The 2nd classifies i=1 as; The 6th classifies i=2 as; The 7th classifies i=3 as.
104. scrambling preferably, adopts parallel mode to carry out.
Step 1: initializing pseudo random scramble sequence
Make c represent pseudo random sequence, adopt 31 maximum parallel-by-bits to calculate, obtain x1 (1600) and x2 (1600), thereby obtain the initial value c (0) of pseudorandom scramble sequence=(x1 (1600)+x2 (1600)) mod2, the concrete generation formula of pseudo random sequence is with reference to agreement 3GPP 36.211 7.2 joints.
Parallel calculating method is that x1 and x2 adopt 31 register to represent, calculates the x1[30:0 that comprises 31 bits of original at initial time] and x2[30:0] value; Just can obtain 31 x1 and x2 by each clock cycle Parallel Recursive afterwards; Initialization cycle clock the 52nd clock cycle namely in the end, only use high 19 bits to x1 and x2 to carry out recursion and calculate, obtain x1 (1600) and x2 (1600).
Step 2: generate the pseudorandom scramble sequence
2 c[1:0 of parallel output simultaneously], 4 c[3:0], 6 c[5:0] the pseudorandom scramble sequence, the respectively scrambling in corresponding QPSK, QAM16, the QAM64 situation.
The similar step 1 of parallel calculating method, the figure place that is each Parallel Recursive is different.Parallel Recursive x1[1:0 during the QPSK pattern] and x2[1:0]; Parallel Recursive x1[3:0 during the QAM16 pattern] and x2[3:0]; Parallel Recursive x1[5:0 during pattern during QAM64] and x2[5:0].And then calculate c[1:0 according to x1 and x2], c[3:0] or c[5:0].
Step 3: data scrambling
Need to carry out scrambling according to the scrambling rule of agreement in this step, because the present invention do not exist placeholder " x " and " y ", so, the method for scrambling of different information or data is comprised following 3 kinds:
Method a: the scrambling lowest order, inferior low level is identical with lowest order, and { 0000, the c[0], c[0] } that namely input data and 6 bits carries out scrambling.
Method b: minimum 2 of scrambling, { 0000, the c[1:0] } that namely input data and 6 bits carries out scrambling;
Method c: all scramblings, namely input the c[5:0 of data and 6 bits] carry out scrambling.
According to a particular embodiment of the invention, complete scrambling scheme is:
If be input as RI information, in the situation of 1 bits of encoded, employing method a; In the 2 bits of encoded situations, employing method b;
If be input as control and data message after multiplexing, all scramblings, employing method c;
If be input as HARQ-ACK information, when feedback model is multiplexing feedback 1 bit, employing method a; During multiplexing feedback 2 bit, employing method b; All data of scrambling in the situation of other HARQ-ACK information, employing method c.
According to a further aspect in the invention, also provide a kind of 3GPP LTE PUSCH channel parallel channel to interweave and scrambling system, its structure as shown in Figure 2, this system mainly comprises following a few part:
RI channel encoder 201 is used for RI information is carried out chnnel coding.According to a preferred embodiment of the invention, be 6 Bit datas with the RI information coding, wherein front 4 are 1, and rear two is least significant bit.
HARQ-ACK channel encoder 202 is used for ACK/NACK information is carried out chnnel coding.According to the preferred embodiment of the present invention: 1 or 2 bit ACK in the multiplexing feedback model/nack message is encoded to 6 Bit datas, and wherein front 4 are 1, and rear two is least significant bit; Under tie-in mode, at first, use the coded system of 1 or 2 bits in the multiplexing feedback model to be encoded to 6 Bit datas, wherein front 4 are 1, and rear two is least significant bit; Then scramble sequence is used as 12 circulating register, each rising edge clock dibit that moves to right adds the high order end of this register to, and the 2 bits output data of acquisition and 2 minimum bits of output data of multiplexing feedback model carry out scrambling; During to 3 or 4 bit ACK in the multiplexing feedback model/nack message coding, with list entries and basic sequence carry out step-by-step with, the sequence that obtains is finished mould 2 by the step-by-step XOR again and is added up.
Channel interleaving system 210, the line number last_row_index at the RI information place that storage writes at last in input (write-channel interleaver memory) process of channel interleaving RIWith column number last_column_index RIThe line number last_row_index at the ACK/NACK information place that writes at last ACKWith column number last_column_index ACK, then, carry out output (the reading the channel interleaving memory) operation of channel interleaving according to them.In a preferred embodiment of the invention, channel interleaving system 210 comprises channel interleaving writing controller 211, channel interleaving memory 212 and channel interleaving Read Controller 213.
Channel interleaving writing controller 211 be used for to calculate the row, column number of the interleaver matrix that subframe takies at channel interleaving memory 212, and accordingly all information is written to corresponding address in the channel interleaving memory 212 according to its type separately.Preferably, this channel interleaving writing controller 203 comprises state machine, and it is used for the sequencing of control data writing stream, and this write sequence is for inputting successively RI information, data after multiplexing and control information, ACK/NACK information in this preferred embodiment.Concrete ablation process is: at first, begin up to write the line number last_row_index at the RI information place that storage writes at last RI information and the register therein from last column of channel interleaving memory matrix RIWith column number last_column_index RIThen, write data and CQI information after multiplexing according to the line number at the RI information place that writes at last and column number; At last, write ACK/NACK information.
Channel interleaving memory 212 is used for storage RI information, the data after multiplexing and control information, ACK/NACK information.Because channel interleaving is undertaken by symbol in hardware is realized, i.e. QPSK 2bit, QAM16 4bit, QAM64 6bit, so preferably, the channel interleaving memory comprises one group of 12 quantum memory, each quantum memory is stored 1 column information.The quantum memory width is 6 bits, and the degree of depth is interleaver row length, and namely the subcarrier number is 12 * 110=1320.
Channel interleaving Read Controller 213 is used for the interweave row, column number of the interleaver matrix that subframe that writing controller calculates takies at channel interleaving memory 212 of receive channel, and all information of the storage in the delivery channel interleaver memory accordingly.Particularly, this output is undertaken by row, from the first row the first row, runs through first row, forwards secondary series to again, is performed until c MuxRow when reading RI information, set high the RI index signal, when reading HARQ-ACK information, the HARQ-ACK index signal are set high.
Scrambling apparatus 220 is used for RI information, control and data message, ACK/NACK information are carried out scrambling.According to a preferred embodiment of the invention, this scrambling process is parallel finishes.
Should be noted that and understand, in the situation that do not break away from the desired the spirit and scope of the present invention of accompanying claim, can make to the present invention of foregoing detailed description various modifications and improvement.Therefore, the scope of claimed technical scheme is not subjected to the restriction of given any specific exemplary teachings.

Claims (10)

1. a 3GPP LTE PUSCH channel parallel channel interweaves and the implementation method of scrambling, comprises the following steps:
1) RI information and ACK/NACK information are encoded;
2) input RI information, the control after multiplexing and data message and ACK/NACK information are carried out channel interleaving, comprising:
21) transmit in subframe when RI information, begin up to write the line number last_row_index at the RI information place that RI information and storage write at last from last column of channel interleaving memory matrix RIWith column number last_column_index RI
22) according to line number and the column number at the RI information place that writes at last, skip the RI information that writes previously, write data and control information after multiplexing, wherein control information is front, and data message is rear;
23) transmit in this subframe when ACK/NACK information, write ACK/NACK information;
24) according to the line number at the line number at the RI information place that writes at last and column number and the ACK/NACK information place that writes at last and the output function that column number carries out channel interleaving;
3) RI information, control after multiplexing and data message and ACK/NACK information are carried out scrambling.
2. method according to claim 1 is characterized in that, described step 21) also comprise before:
20) calculate the row, column number of the interleaver matrix that subframe takies in the channel interleaving memory.
3. method according to claim 1 and 2 is characterized in that, the step of in the described step 1) RI information being encoded comprises: be 6 Bit datas with the RI information coding, wherein front 4 are 1, and rear two is least significant bit.
4. method according to claim 1 and 2, it is characterized in that, the step of in the described step 1) ACK/NACK information being encoded comprises: 1 or 2 bit ACK in the multiplexing feedback model/nack message is encoded to 6 Bit datas, and wherein front 4 are 1, and rear two is least significant bit.
5. method according to claim 1 and 2, it is characterized in that, the step of in the described step 1) ACK/NACK information being encoded comprises: at first 1 in the tie-in mode or 2 bit ACK/nack message are encoded according to the coded system that multiplexing feedback model adopts; Then scramble sequence is used as 12 circulating register, each rising edge clock dibit that moves to right adds the high order end of this register to, and the 2 bits output data of acquisition and 2 minimum bits of output data of multiplexing feedback model carry out scrambling.
6. method according to claim 1 and 2, it is characterized in that, in the described step 1) during to 3 or 4 bit ACK in the multiplexing feedback model/nack message coding, with list entries and basic sequence carry out step-by-step with, the sequence that obtains is finished mould 2 by the step-by-step XOR again and is added up.
7. method according to claim 1 and 2 is characterized in that, described step 3) comprises:
31) the mode initializing pseudo random scramble sequence of employing 31 parallel-by-bits;
32) generate the pseudorandom scramble sequence according to initialized pseudorandom scramble sequence Parallel Recursive;
33) utilize the pseudorandom scramble sequence that generates to carry out data scrambling.
8. a 3GPP LTE PUSCH channel parallel channel interweaves and scrambling system, comprising:
The RI channel encoder is used for RI information is carried out chnnel coding;
The HARQ-ACK channel encoder is used for ACK/NACK information is carried out chnnel coding;
The channel interleaving system, be used for input RI information, the control after multiplexing and data message and ACK/NACK information and carry out channel interleaving, comprise: when RI information is transmitted in subframe, begin up to write the line number last_row_index at the RI information place that RI information and storage write at last from last column of channel interleaving memory matrix RIWith column number last_column_index RIAccording to line number and the column number at the RI information place that writes at last, skip the RI information that writes previously, write data and control information after multiplexing, wherein control information is front, and data message is rear; Transmit in this subframe when ACK/NACK information, write ACK/NACK information; According to the line number at the line number at the RI information place that writes at last and column number and/or the ACK/NACK information place that writes at last and the output function that column number carries out channel interleaving;
Scrambling apparatus is used for RI information, control and data message, ACK/NACK information after multiplexing are carried out scrambling.
9. channel interleaving according to claim 8 and scrambling system is characterized in that, described channel interleaving system comprises channel interleaving writing controller, channel interleaving memory and channel interleaving Read Controller, wherein
The channel interleaving writing controller, be used for to calculate the row, column number of the interleaver matrix that subframe takies at the channel interleaving memory, begin up to write the line number last_row_index at the RI information place that RI information and storage write at last from last column of channel interleaving memory matrix RIWith column number last_column_index RI, write data and control information after multiplexing according to the line number at the RI information place that writes at last and column number, write ACK/NACK information;
The channel interleaving memory is used for storage RI information, the data after multiplexing and control information, ACK/NACK information;
The channel interleaving Read Controller is used for receive channel interweave the row, column number of the interleaver matrix that subframe that writing controller calculates takies at the channel interleaving memory and all information of the storage in the delivery channel interleaver memory.
10. channel interleaving according to claim 9 and scrambling system is characterized in that, described channel interleaving memory comprises 12 quantum memories, 1 column information of each quantum memory storage interleaver matrix.
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