CN102135925A - Method and device for detecting error check and correcting memory - Google Patents
Method and device for detecting error check and correcting memory Download PDFInfo
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Abstract
The embodiment of the invention discloses a method and a device for detecting error check and correcting memory, which relate to the technology of memory and can detect whether the ECC (Error Correction Code) function in the memory is in failure. The method comprises the following steps: writing detection data to the memory of processing data; reading the error check and correcting the error check in the memory and corrected check sum; judging whether the relationship between the detected data with the error check and corrected check sum satisfies the error check and corrected encryption algorithm; and if the relationship between the detected data with the error check and corrected check sum does not satisfy the error check and the corrected encryption algorithm, sending an error message for indicating the error check and correcting the error in the memory. The method and the device are mainly applied to detecting an ECC memory.
Description
Technical field
The present invention relates to memory techniques, relate in particular to the method and apparatus that is used to detect bug check and corrects internal memory.
Background technology
For various disposal systems, internal memory is absolutely necessary, for example, the processor system of PC, notebook computer, server, datacom device and some consumer products, the capacity of internal memory, access speed and stability are the important indicators of evaluation processor system performance.
In processor system, bug check and correction (ECC, Error Check﹠amp; Correct) function is one of critical function that guarantees data reliability.
In communication system, RAM (random access memory, random access memory) application is more extensive, and along with people to the improving constantly of data transmission bandwidth demand, that the memory span that communication system adopts requires is increasing, rate request is more and more faster.Accordingly, bigger memory capacity has increased the probability that internal memory makes a mistake, and the mistake of internal memory may cause the damage of data and the collapse of system, and is especially particularly important for communication facilities.
So, the requirement of the reliability of storage system is also being improved gradually, corresponding ECC resist technology just seems particularly important.
But, if the ECC function itself breaks down, and can not in time solve, just disposal system can't guarantee the reliability of data.
Summary of the invention
Whether embodiments of the invention provide a kind of and are used to detect bug check and correct the internal memory method and apparatus, can detect the ECC internal memory and break down.
Embodiments of the invention adopt following technical scheme:
A kind of method that is used to detect bug check and corrects internal memory comprises:
Internal memory to deal with data writes the detection data;
Read error check and correct the bug check in the internal memory and correct verification and;
Judge described detection data and described bug check and correct verification and between relation whether satisfy bug check and correct cryptographic algorithm;
If described detection data and described bug check and correct verification and between relation do not satisfy bug check and correct cryptographic algorithm, send error messages and mistake occurs in order to indicate described bug check and correction internal memory.
A kind of device that is used to detect bug check and corrects internal memory comprises:
Writing unit is used for writing the detection data to the internal memory of deal with data;
Reading unit, be used for the read error inspection and correct the bug check of internal memory and correct verification and;
First judging unit, be used to judge described detection data and described bug check and correct verification and between relation whether satisfy bug check and correct cryptographic algorithm;
The unit that reports an error, be used for if described detection data and described bug check and correct verification and between relation do not satisfy bug check and correct cryptographic algorithm, send error messages and mistake occurs in order to indicate described bug check and correction internal memory.
The method and apparatus that is used to detect bug check and correction internal memory that the embodiment of the invention provides, write the detection data by internal memory to deal with data, read the bug check that writes in the ECC internal memory and correct verification and, to compare with the correction verification with the detection data from the bug check that this ECC internal memory is read, judge the bug check that writes among this ECC and correct verification and whether correct, and then judge that whether this ECC internal memory breaks down, and has realized the detection to the ECC function.
Description of drawings
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention, the accompanying drawing of required use is done to introduce simply in will describing embodiment below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
A kind of process flow diagram that is used to detect bug check and corrects the method for internal memory that Fig. 1 provides for the embodiment of the invention;
The another kind of improved process flow diagram that is used to detect bug check and corrects the method for internal memory that Fig. 2 provides for the embodiment of the invention;
A kind of structural drawing that is used to detect bug check and corrects the device of internal memory that Fig. 3 provides for the embodiment of the invention;
The another kind of improved structural drawing that is used to detect bug check and corrects the device of internal memory that Fig. 4 provides for the embodiment of the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
The embodiment of the invention provides a kind of method that is used to detect bug check and corrects internal memory, as shown in Figure 1, may further comprise the steps:
101, the internal memory of the deal with data of processor in internal memory to be detected writes the detection data.
Because the ECC internal memory has the function of EDC error detection and correction, when the internal memory of the deal with data of processor in internal memory to be detected write the detection data, this ECC internal memory also can be write corresponding data simultaneously.
Such as, when the internal memory of the deal with data of processor in internal memory to be detected write data 0x00000000_00001026, under the situation of this ECC internal memory without any fault, this ECC internal memory also can be write data 0x55 simultaneously.
102, processor read in the ECC internal memory the ECC verification and.
In order to judge that internal memory in the deal with data of processor in internal memory to be detected writes when detecting data, the ECC verification that is written into simultaneously in the ECC internal memory and whether correct, at first, the ECC verification that needs will write in this ECC internal memory and reading.
103, processor judge described detection data and described ECC verification and between relation whether satisfy the ECC cryptographic algorithm.
If described detection data and described ECC verification and between relation do not satisfy the ECC cryptographic algorithm, execution in step 104; If the data in described detection data and the described ECC internal memory satisfy the ECC cryptographic algorithm, execution in step 105.
The ECC verification that in having got access to the ECC internal memory, has write and after, the ECC verification that processor will write in the ECC internal memory and compare with detection data that internal memory to deal with data writes is judged the ECC verification in described detection data and the described ECC internal memory and whether is satisfied the ECC cryptographic algorithm.
Such as, the ECC verification that from the ECC internal memory, reads and for 0x55, the detection data that write to the internal memory of deal with data are 0x00000000_00001026, according to default algorithm, satisfy the ECC cryptographic algorithm between ECC verification and 0x55 and the data 0x00000000_00001026, therefore, can illustrate that this ECC internal memory is normal, and any fault does not take place.
If, the ECC verification that from the ECC internal memory, reads and for 0x88, the detection data that write to the internal memory of deal with data are 0x00000000_00001026, according to the ECC cryptographic algorithm, do not satisfy the ECC cryptographic algorithm between ECC verification and 0x55 and the data 0x00000000_00001026, therefore, can illustrate that this ECC internal memory is abnormal, damage has taken place.
104, processor transmission error messages mistake occurs in order to indicate described ECC internal memory.
In order will to be damaged, the ECC internal memory that can not normally realize the ECC function distinguishes, ECC verification in judging described detection data and described ECC internal memory and when not satisfying the ECC cryptographic algorithm needs to send error messages and mistake occur in order to indicate described ECC internal memory.
105, processor sends correct message, mistake do not occur in order to indicate described ECC internal memory, and all are normal.
Present embodiment provides is used to detect bug check and corrects the internal memory method, write the detection data by internal memory to deal with data, read the ECC verification that writes in the ECC internal memory and, the ECC verification that to read from this ECC internal memory and with detect data and compare, judge the ECC verification that writes among this ECC and whether correct, and then judge that whether this ECC internal memory breaks down, and has realized the detection to the ECC function.
As a kind of improvement of present embodiment, the method that the embodiment of the invention provides another kind to be used to detect bug check and to correct internal memory as shown in Figure 2, may further comprise the steps:
201, processor cuts out the ECC internal memory, and the internal memory of deal with data is detected.
In order to guarantee to write the ECC verification of ECC internal memory and be correct that at first the internal memory to deal with data in the internal memory to be detected detects before writing.
Because the ECC internal memory in order to guarantee the accuracy for the detection of the internal memory of deal with data in the internal memory to be detected, need be closed the ECC internal memory to the function that the internal memory of deal with data in the internal memory to be detected carries out bug check and correction.
When detecting the internal memory non-fault of described deal with data, execution in step 202, if detect described deal with data in when having fault, flow process finishes.
202, the internal memory of the deal with data of processor in internal memory to be detected writes the detection data.
Because the ECC internal memory has the function of EDC error detection and correction, when the internal memory of the deal with data of processor in internal memory to be detected write the detection data, this ECC internal memory also can be write corresponding data simultaneously.
Such as, when the internal memory of the deal with data of processor in internal memory to be detected write data 0x00000000_00001026, under the situation of this ECC internal memory without any fault, this ECC internal memory also can be write data 0x55 simultaneously.
203, processor read in the ECC internal memory the ECC verification and.
In order to judge that internal memory in the deal with data of processor in internal memory to be detected writes when detecting data, the ECC verification that is written into simultaneously in the ECC internal memory and whether correct, at first, the ECC verification that needs will write in this ECC internal memory and reading.
204, processor judge described detection data and described ECC verification and between relation whether satisfy the ECC cryptographic algorithm.
If described detection data and described ECC verification and between relation do not satisfy the ECC cryptographic algorithm, execution in step 205; If the data in described detection data and the described ECC internal memory satisfy the ECC cryptographic algorithm, execution in step 208.
The ECC verification that in having got access to the ECC internal memory, has write and after, the ECC verification that processor will write in the ECC internal memory and compare with detection data that internal memory to deal with data writes judges whether the data in described detection data and the described ECC internal memory satisfy the ECC cryptographic algorithm.
Such as, the ECC verification that from the ECC internal memory, reads and for 0x55, the detection data that write to the internal memory of deal with data are 0x00000000_00001026, according to default algorithm, satisfy the ECC cryptographic algorithm between ECC verification and 0x55 and the data 0x00000000_00001026, therefore, can illustrate that this ECC internal memory is normal, and any fault does not take place.
If, the ECC verification that from the ECC internal memory, reads and for 0x88, the detection data that write to the internal memory of deal with data are 0x00000000_00001026, according to the ECC cryptographic algorithm, do not satisfy the ECC cryptographic algorithm between ECC verification and 0x55 and the data 0x00000000_00001026, therefore, can illustrate that this ECC internal memory is abnormal, damage has taken place.
205, processor is recorded in the error register misdata of described ECC internal memory fault address or described ECC internal memory fault address storage or the correct data that writes to described ECC internal memory fault address or above-mentioned combination in any.
Described error register can be the single-bit register, also can for or many bit register.
206, whether processor judges in the described error register wrong record.
In described error register during wrong record, execution in step 207.When in described error register, not having error logging, execution in step 208.
207, processor transmission error messages mistake occurs in order to indicate described ECC internal memory.
In order will to be damaged, the ECC internal memory that can not normally realize the ECC function distinguishes, ECC verification in judging described detection data and described ECC internal memory and when not satisfying the ECC cryptographic algorithm needs to send error messages and mistake occur in order to indicate described ECC internal memory.
208, processor sends correct message and mistake do not occur in order to indicate described ECC internal memory, and all are normal.
As an embodiment of the present embodiment, the detection data in the present embodiment can be one in the following data or multinomial combination: 0x00000000_00001026,0x0000112d, 0x00000055,0x0000010b.
Present embodiment provides is used to detect bug check and corrects the internal memory method, write the detection data by internal memory to deal with data, read the ECC verification that writes in the ECC internal memory and, the ECC verification that to read from this ECC internal memory and and detect data and compare, judge the ECC verification that writes among this ECC and whether correct, and then judge that whether this ECC internal memory breaks down, and has realized the detection to the ECC function.
The embodiment of the invention provides a kind of device that is used to detect bug check and corrects internal memory, as shown in Figure 3, comprising: writing unit 31, reading unit 32, first judging unit 33, unit 34 reports an error.
Wherein, writing unit 31 is used for writing the detection data to the internal memory of deal with data;
Reading unit 32 be used for reading the ECC internal memory the ECC verification and;
First judging unit 33 be used to judge described detection data and described ECC verification and between relation whether satisfy the ECC cryptographic algorithm;
Report an error that unit 34 is used for if described detection data and described ECC verification and between relation do not satisfy the ECC cryptographic algorithm, the transmission error messages mistake occurs in order to indicate described ECC internal memory.
The device that is used to detect bug check and correction internal memory that present embodiment provides, write the detection data by internal memory to deal with data, read the ECC verification that writes in the ECC internal memory and, the ECC verification that to read from this ECC internal memory and and detect data and compare, judge the ECC verification that writes among this ECC and whether correct, and then judge that whether this ECC internal memory breaks down, and has realized the detection to the ECC function.
A kind of improvement as present embodiment, the device that the embodiment of the invention provides another kind to be used to detect bug check and to correct internal memory, as shown in Figure 4, comprising: detecting unit 41, writing unit 42, reading unit 43, first judging unit 44, record cell 45, second judging unit 46, unit 47 reports an error.
Wherein, detecting unit 41 is used to close described ECC internal memory, and the internal memory of deal with data is detected;
Writing unit 42 is used for when detecting the internal memory non-fault of described deal with data, writes the detection data to the internal memory of deal with data.
Reading unit 43 be used for reading the ECC internal memory the ECC verification and;
First judging unit 44 be used to judge described detection data and described ECC verification and between relation whether satisfy the ECC cryptographic algorithm;
If record cell 45 is used for the ECC verification of described detection data and described ECC internal memory and do not satisfy the ECC cryptographic algorithm, and the misdata that described ECC internal memory fault address, described ECC internal memory fault address are stored, in the correct data that described ECC internal memory fault address writes one or multinomial combination are recorded in the error register.
Second judging unit 46 is used for judging whether wrong record of described error register;
The unit 47 that reports an error is used for when the wrong record of described error register, sends error messages and mistake occurs in order to indicate described ECC internal memory.
As an embodiment of the present embodiment, the error register in the present embodiment is the single-bit register, or many bit register.
As an embodiment of the present embodiment, the detection data in the present embodiment can be one in the following data or multinomial combination: 0x00000000_00001026,0x0000112d, 0x00000055,0x0000010b.
The device that is used to detect ECC bug check and correction that present embodiment provides, write the detection data by internal memory to deal with data, read the ECC verification that writes in the ECC internal memory and, the ECC verification that to read from this ECC internal memory and and detect data and compare, judge the ECC verification that writes among this ECC and whether correct, and then judge that whether this ECC internal memory breaks down, and has realized the detection to the ECC function.
Through the above description of the embodiments, the those skilled in the art can be well understood to the present invention and can realize by the mode that software adds essential common hardware, can certainly pass through hardware, but the former is better embodiment under a lot of situation.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in the storage medium that can read, floppy disk as computing machine, hard disk or CD etc., comprise some instructions with so that computer equipment (can be personal computer, server, the perhaps network equipment etc.) carry out the described method of each embodiment of the present invention.
Claims (11)
1. a method that is used to detect bug check and corrects internal memory is characterized in that, comprising:
Internal memory to deal with data writes the detection data;
Read error check and correct the bug check in the internal memory and correct verification and;
Judge described detection data and described bug check and correct verification and between relation whether satisfy bug check and correct cryptographic algorithm;
If described detection data and described bug check and correct verification and between relation do not satisfy bug check and correct cryptographic algorithm, send error messages and mistake occurs in order to indicate described bug check and correction internal memory.
2. the method that is used to detect bug check and corrects internal memory according to claim 1 is characterized in that, before described internal memory to deal with data write the detection data, described method also comprised:
Close described bug check and correct internal memory, the internal memory of described deal with data is detected;
Then described internal memory to deal with data writes and detects data and comprise: when detecting the internal memory non-fault of described deal with data, write the detection data to the internal memory of deal with data.
3. the method that is used to detect bug check and corrects internal memory according to claim 1 is characterized in that, described report error messages before, described method also comprises:
With described bug check and correct internal memory fault address, described bug check and correct the misdata of internal memory fault address storage, to described bug check with correct one or multinomial being recorded in the error register in the correct data that the internal memory fault address writes.
4. the method that is used to detect bug check and corrects internal memory according to claim 3 is characterized in that, in order to indicate described bug check and to correct before mistake appears in internal memory, described method also comprises at described transmission error messages:
Whether judge in the described error register wrong record;
Then described transmission error messages mistake occurs and comprises in order to indicate described bug check and to correct internal memory: during wrong record, send error messages and mistake occurs in order to indicate described bug check and correction internal memory in described error register.
5. according to claim 3 or 4 each described methods that are used to detect bug check and correct internal memory, it is characterized in that described error register is the single-bit register, or many bit register.
6. according to each described method that is used to detect bug check and corrects internal memory of claim 1 to 4, it is characterized in that described detection data comprise any one or a plurality of combination arbitrarily of following data:
0x00000000_00001026 0x0000112d，0x00000055，0x0000010b。
7. a device that is used to detect bug check and corrects internal memory is characterized in that, comprising:
Writing unit is used for writing the detection data to the internal memory of deal with data;
Reading unit, be used for the read error inspection and correct the bug check of internal memory and correct verification and;
First judging unit, be used to judge described detection data and described bug check and correct verification and between relation whether satisfy bug check and correct cryptographic algorithm;
The unit that reports an error, be used for if described detection data and described bug check and correct verification and between relation do not satisfy bug check and correct cryptographic algorithm, send error messages and mistake occurs in order to indicate described bug check and correction internal memory.
8. the device that is used to detect bug check and corrects internal memory according to claim 1 is characterized in that, described be used to detect bug check and correct memory device also comprise:
Detecting unit is used to close described bug check and corrects internal memory, and the internal memory of described deal with data is detected;
Then the said write unit writes to the internal memory of deal with data and detects data and be: when detecting the internal memory non-fault of described deal with data, the said write unit writes the detection data to the internal memory of deal with data.
9. the device that is used to detect bug check and corrects internal memory according to claim 1 is characterized in that, described be used to detect bug check and correct memory device also comprise:
Record cell, be used for described bug check and correct internal memory fault address, described bug check and correct the misdata of internal memory fault address storage, to described bug check with correct one or multinomial being recorded in the error register of the correct data that the internal memory fault address writes.
10. the device that is used to detect bug check and corrects internal memory according to claim 9 is characterized in that, described be used to detect bug check and correct memory device also comprise:
Second judging unit is used for judging whether wrong record of described error register;
The described unit that reports an error sends error messages and mistake occurs and be in order to indicate described bug check and to correct internal memory: during wrong record, the described unit that reports an error sends error messages and mistake occurs in order to indicate described bug check and correction internal memory in described error register.
11., it is characterized in that described error register is the single-bit register, or many bit register according to claim 9 or 10 each described devices that are used to detect bug check and correct internal memory.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102541679A (en) * | 2011-12-30 | 2012-07-04 | 曙光信息产业股份有限公司 | Method and system for testing GPU (graphic processing unit) cards |
| CN102708030A (en) * | 2012-04-27 | 2012-10-03 | 中兴通讯股份有限公司 | Method and device for detecting internal memory |
| CN103092739A (en) * | 2013-01-18 | 2013-05-08 | 浪潮电子信息产业股份有限公司 | Memory error checking and correcting (ECC) error reporting and alarm mechanism |
| CN104598342A (en) * | 2014-12-31 | 2015-05-06 | 曙光信息产业(北京)有限公司 | Internal storage detection method and device |
| CN104635190A (en) * | 2014-12-31 | 2015-05-20 | 漳州科能电器有限公司 | Measuring chip anti-interference detection and error correction method and device |
| WO2017012460A1 (en) * | 2015-07-23 | 2017-01-26 | 深圳市中兴微电子技术有限公司 | Method and apparatus for detecting failure of random memory, and processor |
| CN107451051A (en) * | 2017-06-29 | 2017-12-08 | 郑州云海信息技术有限公司 | A kind of method that server memory diagnosis is carried out under Linux |
| CN109710445A (en) * | 2018-12-27 | 2019-05-03 | 联想(北京)有限公司 | Memory bearing calibration and electronic equipment |
| CN113868012A (en) * | 2021-08-27 | 2021-12-31 | 山东云海国创云计算装备产业创新中心有限公司 | Method and device for realizing error checking and code correcting functions |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070226592A1 (en) * | 2006-03-20 | 2007-09-27 | Micron Technology, Inc. | Variable sector-count ECC |
| TW200822128A (en) * | 2006-11-07 | 2008-05-16 | Macronix Int Co Ltd | Memory and method for reading error checking thereof |
| CN101211292A (en) * | 2006-12-29 | 2008-07-02 | 佛山市顺德区顺达电脑厂有限公司 | System memory error detection and correcting function verification system and method |
| CN101477481A (en) * | 2009-02-06 | 2009-07-08 | 中国科学院计算技术研究所 | Automatic error correction system and method |
-
2010
- 2010-12-27 CN CN201010606630A patent/CN102135925B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070226592A1 (en) * | 2006-03-20 | 2007-09-27 | Micron Technology, Inc. | Variable sector-count ECC |
| TW200822128A (en) * | 2006-11-07 | 2008-05-16 | Macronix Int Co Ltd | Memory and method for reading error checking thereof |
| CN101211292A (en) * | 2006-12-29 | 2008-07-02 | 佛山市顺德区顺达电脑厂有限公司 | System memory error detection and correcting function verification system and method |
| CN101477481A (en) * | 2009-02-06 | 2009-07-08 | 中国科学院计算技术研究所 | Automatic error correction system and method |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102541679A (en) * | 2011-12-30 | 2012-07-04 | 曙光信息产业股份有限公司 | Method and system for testing GPU (graphic processing unit) cards |
| CN102541679B (en) * | 2011-12-30 | 2014-02-26 | 曙光信息产业股份有限公司 | Method and system for testing GPU (graphic processing unit) cards |
| CN102708030A (en) * | 2012-04-27 | 2012-10-03 | 中兴通讯股份有限公司 | Method and device for detecting internal memory |
| CN103092739A (en) * | 2013-01-18 | 2013-05-08 | 浪潮电子信息产业股份有限公司 | Memory error checking and correcting (ECC) error reporting and alarm mechanism |
| CN104598342B (en) * | 2014-12-31 | 2018-05-01 | 曙光信息产业(北京)有限公司 | The detection method and device of memory |
| CN104635190A (en) * | 2014-12-31 | 2015-05-20 | 漳州科能电器有限公司 | Measuring chip anti-interference detection and error correction method and device |
| CN104635190B (en) * | 2014-12-31 | 2017-05-03 | 漳州科能电器有限公司 | Measuring chip anti-interference detection and error correction method and device |
| CN104598342A (en) * | 2014-12-31 | 2015-05-06 | 曙光信息产业(北京)有限公司 | Internal storage detection method and device |
| WO2017012460A1 (en) * | 2015-07-23 | 2017-01-26 | 深圳市中兴微电子技术有限公司 | Method and apparatus for detecting failure of random memory, and processor |
| CN107451051A (en) * | 2017-06-29 | 2017-12-08 | 郑州云海信息技术有限公司 | A kind of method that server memory diagnosis is carried out under Linux |
| CN109710445A (en) * | 2018-12-27 | 2019-05-03 | 联想(北京)有限公司 | Memory bearing calibration and electronic equipment |
| CN109710445B (en) * | 2018-12-27 | 2020-11-20 | 联想(北京)有限公司 | Memory correction method and electronic equipment |
| CN113868012A (en) * | 2021-08-27 | 2021-12-31 | 山东云海国创云计算装备产业创新中心有限公司 | Method and device for realizing error checking and code correcting functions |
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