CN102129170A - Attenuated phase shift mask production method - Google Patents

Attenuated phase shift mask production method Download PDF

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CN102129170A
CN102129170A CN2010100228768A CN201010022876A CN102129170A CN 102129170 A CN102129170 A CN 102129170A CN 2010100228768 A CN2010100228768 A CN 2010100228768A CN 201010022876 A CN201010022876 A CN 201010022876A CN 102129170 A CN102129170 A CN 102129170A
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phase
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CN102129170B (en
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朴世镇
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Abstract

The invention discloses an attenuated phase shift mask production method. The method comprises the following steps of: forming a first phase shift layer, a second phase shift layer and a photoresist layer on the surface of a layer to be etched in turn; transferring a design graph to the photoresist layer by exposing the photoresist layer; etching the first phase shift layer and the second phase shift layer according to the graph on the photoresist layer; forming an etching barrier layer on the surface of the second phase shift layer in a first area; removing the second phase shift layer in a second area; and forming grooves in the layer to be etched exposed in the second area, wherein the grooves and light rays caused by the first phase shift layer in the second area have phase shift of pi. An attenuated phase shift mask provided by the attenuated phase shift mask production method respectively meets different requirements of logic components and storage components on a process window and a side lobe effect, saves cost and improves yield and production efficiency.

Description

Attenuating phase-shift mask fabrication method
Technical field
The present invention relates to photoetching technique, particularly attenuating phase-shift mask fabrication method.
Background technology
Along with the high speed development of integrated circuit (IC) design, the size of design configuration is dwindled day by day, and optical proximity effect is more and more obvious.Increasing optical technology and optical near-correction technology are applied in the photoetching process, and for example, corresponding to the miniaturization of pattern, the exposure light source that is used for photoetching is shortwaveization day by day also.Yet the short wavelengthization of exposure wavelength can reduce the depth of focus when improving sharpness, thereby reduces the stability of technological process.In order to guarantee the accuracy of litho pattern, phase-shift mask (PSM, Phase ShiftMask) technology is used more and more.
In theory, the electric field E1 at printing opacity slit place should be identical in the mask, yet, when the adjacent slits distance very hour, can produce diffraction of light between the adjacent slits, and the electric field between the slit is strengthened.At this moment, mask layout is projected on the silicon chip, and the picture pattern that is obtained can't be distinguished owing to too approaching.Phase-shift mask PSM technology is meant, at adjacent place, printing opacity slit the phase shift layer that thickness is directly proportional with 1/2 optical wavelength is set, it is poor to make the exposure light that sees through phase shift layer and other transmitted lights produce 180 light phases of spending, thereby makes light intensity on the intermediate point of adjacent printing opacity slit cancel each other or weaken.
Phase-shift mask mainly comprises two types of alternating phase-shift mask Alt-PSM (alternating Phase Shift Mask) and attenuating phase-shift mask Att-PSM (Attenuated Phase Shift Mask).Wherein, the attenuating phase-shift mask technique is meant and adopts the film with certain transmittance as phase shift layer, and described film is covered on the adjacent slits that is used to form pattern, with the formation mask layout, and makes by the transmitted light of described phase shift layer anti-phase.In exposure process, often adopt the exposure energy threshold value to distinguish by exposure whether can form the corresponding mask domain; Specifically, the result behind the light intensity superposition of projection light does not surpass described threshold value, then thinks to form the corresponding mask domain; And the result behind described light intensity superposition surpasses described threshold value, then thinks can form the corresponding mask domain by described exposure light, and can corresponding pattern displaying be come out by follow-up development rinsing process.By means of above-mentioned attenuating phase-shift mask technique, can on silicon chip, obtain the picture pattern corresponding with mask layout, wherein separated from one another between the little pattern of adjacent each, improve resolution and enlarge process window.About the attenuating phase-shift mask technique can be 96106894.9 referring to application number, name is called the Chinese patent of " phase shifting mask and manufacture method thereof ".
Yet, because the attenuating phase-shift mask adopts translucent film, in general the transmittance that still has 5%-20%, this makes the part exposure light produce superposition in some silicon chip positions, although with do not have pattern in these corresponding mask layouts in silicon chip position, but when the energy of the exposure light of superposition has exceeded described threshold value, on these silicon chip positions, will demonstrate picture pattern.This phenomenon is referred to as side lobe effect, does not have in this mask layout and the pattern that presents on the silicon chip after exposing is exactly the secondary lobe pattern.Side lobe effect has influenced critical size greatly, has restricted process window.In general, the transmittance of phase shift layer is high more, and process window is big more, but will cause the risk of big side lobe effect simultaneously; And the transmittance of working as phase shift layer is low more, although can avoid producing a large amount of secondary lobe patterns, has reduced process window.
At present, the attenuating phase-shift mask of main flow is made of the individual layer phase shift layer usually.In general, this phase shift layer, i.e. this attenuating phase-shift mask, transmittance be fixed as about 6% usually.In integrated circuit (IC) design, be no lack of the design that has memory device and logical device simultaneously, for memory device, need bigger process window; And,, then need to have less secondary lobe pattern compared to requirement to process window for logical device.The attenuating phase-shift mask of single transmittance can't satisfy current design requirement, especially for the design proposal that has memory device and logical device simultaneously.
Summary of the invention
The problem that the present invention solves has provided a kind of attenuating phase-shift mask fabrication method, so that obtain can a balanced process window and the attenuating phase-shift mask of side lobe effect.
For addressing the above problem, the invention provides a kind of attenuating phase-shift mask fabrication method, wherein, described decling phase mask comprises first area and second area, described first area is used to form logical block, described second area is used to form memory unit, and described attenuating phase-shift mask fabrication method comprises: form first phase shift layer, second phase shift layer and photoresist layer successively at laminar surface to be etched; Described photoresist layer is exposed, design configuration is transferred on the described photoresist layer; According to the pattern on the described photoresist layer described first phase shift layer and described second phase shift layer are carried out etching; Second phase shift layer surface in described first area forms etching barrier layer; Remove second phase shift layer in the described second area, and form groove in the layer to be etched that is exposed in described second area, there is the phase shift of π in the caused light of first phase shift layer in described groove and the described second area.
Compared with prior art, the present invention has the following advantages: can obtain to comprise two kinds of attenuating phase-shift masks with different transmittances zone, satisfy logical block and the different requirements of memory unit respectively for process window and side lobe effect, thereby avoided independent making to be applicable to the attenuating phase-shift mask of logical block and memory unit respectively, saved cost, simultaneously also increase the product yield, improved production efficiency.
Description of drawings
Fig. 1 is when adopting single transmittance to be respectively 6% and 12% attenuating phase-shift mask for the static RAM part in the prior art, the process window synoptic diagram that is obtained;
Fig. 2 is when adopting single transmittance to be respectively 6% and 12% attenuating phase-shift mask for the random logic device in the prior art, the process window synoptic diagram that is obtained;
Fig. 3 and Fig. 4 are the effect synoptic diagram that side lobe effect is inhibited when to adopt single transmittance be 6% attenuating phase-shift mask for the random logic device in the prior art;
Fig. 5 and Fig. 6 be in the prior art for the random logic device when to adopt single transmittance be 12% attenuating phase-shift mask side lobe effect than the obvious effects synoptic diagram;
Fig. 7 is the schematic flow sheet of attenuating phase-shift mask fabrication method embodiment of the present invention;
Fig. 8-Figure 10 is the diagrammatic cross-section of step S1 shown in Figure 7;
Figure 11 is the diagrammatic cross-section of step S2 shown in Figure 7;
Figure 12 is the diagrammatic cross-section of step S3 shown in Figure 7;
Figure 13 is the schematic flow sheet of step S4 embodiment shown in Figure 7;
Figure 14 is the diagrammatic cross-section of step S41 shown in Figure 13;
Figure 15 is the diagrammatic cross-section of step S42 shown in Figure 13;
Figure 16-Figure 17 is the diagrammatic cross-section of step S5 shown in Figure 7.
Embodiment
In semiconductor technology, for example, wherein both comprised static random storage (SRAM) parts, also comprised random logic (Random Logic) parts for logical device, when the contact hole that adopts photoetching technique to make, by of the transfer of attenuating phase-shift mask with the realization design configuration.
In the prior art, if adopt attenuating phase-shift mask, will cause the contradiction of process window and side lobe effect with single transmittance.For example, adopting under the situation of 6% exposure allowance, with reference to figure 1 and Fig. 2, when the employing transmittance is 6% attenuating phase-shift mask, the process window of static random memory unit is 0.082um, and the process window of random logic device is 0.11um, and when the employing transmittance is 12% attenuating phase-shift mask, the process window of static random memory unit is 0.091um, and the process window of random logic device is 0.12um.Yet, with reference to figure 3 and Fig. 4, when the employing transmittance is 6% attenuating phase-shift mask, the secondary lobe pattern substantially seldom appears, and, when the employing transmittance is 12% attenuating phase-shift mask, but have more secondary lobe pattern with reference to figure 5 and Fig. 6, as secondary lobe pattern 501 and secondary lobe pattern 601, side lobe effect is obvious.
And employing attenuating phase-shift mask fabrication method of the present invention, can obtain to comprise two kinds of attenuating phase-shift masks with different transmittances zone, satisfy logical block and the different requirements of memory unit respectively for process window and side lobe effect, thereby avoided independent making to be applicable to the attenuating phase-shift mask of logical block and memory unit respectively, saved cost, simultaneously also increase the product yield, improved production efficiency.
Below in conjunction with drawings and Examples, embodiment of the present invention is described further.
With reference to figure 7, embodiment of the present invention provides a kind of attenuating phase-shift mask fabrication method, described decling phase mask comprises first area and second area, described attenuating phase-shift mask fabrication method comprises: step S1 forms first phase shift layer, second phase shift layer and photoresist layer successively at laminar surface to be etched; Step S2 exposes to described photoresist layer, and design configuration is transferred on the described photoresist layer; Step S3 carries out etching according to the pattern on the described photoresist layer to described first phase shift layer and described second phase shift layer; Step S4, second phase shift layer surface in described first area forms etching barrier layer; Step S5 removes second phase shift layer in the described second area, and forms groove in the layer to be etched that is exposed in described second area, and there is the phase shift of π in the caused light of first phase shift layer in described groove and the described second area.
Specifically, described design configuration to be transferred comprises memory unit and logical block, and wherein, described first area has lower transmittance, is used to form described logical block; Described second area has higher transmittance, is used to form described memory unit.
In step S1,, on layer 100 to be etched, form first phase shift layer 101 that is covered in layer to be etched 100 surface with reference to figure 8.First phase shift layer 101 can adopt has the material that transmittance is 10%-18%, specifically, and for example silicon nitride molybdenum (MoSiN) or silicon oxynitride molybdenum (MoSiON) etc.
With reference to figure 9, on first phase shift layer 101, form second phase shift layer 102 that is covered in first phase shift layer, 101 surfaces.The material that second phase shift layer 102 is adopted and the material of first phase shift layer 101 are complementary, and make the transmittance of the rete that constituted by second phase shift layer 102 and first phase shift layer 101 reach designing requirement.Specifically, the transmittance of the rete that is constituted by second phase shift layer 102 and first phase shift layer 101 is the transmittance p that adheres to specification, and the transmittance of first phase shift layer 101 is p1, then can be according to transmittance p and p1, determine the transmittance p2 of second phase shift layer 102, and determine to constitute the material of second phase shift layer 102 in view of the above.
For example, when the transmittance of first phase shift layer 101 is 12%, when device to be formed needs big process window, can make described second phase shift layer 102 have big transmittance, for example 80%-100%; And when device to be formed is responsive to side lobe effect, can make described second phase shift layer 102 have less transmittance, for example 50%-60%.
Wherein, the thickness sum of first phase shift layer 101 and second phase shift layer 102 makes light pass first phase shift layer 101 and second phase shift layer, 102 backs produce 180 phase shifts of spending, that is to say, make the light that passes first phase shift layer 101 and second phase shift layer 102 and directly pass the band etch layer light between phase variable
Figure G2010100228768D00061
Difference remain pi/2, and then offset the light intensity of the light pass first phase shift layer 101 and second phase shift layer 102, reduce even eliminate the secondary lobe pattern.
Specifically, pass the phase variable of the light of first phase shift layer 101 and second phase shift layer 102
Figure G2010100228768D00062
Relevant with the thickness sum d of first phase shift layer 101 and second phase shift layer 102, its relation is described suc as formula (1):
Figure G2010100228768D00063
Wherein, λ is a wavelength of light, and n is the refractive index of first phase shift layer 101 and 102 common retes that constitute of second phase shift layer.
Phase shift when described light produces 180 degree that is to say the phase-shift phase of described light
Figure G2010100228768D00064
Be pi/2, thereby, can obtain by (1) formula, the thickness sum d of first phase shift layer 201 and second phase shift layer 102 satisfies the condition of formula (2):
d=λ/[2(n-1)] (2)
The method that forms described first phase shift layer and described second phase shift layer can adopt any conventional method, and those skilled in the art will be understood that the concrete formation technology of described first phase shift layer and described second phase shift layer does not impact thinking of the present invention.
With reference to Figure 10, on second phase shift layer 102, form the photoresist layer 103 that is covered in second phase shift layer, 102 surfaces.The material of photoresist layer 103 can adopt positive glue or negative glue, by the mode that applies positive glue or negative glue evenly is covered in second phase shift layer, 102 surfaces.
In addition, step S1 also can comprise, forms described layer to be etched.In one embodiment, described layer to be etched can be silicon oxide layer, forms by the chemical oxidation depositing operation.The material of concrete layer to be etched and formation technology do not impact thinking of the present invention.
In step S2, with reference to Figure 11, can adopt conventional exposure imaging technology, photoresist layer 103 is exposed, and on photoresist layer 103, form the figure that is shifted, thereby design configuration is transferred on the photoresist layer 103 by developer.
In step S3, with reference to Figure 12, carry out etching based on formed design configuration on the photoresist layer 103, this design configuration further is transferred on second phase shift layer 102 and first phase shift layer 101, and removes photoresist layer 103.Specifically, can adopt dry etching method or wet etching method, for example, can adopt with the fluoro-gas is the method for etching plasma of etching gas, and second phase shift layer 102 and first phase shift layer 101 are carried out etching, realizes the transfer of design configuration.
With reference to Figure 13, step S4 can comprise: step S41 forms the etching barrier layer that covers described second phase shift layer and described layer to be etched; Step S42 removes the described etching barrier layer in the second area.
Specifically, at first,, form etching barrier layer 104, be covered on second phase shift layer 102 and the layer 100 to be etched, wherein, can adopt photoresist as the material that forms etching barrier layer 104 with reference to Figure 14.Then,,, keep the part corresponding in the etching barrier layer 104 with described first area by exposure imaging with reference to Figure 15, and the removal part corresponding with described second area.
In other embodiments, also can be directly with design configuration on second phase shift layer 102 and layer 100 to be etched in the corresponding first area of memory unit, form and be covered in its surperficial etching barrier layer 104.
In step S5, at first,, remove second phase shift layer 102 in the described second area with reference to Figure 16; Then, with reference to Figure 17, in described second area, expose layer 100 to be etched between first phase shift layer 101, treat etch layer 100 based on formed figure in first phase shift layer 101 and carry out etching, form groove 110, make and pass the light of described groove and the phase variable phase difference of pi of passing the light of first phase shift layer 101 in the described second area.
Specifically, the degree of depth that can be by regulating groove 110 and the thickness of first phase shift layer 101 make the phase variable of groove 110 caused light
Figure G2010100228768D00081
The phase variable of the light that is brought with first phase shift layer 101
Figure G2010100228768D00082
Difference be π, thereby can guarantee to pass the light of first phase shift layer 101 in the described second area and pass the phase shift difference that have 180 degree between the light in each slit in the described second area, to improve the contrast of image.
Described groove can be formed in the layer to be etched 100 between first phase shift layer, and its degree of depth is no more than the thickness of described layer 100 to be etched.
In a kind of specific embodiment, with reference to Figure 17, groove 110 is formed at layer 100 to be etched, the phase variable of groove 110 caused light
Figure G2010100228768D00083
Can be expressed as the formula (3):
Figure G2010100228768D00084
Wherein, d 1Be the degree of depth of groove 110, n 1For forming the refractive index of to be etched layer 100 material.
And this moment, the phase variable of the light that first phase shift layer 101 is brought
Figure G2010100228768D00085
Can be expressed as the formula (4):
Figure G2010100228768D00086
Wherein, d 2Be the thickness of first phase shift layer 101, n 2It is the refractive index of the material of first phase shift layer 101.
Because
Figure G2010100228768D00087
With
Figure G2010100228768D00088
Between phase difference of pi, can obtain by formula (3) and formula (4), when the depth d of groove 110 1Thickness d with first phase shift layer 101 2Satisfy when concern suc as formula (5) are described, pass the light of first phase shift layer 101 in the described second area with the light that passes each slit in the described second area between existence 180 phase shifts of spending:
d 2(n 2-1)-d 1(n 1-1)=±λ/2 (5)
In addition, attenuating phase-shift mask fabrication method embodiment of the present invention also can comprise step S6: the etching barrier layer of removing described first area.
The attenuating phase-shift mask that embodiment obtained of attenuating phase-shift mask fabrication method according to the present invention, applicable to the semiconductor process flow of 130nm, 90nm and littler process node, be particularly useful for the big process window of part part requirement and the semiconductor devices of the less secondary lobe pattern of part part requirement in addition.
Compared to prior art, attenuating phase-shift mask fabrication method of the present invention forms the attenuating phase-shift mask, make described attenuating phase-shift mask comprise first area that contains two-layer phase shift layer and the second area that only contains first phase shift layer, thereby reach the demand that both satisfies big process window, also can the suppressed sidelobes effect.
And, attenuating phase-shift mask fabrication method of the present invention is by the thickness sum of described first phase shift layer and second phase shift layer in the adjusting first area, make to see through described to be etched layer exposure light and see through and have 180 ° phase difference between the exposure light of phase shift layer, thereby make light intensity on the printing opacity slit intermediate point of adjacent layer to be etched cancel each other or weaken, improve the contrast of the pattern that forms, reduce the secondary lobe pattern.
In addition, attenuating phase-shift mask of the present invention is also by regulating the thickness of described first phase shift layer in the second area, perhaps in described layer to be etched, groove is set and regulate described depth of groove with the described first phase shift layer thickness with, make through the exposure light in the printing opacity slit that forms pattern and through the phase difference that has 180 ° between the exposure light of phase shift layer, improve the contrast of the pattern that forms.
Though the present invention by the preferred embodiment explanation as above, these preferred embodiments are not in order to limit the present invention.Those skilled in the art without departing from the spirit and scope of the present invention, should have the ability various corrections and additional are made in this preferred embodiment, and therefore, protection scope of the present invention is as the criterion with the scope of claims.

Claims (9)

1. attenuating phase-shift mask fabrication method, wherein, described decling phase mask comprises first area and second area, and described first area is used to form logical block, and described second area is used to form memory unit, and described attenuating phase-shift mask fabrication method comprises:
Form first phase shift layer, second phase shift layer and photoresist layer successively at laminar surface to be etched;
Described photoresist layer is exposed, design configuration is transferred on the described photoresist layer;
According to the pattern on the described photoresist layer described first phase shift layer and described second phase shift layer are carried out etching;
Second phase shift layer surface in described first area forms etching barrier layer;
Remove second phase shift layer in the described second area, and form groove in the layer to be etched that is exposed in described second area, there is the phase shift of π in the caused light of first phase shift layer in described groove and the described second area.
2. attenuating phase-shift mask fabrication method as claimed in claim 1, it is characterized in that, in the described first area, described second phase shift layer covers all surfaces of described first phase shift layer, and the thickness sum of described first phase shift layer and second phase shift layer is λ/[2 (n-1)], wherein, λ is a wavelength of light, and n is the refractive index of the phase shift layer that constituted of described first phase shift layer and described second phase shift layer.
3. attenuating phase-shift mask fabrication method as claimed in claim 1 is characterized in that described etching barrier layer is a photoresist.
4. attenuating phase-shift mask fabrication method as claimed in claim 1, it is characterized in that, form groove in the described layer to be etched that in second area, is exposed and comprise, described layer to be etched is carried out etching, form described groove based on the figure of first phase shift layer in the described second area.
5. attenuating phase-shift mask fabrication method as claimed in claim 1 is characterized in that the thickness of described first phase shift layer and the degree of depth of described groove meet relational expression: d 2(n 2-1)-d 1(n 1-1)=± λ/2, wherein, d 1Be the degree of depth of described groove, n 1Refractive index for groove material; d 2Be the thickness of described first phase shift layer, n 2Refractive index for the material of described first phase shift layer.
6. attenuating phase-shift mask fabrication method as claimed in claim 1, it is characterized in that, described second phase shift layer adopts the material that is complementary with described first phase shift layer material, makes that the transmittance of the described rete that is constituted by described second phase shift layer and first phase shift layer is the transmittance that adheres to specification.
7. attenuating phase-shift mask fabrication method as claimed in claim 1 is characterized in that, described layer to be etched is a photoresist.
8. attenuating phase-shift mask fabrication method as claimed in claim 1 is characterized in that, described second phase shift layer surface in the first area forms etching barrier layer and comprises:
Form the etching barrier layer that covers described second phase shift layer and described layer to be etched;
Remove the described etching barrier layer in the second area.
9. attenuating phase-shift mask fabrication method as claimed in claim 1 is characterized in that, described attenuating phase-shift mask fabrication method also can comprise the etching barrier layer of removing described first area.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103065948A (en) * 2012-12-28 2013-04-24 上海集成电路研发中心有限公司 Preparing method of small line width groove shapes
TWI724233B (en) * 2016-09-21 2021-04-11 日商Hoya股份有限公司 Method of manufacturing a photomask, photomask, and method of manufacturing a display device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060115742A1 (en) * 2004-12-01 2006-06-01 Texas Instruments Incorporated Tri-tone trim mask for an alternating phase-shift exposure system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103065948A (en) * 2012-12-28 2013-04-24 上海集成电路研发中心有限公司 Preparing method of small line width groove shapes
CN103065948B (en) * 2012-12-28 2017-04-19 上海集成电路研发中心有限公司 Preparing method of small line width groove shapes
TWI724233B (en) * 2016-09-21 2021-04-11 日商Hoya股份有限公司 Method of manufacturing a photomask, photomask, and method of manufacturing a display device

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