CN102117259A - Method and device for allocating and processing address space resource - Google Patents
Method and device for allocating and processing address space resource Download PDFInfo
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Abstract
The embodiment of the invention provides a method and a device for allocating and processing an address space resource. The method comprises the following steps: detecting a plurality of downlink ports of each bridge device in a system, and if confirming that a device is inserted into one downlink port of one bridge device, allocating a section of spare address space resource to the inserted device in a preset first address space resource of the bridge device according to the length of the address space resource required by the inserted device. In the embodiment of the invention, through previously reserving certain address space resources on the uplink ports of all the bridge devices in the system, the required address space resources are dynamically allocated to the device when a device is inserted in the normal working process of the system, thereby achieving dynamically allocating resource according to the address space required by the device, avoiding influencing the running of the device by insufficient resource and enhancing the hot plug function of the device.
Description
Technical field
The embodiment of the invention relates to field of computer technology, relates in particular to a kind of address space resource allocation process method and device.
Background technology
(the PCIE agreement is the hot plug function of support equipment preferably for PCI Express, PCIE) the continuous development of protocol technology along with bus and interface standard high speed exterior I/O devices interconnect bus.With regard to the mode of present realization hot plug, generally be system in advance for being connected with the address space of the good fixed size of port assignment of equipment, when carrying out equipment hot swap, just need not to consider processing to address space.Particularly, existing operating system for example linux after system start-up, can carry out topology to whole PCIE bus in the system, according to the corresponding address space resource of the demand assignment of connection device.System is to distribute the address space resources in the mode that increases progressively continuously in the process of carrying out the PCIE bus topology, if do not have connection device on certain bus, then system can not be this port assignment address space resource.
Fig. 1 is an address space resources allocation synoptic diagram in the PCIE bus topology process of prior art, as shown in Figure 1, basic input/output (Basic Input Output System, BIOS) program is carried out topology according to the mode of degree of depth traversal to the PCIE bus, be specially, the equipment under bus of bios program scanning judges according to the sign that configuration space in this equipment carries whether this equipment is bridge device, if not bridge device then directly is this devices allocation address space resource; If bridge device is that then this bridge device distributes a bus, and continues the equipment under the newly assigned bus of scanning, the rest may be inferred finishes the topology of PCIE bus.(Switch SW) describes for example bridge device with converter herein.As shown in Figure 1, owing to do not have connection device below " 5 " number bus, when therefore carrying out topology, system is not " 5 " number bus assignment address space resource.
In system visit PCIE device address space, for the visit of each SW the notion of an address filtering window is arranged all, the pairing address space resource of this address filtering window is generally the resource sum of all downlink port address spaces of this SW.The destination address that system sends request only drops within the address filtering window of this SW uplink port, can be with data distributing in the equipment of the downlink port of SW.According to above-mentioned restriction, when equipment hot swap took place, the good SW of topology did not have available address space resources allocation and gives the new equipment that inserts, and can't realize hot plug.If at will distribute the address space of a free time to give this equipment, because this equipment not in the address filtering window ranges of SW, still can not normally be visited in this address.If by topological whole PCIE bus again is SW deallocation space resources, though can give the new suitable address space resource of inserting of devices allocation, this can influence other equipment of working, and total system is died.
In order to address the above problem, carry out in the process of PCIE bus topology at BIOS, also allocate the address space resource of fixed size in advance for the downlink port that does not have connection device under the SW.When hot plug takes place,, just can operate this equipment normally as long as the required address space of equipment that inserts is less than or equal to the size of pre-assigned address space.
In realizing process of the present invention, the inventor finds in the prior art, because system distributes the address space resource of fixed size in advance for the downlink port that does not insert equipment among the SW as yet, therefore requiring the needed address space of equipment of this port of insertion can not be this port assignment address space good, fixed size above system in advance, it is that system can not arbitrarily insert any equipment that the equipment that carries out hot plug is had selectivity, and system supports the hot plug function to have certain limitation.
Summary of the invention
The embodiment of the invention provides a kind of address space resource allocation process method and device, can realize according to equipment required address space dynamically allocate address space resources, strengthens the hot plug function of equipment.
The embodiment of the invention provides a kind of address space resource allocation process method, comprising:
Several downlink ports included to each bridge device in the system detect, if detect and know have equipment to be inserted in the descending port of a bridge device,, be to be the address space resource of one period free time of devices allocation of described insertion in the first default address space resource of described bridge device then according to the length of the needed address space resource of inserting of equipment.
The embodiment of the invention provides a kind of address space resource allocation process device, comprising:
Detection module is used for several included downlink ports of each bridge device of system are detected;
First processing module, be used for if know have equipment to be inserted into a descending port of a bridge device by described detection module detection, then according to the length of the needed address space resource of inserting of equipment, be in the first default address space resource of described bridge device, be the address space resource of one period free time of devices allocation of described insertion.
The embodiment of the invention provides a kind of operating system, comprises above-mentioned address space resource allocation process device.
In address space resource allocation process method that the invention process provides and the device, by being the certain address space resource of uplink port reservation of all bridge devices in the system in advance, when in system's course of normal operation, having equipment to insert, can dynamically be the needed address space resource of devices allocation.Can come the dynamic assignment resource according to the required address space of equipment like this, can not influence the operation of equipment, strengthen the hot plug function of equipment because of inadequate resource.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do one to the accompanying drawing of required use in embodiment or the description of the Prior Art below introduces simply, apparently, accompanying drawing in describing below is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is an address space resources allocation synoptic diagram in the PCIE bus topology process of prior art;
The address space resource allocation process method flow diagram that Fig. 2 provides for the embodiment of the invention;
The address space resource allocation process method flow diagram that Fig. 3 provides for another embodiment of the present invention;
Fig. 4 is an address space resources allocation synoptic diagram in the embodiment of the invention PCIE bus topology process;
The address space resource allocation process apparatus structure synoptic diagram that Fig. 5 provides for the embodiment of the invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
The address space resource allocation process method flow diagram that Fig. 2 provides for the embodiment of the invention, as shown in Figure 2, this method comprises:
Whether system will detect the downlink port of bridge device in course of normal operation, have equipment that hot plug takes place in downlink port to know.
When the equipment of detecting was inserted in the descending port of bridge device, how many address space resources the equipment that at first detects this insertion needed; Then, in the first address space resource, be its needed address space resource of this devices allocation dynamically.This first address space resource is that system distributes for bridge device in advance, its size is bigger than distributing to the shared address space resource sum of the external equipment that is inserted into this bridge device, promptly will reserve a part of address space resources and use in order to other equipment hot swaps.
The method that present embodiment provides when having equipment to insert in system's course of normal operation, can dynamically be the needed address space resource of devices allocation by reserving certain address space resource for the uplink port of all bridge devices in the system in advance.Can come the dynamic assignment resource according to the required address space of equipment like this, can not influence the operation of equipment, strengthen the hot plug function of equipment because of inadequate resource.For the distribution of the first address space resource, can be not limited to this certainly referring to following embodiment.
The address space resource allocation process method flow diagram that Fig. 3 provides for another embodiment of the present invention, as shown in Figure 3, this method comprises:
Before the formal startup of each operating system, all to move bios program earlier, this program major function is to configure hardware environment to make operating system stable operation.The BIOS that is moved on most computers and the server can earlier to the PCIE bus topology once make the topology of operating system become simple.The embodiment of the invention is that example describes with BIOS to the PCIE of system bus topology.
Fig. 4 is an address space resources allocation synoptic diagram in the embodiment of the invention PCIE bus topology process, as shown in Figure 4, comprise two bridge devices i.e. a SW and the 2nd SW in the PCIE bus topolopy of this system, each SW is provided with a uplink port and several downlink port.For example, " 2 " number uplink port of a SW and this topological structure " 1 " number downlink port of equipment at the middle and upper levels are connected, and should be connected with four downlink ports by " 2 " number uplink port.In the present embodiment, there are three to be connected with external equipment in four downlink ports of a SW, have a downlink port not connect external equipment, for example " 5 " number downlink port.The topological structure of the 2nd SW repeats no more herein.
Carry out in the process of the PCIE of system bus topology at BIOS, bios program carries out topology according to the mode of degree of depth traversal to the PCIE bus, specifically can be undertaken: the equipment under bus of bios program scanning by following mode, judge according to the sign that configuration space in this equipment carries whether this equipment is bridge device, if not bridge device then directly is this devices allocation address space resource; If bridge device is that then this bridge device distributes a bus, and continues the equipment under the newly assigned bus of scanning, the rest may be inferred finishes the topology of PCIE bus.
When BIOS finds certain equipment is that bridge device is for example during SW, at first to detect several included downlink ports of this SW, for example to detect four downlink ports of a SW, obtain the length statistical information that is plugged on the needed address space resource of all devices in these four downlink ports a SW.Among the one SW of present embodiment, BIOS detects " 3 " number downlink port, " 4 " number downlink port and " 6 " number downlink port and is connected with external equipment, and the length that detects the address space resource of knowing the equipment needs that are connected to " 3 " number downlink port is 1M, the length that is connected to the address space resource that the equipment of " 4 " number downlink port needs is 1M, and the length that is connected to the address space resource that the equipment of " 6 " number downlink port needs is 2M.BIOS is the length of 4M with the length statistical information that the length of three needed address space resources of equipment adds up to obtain the address space resource of the uplink port that should distribute to a SW at least.BIOS as above operates each SW successively, can get access to the length statistical information of each SW correspondence.
After BIOS got access to the length statistical information of a SW correspondence by detection, system will distribute the first address space resource for the uplink port of corresponding SW.In the present embodiment, in order on SW, to realize the hot plug of any apparatus, therefore will will distribute to the resource of telling certain space in the address space resource of this uplink port, promptly the length of the first address space resource is greater than the length of the pairing address space resource of length statistical information more.In the present embodiment, the length of the first address space resource of distributing to a SW is longer than three the needed address space resource size of equipment sums in several downlink ports that are plugged on a SW, promptly the length of the first address space resource is greater than 4M, with overabsorption 10M is example, the first address space resource is " 0x00000000-0x00dfffff ", and length is 14M.Be that example describes with overabsorption 10M in the present embodiment, be not limited thereto certainly, can distribute the space of fair-sized according to demand.
Being after the uplink port of a SW is distributed the first address space resource, owing in the downlink port of a SW external equipment is arranged, therefore will be that the downlink port of the equipment of being plugged with distributes address space resource separately.Allocation scheme can be, according to length in several downlink ports that are plugged on corresponding bridge device, the needed separately address space resource of all devices, in the first address space resource " 0x00000000-0x00dfffff ", for all devices distributes the address space resources respectively.Particularly, because being plugged on the length of the address space resource that the equipment of " 3 " number downlink port needs is 1M, the address space resources allocation that therefore can mark off length and be 1M in the first address space resource is given should " 3 " number downlink port, for example " 0x00000000-0x000fffff ".And the like, " 4 " number downlink port corresponding address space resources can be " 0x00100000-0x001fffff ", " 6 " number downlink port corresponding address space resources can be " 0x00200000-0x003fffff ".As from the foregoing in the present embodiment, for each downlink port addresses distributed space resources can be to distribute according to the mode that increases progressively continuously.Hence one can see that, though " 5 " number downlink port of a SW does not have connection device, but be that the uplink port of a SW is when distributing the address space resources, reserve i.e. " 0x00400000-0x00dfffff " part of a part of resource, be convenient to the follow-up hot plug that on " 5 " number downlink port, realizes equipment.And have as can be known above-mentioned, distribute to the address space resource of downlink port that a SW respectively is connected with equipment all at the address filtering window of a SW uplink port promptly within " 0x00000000-0x00dfffff ", can guarantee in the equipment with the downlink port of data distributing to the SW.
Further, this method embodiment distributes the first corresponding address space resource respectively to adjacent two SW uplink port separately, also can be to distribute according to the mode that increases progressively continuously.For example, the address space resource of distributing to the uplink port of the 2nd SW can be " 0x00e00000-0x01dfffff ", and this length also has more the length of 10M than the needed address space resource of all devices sum in each downlink port that is plugged on the 2nd SW.
In the address space resource allocation process method that this enforcement provides, by being that the uplink port of all bridge devices in the system is reserved certain address space resource when the topological PCIE bus, when in system's course of normal operation, having equipment to insert, dynamically be the needed address space resource of devices allocation.Can come the dynamic assignment resource according to the required address space of equipment like this, can not influence the operation of equipment, can realize any hot plug of equipment veritably because of inadequate resource.
In the above-described embodiments, dynamically be specifically as follows for the new needed address space resource of inserting of devices allocation, if system detect knows has new equipment to be inserted in the downlink port among the SW, then detect the length 1M for example of the needed address space resource of equipment of this new insertion, and in distributing to the first address space resource of this SW, be the address space resource of new one period free time of devices allocation of inserting according to this length.For example a SW searches idle in " 0x00000000-0x00dfffff " space resources of self and address space resource that equate with Len req 1M for example " 0x00400000-0x004fffff ", and distributes to this downlink port.
Certainly, when equipment is extracted from downlink port, the present embodiment method can also this port is shared the address space resource reclaim, be specially system if detection knows have when extracting in the downlink port of equipment from SW, the address space resource of distributing to this equipment before can be recovered in the first address space resource.When for example being pulled out as if the equipment in " 3 " number downlink port among the SW, the address space resource " 0x00000000-0x000fffff " of distributing to before this equipment can be recovered in " 0x00000000-0x00dfffff " space resources, use for other equipment hot swaps.
As seen from Figure 4, when Topology Discovery, to judge each equipment in the present embodiment,, then be inserted in the downlink port the needed address space resource of equipment, tell the address space resource of certain space more except distribution if this equipment is bridge device.The rest may be inferred finishes the topology of PCIE bus according to the mode of degree of depth traversal.In the present embodiment be each SW the uplink port overabsorption address space resource of 10M, when having equipment to insert, can from this 10M space, distribute like this according to the demand of equipment.When equipment is extracted, can reclaim the resource of equipment, use for follow-up insertion equipment.
The foregoing description is to introduce the inventive method to be applied at BIOS and to carry out in the process of the PCIE of system bus topology, certainly this method embodiment can also be applied in other environment, for example in os starting, kernel itself also will carry out once topology to the PCIE bus.Linux operating system is an operating system of increasing income, can make amendment about the part of Topology Discovery in the kernel source code to linux operating system, and the method for using this method embodiment to provide, can make the hot plug of any PCIE equipment of system's support.Revise linux operating system Topology Discovery code, do not rely on the Topology Discovery that mode that BIOS uses this invention realizes the PCIE bus, by operating system the PCIE bus is carried out once enumerating again fully.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be finished by the relevant hardware of programmed instruction, aforesaid program can be stored in the computer read/write memory medium, this program is carried out the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
The address space resource allocation process apparatus structure synoptic diagram that Fig. 5 provides for the embodiment of the invention, as shown in Figure 5, this address space resource allocation process device comprises the detection module 11 and first processing module 12, wherein:
Whether particularly, system is in course of normal operation, and detection module 11 will detect the downlink port of bridge device, have equipment that hot plug takes place in downlink port to know.When the equipment of detecting was inserted in the descending port of bridge device, how many address space resources the equipment that at first detects this insertion needed; Then, in the first address space resource, be its needed address space resource of this devices allocation by first processing module 12 dynamically.This first address space resource is that system distributes for bridge device in advance, its size is bigger than distributing to the shared address space resource sum of the external equipment that is inserted into this bridge device, promptly will reserve a part of address space resources and use in order to other equipment hot swaps.
The device that present embodiment provides when having equipment to insert in system's course of normal operation, can dynamically be the needed address space resource of devices allocation by reserving certain address space resource for the uplink port of all bridge devices in the system in advance.Can come the dynamic assignment resource according to the required address space of equipment like this, can not influence the operation of equipment, strengthen the hot plug function of equipment because of inadequate resource.
Distribution for the first address space resource, second processing module 13 in the address space resource allocation process device that can provide by present embodiment is finished, particularly, second processing module 13 is in the process of carrying out the system bus topology, several downlink ports included to bridge device detect, and obtain to be plugged on length statistical information in several downlink ports, the needed address space resource of all devices; And according to the length statistical information, for the uplink port of bridge device distributes the first address space resource, and according to length in several downlink ports that are plugged on bridge device, the needed separately address space resource of all devices, in the first address space resource, for all devices distributes the address space resources respectively; The length of the first address space resource is greater than the length of the pairing address space resource of described length statistical information.
Particularly, when address space resource allocation process device carries out the PCIE bus topology, equipment under bus of second processing module, 13 scannings, judge according to the sign that configuration space in this equipment carries whether this equipment is bridge device, if not bridge device then directly is this devices allocation address space resource; If bridge device is then distributed a bus for this bridge device, and continues the equipment under the newly assigned bus of scanning, know length in several downlink ports that are plugged on bridge device, the needed separately address space resource of all devices.Second processing module 13 is told the address space resources of certain space in addition except the address space resource that distributing equipment needs then.The rest may be inferred finishes the topology of PCIE bus according to the mode of degree of depth traversal.
Further in the present embodiment, first processing module 12 also is used for if know when having equipment to extract from bridge device one descending port by detection module 11, then first processing module 12 is recovered to the address space resource that distribute to this equipment before in the first address space resource, and the hot drawing of finishing equipment goes out.
More than the device embodiment in each functional module effect and between cooperation to finish the address space resources allocation, can repeat no more referring to the treatment scheme that provides among above-mentioned each method embodiment herein.
Embodiment of the invention address space resource allocation process device is by when Topology Discovery PCIE bus, for the uplink port of all bridge devices in the system is reserved certain address space resource, in system's course of normal operation, when having equipment to insert, be the needed address space resource of devices allocation dynamically.When equipment is extracted, reclaim the address space resource that this equipment has, be provided with using when hot insertion incident takes place in the back.Can come Resources allocation according to the required address space of equipment like this, not influence the operation of equipment, any hot plug of realization equipment that can be real being subjected to inadequate resource.
The embodiment of the invention also provides a kind of operating system, comprises the address space resource allocation process device that said apparatus embodiment provides.The method that this operating system present embodiment provides is by reserving certain address space resource for the uplink port of all bridge devices in the system in advance, when in system's course of normal operation, having equipment to insert, can dynamically be the needed address space resource of devices allocation.Can come the dynamic assignment resource according to the required address space of equipment like this, can not influence the operation of equipment, strengthen the hot plug function of equipment because of inadequate resource.
It should be noted that at last: above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (8)
1. an address space resource allocation process method is characterized in that, comprising:
Several downlink ports included to each bridge device in the system detect, if detect and know have equipment to be inserted in the descending port of a bridge device,, be to be the address space resource of one period free time of devices allocation of described insertion in the first default address space resource of described bridge device then according to the length of the needed address space resource of inserting of equipment.
2. address space resource allocation process method according to claim 1 is characterized in that, also comprises:
In the process of carrying out the system bus topology, several downlink ports included to described bridge device detect, and obtain the length statistical information of the needed address space resource of all devices that is plugged in described several downlink ports;
According to described length statistical information, for the uplink port of described bridge device distributes the described first address space resource, and according to the length of the needed separately address space resource of all devices in described several downlink ports that are plugged on described bridge device, in the described first address space resource, for described all devices distributes the address space resources respectively; The length of the described first address space resource is greater than the length of the pairing address space resource of described length statistical information.
3. address space resource allocation process method according to claim 1 and 2 is characterized in that, also comprises:
Know have equipment to extract in the one descending port if detect from described bridge device, the address space resource that then will distribute to described equipment before is recovered in the described first address space resource.
4. address space resource allocation process method according to claim 2 is characterized in that, for the uplink port of described bridge device distributes the described first address space resource to comprise:
According to the mode that increases progressively continuously, for adjacent two bridge devices uplink port separately distributes the first corresponding address space resource respectively.
5. an address space resource allocation process device is characterized in that,
Detection module is used for several included downlink ports of each bridge device of system are detected;
First processing module, be used for if know have equipment to be inserted into a descending port of a bridge device by described detection module detection, then according to the length of the needed address space resource of inserting of equipment, be in the first default address space resource of described bridge device, be the address space resource of one period free time of devices allocation of described insertion.
6. address space resource allocation process device according to claim 5 is characterized in that, also comprises:
Second processing module, be used in the process of carrying out the system bus topology, several downlink ports included to described bridge device detect, and obtain to be plugged on length statistical information in described several downlink ports, the needed address space resource of all devices; And according to described length statistical information, for the uplink port of described bridge device distributes the described first address space resource, and according to length in described several downlink ports that are plugged on described bridge device, the needed separately address space resource of all devices, in the described first address space resource, for described all devices distributes the address space resources respectively; The length of the described first address space resource is greater than the length of the pairing address space resource of described length statistical information.
7. according to claim 5 or 6 described address space resource allocation process devices, it is characterized in that:
Described first processing module also is used for, if know have equipment to extract in the one descending port by described detection module detection from described bridge device, the address space resource that then will distribute to described equipment before is recovered in the described first address space resource.
8. one kind comprises the operating system as address space resource allocation process device as described in any one of the claim 5 to 7.
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