CN102103834B - Method and device for maintaining data of drive circuit - Google Patents

Method and device for maintaining data of drive circuit Download PDF

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Publication number
CN102103834B
CN102103834B CN 200910247201 CN200910247201A CN102103834B CN 102103834 B CN102103834 B CN 102103834B CN 200910247201 CN200910247201 CN 200910247201 CN 200910247201 A CN200910247201 A CN 200910247201A CN 102103834 B CN102103834 B CN 102103834B
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data
memory
check code
source memory
backup
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CN102103834A (en
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任虎男
李少华
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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Abstract

The invention provides a method and device for maintaining data of a drive circuit. The drive circuit comprises a source memory for storing original data. The method comprises the following steps: duplicating the original data in the source memory to at least one backup memory; generating check codes corresponding to the original data in the source memory; periodically reading the data in the source memory and the data the backup memories and checking the data respectively with the check codes to verify whether the data in the source memory and the data in the backup memories change; and whenthe data stored in the source memory changes, duplicating the unchanged data stored in the backup memories to the corresponding positions of the source memory, and when the data stored in the backup memories change, duplicating the unchanged data stored in the source memory to the corresponding positions of the backup memories. According to the technical scheme adopted by the invention, the problem that destroying of the information in the memories caused by ESD (electrostatic discharge) leads to failure of the circuit to work normally can be effectively solved.

Description

The data of driving circuit are kept method and apparatus
Technical field
The data that the present invention relates to a kind of driving circuit are kept method and apparatus.
Background technology
(the liquid crystal material periphery of LCD is control circuit and driving circuit for Liquid Crystal Display, structure LCD) from LCD.Wherein, driving circuit comprises a large amount of storeies in order to store and to show relevant key message.Yet driving circuit often is subjected to static discharge, and (ElectrostaticDischarge ESD) disturbs, and causes driving circuit to be damaged, and shows unusual.
The Chinese patent of application number 200520067314.X discloses a kind of liquid crystal display module with electrostatic protection function; comprise for the liquid crystal display drive circuit that drives LCD MODULE; be used for described LCD MODULE is inlayed the framework that lumps together; framework is connected with the working power ground wire; also comprise filtering circuit; two input ends of filtering circuit respectively with the height of working power; low side joins; two output terminals are then just imported with the power supply of liquid crystal display drive circuit respectively; negative pin joins, the height of working power; can also further be parallel with discharge resistance between the low side.By filtering circuit and the discharge resistance of setting up, can prevent effectively that positive and negative static from may avoid electrostatic interference to the infringement of the electron device in the display driver circuit when guaranteeing operate as normal, improve whole service life.
But this esd protection mode has been introduced hardware units such as new framework, electric capacity, resistance, and is bigger to the change of original driving circuit, implement loaded down with trivial details and cost higher.And ESD moment takes place, and electric capacity, resistance can not be tackled this destruction effectively.In case the ESD electric current is not released totally, can causes the key message of circuit internal storage to change, thereby make the driving circuit can't operate as normal.
Summary of the invention
The problem that the present invention solves provides a kind of data of driving circuit and keeps method and apparatus, overcomes in the prior art esd protection mode and need introduce new hardware unit, and not only cost is higher, implements also comparatively loaded down with trivial details.
For addressing the above problem, the data that the invention provides a kind of driving circuit are kept method, and described driving circuit comprises the source memory that stores raw data, comprising: copy the raw data of described source memory at least one backup of memory; Produce the check code of corresponding described source memory raw data and be stored in the check code storer; By periodically reading the data of described source memory and described backup of memory, carry out verification with described check code respectively, verify the data situation of described source memory and described backup of memory; When the data variation of storing in the described source memory, the unchanged data of described backup of memory storage are copied to the position of described source memory correspondence, when the data variation of storing in the described backup of memory, the unchanged data of described source memory storage are copied to the position of described backup of memory correspondence.
The check code of the corresponding described source memory raw data of described generation comprises: the check code that produces the raw data of corresponding described source memory based on the parity checking method.
The check code of the corresponding described source memory raw data of described generation comprises: the check code that produces the raw data of corresponding described source memory based on the sum check method.
The check code of the corresponding described source memory raw data of described generation comprises: produce first check code of corresponding described source memory raw data based on the parity checking method, produce second check code of corresponding described source memory raw data based on the sum check method.
Described when the data variation of storing in the described source memory, the unchanged data of described backup of memory storage are copied to the position of described source memory correspondence, when the data variation of storing in the described backup of memory, the position that the unchanged data of described source memory storage is copied to described backup of memory correspondence comprises: when all data of arbitrary storer wherein change, when all data of all the other arbitrary storeies did not change, all were copied to and cover the storer that described all data change with the data of the unchanged storer of described data.
Described when the data variation of storing in the described source memory, the unchanged data of described backup of memory storage are copied to the position of described source memory correspondence, when the data variation of storing in the described backup of memory, the position that the unchanged data of described source memory storage is copied to described backup of memory correspondence comprises: when the data of at least one byte of arbitrary storer wherein change, when the corresponding byte data of all the other storeies does not change, described unchanged corresponding byte data is copied to the corresponding byte of the storer that described byte data changes.
Described when the data variation of storing in the described source memory, the unchanged data of described backup of memory storage are copied to the position of described source memory correspondence, when the data variation of storing in the described backup of memory, the unchanged data of described source memory storage are copied to the position of described backup of memory correspondence: when at least one data of arbitrary storer wherein change, when the corresponding bit data of all the other storeies does not change, the corresponding position of the storer that the data that described unchanged corresponding bit data is copied to institute's rheme change.
Execution in step periodically: read the data of described source memory and described backup of memory, carry out verification with described check code respectively, verify the data situation of described source memory and described backup of memory.
The present invention also provides a kind of data holdout device of driving circuit, and described driving circuit comprises the source memory that stores raw data, comprising: have a backup of memory at least; Initialization unit backs up the raw data of described source memory to described backup of memory, and produces the raw data calibration sign indicating number of corresponding described source memory; The check code storer stores the check code that described initialization unit produces; Authentication unit reads the data of described source memory and backup of memory, and carries out verification with the check code of described check code memory storage respectively, verifies the data situation of described source memory and backup of memory; Copied cells, data situation according to described authentication unit checking gained, the unchanged data of described backup of memory storage are copied to the position that described source memory corresponding data changes, or the unchanged data of described source memory storage are copied to the position that described backup of memory corresponding data changes.
Described check code storage unit is eprom memory.
Described check code storage unit is the MTP register.
Described initialization unit produces the check code of the raw data of corresponding described source memory based on the parity checking method.
Described initialization unit produces the check code of the raw data of corresponding described source memory based on the sum check method.
Described check code comprises first check code and second check code, described initialization unit produces first check code of the raw data of corresponding described source memory based on the parity checking method, produce second check code of the raw data of corresponding described source memory based on the sum check method.
Described data situation comprises that wherein all data of arbitrary storer change, and all data of all the other arbitrary storeies do not change, and copied cells is copied to the storer that described all data change with the data of the unchanged storer of described data.
Described data situation comprises that wherein the data of at least one byte of arbitrary storer change, the data of the corresponding byte of all the other storeies do not change, and described copied cells is copied to the data of described unchanged corresponding byte the corresponding byte of the storer that the data of described byte change.
Described data situation comprises that wherein at least one data of arbitrary storer change, the data of the corresponding position of all the other storeies do not change, the corresponding position of the storer that the data that described copied cells is copied to institute's rheme with described unchanged corresponding data change.
Compared with prior art, according to technical scheme of the present invention, the raw data of source memory in the driving circuit is backed up, the situation of change of periodic authentication raw data and Backup Data, when data change, by the data that unchanged Backup Data or raw data reparation have changed, it is destroyed effectively to have solved the storer internal information that ESD causes, the problem that the circuit that causes can't operate as normal.Even if data are destroyed by ESD in the storer, also can realize the data recovery.
The present invention also produces a plurality of check codes according to multiple error correcting technique, and data are verified step by step, can simplify proof procedure, advantage that again can comprehensive multiple identifying code.
In order to reach better data recovery effects, the present invention also adopts a plurality of backup of memory that raw data is backed up, and reduces all ruined probabilities of raw data and Backup Data.
In addition, ingredients such as backup of memory, check code storer can use device idle in original driving circuit, have saved the cost that improves the esd protection function.
Description of drawings
Fig. 1 is that the data of driving circuit of the present invention are kept the method flow synoptic diagram;
Fig. 2 is driving circuit of the present invention and data holdout device structural representation thereof;
Fig. 3 is driving circuit and the data holdout device structural representation thereof of first embodiment of the invention;
Fig. 4 is driving circuit and the data holdout device structural representation thereof that the first memory data change behind the first embodiment of the invention generation ESD;
Fig. 5 is driving circuit and the data holdout device structural representation thereof that first memory behind the second embodiment of the invention generation ESD, second memory partial bytes data change;
Fig. 6 is driving circuit and the data holdout device structural representation thereof of third embodiment of the invention;
Fig. 7 is driving circuit and the data holdout device structural representation thereof that first memory behind the third embodiment of the invention generation ESD, second memory part bit data change
Fig. 8 is driving circuit and the data holdout device structural representation thereof of fourth embodiment of the invention;
Fig. 9 is driving circuit and the data holdout device structural representation thereof that first memory behind the fourth embodiment of the invention generation ESD, second memory part bit data change.
Embodiment
Driving circuit has the source memory that stores raw data, and reset signal end, power end, earth terminal, other control information ends.The ESD electric current enters driving circuit by these signal ends easily, thereby changes the raw data that source memory is preserved.
Embodiment of the present invention backs up the raw data of source memory, and the situation of change of periodic authentication raw data and Backup Data, with when data change, and the data that changed by unchanged Backup Data or raw data reparation.
As shown in Figure 1, embodiment of the present invention provides a kind of data of driving circuit to keep method, comprising: step S1, copy the raw data of described source memory at least one backup of memory; Step S2 produces the check code of the raw data of corresponding described source memory; Step S3 reads the data of described source memory and described backup of memory, carries out verification with described check code respectively, verifies the data situation of described source memory and described backup of memory; Step S4, when the data variation of storing in the described source memory, the unchanged data of described backup of memory storage are copied to the position of described source memory correspondence, when the data variation of storing in the described backup of memory, the unchanged data of described source memory storage are copied to the position of described backup of memory correspondence.
Accordingly, embodiment of the present invention also provides a kind of data holdout device of driving circuit, comprising: backup of memory; Initialization unit backs up the raw data of described source memory to described backup of memory, and produces the check code of the raw data of corresponding described source memory; The check code storer stores the check code that described initialization unit produces; Authentication unit reads the data of source memory and backup of memory, and carries out verification with the check code of described check code memory storage respectively, verifies the data situation of described source memory and backup of memory; Copied cells, data situation according to described authentication unit checking gained, the unchanged data of described backup of memory storage are copied to the position that described source memory corresponding data changes, or the unchanged data of described source memory storage are copied to the position that described backup of memory corresponding data changes.
Be elaborated with the embodiment of the present invention of embodiment with reference to the accompanying drawings.
As shown in Figure 2, driving circuit has the first memory (source memory) 12 that stores raw data, and reset signal end, power end, earth terminal, other control information ends.The ESD electric current enters driving circuit by these signal ends easily, thereby changes the raw data of first memory 12 storages.
The data holdout device 1 of present embodiment comprises initialization unit 11, second memory (backup of memory) 13, check code storage unit 14, authentication unit 15, copied cells 16.
Initialization unit 11 produces check code according to the raw data of preserving in the first memory 12, and check code is saved to check code storage unit 14; And the raw data of first memory 12 is copied to second memory 13, finishes the initialization procedure of data holdout device 1.
Authentication unit 15 reads the data of first memory 12, second memory 13, and the check code with described check code storage unit 14 storages carries out verification respectively, the data situation of checking first memory 12, second memory 13.
Copied cells 16 is according to the data situation of authentication unit 15 checking gained, the unchanged data of described backup of memory storage are copied to the position that described source memory corresponding data changes, or the unchanged data of described source memory storage are copied to the position that described backup of memory corresponding data changes.
Second memory 13 and check code storage unit 14 can be the storer that increases newly in the driving circuit.Yet, often having some idle storeies in the existing driving circuit, any data are not preserved in the inside.Therefore second memory 13 and check code storage unit 14 can be utilized these idle storeies, thereby reduce manufacturing cost, also can better be compatible with original device.Preferably, check code storage unit 14 is Erasable Programmable Read Only Memory EPROM (Erasable Programmable Read-OnlyMemory idle in the driving circuit, EPROM) or EEPROM (Electrically Erasable Programmable Read Only Memo) (Electrically ErasableProgrammable Read-Only Memory, EEPROM).Because the about 10V of withstand voltage of these storeies does not disturb and the data of change storage so allow to be subject to ESD, for example MTP (Multi-Time-Programmable) register.Second memory 13 can be idle random access memory (Random Access Memory, RAM).
Fig. 3 is the structural representation of data holdout device 1 first embodiment of the present invention.As shown in Figure 3, the raw data " 10,101,010 11111111 " of two bytes of storage in the first memory 12, this raw data is the necessary data of driving circuit operation.After system powered on, initialization unit 11 produced check code " 11 " according to the raw data " 10,101,010 11111111 " of preserving in the first memory 12 according to the parity checking method, and check code " 11 " is saved to check code storage unit 14.
Initialization unit 11 also is copied to second memory 13 with the raw data " 10,101,010 11111111 " of first memory 12.Be that second memory 13 has backed up the raw data in the first memory 12, this raw data is the necessary data of driving circuit operation.
The ESD electric current enters driving circuit by reset signal end, power end, earth terminal or other control information ends, has changed the raw data in the first memory 12.As shown in Figure 4, the data of first memory 12 storages are changed into " 11,100,000 00000111 ", still are " 10,101,010 11111111 " but the data of second memory storage do not have change.
Authentication unit 15 periodically reads the real time data of storage in first memory 12, the second memory 13, and the check code " 11 " of check code storage unit 14 preservations.Authentication unit 15 reads the real time data " 11,100,000 00000111 " of first memory 12, the real time data of second memory 13 " 1010101011111111 ", and the check code of check code storage unit 14 " 11 ".
The real time data check results that obtains first memory 12 according to parity checking method authentication unit 15 is " 00 ", and the real time data check results of second memory 13 is " 11 ".Two check results are contrasted with check code " 11 " respectively: the check results " 00 " of the real time data of first memory 12 interior two bytes is all different with two bit check sign indicating numbers " 11 ", the real time data of preserving in the first memory 12 changes because destroying fully for raw data.The check results " 11 " of the real time data of second memory 13 interior two bytes is all identical with two bit check sign indicating numbers " 11 ", and the relative raw data of real time data of backup does not change in the second memory 13.
Copied cells 16 with the real time data " 1010101011111111 " in the second memory 13, does not namely have the raw data of change according to The above results, is copied in the first memory unit 12, replaces real time datas wrong in the first memory unit 12.Copied cells 16 is copied to the vicissitudinous original storage of data with the unchanged total data of backup of memory, make first memory unit 12 regain raw data, data in other circuit call first memory 12 can not take place that data change and the error running that occurs when working.
Described parity checking method refers to, by the one-bit digital of the corresponding check code of a byte of checking data.The number that is comprised " 1 " in byte in the checking data is odd number, and then the one-bit digital of corresponding check code is " 0 "; The number that is comprised " 1 " in byte in the checking data is even number or zero, and then the one-bit digital of corresponding check code is " 1 ".In the present embodiment, the raw data " 10,101,010 11111111 " in the first memory 12 has two bytes, and the corresponding check code that produces is two.Wherein, first byte " 10101010 " contains 4 " 1 ", and the number of " 1 " is even number, and first of corresponding check code is " 1 ".Second byte " 11111111 " contains 8 " 1 ", and second of corresponding check code is " 1 ".
Have only the raw data of first memory 12 destroyed among first embodiment, the invention provides second and execute example, in order to raw data that 13 storages of first memory 12 and second memory are described ruined situation all.
As shown in Figure 3, the raw data " 1010101011111111 " of two bytes of storage in the first memory 12.Initialization unit 11 produces check code " 11 " according to the raw data " 1010101011111111 " of preserving in the first memory 12 according to the parity checking method, and check code " 11 " is saved to check code storage unit 14.And initialization unit 11 backs up to second memory 13 with the raw data " 1010101011111111 " of first memory 12.After the initial work process, authentication unit 15 periodically reads the real time data of storage in first memory 12, the second memory 13, and the check code " 11 " of check code storage unit 14 preservations.
The ESD electric current has changed the raw data in first memory 12 and the second memory 13 by reset signal end, power end, earth terminal or other control information driving circuits.As shown in Figure 5, the data of first memory 12 storages are changed into " 10,101,010 00000111 ", and the data of second memory storage are changed into " 11,100,000 11111111 ".Authentication unit 15 reads the real time data " 10,101,010 00000111 " of first memory 12, the real time data of second memory 13 " 1110000011111111 ", and the check code of check code storage unit 14 " 11 " after the ESD electric current takes place.
The real time data check results that obtains first memory 12 according to parity checking method authentication unit 15 is " 10 ", and the real time data check results of second memory 13 is " 01 ".Two check results are contrasted with check code " 11 " respectively: the first byte check results " 1 " of real time data is identical with first bit digital " 1 " of check code in the first memory 12; The second byte check results " 0 " of real time data is different with first bit digital " 1 " of check code in the first memory 12; The real time data of preserving in the first memory 12 is for raw data, and second byte changes because of destruction.
The first byte check results " 0 " of real time data is different with first bit digital " 1 " of check code in the second memory 13; The second byte check results " 1 " of real time data is identical with first bit digital " 1 " of check code in the second memory 13; The real time data of preserving in the second memory 13 is for raw data, and first byte changes because of destruction.
Copied cells 16 is copied to first byte location of second memory 13 according to The above results with first byte data " 10101010 " of data in the first memory 12, substitutes the misdata of first byte.And then the second memory 13 interior data " 10,101,010 11111111 " that read after reconfiguring all are copied to first memory, two byte datas in the alternative first memory 12.First memory 12, second memory 13 have regained raw data.
Certainly, also can make copied cells 16 that first byte data " 10101010 " of data in the first memory 12 is copied first byte location of second memory 13, second byte data " 11111111 " of second memory 13 is copied to second byte location of first memory 12.Copied cells 16 is copied to the vicissitudinous position of the corresponding byte data of backup of memory with the unchanged byte data of source memory, the unchanged byte data of backup of memory is copied to the vicissitudinous position of the corresponding byte data of source memory, not only make first memory 12, second memory 13 regain raw data, also simplify the read-write process of copied cells 16, shortened access time.
The invention provides the 3rd embodiment, in order to all bytes of raw data of all bytes of raw data that first memory 12 is described and second memory 13 ruined situation all.
As shown in Figure 6, the raw data " 1010101011111111 " of two bytes of storage in the first memory 12.Initialization unit 11 produces check code " 01010101 " according to the raw data " 1010101011111111 " of preserving in the first memory 12 according to the sum check method, and check code " 01010101 " is saved to check code storage unit 14.And initialization unit 11 backs up to second memory 13 with the raw data " 10,101,010 11111111 " of first memory 12.After the initial work, authentication unit 15 periodically reads the real time data of storage in first memory 12, the second memory 13, and the check code " 01010101 " of check code storage unit 14 preservations.
The ESD electric current enters driving circuit by reset signal end, power end, earth terminal or other control information ends, has changed the raw data in first memory 12 and the second memory 13.As shown in Figure 7, the data of first memory 12 storages are changed into " 10,101,011 11111111 ", and the data of second memory storage are changed into " 10,101,010 01111111 ".Authentication unit 15 reads the real time data " 10,101,011 11111111 " of first memory 12 after the ESD electric current takes place, the real time data of second memory 13 " 1010101001111111 ", and the check code of check code storage unit 14 " 01010101 ".
Authentication unit 15 is " 01010100 " according to the real time data check results that the sum check method obtains first memory 12, and the real time data check results of second memory 13 is " 11010101 ".Two check results are contrasted with check code " 01010101 " respectively: the first seven bit digital check results " 0101010 " of two bytes of real time data is identical with the first seven bit digital " 0101010 " of check code in the first memory 12; The eight digit number word check results " 0 " of two bytes is different with the eight digit number word " 1 " of check code; The real time data of preserving in the first memory 12 has one at least and has changed because of destruction for raw data in the eight digit number word of two bytes.
The first bit digital check results " 1 " of two bytes of real time data is different with first bit digital " 0 " of check code in the second memory 13; The back seven bit digital check results " 1010101 " of two bytes are identical with back seven bit digital " 1010101 " of check code; The real time data of preserving in the second memory 13 has one at least and has changed because of destruction for raw data in first bit digital of two bytes.
Copied cells 16 copies first bit digital of second memory 13 interior two bytes according to The above results with first bit digital of two bytes of real time datas in the first memory 12, substitutes first bit digital of two bytes that belonged to the mistake real time data originally.And then read data " 10,101,010 11111111 " in the second memory 13 after reconfiguring, and all be copied to first memory 12, substitute two byte datas in the first memory 12.First memory 12, second memory 13 have regained raw data.
Also can make copied cells 16 first bit digital of two bytes of real time datas in the first memory 12 is copied to first of two bytes of second memory 13, the eight digit number word of two bytes of the real time data of second memory 13 is copied to the 8th of two bytes of first memory 12.
Described sum check method refers to, first bit digital of each byte of data is carried out no-carry to add up, accumulation result is as first bit digital of check code, the second-order digit no-carry of each byte adds up, accumulation result is as the second-order digit of check code ... by that analogy, the eight digit number word no-carry of each byte is added up, and accumulation result obtains a check code with a byte thus as the eight digit number word of check code.In the present embodiment, the raw data " 10,101,010 11111111 " in the first memory 12 has two bytes, and first byte is " 10101010 ", and second byte is " 11111111 ".The corresponding bit digital of two bytes is added up, and the check code of acquisition is " 01010101 ".Cumulative process is as follows:
Figure G2009102472010D00121
Provide the 4th embodiment to be preferred embodiment in conjunction with Fig. 8, the raw data " 10,101,010 11111111 " of two bytes of storage in the first memory 12.Initialization unit obtains first check code " 11 " according to the raw data " 10,101,010 11111111 " of preserving in the first memory 12 according to the parity checking method, produces check code " 01010101 " according to the sum check method.Initialization unit 11 is saved to check code storage unit 14 with first check code " 11 " and second check code " 01010101 ".Described parity checking method and sum check method are same as the previously described embodiments, repeat no more herein.And the raw data " 1010101011111111 " of first memory 12 is backed up to second memory 13.
ESD has changed the raw data in first memory 12 and the second memory 13.As shown in Figure 9, the data of first memory 12 storages are changed into " 10,101,011 11111111 ", and the data of second memory storage are changed into " 00,101,010 11111111 ".Authentication unit 15 reads the real time data " 10,101,011 11111111 " of first memory 12 in the cycle after the ESD electric current takes place, the real time data of second memory 13 " 00,101,010 11111111 ", and first check code " 11 " of check code storage unit 14 and second check code " 01010101 ".
Authentication unit 15 is according to the parity checking method, and real time data first check results that obtains first memory 12 is " 01 ", and real time data first check results of second memory 13 is " 01 ".Real time data second check results that obtains first memory 12 according to the sum check method is " 01010100 ", and real time data second check results of second memory 13 is " 11010101 ".
Authentication unit 15 contrasts two first check results respectively with first check code " 11 ": first of first check results of first memory 12 real time datas is that " 0 " is different with first bit digital " 1 " of first check code; Second of first check results of first memory 12 real time datas is that " 1 " is identical with the second-order digit " 1 " of first check code; The real time data of preserving in the first memory 12 is for raw data, and first byte changes because of destruction.
First of first check results of second memory 13 real time datas is that " 0 " is different with first bit digital " 1 " of first check code; Second of first check results of second memory 13 real time datas is that " 1 " is identical with the second-order digit " 1 " of first check code; The real time data of preserving in the second memory 13 is for raw data, and first byte also changes because of destruction.
Authentication unit 15 contrasts two second check results respectively with second check code " 01010101 ": the first seven bit digital of second check results of first memory 12 real time datas is that " 0101010 " is identical with the first seven bit digital " 0101010 " of second check code; The eight digit number word check results " 0 " of second check results is different with the eight digit number word " 1 " of second check code; In conjunction with the comparing result of first memory 12 first checking results and first check code, the real time data of preserving in the first memory 12 is for raw data, and the eight digit number word of first byte changes because of destruction.
The first bit digital check results " 1 " of second check results of real time data is different with first bit digital " 0 " of second check code in the second memory 13; The back seven bit digital check results " 1010101 " of second check results are identical with back seven bit digital " 1010101 " of second check code; In conjunction with the comparing result of second memory 13 first checking results and first check code, the real time data of preserving in the second memory 13 is for raw data, and first bit digital of first byte changes because of destruction.
Copied cells 16 is according to the result after contrasting, first bit digital of first byte in the real time datas in the first memory 12 is copied to first bit digital of first bytes in the second memory 13, substitutes first bit digital of first byte that belonged to the mistake real time data originally.And then read data " 10,101,010 11111111 " in the second memory 13 after reconfiguring, and all be copied to first memory, substitute two byte datas in the first memory 12.Also can make copied cells 16 that first bit digital of first byte in the real time datas in the first memory 12 is copied to first of first bytes in the second memory 13, the eight digit number word of first byte in the real time data of second memory 13 is copied to the 8th of first bytes in the first memory 12.Copied cells 16 is copied to the vicissitudinous position of the corresponding bit data of backup of memory with the unchanged bit data of source memory, the unchanged bit data of backup of memory is copied to the vicissitudinous position of the corresponding bit data of source memory, makes first memory 12, second memory 13 regain raw data.
In present embodiment, first check code that produces according to the parity checking method is verified whole and byte earlier, if all destroyed, second check code that produces according to the sum check method carries out the checking of each again.If it is not ruined that whole and byte checking back is found to have, and then need not to carry out next step each checking again.Use two check codes to carry out verification, can realize the checking step by step of data, can simplify proof procedure, advantage that again can comprehensive multiple identifying code.
After described addition verification method also is suitable for numeral with the corresponding position of each byte in the data and adds up, again to each digital negate of summed result as check code.For example, among aforementioned several embodiment, the digital accumulation result of the corresponding position of each byte is " 01010101 ", and the check code that obtains after each the digital negate to this result is " 10101010 ".When the data that read and identifying code carry out verification, do not adopt the pairing comparision in above-described embodiment, but each byte of data is added up with the corresponding position of check code, who result of accumulation result is non-vanishing, and then mistake has taken place the data of this position.Those skilled in the art can obtain described check code and described method of calibration according to the error correcting technique in the mechanics of communication according to required.
In order to reach better data recovery effects, can adopt a plurality of storeies as backup of memory, the raw data of source memory is backuped in a plurality of backup of memory.For example, raw data is kept in the first memory, and the raw data of first memory is backed up to second memory and the 3rd storer.Read the data of first memory, second memory, the 3rd storer, carry out verification with check code respectively.Data situation according to the checking gained is copied to the vicissitudinous position of corresponding data with the unchanged data of data in described first memory, second memory, the 3rd storer.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute limited range.

Claims (5)

1. the data of a driving circuit are kept method, and described driving circuit comprises the source memory that stores raw data, and described data are kept method and comprised:
Copy the raw data of described source memory at least one backup of memory;
Produce the check code of corresponding described source memory raw data;
Read the data of described source memory and described backup of memory, carry out verification with described check code respectively, verify the data situation of described source memory and described backup of memory, when the data of described source memory and described backup of memory are all destroyed:
If the data of the partial bytes of arbitrary storer change in described source memory and the described backup of memory, the data of the corresponding byte of all the other storeies do not change, and then the data of described unchanged corresponding byte are copied to the corresponding byte of the storer that the data of described byte change;
If the data of the part position of arbitrary storer change in described source memory and the described backup of memory, the data of the corresponding position of all the other storeies do not change, and data that then will described unchanged corresponding position are copied to corresponding of storer that the data of institute's rheme change.
2. data as claimed in claim 1 are kept method, it is characterized in that, the check code of the raw data of the corresponding described source memory of described generation comprises: the check code that produces the raw data of corresponding described source memory based on the parity checking method.
3. data as claimed in claim 1 are kept method, it is characterized in that, the check code of the raw data of the corresponding described source memory of described generation comprises: the check code that produces the raw data of corresponding described source memory based on the sum check method.
4. data as claimed in claim 1 are kept method, it is characterized in that, the check code of the raw data of the corresponding described source memory of described generation comprises: produce first check code of the raw data of corresponding described source memory based on the parity checking method, produce second check code of the raw data of corresponding described source memory based on the sum check method.
5. data as claimed in claim 1 are kept method, it is characterized in that, execution in step periodically: read the data of described source memory and described backup of memory, carry out verification with described check code respectively, verify the data situation of described source memory and described backup of memory.
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