CN102103527A - Multi-kernel DSP (digital signal processing) circuit with error processing device and error processing method - Google Patents
Multi-kernel DSP (digital signal processing) circuit with error processing device and error processing method Download PDFInfo
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Abstract
The invention provides a multi-kernel digital signal processing (DSP) circuit which comprises a plurality of DSP kernels, a system bus, a memory, a high speed interface, an interrupt controller and monitoring circuits, wherein the monitoring circuits are respectively corresponding to the DSP kernels and used for monitoring the running states of the DSP kernels; and when the running of one DSP kernel has errors, the monitoring circuit corresponding the DSP kernel having errors produces an interrupt signal, so that all error context information of the DSP kernel is reported to an upper computer by the high speed interface. The invention also provides a method for processing errors in the multi-kernel DSP circuit. By using the device and method provided by the invention, the hardware system is simplified, more error context information caused when the system has errors can be obtained, and the success ratio for reporting the context information by the system is improved.
Description
Technical field
The present invention relates to digital signal processing (DSP) field, be specifically related to a kind of many kernels DSP circuit and error handling method with error processing apparatus.
Background technology
Digital signal processing (DSP) system is widely used in a plurality of fields.Yet, in traditional DSP embedded system, in case DSP subsystem collapse or mistake occurs, because the internal information of DSP is difficult to be obtained by the external world, so be unusual difficulty to the analysis of mistake and location.
In the existing analysis and the solution of location at mistake at present,, often adopt the method for hardware for mistake is carried out analyzing and processing.This method need be built special-purpose physical channel, for example adopts special-purpose parallel port host computer interface, and host computer (such as CPU) is linked to each other with dsp system.When mistake appearred in dsp system, host computer was read and write the DSP internal information by the specialized hardware passage.Fig. 1 shows the block diagram of the DSP embedded system 100 that has special-purpose host computer interface in the prior art.This system comprise a plurality of DSP 110-0 to 110-n, with the corresponding hardware main frame of a plurality of DSP Peripheral Interface 120-0 to 120-n, high-speed interface interchanger 130 and CPU 140.Wherein, hardware main frame Peripheral Interface is a kind of special purpose interface.When one or more DSP collapse or mistake occurs, can visit the internal resource of the DSP that collapse or mistake take place as the CPU 140 of host computer by this hardware main frame Peripheral Interface.
Yet this can increase the hardware complexity of embedded system, and the host computer inner structure that often needs to understand specific DSP to be carrying out read-write operation, thereby has increased the coupling of system development.Because DSP is in passive position, so the information that host computer obtains is always very limited, perhaps can only handle the mistake of limited kinds.
Summary of the invention
One aspect of the present invention provides a kind of many kernels digital signal processing DSP circuit, comprising: a plurality of DSP kernels; The system bus that links to each other with a plurality of DSP kernels; The storer that links to each other with system bus is used to store the wrong contextual information of described a plurality of DSP kernels; High-speed interface is used for communicating by letter with external circuit; Wherein, described many kernels digital signal processing DSP circuit also comprises interruptable controller and corresponding with each DSP kernel and monitor the observation circuit of the running status of this DSP, when the operation of DSP kernel makes mistakes, produce look-at-me with the corresponding observation circuit of the DSP kernel of makeing mistakes, interruptable controller is broadcast to all DSP kernels with this look-at-me, each this look-at-me of DSP kernel processes, thus the wrong contextual information of the DSP kernel of will makeing mistakes reports host computer through high-speed interface.
Preferably, observation circuit is a watchdog circuit, and look-at-me is the spill over of watchdog circuit.Preferably, the number of DSP kernel is more than or equal to 3.
Preferably, high-speed interface comprises Fast Ethernet or HSSI High-Speed Serial Interface.
Preferably, the mistake contextual information comprise the vestige message that is trapped in the internal memory, internal register pointer, the numbering of the DSP kernel of makeing mistakes or when the numbering of the DSP kernel of pre-treatment.
Preferably, host computer is embedded type CPU or personal computer.
Another aspect of the present invention provides a kind of method that mistake in many kernels digital signal processing DSP circuit is handled, described many kernels digital signal processing DSP circuit comprises a plurality of DSP kernels, wherein, described method comprises: the running status of monitoring a plurality of DSP kernels; When the operation of DSP kernel makes mistakes, produce look-at-me; This look-at-me is broadcast to all DSP kernels; Each this look-at-me of DSP kernel processes; And the wrong contextual information of the DSP kernel of will makeing mistakes reports host computer.
Preferably, the step of each this look-at-me of DSP kernel processes comprises: be self if check current DSP kernel of makeing mistakes, then the wrong contextual information with this DSP kernel reports host computer; Otherwise, carry out the wait of special time, the stand-by period is relevant with the kernel numbering.The wrong contextual information of DSP kernel does not also report host computer if make mistakes, and then collects the wrong contextual information of the DSP kernel between DSP kernel numbering and the current inner numbering of makeing mistakes, and should report host computer by the mistake contextual information.
Preferably, special time and this DSP kernel waited for of each DSP kernel and the proportional relation of distance between the DSP kernel of makeing mistakes.
The invention enables the hardware in the dsp system to connect modularization more, make full use of system's existing hardware resource, simplified hardware system.Thereby can increase the stability of system, shorten the construction cycle, and then reduce cost.In addition, the present invention does not need to set up special-purpose physical channel, thereby simplifies hardware configuration.Initiatively report mistake by DSP, can obtain the contextual information when more multisystem makes a mistake, quicken error analysis, improve system development efficient.In addition, a plurality of DSP kernels are worked in coordination, and have improved the probability that system successfully reports contextual information significantly (exponential increase), make it possible to the mistake that unknown cause produces is handled.
Description of drawings
By detailed description with the accompanying drawing hereinafter, above-mentioned and other features of the present invention will become more apparent, wherein:
Fig. 1 shows the block diagram of the DSP embedded system that has special-purpose host computer interface in the prior art;
Fig. 2 shows the block diagram of general DSP embedded system;
Fig. 3 shows the block diagram of the inside structure of many kernels DSP;
Fig. 4 shows the block diagram of the many kernels DSP that has error processing apparatus according to an embodiment of the invention;
Fig. 5 shows the process flow diagram of error handling method according to an embodiment of the invention.
Embodiment
Below, in conjunction with the drawings to the description of specific embodiments of the invention, principle of the present invention and realization will become obvious.Should be noted in the discussion above that the present invention should not be limited to specific embodiment hereinafter described.
Fig. 2 shows the block diagram of general DSP embedded system 200.This dsp system 200 comprises a plurality of DSP 210-0 to 210-n, the high-speed interface interchanger 220 and the CPU230 that link to each other with a plurality of DSP.In use, DSP might be because illegal memory visit, disable instruction or some other for example problem such as endless loop and cisco unity malfunction.In this case, if can obtain more contextual information, will be very meaningful then to the analysis of problem.But when system's real time execution, from the angle of CPU 230, the acquisition of these contextual informations is very difficult.As shown in Figure 2, when DSP malfunction arbitrarily, CPU is difficult to obtain by general-purpose interface (that is, the high-speed interface interchanger 220) internal information of this DSP.Better method is when certain DSP goes wrong, to allow this DSP oneself that contextual information is reported CPU 230.The appearance of many kernels DSP makes this method become possibility.
In many kernels DSP, then adopt general high-speed interface between each module, such as Fast Ethernet, HSSI High-Speed Serial Interface etc. connect.Fig. 3 shows the block diagram of the inside structure of many kernels DSP 300.This many kernel DSP 300 comprises a plurality of kernel 310-0 to 310-n, system bus 320 and shared drive 330.A plurality of kernel 310-0 to 310-n link to each other by system bus 320, so they can have shared resource, can visit between mutually.By wrong context information store in shared drive 330, can utilize will the make mistakes contextual information of kernel of the kernel of any one operate as normal to be reported to the CPU (not shown).
Contextual information when DSP makes mistakes may comprise:
(1) still be trapped in the central vestige message (Trace Message) of internal memory, this is most important;
(2) internal register, such as stack pointer (SP), the PC pointer (ESP) of makeing mistakes, the internal memory pointer (PC_MMUI) etc. of makeing mistakes;
(3) any out of Memory that helps to analyze the DSP mistake.
And having of causing that the DSP kernel makes mistakes:
(1) mistake of known type appears in DSP, such as illegal memory operation, disable instruction etc.;
(2) DSP is owing to error condition enters in the infinite loop;
(3) mistake of other UNKNOWN TYPE.
The present invention can carry out simple and effective processing at above-mentioned all the 3 kinds reasons of makeing mistakes.Below in conjunction with Figure 4 and 5 specific embodiments of the invention are described in detail.
Fig. 4 shows the block diagram of the many kernels DSP 400 that has error processing apparatus according to an embodiment of the invention, wherein for brevity, has omitted the system bus and the shared drive (referring to Fig. 3) that link to each other with a plurality of kernels.Many kernels DSP 400 comprises a plurality of DSP kernel 410-0 to 410-n, universal interrupt controller 420 and a plurality of watchdog circuit 430-0s to 430-n corresponding respectively with a plurality of DSP kernel 410-0 to 410-n.Watchdog circuit is used for monitoring the running status of each DSP kernel respectively.When certain DSP kernel operation went wrong, corresponding watchdog circuit overflowed, and produced interruption.Look-at-me is broadcast to all DSP kernels by universal interrupt controller.The DSP kernel of all normal operations comprises the DSP kernel of makeing mistakes, and all can respond the look-at-me of broadcasting, and enter Interrupt Process (being described in more detail below).Simultaneously, all watchdog circuits also are endowed a proprietary treatment state sign, are used for representing whether the interruption that certain house dog produces has had kernel to handle.
| The |
1 | 2 | 3 | 4 | 5 | 6 |
| Error probability | 50％ | 25％ | 12.5％ | 6.25％ | 3.125％ | 1.5625％ |
| Error probability | 20％ | 4％ | 0.8％ | 0.16％ | 0.032％ | 0.0064％ |
| Error probability | 10％ | 1％ | 0.1％ | 0.01％ | 0.001％ | 0.0001％ |
Form 1: many kernels DSP error probability table
From form 1 as can be seen, when the error probability of single nuclear is 20% when following, when number of cores during greater than 3, all kernels all probability of occurrence almost do not have.In other words, having a kernel this time at least is operate as normal.The system that makes so successfully reports the probability of contextual information to promote significantly, and along with the increase of number of cores, probability of success exponentially increases.
Fig. 5 shows the process flow diagram of error handling method 500 according to an embodiment of the invention.Method begins at step 501 place.At step 503 place, at first close house dog, prevent that the house dog interruption is processed repeatedly, and check at step 505 place whether current house dog of overflowing belongs to self.Particularly, can utilize following formula to check:
usDistance＝(ulWtdId+OS_NUM_OF_CORES-osGetCoreID)mode
OS_NUM_OF_CORES；
Wherein, ulWtdId represents house dog numbering and kernel numbering correspondence one by one; Mode represents the mathematical modulo computing; Os6etCoreID represents to be used for obtaining the operation of current inner numbering; OS_NUM_OF_CORES represents number of cores in the dsp chip.When usDistance equals zero, illustrate that current house dog of overflowing belongs to self.If belong to self, then current what make mistakes is exactly this kernel, and the treatment state sign is set to 1 at step 507 place, and at step S509 place wrong contextual information is reported host computer (CPU).If check current house dog of overflowing not to one's name, then wait as long for, such as 1 second, to check whether the treatment state sign corresponding with house dog is 1 at step S511 place at step 505 place.Can guarantee like this to handle to the DSP kernel time enough of makeing mistakes.The length of stand-by period is relevant with the distance of makeing mistakes between the DSP kernel with current DSP kernel simultaneously, and for example proportional relation can guarantee that like this not having a plurality of kernels handles same interruption simultaneously.After overtime, the treatment state sign is judged at step S513 place.If the treatment state sign still is 0, illustrate that then other kernel (comprising the kernel of makeing mistakes) do not handle interrupting, then method proceeds to step S515.Otherwise, be left intact and directly return.At step S515 place, calculate the distance of the current inner numbering and the kernel numbering of makeing mistakes, distance is big more, shows that then the number of cores of makeing mistakes is many more.Collect all at the contextual information of the kernel between kernel numbering and the current inner numbering of makeing mistakes, and wrong contextual information is reported host computer (CPU) by the universal high speed interface.
Wherein, above-mentioned wrong contextual information includes but not limited to:
(1) still is trapped in the central vestige message (Trace Message) of internal memory;
(2) internal register, such as stack pointer (SP), the PC pointer (ESP) of makeing mistakes, in
Deposit the pointer of makeing mistakes (PC_MMUI) etc.;
The kernel numbering of (3) makeing mistakes;
(4) when pre-treatment kernel numbering.
By using method as shown in Figure 5, many kernels DSP can realize the active of one or more kernel fault contextual informations is reported.And report content to define flexibly as required.When the kernel of makeing mistakes can ownly be handled error message, then handle by oneself, if the DSP kernel of makeing mistakes can't carry out fault processing, then handle by other kernel help.Shown in the form 1 as mentioned in the above, this mode that reports is reliable.
The present invention has made full use of efficient bus and shared drive inner among many kernels DSP, using system has high-speed interface now (such as Ethernet, HSSI High-Speed Serial Interface SRIO, PCI-e etc.), when mistake appears in dsp system, realized by the DSP active, reliably system mistake contextual information as much as possible be transferred to the external world.
Although below show the present invention in conjunction with the preferred embodiments of the present invention, one skilled in the art will appreciate that under the situation that does not break away from the spirit and scope of the present invention, can carry out various modifications, replacement and change to the present invention.Therefore, the present invention should not limited by the foregoing description, and should be limited by claims and equivalent thereof.
Claims (9)
1. the DSP of kernel digital signal processing more than kind circuit comprises:
A plurality of DSP kernels;
The system bus that links to each other with a plurality of DSP kernels;
The storer that links to each other with system bus is used to store the wrong contextual information of described a plurality of DSP kernels;
High-speed interface is used for communicating by letter with external circuit;
Wherein, described many kernels digital signal processing DSP circuit also comprises interruptable controller and corresponding with each DSP kernel and monitor the observation circuit of the running status of this DSP, when the operation of DSP kernel makes mistakes, produce look-at-me with the corresponding observation circuit of the DSP kernel of makeing mistakes, interruptable controller is broadcast to all DSP kernels with this look-at-me, each this look-at-me of DSP kernel processes, thus the wrong contextual information of the DSP kernel of will makeing mistakes reports host computer through high-speed interface.
2. many kernels digital signal processing DSP circuit as claimed in claim 1, wherein, described observation circuit is a watchdog circuit, described look-at-me is the spill over of watchdog circuit.
3. many kernels digital signal processing DSP circuit as claimed in claim 1, wherein, the number of described a plurality of DSP kernels is more than or equal to 3.
4. as any described many kernels digital signal processing DSP circuit among the claim 1-3, wherein, described high-speed interface comprises Fast Ethernet or HSSI High-Speed Serial Interface.
5. as any described many kernels digital signal processing DSP circuit among the claim 1-3, wherein, described wrong contextual information comprise the vestige message that is trapped in the internal memory, internal register pointer, the numbering of the DSP kernel of makeing mistakes or when the numbering of the DSP kernel of pre-treatment.
6. as any described many kernels digital signal processing DSP circuit among the claim 1-3, wherein, described host computer is embedded type CPU or personal computer.
7. method that the mistake in many kernels digital signal processing DSP circuit is handled, described many kernels digital signal processing DSP circuit comprises a plurality of DSP kernels, wherein, described method comprises:
Monitor the running status of a plurality of DSP kernels;
When the operation of DSP kernel makes mistakes, produce look-at-me;
This look-at-me is broadcast to all DSP kernels;
Each this look-at-me of DSP kernel processes, thus the wrong contextual information of the DSP kernel of will makeing mistakes reports host computer.
8. method as claimed in claim 7, wherein, the step of each this look-at-me of DSP kernel processes comprises:
Be self if check current DSP kernel of makeing mistakes, then the wrong contextual information with this DSP kernel reports host computer, otherwise,
Carry out the wait of special time, stand-by period and current DSP kernel are relevant with the distance of makeing mistakes between the DSP kernel;
The wrong contextual information of DSP kernel does not also report host computer if make mistakes, and then collects the wrong contextual information of the DSP kernel between DSP kernel numbering and the current inner numbering of makeing mistakes, and should report host computer by the mistake contextual information.
9. method as claimed in claim 8, wherein, special time and this DSP kernel that each DSP kernel is waited for and the proportional relation of distance between the DSP kernel of makeing mistakes.
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| CN107547292A (en) * | 2016-06-29 | 2018-01-05 | 北京信威通信技术股份有限公司 | A kind of servicing method based on hardware system, system and hardware system |
| CN109240844A (en) * | 2018-08-20 | 2019-01-18 | 成都国科微电子有限公司 | A kind of journal obtaining method and system |
| CN109582483A (en) * | 2017-09-29 | 2019-04-05 | 爱思开海力士有限公司 | Data storage device and its operating method |
| CN109871353A (en) * | 2019-03-26 | 2019-06-11 | 广东高云半导体科技股份有限公司 | Electronic equipment and its FPGA applied to artificial intelligence |
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| CN100340996C (en) * | 2004-03-09 | 2007-10-03 | 华为技术有限公司 | A digit signal processor software debugging information output method |
| CN100367218C (en) * | 2006-08-03 | 2008-02-06 | 迈普（四川）通信技术有限公司 | Multi-kernel parallel first-in first-out queue processing system and method |
| CN101261591A (en) * | 2008-04-28 | 2008-09-10 | 艾诺通信系统（苏州）有限责任公司 | Multi- nuclear DSP system self-adapting task scheduling method |
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Cited By (5)
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| CN107547292A (en) * | 2016-06-29 | 2018-01-05 | 北京信威通信技术股份有限公司 | A kind of servicing method based on hardware system, system and hardware system |
| CN109582483A (en) * | 2017-09-29 | 2019-04-05 | 爱思开海力士有限公司 | Data storage device and its operating method |
| CN109240844A (en) * | 2018-08-20 | 2019-01-18 | 成都国科微电子有限公司 | A kind of journal obtaining method and system |
| CN109240844B (en) * | 2018-08-20 | 2022-03-22 | 成都国科微电子有限公司 | Log obtaining method and system |
| CN109871353A (en) * | 2019-03-26 | 2019-06-11 | 广东高云半导体科技股份有限公司 | Electronic equipment and its FPGA applied to artificial intelligence |
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