CN116719746B - Debugging method, equipment, product to be debugged and computer storage medium - Google Patents
Debugging method, equipment, product to be debugged and computer storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3644—Software debugging by instrumenting at runtime
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/079—Root cause analysis, i.e. error or fault diagnosis
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract
The present disclosure provides a debugging method, device, product to be debugged, and computer storage medium. The debugging method comprises the following steps: setting the functional units of the product to be debugged as a reset unit and a non-reset unit under the condition that the product to be debugged has abnormal functions; resetting the product to be debugged so that the product to be debugged enters a debugging mode; executing a debugging program to debug the functional units of the product to be debugged in sequence; if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained; and performing exception analysis according to the debugging result to obtain the functional unit with abnormal functions. The debugging method is completely controlled by software, does not need participation of hardware equipment, can achieve the purpose of locating the abnormality by modifying the software, and is simple to operate and lower in required cost.
Description
Technical Field
The disclosure relates to the field of debugging technology, and in particular relates to a debugging method, equipment, a product to be debugged and a computer storage medium.
Background
Debugging an electronic product is an important part in the product development process. However, the existing debugging scheme generally needs hardware equipment to participate, so that the operation is complicated and the cost is too high.
Disclosure of Invention
The purpose of the present disclosure is to provide a debugging method, a device, a product to be debugged and a computer storage medium, which can achieve the purpose of locating an abnormality in a software manner without the participation of hardware devices, and has the advantages of simple operation and low cost.
According to one aspect of the present disclosure, there is provided a debugging method, including:
setting the functional units of the product to be debugged as a reset unit and a non-reset unit under the condition that the product to be debugged has abnormal functions;
resetting the product to be debugged so as to enable the product to be debugged to enter a debugging mode;
in the debugging mode, executing a debugging program to debug the functional units of the product to be debugged in sequence;
if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained;
and performing exception analysis according to the debugging result to obtain the functional unit with abnormal functions.
Further, the step of setting the functional unit of the product to be debugged as a reset unit and a non-reset unit includes:
and setting the functional units of the product to be debugged into a reset unit and a non-reset unit based on the reset selection signal and the reset control signal.
Further, the reset selection signal is generated by setting a register in the product to be debugged; the reset control signal is generated by setting an input pin of the product to be debugged.
Further, the step of setting the functional unit of the product to be debugged as the reset unit and the non-reset unit based on the reset selection signal and the reset control signal includes:
setting a reset selection signal and a reset control signal based on a dichotomy or a multi-dichotomy mode to set the functional units of the product to be debugged into a plurality of reset units and a plurality of non-reset units.
Further, the number of the reset selection signals is the same as that of the functional units of the product to be debugged, the reset selection signals and the functional units of the debug product are respectively in one-to-one correspondence, the number of the reset control signals is one, and the reset control signals and each functional unit of the debug product are corresponding;
the step of setting the reset selection signal and the reset control signal based on the dichotomy comprises:
setting the reset control signal to 1;
setting half of reset selection signals to 0 and the other half of reset selection signals to 1 based on a dichotomy mode;
setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal;
the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
Further, the number of the reset selection signals is the same as that of the functional units of the product to be debugged, the reset selection signals and the functional units of the debug product are respectively in one-to-one correspondence, the number of the reset control signals is one, and the reset control signals and each functional unit of the debug product are corresponding;
the step of setting the reset selection signal and the reset control signal based on the mode of the multi-division method comprises the following steps:
setting the reset control signal to 1;
based on the mode of the multi-division method, setting a part of reset selection signals to 0 and setting the rest of reset selection signals to 1; the number of the reset selection signals set to 0 is not equal to the number of the reset selection signals set to 1, and the number of the reset selection signals set to 0 and the number of the reset selection signals set to 1 are positive integers larger than 1;
setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal;
the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
Further, the step of setting the functional unit of the product to be debugged as the reset unit and the non-reset unit based on the reset selection signal and the reset control signal includes:
the reset selection signal and the reset control signal are set to set the functional unit of the product to be debugged as one reset unit or one non-reset unit.
Further, the number of the reset selection signals is the same as that of the functional units of the product to be debugged, the reset selection signals and the functional units of the debug product are respectively in one-to-one correspondence, the number of the reset control signals is one, and the reset control signals and each functional unit of the debug product are corresponding;
the step of setting the reset selection signal and the reset control signal to set the functional unit of the product to be debugged as one reset unit or one non-reset unit comprises:
setting the reset control signal to 1;
setting one of the reset select signals to 0 and the rest reset select signals to 1; or one of the reset select signals is set to 1, and the rest reset select signals are set to 0;
setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal;
the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
Further, the step of performing exception analysis according to the debug result to obtain a functional unit with abnormal functions includes:
if the debugging result is not abnormal and the number of the reset units is one, determining that the reset units are functional units with abnormal functions;
setting one or more of the reset units as non-reset units and resetting the product to be debugged if the debugging result is abnormal and the number of the reset units is multiple, enabling the product to be debugged to enter a debugging mode, responding the debugging program by the non-reset units to debug in the debugging mode to obtain a debugging result, carrying out abnormality analysis based on the debugging result, determining functional units with abnormal functions based on the abnormal debugging result if the debugging result is abnormal, and repeating the operation until the functional units with abnormal functions are determined if the debugging result is not abnormal;
if the debugging result is abnormal, determining the non-reset unit corresponding to the abnormal debugging result as the functional unit with abnormal functions.
According to another aspect of the present disclosure, there is provided a debugging device including:
the reset dividing module is used for setting the functional units of the product to be debugged as a reset unit and a non-reset unit under the condition that the product to be debugged has abnormal functions;
the reset module is used for resetting the product to be debugged so as to enable the product to be debugged to enter a debugging mode;
the debugging module is used for executing a debugging program to debug the functional units of the product to be debugged in sequence in the debugging mode; if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained;
and the abnormality analysis module is used for carrying out abnormality analysis according to the debugging result to obtain a functional unit with abnormal functions.
According to another aspect of the present disclosure, there is provided an article to be debugged, comprising a memory for storing one or more programs, and one or more processors; the method of any of the embodiments described above is implemented when one or more programs are executed by one or more processors.
According to another aspect of the present disclosure, there is provided a computer program stored thereon, which, when executed by a processor, implements the steps of the method according to any of the embodiments described above.
Drawings
FIG. 1 is a schematic flow chart of a debugging method according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of an extended circuit structure according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a product to be debugged according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a debugging device according to an embodiment of the present disclosure.
Detailed Description
Before describing embodiments of the present disclosure, it should be noted that:
some embodiments of the disclosure are described as process flows, in which the various operational steps of the flows may be numbered sequentially, but may be performed in parallel, concurrently, or simultaneously.
The terms "first," "second," and the like may be used in embodiments of the present disclosure to describe various features, but these features should not be limited by these terms. These terms are only used to distinguish one feature from another.
The term "and/or," "and/or" may be used in embodiments of the present disclosure to include any and all combinations of one or more of the associated features listed.
It will be understood that when two elements are described in a connected or communicating relationship, unless a direct connection or direct communication between the two elements is explicitly stated, connection or communication between the two elements may be understood as direct connection or communication, as well as indirect connection or communication via intermediate elements.
In order to make the technical solutions and advantages of the embodiments of the present disclosure more apparent, the following detailed description of exemplary embodiments of the present disclosure is provided in conjunction with the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present disclosure, not all embodiments of which are exhaustive. It should be noted that, without conflict, the embodiments of the present disclosure and features of the embodiments may be combined with each other.
The purpose of the present disclosure is to provide a debugging scheme for a product to be debugged, which aims to execute a debugging program to debug functional units of the product to be debugged in sequence when the product to be debugged has abnormal functions and the product to be debugged enters a debugging mode, and if the functional units are reset units, the reset units are in a reset state and do not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation to obtain a debugging result of the non-reset unit, and the abnormal positioning is realized based on the debugging result. The scheme of the method is completely realized by software, hardware equipment is not needed to participate, the operation is simple, and the required cost is lower.
The product to be debugged refers to a product in which the reset of a plurality of functional units is separated, and the product to be debugged can be a chip-level product or an electronic equipment-level product. In some use cases, the Chip-level product may be a System On Chip (SOC), a graphics processor (graphics processing unit, GPU), etc.; in some use cases, the electronic device-level product may be a smart phone, tablet, VR device, personal computer, game console, or the like.
One embodiment of the present disclosure provides a debugging method, as shown in fig. 1, including the steps of:
step 101, setting a functional unit of a product to be debugged as a reset unit and a non-reset unit under the condition that the product to be debugged has abnormal functions;
102, resetting a product to be debugged so that the product to be debugged enters a debugging mode;
step 103, executing a debugging program to debug the functional units of the product to be debugged in sequence in a debugging mode;
104, if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained;
and 105, performing exception analysis according to the debugging result to obtain a functional unit with abnormal functions.
The reset unit is a functional unit which can be reset, and the non-reset unit is a functional unit which cannot be reset. The reset unit is a functional unit which can normally reset when the product to be debugged is reset; the non-reset unit is a functional unit which protects the reset signal of the non-reset unit from resetting when the product to be debugged is reset. The functional unit may include: debug related circuitry, memory units, power management modules, CPU (Central Processing Unit )/MCU (Micro Control Unit, micro control unit) debug circuitry, bus control modules, and the like.
In the present disclosure, the principle of setting the functional units of the product to be debugged as the reset unit and the non-reset unit is: the functional units of the product to be debugged are set as a reset unit and a non-reset unit based on the reset selection signal and the reset control signal.
Wherein the reset selection signal is generated by setting a register in the product to be debugged; the reset control signal is generated by setting an input pin of the product to be debugged. The reset selection signal is a register signal generated by a register of a product to be debugged, and is generated by setting the register by software; the reset control signal is generated by a certain input pin of the product to be debugged according to the input control signal, and the input pin is a certain GPIO pin of the product to be debugged.
The reset selection signal and the reset control signal of the present disclosure are both controlled by software, which functional units are set as reset units and which functional units are set as non-reset units are flexibly controlled by software. The method is completely controlled by software, does not need participation of hardware equipment, can achieve the purpose of locating the abnormality only by modifying the software, and is simple to operate and lower in cost.
In the present disclosure, setting the functional units of the product to be debugged as the reset unit and the non-reset unit based on the reset selection signal and the reset control signal is implemented by various embodiments, one of which is as follows:
setting a reset selection signal and a reset control signal based on a dichotomy or a multi-dichotomy mode to set the functional units of the product to be debugged into a plurality of reset units and a plurality of non-reset units.
It should be understood that by adopting the dichotomy or the multi-division method, the functional units of the product to be debugged can be divided into a plurality of reset units and a plurality of non-reset units, so that the exception removal of the functional units can be realized at one time, and compared with the one-by-one investigation, the exception can be more quickly positioned, and the efficiency is higher.
The bisection method is understood to mean that the functional unit of the product to be debugged is divided into two parts, one half of which is set as a reset unit and the other half is set as a non-reset unit.
For example, if there are 10 total functional units in the product to be debugged, 5 of the functional units may be set as reset units, and the remaining 5 functional units may be set as non-reset units.
The multiple method may be 3-division, 4-division, 5-division, or the like, and may be selected according to the actual situation, and is not limited thereto.
For example, if the 3-division method is adopted to divide 10 functional units of a product to be debugged, the 10 functional units can be divided into 3 parts, 1/3 of the functional units are set as non-reset units, and the rest 2/3 of the functional units are used as reset units; since there is a case where the division of 10 functional units into 3 divisions may be a decimal case, for this case where the division cannot be made into integer halves, 1/3 of integer 3 may be used as the number of set non-reset units, and the remaining 7 functional units are set as reset units; of course, 1/3 of the whole number 3 may be used as the number of the reset units, and the remaining 7 functional units may be set as non-reset units, which are not limited herein, and may be set according to actual situations. If the method of 5 division is adopted to divide 10 functional units of the product to be debugged, the 10 functional units can be divided into 5 parts, wherein 1/5 of the functional units, namely 2 functional units, are set as non-reset units, and the remaining 4/5 of the functional units, namely 8 functional units, are set as reset units; of course, 1/5 of the functional units can be set as reset units, and the remaining 4/5 of the functional units are set as non-reset units. While the division principle of other multi-division methods can be referred to the division principle of the 3-division method and the 5-division method, and will not be described in detail herein.
In the present disclosure, the division principle of the multi-division method is substantially the same as that of the two-division method, except that the multi-division method is different in the number of reset units and the number of non-reset units into which the functional units of the product to be debugged are divided, and the two-division method is equal in the number of reset units and the number of non-reset units into which the functional units of the product to be debugged are divided.
In the present disclosure, the number of reset selection signals is the same as the number of functional units of a product to be debugged, the reset selection signals and the functional units of the debug product are in one-to-one correspondence, the number of reset control signals is one, and the reset control signals correspond to each functional unit of the debug product.
Based on the mode of dichotomy, the specific principle of setting the reset selection signal and the reset control signal is as follows: setting the reset control signal to 1; setting half of reset selection signals to 0 and the other half of reset selection signals to 1 based on a dichotomy mode; setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal; the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
It should be appreciated that the reset select signal is used to indicate whether a certain functional unit of the product to be debugged is effectively reset when the product to be debugged is reset. When the settable reset selection signal is set to 0, the reset selection signal indicates that the product to be debugged is reset; when the reset selection signal is set to 1, the reset signal of a certain functional unit is protected when the product to be debugged is reset, so that the product can not be reset.
The reset control signal is used for representing the control of realizing reset through the input pin of the product to be debugged; when the reset control signal is set to 0, all functional units of the product to be debugged are not protected, and the whole product to be debugged can be reset; when the reset control signal is set to 1, part of functional units of the product to be debugged are protected and cannot be reset, and the specific functional units are protected and determined by the reset selection signal.
As shown in fig. 2, an extension circuit 210 is an input pin of a product to be debugged, and the extension circuit 210 includes an and gate U1 and an or gate U2. The first input terminal of the and gate U1 is configured to receive the reset selection signal mi_rstn_option, the second input terminal of the and gate U1 is configured to receive the reset control signal reset_mask, the output terminal of the and gate U1 is connected to the first input terminal of the or gate U2, the second input terminal of the or gate U2 is configured to receive the soft reset signal mi_rstn_reg, and the output terminal of the or gate is connected to the i-th functional unit 220.
The soft reset signal mi_rstn_reg is a soft reset signal of a product to be debugged, and the soft reset signal is generated based on reset operation of the product to be debugged; the soft reset signal is 0, which indicates that the product to be debugged is reset, and the product to be debugged is in a reset state; and if the soft reset signal is 1, the product to be debugged is not reset and is in a normal working state. The output of the or gate U2 is 1, which indicates that the functional unit connected to the or gate U2 is in a normal working state; the output of or gate U2 is 0, indicating that the functional unit connected to or gate U2 is in a reset state.
Since the logical function of the or gate U2 is that the output of the or gate U2 is 1 as long as there is one input of 1. So as long as the output of the AND gate U1 is 1, no matter the soft reset signal mi_rstn_reg is 1 and 0, the output of the OR gate U2 is 1, the output of the OR gate U2 is not affected by the soft reset signal mi_rstn_reg, namely, the reset operation of the product to be debugged at the moment cannot affect the functional unit connected with the OR gate U2; since the output of the and gate U1 is 1 in the case where the reset selection signal mi_rstn_option and the reset control signal reset_mask are both 1, the functional unit connected to the or gate U2 is a non-reset unit.
In the case where the reset select signal mi_rstn_option is 0 and the reset control signal reset_mask is 1, the output of the and gate U1 is 0. The output of the OR gate U2 is controlled by a soft reset signal mi_rstn_reg, and under the condition that a product to be debugged performs reset operation, the soft reset signal mi_rstn_reg is 0, the output of the OR gate U2 is 0, and a functional unit connected with the OR gate U2 is reset and is in a reset state; under the condition that the product to be debugged does not carry out reset operation, the soft reset signal mi_rstn_reg is 1, the output of the OR gate U2 is 1, and the functional unit connected with the OR gate U2 is in a normal working state. When the reset selection signal mi_rstn_option is 0 and the reset control signal reset_mask is 1, the corresponding functional unit can be reset normally, so the functional unit is a reset unit.
The number of the extension circuits 210 is the same as the number of the functional units 220 of the product to be debugged, and the extension circuits 210 are arranged in a one-to-one correspondence with the functional units 220. I.e. the i-th expansion circuit 210 is connected to the i-th functional unit 220 for controlling the i-th functional unit 220 to be a reset unit or a non-reset unit.
The extension circuit 210 of the present disclosure is an original design circuit of a product to be debugged, that is, the present disclosure directly adopts the original design circuit of the product to be debugged to control, so as to realize the division of the reset unit and the non-reset unit, without changing the circuit structure of the product to be debugged, only needing to change the software setting parameters, the debugging scheme of the present disclosure can be realized, the operation is simple, and the cost is lower.
Setting the reset unit and the non-reset unit based on a dichotomy, wherein a reset control signal can be set to be 1 through an input pin of a product to be debugged, half of reset selection signals are set to be 0 through a register of the product to be debugged, and the other half of reset selection signals are set to be 1; since the reset control signal is set to 1, which functional units 220 are specifically protected is determined by the reset select signal; when the reset selection signal is set to 1, the reset signal of the functional unit 220 is protected when the product to be debugged is reset or restarted, so that the product to be debugged cannot be reset; the functional unit 220 corresponding to the reset selection signal set to 1 is set as a non-reset unit; the functional unit 220 corresponding to the reset selection signal set to 0 is set as a reset unit.
For example, as shown in fig. 3, the product 200 to be debugged includes 4 functional units 220, namely, a first functional unit 220, a second functional unit 220, a third functional unit 220 and a fourth functional unit 220, and then the number of the extension circuits 210 is correspondingly set to 4, namely, a first extension circuit 210, a second extension circuit 210, a third extension circuit 210 and a fourth extension circuit 210, wherein the first extension circuit 210 is correspondingly connected with the first functional unit 220, the second extension circuit 210 is correspondingly connected with the second functional unit 220, the third extension circuit 210 is correspondingly connected with the third functional unit 220, and the fourth extension circuit 210 is correspondingly connected with the fourth functional unit 220. The reset selection signals are correspondingly set to 4, namely, a first reset selection signal m1_rstn_option, a second reset selection signal m2_rstn_option, a third reset selection signal m3_rstn_option and a fourth reset selection signal m4_rstn_option, wherein the first reset selection signal m1_rstn_option is input to the AND gate U1 of the first expansion circuit 210, the second reset selection signal m2_rstn_option is input to the AND gate U1 of the second expansion circuit 210, the third reset selection signal m3_rstn_option is input to the AND gate U1 of the third expansion circuit 210, and the fourth reset selection signal m4_rstn_option is input to the AND gate U1 of the fourth expansion circuit 210. The reset control signal reset_mask is input to the and gate U1 of the first expansion circuit 210, the and gate U1 of the second expansion circuit 210, the and gate U1 of the third expansion circuit 210, and the and gate U1 of the fourth expansion circuit 210.
If the first and second functional units 220 and 220 are to be protected from being reset, the reset control signal reset_mask is set to 1 through an input pin of a product to be debugged, the first and second reset selection signals m1_rstn_option and m2_rstn_option are set to 1 through a register of the product to be debugged, the third and fourth reset selection signals m3_rstn_option and m4_rstn_option are set to 0, and the first and second functional units 220 and 220 are set to non-reset units, and the third and fourth functional units 220 and 220 are set to reset units.
Based on the mode of the multi-division method, the specific principle of setting the reset selection signal and the reset control signal is as follows: setting the reset control signal to 1; based on the mode of the multi-division method, setting a part of reset selection signals to 0 and setting the rest of reset selection signals to 1; the number of the reset selection signals set to 0 is not equal to the number of the reset selection signals set to 1, and the number of the reset selection signals set to 0 and the number of the reset selection signals set to 1 are positive integers larger than 1; setting the functional unit 220 corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal; the functional unit 220 corresponding to the reset selection signal set to 0 is set as a reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
Since the implementation principle of the multi-division method is basically the same as that of the dichotomy, the difference is that the multi-division method divides the functional units 220 of the product to be debugged into the reset units and the non-reset units with different numbers, and the dichotomy divides the functional units 220 of the product to be debugged into the reset units and the non-reset units with the same numbers, the implementation principle of the dichotomy can be referred to, and will not be described again here.
In the present disclosure, another embodiment of setting the functional units of the product to be debugged as the reset unit and the non-reset unit based on the reset selection signal and the reset control signal is as follows:
the reset selection signal and the reset control signal are set to set the functional unit of the product to be debugged as one reset unit or one non-reset unit.
It should be understood that in the case where it can be estimated which functional unit is abnormal based on experience or the occurrence of an abnormality in the product to be debugged, the functional unit may be set as a reset unit or a non-reset unit only, whereby the previous inference is proved, and the abnormality can be located quickly.
For example, the product to be debugged includes 10 functional units, and coarse positioning is a problem of the first functional unit, then the first functional unit is set as a reset unit, and the second functional unit to the tenth functional unit are set as non-reset units. Or the first functional unit is set as a non-reset unit and the second to tenth functional units are set as reset units.
If it is unclear which functional unit of the product to be debugged has a problem, the abnormality detection of a plurality of functional units is performed at a time by adopting the dichotomy or multi-dichotomy method, so that the abnormality positioning efficiency is higher.
The specific principle of setting the reset selection signal and the reset control signal to set the functional unit of the product to be debugged as a reset unit or a non-reset unit is as follows: setting the reset control signal to 1; setting one of the reset select signals to 0 and the rest reset select signals to 1; or one of the reset select signals is set to 1, and the rest reset select signals are set to 0; setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal; the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
That is, the setting principle of the reset unit and the non-reset unit in this embodiment is basically the same as that of the dichotomy and the multi-division method, except that the number of the reset unit and the non-reset unit is different. The specific arrangement principle of the reset unit and the non-reset unit will not be described here again, and reference may be made to the arrangement principle of the dichotomy.
In the present disclosure, after setting the reset unit and the non-reset unit, the debugging program may be entered through the breakpoint set in advance, so as to implement the debugging function. After entering the debugging program, executing the debugging program distributed execution program, and for the reset unit, as the reset unit is in a reset state, the debugging program cannot be responded, and the debugging test can be directly skipped; for the non-reset units, because the non-reset units are in a normal working state, debugging tests are performed in response to the debugging program, corresponding debugging results are obtained for each non-reset unit, and the debugging results are stored in a memory of a product to be debugged. When exception analysis is required, the debug result can be read from the memory by debug module (debug module). And analyzing the debugging result to obtain the functional unit with abnormal functions.
A debugger may be understood as an operating program that performs a certain function. The non-reset unit responds to the debugging program to carry out debugging test, and the obtained debugging result can be understood as that the non-reset unit responds to the debugging program to execute a certain functional operation, and the result of whether the functional operation is successfully executed is obtained; if the result indicates that the function operation is successfully executed, the debug result is indicated to have no abnormality; if the result indicates that the function operation is not successfully executed or that the function operation is hang, the debugging result is abnormal. For example, if the non-reset unit is a low power consumption management module, the low power consumption management module responds to the debug program to realize the function of entering low power consumption and obtain the result of whether the low power consumption is successfully entered; if the low power consumption cannot be entered or the hang condition occurs when the low power consumption is entered, the debugging result is abnormal; if the low power consumption can be normally entered, the debugging result is indicated to be abnormal.
In the present disclosure, an anomaly analysis is performed according to a debug result, and there are various conclusions, the first conclusion is: if the debugging result is not abnormal and the number of the reset units is one, determining that the reset units are functional units with abnormal functions.
The second conclusion is: if the debugging result is abnormal, and the number of the reset units is multiple, setting one or more of the reset units as non-reset units, and resetting the product to be debugged, so that the product to be debugged enters a debugging mode, responding to a debugging program by the non-reset units in the debugging mode to obtain the debugging result, carrying out exception analysis based on the debugging result, determining the functional unit with abnormal function based on the abnormal debugging result if the debugging result is abnormal, and repeating the operation until the functional unit with abnormal function is determined if the debugging result is not abnormal.
The third conclusion is: if the debugging result is abnormal, determining the non-reset unit corresponding to the abnormal debugging result as the functional unit with abnormal functions.
It should be understood that after setting the reset unit and the non-reset unit based on the dichotomy or the multi-dichotomy, the second conclusion or the third conclusion exists in the debug result obtained by performing the reset debug operation. After a plurality of reset units and non-reset units are obtained based on a dichotomy or a multi-dichotomy, restarting the product to be debugged to reset the product to be debugged, if the restarted product to be debugged can normally work (namely, is a second type of abnormal analysis conclusion), the abnormal state exists in the reset units, the non-reset units are free of problems, and the non-reset units are free of problems, so that the abnormal positioning efficiency is higher; if the restarted product to be debugged cannot work normally (namely, the third exception analysis conclusion) shows that the exception exists in the plurality of non-reset units, whether the exception exists in the plurality of reset units is determined, which non-reset units are abnormal functional units can be determined according to the debugging result of the non-reset units, the plurality of reset units are further subdivided, part of reset units in the plurality of reset units are set as non-reset units, and the abnormality judgment is carried out on the reset units and the non-reset units after the re-division, and so on until all the functional units are inspected.
After the functional unit of the product to be debugged is set as a reset unit or a non-reset unit, the first conclusion or the third conclusion exists in the debugging result obtained by performing the reset debugging operation. If the suspected abnormal functional unit is set as a reset unit, and the other functional units are set as non-reset units, resetting operation is performed on the product to be debugged, and if the product to be debugged can work normally (namely, the first abnormal analysis conclusion), the reset unit can be proved to be the abnormal functional unit. If the suspected abnormal functional unit is set as a non-reset unit, and the other functional units are set as reset units, resetting operation is carried out on the product to be debugged, and if the product to be debugged cannot work normally (namely, the third abnormal analysis conclusion), the non-reset unit can prove to be abnormal.
It should be understood that the debug result exception in the third conclusion of the present disclosure may be the debug result exception of one non-reset unit, or may be the debug result exception of a plurality of non-reset units. Since the debuggers executed by the different non-reset units are different, that is, the debug functions to be realized by the different non-reset units during debugging are different, the debug results of the different non-reset units are different, so that it can be determined which specific non-reset unit has an abnormality according to the debug results of the different non-reset units.
Based on the same inventive concept, the embodiments of the present disclosure also provide a debugging apparatus 300, as shown in fig. 4, including a reset dividing module 310, a reset module 320, a debugging module 330, and an anomaly analysis module 340.
The reset dividing module 310 is configured to set the functional units of the product to be debugged as a reset unit and a non-reset unit in case that the product to be debugged has a functional abnormality.
It should be appreciated that the reset partition module 310 is configured to perform the contents of step 101 described above.
The reset module 320 is configured to perform a reset operation on the product to be debugged, so that the product to be debugged enters a debug mode.
It should be appreciated that the reset module 320 is configured to perform the contents of step 102 described above.
The debugging module 330 is used for executing a debugging program to debug the functional units of the product to be debugged in sequence in a debugging mode; if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained.
It should be appreciated that debug module 330 is configured to perform the contents of steps 103 and 104 described above.
The exception analysis module 340 is configured to perform exception analysis according to the debug result, so as to obtain a functional unit with abnormal functions.
It should be appreciated that anomaly analysis module 340 is configured to perform the contents of step 105 described above.
Based on the same inventive concept, the embodiments of the present disclosure further provide a product to be debugged, including a memory, and one or more processors, the memory being configured to store one or more programs; the one or more programs, when executed by the one or more processors, implement the debugging method of any embodiment described above.
Based on the same inventive concept, the embodiments of the present disclosure further provide a computer storage medium, which when executed by a processor, implements the steps of the method described in any of the above embodiments.
While the preferred embodiments of the present disclosure have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the disclosure.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present disclosure without departing from the spirit or scope of the disclosure. Thus, the present disclosure is intended to include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (11)
1. A method of debugging, comprising:
setting the functional units of the product to be debugged as a reset unit and a non-reset unit under the condition that the product to be debugged has abnormal functions;
resetting the product to be debugged so as to enable the product to be debugged to enter a debugging mode;
in the debugging mode, executing a debugging program to debug the functional units of the product to be debugged in sequence;
if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained;
if the debugging result is not abnormal and the number of the reset units is one, determining that the reset units are functional units with abnormal functions;
setting one or more of the reset units as non-reset units and resetting the product to be debugged if the debugging result is abnormal and the number of the reset units is multiple, enabling the product to be debugged to enter a debugging mode, responding the debugging program by the non-reset units to debug in the debugging mode to obtain a debugging result, carrying out abnormality analysis based on the debugging result, determining functional units with abnormal functions based on the abnormal debugging result if the debugging result is abnormal, and repeating the operation until the functional units with abnormal functions are determined if the debugging result is not abnormal;
and if the debugging result is abnormal, determining a non-reset unit corresponding to the abnormal debugging result as a functional unit with abnormal functions.
2. The debugging method according to claim 1, wherein the step of setting the functional unit of the product to be debugged as a reset unit and a non-reset unit comprises:
and setting the functional units of the product to be debugged into a reset unit and a non-reset unit based on the reset selection signal and the reset control signal.
3. The debugging method according to claim 2, wherein the reset select signal is generated by setting a register in the product to be debugged; the reset control signal is generated by setting an input pin of the product to be debugged.
4. The debugging method according to claim 2, wherein the step of setting the functional unit of the product to be debugged as a reset unit and a non-reset unit based on the reset selection signal and the reset control signal comprises:
setting the reset selection signal and the reset control signal based on a dichotomy or a multi-division method to set the functional units of the product to be debugged into a plurality of reset units and a plurality of non-reset units.
5. The debugging method according to claim 4, wherein the number of the reset selection signals is the same as the number of the functional units of the product to be debugged, the reset selection signals and the functional units of the debugging product are respectively in one-to-one correspondence, the number of the reset control signals is one, and the reset control signals correspond to each functional unit of the debugging product;
the step of setting the reset selection signal and the reset control signal based on the dichotomy method includes:
setting the reset control signal to 1;
setting half of reset selection signals to 0 and the other half of reset selection signals to 1 based on a dichotomy mode;
setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal;
the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
6. The debugging method according to claim 4, wherein the number of the reset selection signals is the same as the number of the functional units of the product to be debugged, the reset selection signals and the functional units of the debugging product are respectively in one-to-one correspondence, the number of the reset control signals is one, and the reset control signals correspond to each functional unit of the debugging product;
the step of setting the reset selection signal and the reset control signal based on the multi-division method comprises the following steps:
setting the reset control signal to 1;
based on the mode of the multi-division method, setting a part of reset selection signals to 0 and setting the rest of reset selection signals to 1; the number of the reset selection signals set to 0 is not equal to the number of the reset selection signals set to 1, and the number of the reset selection signals set to 0 and the number of the reset selection signals set to 1 are positive integers larger than 1;
setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal;
the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
7. The debugging method according to claim 2, wherein the step of setting the functional unit of the product to be debugged as a reset unit and a non-reset unit based on the reset selection signal and the reset control signal comprises:
setting the reset selection signal and the reset control signal to set the functional unit of the product to be debugged as a reset unit or a non-reset unit.
8. The debugging method according to claim 7, wherein the number of the reset selection signals is the same as the number of the functional units of the product to be debugged, the reset selection signals and the functional units of the debugging product are respectively in one-to-one correspondence, the number of the reset control signals is one, and the reset control signals correspond to each functional unit of the debugging product;
the step of setting the reset selection signal and the reset control signal to set the functional unit of the product to be debugged as a reset unit or a non-reset unit includes:
setting the reset control signal to 1;
setting one of the reset select signals to 0 and the rest reset select signals to 1; or one of the reset select signals is set to 1, and the rest reset select signals are set to 0;
setting a functional unit corresponding to the reset selection signal set to 1 as a non-reset unit based on the reset selection signal set to 1 and the reset control signal;
the functional unit corresponding to the reset selection signal set to 0 is set as the reset unit based on the reset selection signal set to 0 and the reset control signal set to 1.
9. A debugging device, comprising:
the reset dividing module is used for setting the functional units of the product to be debugged as a reset unit and a non-reset unit under the condition that the product to be debugged has abnormal functions;
the reset module is used for resetting the product to be debugged so as to enable the product to be debugged to enter a debugging mode;
the debugging module is used for executing a debugging program to debug the functional units of the product to be debugged in sequence in the debugging mode; if the functional unit is a reset unit, the reset unit is in a reset state and does not respond to the debugging program; if the functional unit is a non-reset unit, the non-reset unit responds to the debugging program to carry out debugging operation, and a debugging result of the non-reset unit is obtained;
the abnormality analysis module is used for determining that the reset unit is a functional unit with abnormal functions if the debugging result is abnormal and the number of the reset units is one; setting one or more of the reset units as non-reset units and resetting the product to be debugged if the debugging result is abnormal and the number of the reset units is multiple, enabling the product to be debugged to enter a debugging mode, responding the debugging program by the non-reset units to debug in the debugging mode to obtain a debugging result, carrying out abnormality analysis based on the debugging result, determining functional units with abnormal functions based on the abnormal debugging result if the debugging result is abnormal, and repeating the operation until the functional units with abnormal functions are determined if the debugging result is not abnormal; and if the debugging result is abnormal, determining a non-reset unit corresponding to the abnormal debugging result as a functional unit with abnormal functions.
10. An article of manufacture to be debugged, comprising a memory, and one or more processors, the memory to store one or more programs; the one or more programs, when executed by the one or more processors, implement the method of any of claims 1-8.
11. A computer storage medium, characterized in that it has stored thereon a computer program which, when executed by a processor, implements the steps of the method according to any of claims 1 to 8.
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