CN102103335B

CN102103335B - Method for inspecting wafer alignment

Info

Publication number: CN102103335B
Application number: CN200910261621A
Authority: CN
Inventors: 何如兵; 陈鹏; 吴广州; 张聪
Original assignee: Hejian Technology Suzhou Co Ltd
Current assignee: Warship chip manufacturing (Suzhou) Limited by Share Ltd
Priority date: 2009-12-18
Filing date: 2009-12-18
Publication date: 2012-10-10
Anticipated expiration: 2029-12-18
Also published as: CN102103335A

Abstract

The invention provides a method for inspecting wafer alignment. On the basis that the normal wafer is aligned with as the standard, the graphic information of the wafer is stored in a machine, one or more inspection points are selected on the wafer and a program is established in the machine, and the alignment degree of the detected wafer can be determined simply and accurately according to the graph of the detected wafer observed in an ocular lens on the inspection point. The capacity of judging the poor alignment with the wafer at an early stage in the actual production process can be improved.

Description

A kind of method of checking wafer aligned

Technical field

The present invention relates to integrated circuit and make the technology that photoetching is carried out to wafer in the field, particularly relate to a kind of method of checking wafer aligned.

Background technology

Make the field at integrated circuit, need aim at wafer.Being everlasting at present forms flat limit (flat) or v-notch (notch) on the wafer, is used as the foundation of wafer aligned.In manufacture process, the exposure to wafer for the first time is even more important.Owing to do not have preceding layer pattern, so litho machine can only be aimed at flat limit or v-notch when exposing to the sun the ground floor figure.If the ability of litho machine alignment wafer is bad, make that the wafer anglec of rotation is excessive, just to causing the deviation of exposure.

Existing wafer aligned process is as shown in Figure 1, for the aligning of ground floor, aims in advance with Ping Bian or otch, then to its exposure (exposure).Before having in the subsequent alignment of layer pattern; At first also adopt flat limit or otch to aim in advance, the alignment mark (mark) of layer pattern before the search carries out full wafer property aligning (g-EGA then; Globa-Enhanced Global Alignment) after, exposure forms next figure.

Leica-INS3000 board to use at present often is example, and the figure of exposure formation is shown in Fig. 2 A during wafer aligned, and the figure that forms during misregistration is shown in Fig. 2 B.If adopt the wafer of the misregistration among Fig. 2 B to carry out follow-up processing procedure, if serve as according to on time with the v-notch in scheme again, then can make and afterwards can't aim between the level figure and ground floor figure, and influence the yield of wafer.

The figure that the figure that exposure formed when Fig. 3 A was Leica-INS300 board wafer aligned, Fig. 3 B form during for misregistration.The Leica-INS300 board is when wafer aligned is bad, and its exposure figure has corresponding skew, equally also can cause between back level figure and the ground floor figure and can't aim at.

Therefore, for fear of because of the bad influence that yield is produced of wafer aligned, be necessary to test through accuracy to wafer aligned.

Summary of the invention

The object of the present invention is to provide a kind of method of checking wafer aligned, this method can be simply and is accurately checked the degree of wafer aligned.

The present invention checks the method for wafer aligned, it is characterized in that comprising:

Step 1: to aim at normal wafer is standard, and the graphical information of this wafer of storage is chosen one or more check points and creation facilities program (CFP) in board on this wafer in board;

Step 2: at the figure of check point, confirm the degree of registration of tested wafer according to observed tested wafer in eyepiece.

Preferred as technique scheme, said check point includes first check point and second check point.

Preferred as technique scheme, said first check point is arranged on ten o'clock of wafer direction, and said second check point is arranged on wafer direction on two.

Preferred as technique scheme, said check point is cross.

Preferred as technique scheme, the degree of registration of said definite wafer is specially: under eyepiece, observing crossly, can both observe cross over halfly as if two check points, then is alignment wafer; If there have at least one check point not observe to be cross over half, then is the misregistration wafer.

Preferred as technique scheme, the observation multiplying power of said eyepiece is 500 times.

Preferred as technique scheme, said board is the Leica-INS300 board.

The present invention is a standard to aim at normal wafer, through selecting the mode of several check points, can simply and preparatively confirm the alignment case of tested wafer.Thereby can in actual production process, improve the bad early stage judgement of wafer aligned, for subsequent technique provides favourable basis.

Description of drawings

Fig. 1 is the process flow diagram of alignment wafer in the prior art;

Fig. 2 A and Fig. 2 B are respectively the wafer map of in the Leica-INS3000 board, aiming at normal and misregistration;

Fig. 3 A and Fig. 3 B are respectively the wafer map of in the Leica-INS300 board, aiming at normal and misregistration;

Fig. 4 is one embodiment of the present invention check point desired location figure;

Fig. 5 A and Fig. 5 B are that the eyepiece of the misregistration wafer of sequence number 9 is observed synoptic diagram;

Fig. 6 A and Fig. 6 B are that the eyepiece of the misregistration wafer of sequence number 10 is observed synoptic diagram;

Fig. 7 A and Fig. 7 B are that the eyepiece of the aligning normal wafer of sequence number A is observed synoptic diagram;

Fig. 8 A and Fig. 8 B are that the eyepiece of the aligning normal wafer of sequence number B is observed synoptic diagram.

Embodiment

Below in conjunction with accompanying drawing, specific embodiments of the invention is done further to specify.For the person of ordinary skill in the field, from detailed description of the invention, above-mentioned and other purposes of the present invention, feature and advantage will be obvious.

The method of preferred embodiment of the present invention check wafer aligned is at first found out and is aimed at normal wafer, and the graphical information of this wafer is stored, and is about to original PRODUCT-ADI-ALL program and saves as PRODUCT-ADI-FIRST.In wafer, choose simultaneously one or more check points.As preferably; First check point 1 of present embodiment is chosen at ten o'clock of wafer direction, chooses a complete zone in this direction and sets up an office (Shot), and second check point 2 is chosen and the corresponding position of first check point, 1 parallel direction; Promptly, as shown in Figure 4 in wafer direction on two.Those skilled in the art can also choose other possible check point arbitrarily according to the needs of using, and the present invention is not limited to this.

Behind the selected check point, correspondingly set up the program of board, promptly in PRODUCT-ADI-FIRST, increase by 2 check points.Preferably to set up the position be the cross on model next door to check point in the present embodiment, promptly cross check point.When setting up cross, can define the cross center with the 4th multiplying power 500 times (500 *) of Leica-INS300 board.Objective angular field's radius is 250 μ m under this multiplying power, and hunting zone+/-300 μ m matching degrees of layer pattern are the highest before aiming at litho machine.Certainly the selection of multiplying power is just as best preferred embodiment here, and those skilled in the art also can select other possible multiplying power, and the present invention is not limited to this.

After the program foundation completion to board, just can carry out the check of wafer aligned degree.Tested wafer is placed board, under eyepiece, observe the figure of the check point position of choosing.In the present embodiment, observe with the 4th multiplying power and check.Cross check point with present embodiment is an example, and its determination methods will be described below.

The misregistration wafer

If it is cross over half to have at least a check point not observe among first check point of choosing 1 and second check point 2, then be judged as the misregistration wafer.Specifically possibly include 12 kinds of situation shown in the table 1; Wherein " all " refer in eyepiece, to observe whole cross; " greater than 1/2 " refers to observe figure over half, and " less than 1/2 " refers to not observe the cross of half, and " nothing " is meant and can not observes any figure.

Sequence number	First check point	Second check point
			1 2 3 4 5 6 7 8 9 10 11 12	Do not have do not have less than 1/2 less than 1/2 less than 1/2 less than 1/2 all greater than 1/2 greater than 1/2	Nothing does not all have less than 1/2 nothing less than 1/2 greater than 1/2 less than/2 greater than 1/2 whole nothings less than 1/2

Table 1

Wherein, Eyepiece is observed figure schematically shown in Fig. 5 A and Fig. 5 B during sequence number 9; Left figure (being Fig. 5 A) is the figure of first check point, 1 position, and right figure (being Fig. 5 B) is the figure of second check point, 2 positions, and eyepiece is observed figure schematically shown in Fig. 6 A and Fig. 6 B during sequence number 10.

Normal wafer

If among first check point of choosing 1 and second check point 2, can both see over half crossly, then confirm as normal wafer.Specifically possibly comprise four kinds of situation shown in the table 2.

Sequence number	First check point	Second check point
			A B C D	All greater than 1/2 greater than 1/2	All whole greater than 1/2 greater than 1/2

Table 2

Wherein, eyepiece is observed figure schematically shown in Fig. 7 A and 7B during sequence number A, and eyepiece observation figure is schematically shown in Fig. 8 A and 8B during sequence number B.

Certainly; The present invention can take to set the mode of more check point equally; More combination will appear in such figure of under eyepiece, observing; But should follow a principle generally, promptly observed figure should be over half under the standard wafer observation condition, otherwise this tested wafer is exactly the misregistration wafer.

Can know that from top explanation the present invention is a standard to aim at normal wafer,, can simply and preparatively confirm the alignment case of tested wafer through selecting the mode of several check points to embodiment.Can in actual production process, improve the bad early stage judgement of wafer aligned, for subsequent technique provides favourable basis.Therefore, advantage of the present invention is conspicuous.

Be to be understood that; Though the present invention clearly demonstrates through above embodiment and accompanying drawing thereof; Yet under the situation that does not deviate from spirit of the present invention and essence thereof; The person of ordinary skill in the field works as can make various corresponding variations and correction according to the present invention, but these corresponding variations and correction all should belong to the protection domain of claim of the present invention.

Claims

1. method of checking wafer aligned is characterized in that comprising:

Step 1: to aim at normal wafer is standard, and the graphical information of this wafer of storage is chosen a plurality of check points and creation facilities program (CFP) in board on this wafer in board; Said check point is cross;

Step 2: the ratio that accounts for the check point figure according to observed tested wafer in eyepiece at the figure of check point; Confirm the degree of registration of tested wafer: under eyepiece, observe cross; If two check points can both be observed cross over half, then are alignment wafer; If there have at least one check point not observe to be cross over half, then is the misregistration wafer.

2. the method for check wafer aligned as claimed in claim 1 is characterized in that, said check point includes first check point and second check point.

3. the method for check wafer aligned as claimed in claim 2 is characterized in that, said first check point is arranged on ten o'clock of wafer direction, and said second check point is arranged on wafer direction on two.

4. the method for check wafer aligned as claimed in claim 1 is characterized in that, the observation multiplying power of said eyepiece is 500 times.

5. the method for check wafer aligned as claimed in claim 4 is characterized in that, said board is the Leica-INS300 board.