CN102087967A - Method for effectively modulating TiNx metal gate work function - Google Patents
Method for effectively modulating TiNx metal gate work function Download PDFInfo
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- CN102087967A CN102087967A CN2009102000081A CN200910200008A CN102087967A CN 102087967 A CN102087967 A CN 102087967A CN 2009102000081 A CN2009102000081 A CN 2009102000081A CN 200910200008 A CN200910200008 A CN 200910200008A CN 102087967 A CN102087967 A CN 102087967A
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- metal gate
- work function
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Abstract
The invention belongs to the technical field of microelectronics and relates to a method for effectively modulating a TiNx metal gate work function. The method comprises the following steps of: photoetching a material on which a gate dielectric is formed by using a positive photoresist, forming a pattern with a certain area; taking TiNx which is deposited by a certain thickness as a grid, and depositing Al with a certain thickness on a TiNx film or obtaining a AlxTiyN1-x-y alloy compound metal gate by a method for cosputtering under the nitrogen-containing atmosphere by directly using a titanium target or an aluminum target; performing liftoff treatment on the material after all films are finished; forming an Al/TiNx/gate dielectric layer/substrate Si or an AlxTiyN1-x-y/gate dielectric layer/substrate Si structure with a certain pattern area; and performing rapid thermal annealing on the materials in different times and at different temperatures, wherein an Al/TiNx laminated structure or an AlxTiyN1-x-y compound film structure is changed to a certain extent under the thermal action to make the work function of the grid correspondingly changed. By the method, the TiNx metal gate work function can be effectively modulated by introducing aluminum, and the corresponding Fermi level can be close to the edge of a conduction band of substrate silicon; and the method has the advantage of simple processes.
Description
Technical field
The invention belongs to microelectronics technology, be specifically related to a kind of effective adjusting TiN
xThe method of metal gate work function.This method is incorporated into TiN with metallic material of aluminum by the annealing or the method for cosputtering
xIn the metal gate electrode film, cause TiN
x/ gate medium interfacial characteristics changes, thereby makes TiN
xThe metal gate electrode work function is effectively regulated.
Background technology
In the CMOS integrated circuit technology, along with the requirement grid medium thickness that constantly dwindles of device size constantly reduces, and grid leakage current along with grid medium thickness reduce be index and increase, it is inevitable that this just makes that the use of high K dielectric material becomes.Traditional polygate electrodes substitutes owing to existing compatible problems such as (as fermi level pinnings) to need another kind of novel material with high K medium.For adapting to the demand of following integrated circuit technology development, the employing of metal gate becomes a kind of inevitable.There have been at present a large amount of schemes to be widely studied about the metal gate aspect.
TiN because have lower, the more stable chemical characteristic of resistivity (thermally-stabilised and corrosion stability good), the higher advantages such as (between 4.7eV～5.1eV) of work function is widely studied, and has been verified the material that is well suited for directly being used for doing the PMOS gate electrode.Wish that in CMOS technology this kind material can do the grid of PMOS and NMOS simultaneously, the work function that need consider modulation grid how is toward the skew of substrate silicon conduction band direction, to satisfy the requirement of NMOS to gate electrode.Usually the method for modulation grid work function mainly contains foreign ion injection, alloy technology etc., therefore, needs the relatively low material of a kind of work function to modulate TiN
xThe work function of gate electrode makes its corresponding Fermi level move toward the conduction band limit of substrate Si.Metal A l is simple owing to having lower resistivity and lower work function (4.25eV) and technology, is usually used in as modulation TiN
xTherefore the material of gate electrode work function makes and modulates TiN by aluminium
xThe method of metal gate work function becomes possibility.Present technology is at the good TiN of deposit
xDeposit layer of aluminum again on the metal gate film, Al/TiN after the annealing of observation different temperatures and different time
xThe variation of metal gate stack structure utilizes above-mentioned variation to TiN
xThe modulating action of metal gate electrode work function is regulated gate work-function; Perhaps directly adopt titanium target and aluminium target to obtain Al in the method that contains cosputtering under the nitrogen atmosphere
xTi
yN
1-x-yThe alloy cpd metal gate, added power changes Al on the aluminium target by changing
xTi
yN
1-x-yThe content of aluminium in the alloy cpd film is adjusted to gate work-function in the scope that needs.
Summary of the invention
The objective of the invention is to propose a kind of effective modulation TiN
xThe new method of metal gate work function, this method is incorporated into TiN to aluminium by the method for annealing or cosputtering
xIn the metal gate electrode film, cause TiN
x/ gate medium interfacial characteristics changes, thereby effectively regulates TiN
xThe metal gate electrode work content is counted to the conduction band limit of substrate Si.
Effective modulation TiN of the present invention
xThe method of metal gate work function is characterized in that by the method for thermal annealing or cosputtering aluminium being incorporated into TiN
xIn the film.Particularly, the inventive method comprises: with positive glue material is carried out photoetching behind the gate medium of the desired thickness of having grown on the substrate silicon, after photoetching is intact, at deposit TiN
xWith oxygen gas plasma material is carried out reactive ion etching (RIE) before the film, destroy the residual positive glue counterdie in figure place, afterwards the certain thickness TiN of deposit on the good figure of photoetching
xFilm adopts following method that aluminium is incorporated into TiN then
xIn the film, realize TiN
xEffective adjusting of metal gate work function: the one, at TiN
xThe certain thickness aluminium of deposit again on the film, double-layer films is all after the deposit well, to material remove photoresist (material is placed in the acetone and is also referred to as liftoff with ultrasonic vibration) handle, form Al/TiN
x/ gate dielectric layer/substrate Si structure; The 2nd, directly adopt titanium target and aluminium target to obtain Al in the method that contains cosputtering under the nitrogen atmosphere
xTi
yN
1-x-yThe alloy cpd metal gate forms Al
xTi
yN
1-x-y/ gate dielectric layer/substrate Si structure.Form Al/TiN
xRespectively each group MOS structural material is carried out the annealing of different temperatures different time after/gate dielectric layer/substrate Si structure, observe Al/TiN
xMetal gate stack or Al
xTi
yN
1-x-yThe variation that the compound film structure takes place under the effect of heat is tested the work function of extracting grid by C-V at last.
Concrete operations step of the present invention is as follows:
(1) adopt custom integrated circuit technology to obtain planless gate medium/monocrystalline substrate structure sample;
(2) with positive glue reticle sample is carried out photoetching;
(3) before sample is packed in the pvd chamber body, with the method for reactive ion etching (being RIE) sample is handled with the oxygen film that feels secure, with the residual positive glue in removal graphics field;
(4) method of using PVD deposit TiN successively on the sample of the good figure of photoetching
xFilm, aluminium film form Al/TiN
x/ gate medium/Si substrat structure; Perhaps adopt the method for titanium target and aluminium target cosputtering under nitrogen atmosphere, form Al
xTi
yN
1-x-y/ gate dielectric layer/Si substrat structure;
(5) to the processing of removing photoresist of the sample of good each layer film of deposit, specifically sample is placed in the acetone with ultrasonic wave vibrate (also being liftoff), make positive glue beyond the figure and the metallic film on the positive glue be removed, only keep the metallic film at figure place;
(6) as required each is organized the rapid thermal annealing that sample carries out different time and different temperatures respectively, make the metallic film structure that certain variation take place;
(7) oxide layer is removed with hydrofluoric acid (HF) in the sample back side and handle, use PVD method depositing metal aluminium electrode afterwards,, eliminate the influence of series resistance in the C-V test so that form ohmic contact with the Si substrate;
(8) each group sample is carried out the C-V test, therefrom extract gate work-function.
Description of drawings
Fig. 1 is the Al/TiN that case method of the present invention is made
xGeneralized section before and after/gate medium/Si MOS structure annealing wherein, (a) is sample before the annealing, (b) is annealing back sample; The 1st, gate dielectric layer, 2 is substrate monocrystal silicon.
Fig. 2 is an identical annealing time (1min) in this example, the comparison of different annealing temperature (be respectively unannealed, 550 ℃, 600 ℃, 650 ℃) High Frequency C-V curve.
Fig. 3 is identical annealing temperature in this example (600 ℃), the comparison of different annealing times (being respectively 15s, 1min, 10min) High Frequency C-V curve.
Fig. 4 is the flat band voltage vs equivalent oxide thickness (comparing so that extract gate work-function) of several groups of different annealing conditions samples in this example.
Fig. 5 is the Ti of the method deposit of employing cosputtering
xAl
yN
1-x-yThe comparison of the High Frequency C-V curve of different aluminum target power output in the alloy cpd metal gate.
Further describe the present invention below in conjunction with the drawings and specific embodiments.
Embodiment
Embodiment 1
1, use P type device level substrate Si (100) sheet of standard, resistivity 6～10 Ω cm, impurity concentration is 1.2～2.4E15/cm
3, after standard RCA cleaning, be the native oxide layer that 2% hydrofluoric acid dilute solution is removed silicon chip surface with concentration;
2, utilizing the dry method thermal oxidation is the high-quality silicon dioxide of growth one deck 20nm on the material;
3, with positive glue reticle sample is carried out photoetching, forming area on gate dielectric layer is 1.77 * 10
-4Cm
2Figure;
4, with the method for reactive ion etching (being RIE) sample is handled with the oxygen film that feels secure, to remove the residual positive glue in graphics field, oxygen flow is 20sccm, and power is 75W, and the time is 45s, and air pressure is 4Pa;
5, the method for using PVD deposit 20nmTiN successively on the sample of the good figure of photoetching
xFilm, 30nm aluminium film form Al/TiN
x/ SiO
2/ Si structure, structure such as Fig. 1 (a);
6, to the processing of removing photoresist of the sample of good each layer film of deposit, specifically sample is placed in the acetone with ultrasonic wave vibrate (also being liftoff), make positive glue beyond the figure and the metallic film on the positive glue be removed, only keep the metallic film at figure place;
7, each group sample is carried out different time respectively and (be respectively 15s, 1min, 10min, temperature all is fixed on 600 ℃) and (550 ℃, 600 ℃, 650 ℃ of different temperatures, time all is 1min) rapid thermal annealing, make the metallic film structure that certain variation, structure such as Fig. 1 (b) take place;
8, afterwards sample is carried out reducibility gas annealing, the influence that gate work-function is changed with the variation of eliminating interface damage and interfacial state, wherein N
2/ H
2Than being 9: 1,400 ℃ of annealing 30min.
9, oxide layer is removed with hydrofluoric acid (HF) in the sample back side and handle, do back electrode and substrate Si formation ohmic contact with PVD method deposit 300nm aluminium afterwards, to eliminate the influence of series resistance in the C-V test;
10, with the Agilent4294A electric impedance analyzer each group sample is carried out the C-V test, therefrom extracted the gate work-function of respectively organizing sample.
11, compare aluminium to TiN by following dual mode
xThe modulating action of metal gate work function:
1. flat band voltage relatively
Fig. 2 demonstrates without the high annealing sample and at identical annealing time (1min) and under different annealing temperature (being respectively 550 ℃, 600 ℃, the 650 ℃) condition, each organizes the comparison of MOS sample high frequency (700kHz) C-V curve.Show among the figure that through behind the high annealing flat band voltage is general toward negative direction drift, along with the increase of annealing temperature, flat band voltage increases gradually toward the drift value of negative direction.
Fig. 3 demonstrates in identical annealing temperature (600 ℃) and under different annealing time (being respectively 15s, 1min, the 10min) condition, the comparison of three groups of sample High Frequency C-V curves.Show the increase along with annealing time among the figure, flat band voltage also increases gradually toward the drift value of negative direction.
Fig. 5 demonstrates the method that adopts cosputtering, along with the difference that adds power on the aluminium target makes Ti
xAl
yN
1-x-yThe difference of aluminium content in the film, and then cause the skew of flat band voltage.Show along with the increase that adds power on the aluminium target, Ti among the figure
xAl
yN
1-x-yThe content of aluminium also increases thereupon in the film, and causes the negative direction drift of flat band voltage, and the big more flat band voltage drift value of power is also big more on the aluminium target.
2. the comparison of gate work-function
According to the mos capacitance model theory, flat band voltage can be expressed as:
Q wherein
fBe oxide layer fixed charge density, W
m, W
sBe respectively grid and sink to the bottom Si work function, ε
OxBe oxide layer relative dielectric constant, ε
oBe permittivity of vacuum, EOT is an equivalent oxide thickness.
Sample among the embodiment is unified the making on eight cun Si sheets of a slice, oxide layer and each layer film thickness process conditions are in full accord, got rid of the influence of oxide layer fixed charge, the variation that demonstrates the metal gate work function is that the difference owing to annealing conditions causes aluminium at TiN
xThe difference of introducing situation in the film causes, and the variation of metal gate work function causes the drift of sample flat band voltage under the different annealing conditions.
Fig. 4 show with unannealed sample relatively, 650 ℃, 1min annealing specimen gate work-function drift value reach-0.28eV, and the sample room work function drift value of the different annealing times of identical annealing temperature reaches-0.25eV; 600 ℃, 10min annealing specimen and unannealed sample work function drift value reach-0.53eV.
Embodiment shows by control annealing temperature and annealing time just can realize that aluminium is to TiN
xEffective adjusting of metal gate work function, and then satisfy the requirement of NMOS to gate work-function.
Claims (6)
1. the effective method of modulation TiNx metal gate work function is characterized in that, aluminium is introduced TiNx metal gate film, make the TiNx/ gate medium at the interface characteristic change, regulate TiNx gate electrode work function.
2. method according to claim 1, it is characterized in that, described aluminium introducing TiNx metal gate film, make the TiNx/ gate medium at the interface characteristic change and handle the back and form and has the Al/TiNx/ gate dielectric layer/substrate Si or the AlxTiyN1-x-y/ gate dielectric layer/substrate Si structure of certain graphics area removing photoresist comprising: AlxTiyN1-x-y alloy cpd metal gate, carry out the annealing of different temperatures and different time then, Al/TiNx laminated construction or AlxTiyN1-x-y compound film structure are changed.
3. method according to claim 2 is characterized in that, described AlxTiyN1-x-y alloy cpd metal gate prepares by following method; The certain thickness aluminium of deposit again on the TiNx of deposit metal gate electrode film perhaps directly adopts titanium target and aluminium target to obtain in the method that is containing cosputtering under the nitrogen atmosphere.
4. according to the method for the described effective modulation TiNx metal gate work function of claim 2, it is characterized in that the described processing of removing photoresist is that material is placed the acetone ultrasonic vibration.
5. according to the method for the described effective modulation TiNx metal gate work function of claim 2, it is characterized in that described annealing temperature is 350 ℃～650 ℃.
6. according to the method for the described effective modulation TiNx metal gate work function of claim 2, it is characterized in that described annealing time is 15s～10min.
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|---|---|---|---|
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094114A (en) * | 2011-10-31 | 2013-05-08 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of transistor |
| CN103545182A (en) * | 2012-07-12 | 2014-01-29 | 中国科学院微电子研究所 | Low work function metal gate formation method |
| CN104347379A (en) * | 2013-07-24 | 2015-02-11 | 爱思开海力士有限公司 | Semiconductor device including multi-layered gate, electronic device including the same, and method for forming the same |
| CN111627817A (en) * | 2019-02-28 | 2020-09-04 | 中芯国际集成电路制造(上海)有限公司 | Transistor structure and forming method thereof |
-
2009
- 2009-12-04 CN CN2009102000081A patent/CN102087967A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094114A (en) * | 2011-10-31 | 2013-05-08 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of transistor |
| CN103545182A (en) * | 2012-07-12 | 2014-01-29 | 中国科学院微电子研究所 | Low work function metal gate formation method |
| CN103545182B (en) * | 2012-07-12 | 2017-03-29 | 中国科学院微电子研究所 | A kind of low work function metal gate forming method |
| CN104347379A (en) * | 2013-07-24 | 2015-02-11 | 爱思开海力士有限公司 | Semiconductor device including multi-layered gate, electronic device including the same, and method for forming the same |
| CN104347379B (en) * | 2013-07-24 | 2018-09-11 | 爱思开海力士有限公司 | Semiconductor devices, electronic device including stacked gate and forming method thereof |
| CN111627817A (en) * | 2019-02-28 | 2020-09-04 | 中芯国际集成电路制造(上海)有限公司 | Transistor structure and forming method thereof |
| CN111627817B (en) * | 2019-02-28 | 2023-10-13 | 中芯国际集成电路制造(上海)有限公司 | Transistor structure and forming method thereof |
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Application publication date: 20110608 |