CN102074342B - Method for precisely making laminated component - Google Patents
Method for precisely making laminated component Download PDFInfo
- Publication number
- CN102074342B CN102074342B CN2010105851401A CN201010585140A CN102074342B CN 102074342 B CN102074342 B CN 102074342B CN 2010105851401 A CN2010105851401 A CN 2010105851401A CN 201010585140 A CN201010585140 A CN 201010585140A CN 102074342 B CN102074342 B CN 102074342B
- Authority
- CN
- China
- Prior art keywords
- dielectric layer
- lamination element
- value
- thickness
- making
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The invention provides a method for precisely making a laminated component, which comprises the following steps: a dielectric layer manufacturing step that at least two types of dielectric layers with electrical parts are manufactured; a pre-manufacturing step that the different types of dielectric layers are arranged in a certain order to manufacture the laminated component; a measuring step that the laminated component is measured to obtain a measuring value, and the measuring value and a preset standard value are compared, if a deviation between the measuring value and the standard value is in a set range, the laminated component is manufactured; otherwise, an adjustment step is executed, i.e., the order of the dielectric layers is adjusted to manufacture another laminated component, and then the measuring step is executed.
Description
Technical field
The present invention relates to a kind of method of accurate making lamination element.
Background technology
Now, the inductance value of the inductance element of making through ceramic green band lamination has bigger deviation with design load.To this, the common way of industry is: the ratio design load of making the inductance value of inductance element is big, reduces the inductance of inductance element through increasing via layer then, thereby reaches near design load.Its manufacturing process can be referring to shown in Figure 2.
Handle like this, although can produce the lamination element that meets certain required precision in the larger context; But, in the process of trial-production, must design the parameter of via layer again; And in original lamination element increase via layer, complex process, efficient are very low; And be difficult to accurately near design load, can waste a lot of ceramic green bands simultaneously as via layer; The loop length of inductance increases, and spent metal material increases.In addition, when the ratio design load that the inductance value of inductance element is done is little, then can not adjust inductance value, thereby cause the waste of inductance element through such scheme.
At present, more and more can not satisfy the requirement on the efficient for increasingly high, the traditional trial-production method that requires that can large batch ofly fast produce high accuracy lamination element.
Summary of the invention
Technical problem to be solved by this invention be propose one can be easy, efficient and the method for manufacturing experimently out the lamination elements such as inductance that meet schedule requirement accurately so that template corresponding is provided for extensive high-precision making lamination element.
To this, the present invention provides a kind of method of accurate making lamination element, comprising:
Dielectric layer making step: make at least two types dielectric layer with electrical appliance part;
Pre-fabricated step: dissimilar said dielectric layers is arranged in sequence, made the lamination element;
Measuring process: measure this lamination element and obtain measured value, this measured value is compared with preset standard value, if the deviation of this measured value and said standard value is then made the lamination element and finished in the scope of setting; Otherwise,
Set-up procedure: adjust the order of said dielectric layer, make another lamination element, carry out said measuring process then.
The different arrangement will cause the change such as the relation between the electric part on the dielectric layer between the different dielectric layers, and then can obtain different from different opering characteristics of electric apparatus such as impedance, inductance value.Adopt technique scheme,, just can change the characteristic electron such as electronic components such as inductance value of the lamination element of trial-production, with the lamination element that obtains to conform to predefined standard value through changing the Rankine-Hugoniot relations between the dissimilar dielectric layers.Compared with prior art, the advantage of technique scheme comprises, does not need to design again the parameter of via layer, also need on original lamination element, not increase via layer, and technology is simple, and efficient is higher.
Preferably, said dielectric layer adopts the ceramic green band.
Further, said electrical appliance part comprises: adopt mode of printing to invest the internal electrode on the said ceramic green band.
Preferably, the number of types of different said dielectric layers is not less than 3.
Further in the preference, in the said pre-fabricated step, the maximum dielectric layer of thickness is in centre position; The closer to the dielectric layer of the maximum dielectric layer of this thickness, its thickness is also big more.
In another further preference, in the said pre-fabricated step, the minimum dielectric layer of thickness is in centre position; The closer to the dielectric layer of the minimum dielectric layer of this thickness, its thickness is also more little.
Description of drawings
Fig. 1 is the flow chart of a kind of embodiment of method of trial-production lamination element in the prior art;
Fig. 2 is the flow chart that the present invention accurately makes a kind of embodiment of method of lamination element;
Fig. 3 is a kind of concrete structure brief description embodiment illustrated in fig. 2;
Fig. 4 is the vertical view of four kinds of ceramic green bands in the specific embodiment of the inventive method;
Fig. 5 is the side sectional view of four kinds of ceramic green bands among Fig. 4;
Fig. 6 is the assembling explosive view of Fig. 4 specific embodiment.
Embodiment
Below in conjunction with accompanying drawing, more excellent embodiment of the present invention is done further detailed description:
As shown in Figure 2, specify as follows:
Step 100: earlier with the dielectric layer that has electrical layer of the different-thickness more than at least two electronics lamination element that is made;
Step 101: measure the inductance value or the resistance value of this electronics lamination element then,
Step 102: if the deviation of inductance value or resistance value and design load is outside setting range, then
Step 103: the laminated layer sequence of adjustment dielectric layer, carry out said step 100;
Until the deviation of the inductance value of the electronics lamination element of making and design load within setting range.
In conjunction with Fig. 3, the principle of embodiment shown in Figure 2 is described.
The thickness difference of dielectric layer can cause the inductance value of electronics lamination element or the variation of resistance value between the electrical layer.
Fig. 3 is the sketch map that the order of the dieelctric sheet of two different-thickness is adjusted.Wherein, P1: first electrical layer; D1: first dielectric layer; H1: first through hole; H1: the thickness of the first dielectric layer D1; P2: second electrical layer; D2: second dielectric layer; H2: second through hole; H2: the thickness of the first dielectric layer D2.
Like Fig. 4, Fig. 5, shown in Figure 6; Can adopt the relevant position of the method for laser drilling or mechanical punching in ceramic layer 322,332 and 342; Break into through hole 322,332 and 342 respectively; Print internal electrode 311,321,331 and 341 respectively at ceramic layer 312,322,332 and 342, thereby form corresponding ceramic green band 310,320,330 and 340.As shown in Figure 3; The ceramic green band carries out lamination according to following laminated layer sequence: ceramic green band 330,320,340,320,340 and 310; Make corresponding internal electrode 331,321,341,321,341 and 311 be electrically connected successively; Add outer electrode at ceramic green band 330 again, ceramic green band 310 adds outer electrode, thereby forms laminate electronic components.
Be the embodiment that the ceramic green band of two kinds of thickness of a multilayer carries out lamination.This debugs to the specification error scope for small lot, thereby confirms the laminated layer sequence of laminate electronic components, carries out the production of large batch of laminate electronic components again according to this laminated layer sequence.
The specification error scope is a preset definite value, for example 5%.In this embodiment, 12 layer thicknesses are the ceramic layer d1 that is printed with internal electrode P1 of h1, and 8 layer thicknesses are the ceramic layer d2 that is printed with internal electrode P2 of h2, h1<h2.The inductance value design centre value of product is 68nH, and the ceramic green band has all been held the hole successfully and has been completed for printing.
Referring to method shown in Figure 2, the step that this embodiment is corresponding is:
Step 103, the adjustment laminating step for improving the inductance value of product, is pressed the laminated layer sequence multi-layered ceramic of d1, d1, d1, d1, d1, d1, d1, d1, d1, d1, d1, d1, d2, d2, d2, d2, d2, d2d2, d2 and is given birth to band;
Execution in step 101, step 101 successively again, the test inductance value central value that obtains product is 68.2nH;
Execution in step 102, the error range of judging inductance value and design centre value is promptly made successfully within setting range 5%.
In another embodiment, existing 14 layer thicknesses are the ceramic layer d1 that is printed with internal electrode P1 of h1, and 10 layer thicknesses are the ceramic layer d2 that is printed with internal electrode P2 of h2, h1<h2.The inductance value design centre value of product is 82nH, and the ceramic green band has all been held the hole successfully and has been completed for printing.
Step 103; The adjustment laminating step; For reducing the inductance value of product, press the laminated layer sequence multi-layered ceramic of d1, d1, d1, d1, d1, d1, d1, d1, d1, d1, d1, d1, d2, d2, d2, d2, d2, d2, d2, d2, d2, d2, d1, d1 and give birth to band;
Execution in step 101, step 101 successively again, the test inductance value central value of the product that obtains is 81.8nH;
Execution in step 102, the error range of judging inductance value and design centre value is promptly made successfully within setting range 5%.
Make laminate electronic components by this invention, do not need to design via layer in addition, thereby make operation simpler; Because prior art must increase loop length when increasing via layer, has caused the waste of the material of printed coil, so the present invention can effectively save coil method; Simultaneously, through the laminated layer sequence of adjustment ceramic green band, can so that the error of the inductance value of product or resistance value within the specification error scope, thereby guaranteed the precision of product; Adopt method of the present invention,, also can pass through the laminated layer sequence of adjustment ceramic green band, thereby can not cause the waste of ceramic green band even little for the ratio design load that the inductance value of inductance element is done.
Above content is to combine concrete preferred implementation to the further explain that the present invention did, and can not assert that practical implementation of the present invention is confined to these explanations.For the those of ordinary skill of technical field under the present invention, under the prerequisite that does not break away from the present invention's design, can also make some simple deduction or replace, all should be regarded as belonging to protection scope of the present invention.
Claims (6)
1. a method of accurately making the lamination element is characterized in that, comprising:
Dielectric layer making step: make at least two types dielectric layer with electric part;
Pre-fabricated step: dissimilar said dielectric layers is arranged in sequence, made the lamination element;
Measuring process: measure this lamination element and obtain measured value, this measured value is compared with preset standard value, if the deviation of this measured value and said standard value is then made the lamination element and finished in the scope of setting; Otherwise,
Set-up procedure: adjust the order of said dielectric layer, make another lamination element, carry out said measuring process then, wherein, said measured value is inductance value or resistance value.
2. the method for accurate making lamination element as claimed in claim 1 is characterized in that, said dielectric layer adopts the ceramic green band.
3. the method for accurate making lamination element as claimed in claim 2 is characterized in that, said electric part comprises: adopt mode of printing to invest the internal electrode on the said ceramic green band.
4. like the method for the arbitrary described accurate making lamination element of claim 1 to 3, it is characterized in that the number of types of different said dielectric layers is not less than 3.
5. the method for accurate making lamination element as claimed in claim 4 is characterized in that, in the said pre-fabricated step, the maximum dielectric layer of thickness is in centre position; The closer to the dielectric layer of the maximum dielectric layer of this thickness, its thickness is also big more.
6. the method for accurate making lamination element as claimed in claim 4 is characterized in that, in the said pre-fabricated step, the minimum dielectric layer of thickness is in centre position; The closer to the dielectric layer of the minimum dielectric layer of this thickness, its thickness is also more little.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010105851401A CN102074342B (en) | 2010-12-13 | 2010-12-13 | Method for precisely making laminated component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010105851401A CN102074342B (en) | 2010-12-13 | 2010-12-13 | Method for precisely making laminated component |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102074342A CN102074342A (en) | 2011-05-25 |
CN102074342B true CN102074342B (en) | 2012-07-04 |
Family
ID=44032850
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2010105851401A Active CN102074342B (en) | 2010-12-13 | 2010-12-13 | Method for precisely making laminated component |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102074342B (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101819853A (en) * | 2010-04-29 | 2010-09-01 | 深圳顺络电子股份有限公司 | Bank wound coil component and method for manufacturing same |
CN101819870A (en) * | 2010-04-01 | 2010-09-01 | 深圳顺络电子股份有限公司 | Method for adjusting inductance value of bank wound coil component |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005294686A (en) * | 2004-04-02 | 2005-10-20 | Murata Mfg Co Ltd | Laminated coil |
JP2007097118A (en) * | 2005-08-30 | 2007-04-12 | Kyocera Corp | Laminated lc filter |
-
2010
- 2010-12-13 CN CN2010105851401A patent/CN102074342B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101819870A (en) * | 2010-04-01 | 2010-09-01 | 深圳顺络电子股份有限公司 | Method for adjusting inductance value of bank wound coil component |
CN101819853A (en) * | 2010-04-29 | 2010-09-01 | 深圳顺络电子股份有限公司 | Bank wound coil component and method for manufacturing same |
Also Published As
Publication number | Publication date |
---|---|
CN102074342A (en) | 2011-05-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9748652B2 (en) | Manufacturing method for a magnetic material core-embedded resin multilayer board | |
CN103687347B (en) | A kind of manufacture method of partial hybrid printed circuit board | |
CN104023486B (en) | Soft and hard multiple-layer circuit board and method for forming electrical testing locating hole thereof | |
CN101631433A (en) | Implementation method of printing thick copper foil in PCB | |
CN104168727B (en) | Multi-layer PCB board pressing plate manufacture method | |
WO2018233271A1 (en) | Printed circuit board and fabrication method therefor | |
CN104349609A (en) | Printed circuit board and manufacturing method thereof | |
CN209299583U (en) | A kind of high voltage bearing pcb board in surface | |
CN104701009A (en) | Small-sized chip type surface mounting (SMD) high-voltage and safety standard recognized ceramic capacitor | |
US20140264737A1 (en) | Component-embedded substrate | |
CN103377782A (en) | Current sensing resistor | |
CN105308697A (en) | Multilayer ceramic capacitor | |
CN112103059B (en) | Manufacturing method of thin film power inductor and thin film power inductor | |
CN102149253A (en) | Method for making PCB (Printed Circuit Board) by laminating high-frequency materials and common FR4 materials in one step | |
CN103179790A (en) | Mixed-compressing printed circuit board and manufacture method thereof | |
KR20040082290A (en) | Inductive device and method for producing the same | |
CN103517556B (en) | A kind of circuit board depth control type drilling depth determining method and circuit board | |
CN102074342B (en) | Method for precisely making laminated component | |
CN106855590A (en) | A kind of PCB impedance modules structure and its detection method | |
CN201742639U (en) | Circuit board positioning device | |
CN203708620U (en) | Printed circuit board (PCB) with multiple alignment system | |
CN205213161U (en) | Multilayer board | |
US7649361B2 (en) | Methods for forming process test capacitors for testing embedded passives during embedment into a printed wiring board | |
CN105072824A (en) | Manufacture method of embedded circuit board | |
CN104244590B (en) | The control method of circuit board outer layer deviation |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20210222 Address after: No. 301, Rong Le Dong Road, Songjiang District, Shanghai Patentee after: Shunluo (Shanghai) Electronics Co., Ltd Address before: Shenzhen City, Guangdong province Baoan District 518110 sightseeing road s Fuyuan sunlord Industrial Park Patentee before: Shenzhen Sunlord Electronics Co.,Ltd. |
|
TR01 | Transfer of patent right |