CN102035374A - Capacitance matrix direct current-direct current voltage reduction technology - Google Patents
Capacitance matrix direct current-direct current voltage reduction technology Download PDFInfo
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- CN102035374A CN102035374A CN2010105645349A CN201010564534A CN102035374A CN 102035374 A CN102035374 A CN 102035374A CN 2010105645349 A CN2010105645349 A CN 2010105645349A CN 201010564534 A CN201010564534 A CN 201010564534A CN 102035374 A CN102035374 A CN 102035374A
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Abstract
A capacitance matrix direct current-direct current (DC-DC) voltage reduction technology belongs to the technical field of power supply. In the magnetic field energy conversion mode, the stress on the switching element is large, the electromagnetic interference (EMI) design is difficult and copper loss, iron loss, magnetic leakage and radiation interference appear, thus in the technology of the invention, a capacitance matrix is utilized to transfer energy. The capacitance matrix is composed of a diode, a capacitor and a metallic oxide semiconductor field effect transistor (MOSFET), is controlled by a single chip microcomputer and adopts the fixed pulse width frequency modulation and voltage stabilization mode. The columns of the capacitance matrix are firstly connected in series for charging and secondly connected in parallel for discharging. Each column of the capacitance matrix works in turn. When the number of columns for discharging is set to be more than 2, the conversion efficiency is higher and the output voltage is more stable. The technology can be used in the medium or low power non-isolated switch power supply and the DC voltage reduction circuit and have high conversion efficiency.
Description
Technical field
The invention belongs to power technique fields
Background technology
At present, the developing direction of Switching Power Supply is that soft switch technique adds high frequencyization.Although soft on-off mode can realize high frequency, but high frequencyization is when bringing more high power density, bring thereupon be to electronic device require higher, material and technological requirement are higher, particularly will be harsh more to the requirement of switching device and inverting element switch transformer.The layout of EMI when design device is more difficult, and this is by the physical characteristic decision of switch transformer---and rely on magnetic field to transmit energy.The mode that magnetic field passes energy not only allows the switch transformer have leakage field, and has copper loss and iron loss, allows switch power supply major loop conversion efficiency reduce, and major loop disturbs and will can not be ignored peripheral components simultaneously.
Summary of the invention
The present invention is directed to the middle low power power supply and propose a kind of new transducing mode: the electric capacity transducing.
Electric capacity transducing advantage: electric capacity has high di/dt, and the electric current that sparks is big, and is strong as inverting element overload capacity.
Electric capacity does not have high pressure when charging and discharge, not high to the requirement of withstand voltage of switching device.
The electric capacity transducing does not have copper loss, iron loss, the leakage field of switch transformer.
Anti-interference Design is easier than the circuit that uses switch transformer.
Electric capacity transducing shortcoming: there is spike in capacitance discharges, has the ripple of spike formula in the output voltage.
Can not provide to continue big electric current, filter circuit be required high.
Instantaneous large-current is big to the impact of power tube, requires the impulse current of power tube big.
At above-mentioned merits and demerits, a kind of technical scheme of bringing out one's strengths to make up for one's weaknesses is proposed:
The capacitance matrix layout, the row serial connection charge of capacitance matrix, single-row each row output in parallel realizes that according to this little current conversion of input high voltage is the big electric current of output LOW voltage, the i.e. transmission of electric energy.The overlapping output in turn of multiple row combination, the frequency modulation voltage regulation way.For avoiding the hardware complexity of matrix control circuit, adopt Single-chip Controlling (in today that single-chip microcomputer is popularized, tens yuans just can be buied a slice single-chip microcomputer).Single-chip Controlling can also realize the intellectuality of power supply easily.
Fig. 1 is the schematic diagram of 3 row, 3 column capacitance matrixes.The composition structure of every row is identical.Be listed as first: by charge switch S1, discharge switch S2, same capability and withstand voltage transducing capacitor C 1, C2, C3, isolating diode D1, D2, discharge diode D3, D4, D5, D6 form.Fig. 2 is the working waveform figure of Fig. 1.If the significant level of switch is a low level, the rising edge of a pulse switch motion.
The electric capacity of every row is serial connection charges, and parallel discharge, input power supply and out-put supply, are got first capacitance voltage of every row and distinguished called after Uc1, Uc4, Uc7 so the waveform of every electric capacity is consistent for exporting altogether.Uout is an output voltage.
Operation principle
First rising edge of a pulse: S1 connects, and S4 disconnects; S2 disconnects, and S5 connects.D1, the conducting of D2 forward bias, Uin forms the loop by S1, C1, D1, C2, D2, C3, gives C1, C2, C3 charging.The negative pole of D4, D6 is received the positive pole of Uin, and the anodal current potential of D4, D6 is lower than negative pole current potential reverse bias and ends.The positive pole of D3, D5 is received the negative pole of Uin, and D3, D5 negative pole current potential are higher than anodal current potential reverse bias and end.This moment, output was powered by secondary series because S2 disconnects, and S5 connects.
Second rising edge of a pulse: S2 connects, and S5 disconnects; S3 disconnects, and S6 connects.D7, the conducting of D8 forward bias, Uin forms the loop by S2, C4, D7, C5, D8, C6, gives C4, C5, C6 charging.The negative pole of D10, D12 is received the positive pole of Uin, and the anodal current potential of D10, D12 is lower than negative pole current potential reverse bias and ends.The positive pole of D9, D11 is received the negative pole of Uin, and the negative pole current potential of D9, D11 is higher than anodal current potential reverse bias and end.This moment, output was by the 3rd row power supply because S3 disconnects, and S6 connects.
The 3rd rising edge of a pulse: S3 connects, and S6 disconnects; S1 disconnects, and S4 connects.D13, the conducting of D14 forward bias, Uin forms the loop by S3, C7, D13, C8, D14, C9, gives C7, C8, C9 charging.The negative pole of D16, D18 is received the positive pole of Uin, and the anodal current potential of D16, D18 is lower than negative pole current potential reverse bias and ends.The positive pole of D15, D17 is received the negative pole of Uin, and the negative pole current potential of D15, D17 is higher than anodal current potential reverse bias and end.This moment, output was by the first row power supply because S1 disconnects, and S4 connects.
After this, at each rising edge of a pulse, each electronic component in the matrix all repeats above-mentioned separately step successively under the effect of monolithic processor controlled switch.
Owing to output is by the power supply in turn of each row, so after the process filtering of Co, output has just obtained voltage waveform relatively stably.As can be seen from Figure 1, be charged as 2 times of discharge time and matrix column number and equal at 3 o'clock, in turn in the supply power mode, the power supply of any time load is just in time finished by row wherein, avoided because of the inconsistent output that causes of discharge columns not steady.
In like manner, because charging carries out in turn, and the Kai Heguan of charge switch moves simultaneously, and relative, the action of switch will tend to be steady to the lower voltage limit spike that the input power supply injects.
If the cycle of the pulse CP that the single-chip microcomputer timer produces is t, the columns that discharges simultaneously is n, and Uin is an input direct voltage, and Uout is an output dc voltage.The integral multiple of discharge time is n, and the integral multiple in charging interval is m,
Then the pass between each parameter is:
Discharge time t
1=n*t
Charging interval is t
2=m*t
Discharge and recharge time ratio N=t
2/ t
1=m/n
Single-row frequency f=1/ (t
1+ t
2The t of)=1/[(m+n)]
Columns is Y=(nt+mt)/t=m+n
Line number is X=Uin/ (Uout+1)
So in order to be exported more stably, the time scale N of the value of the columns n of discharging simultaneously, charging and discharge is the guarantee of the reliable and stable work of this capacitance matrix.
Charging interval, too conference caused the operating time waste of every row to the ratio N of discharge time, and too little meeting causes the insufficient just discharge of charging, can allow output voltage sharply descend along with the increase of time.The value of N should be natural number.
The columns n of discharging is simultaneously answered cooperating frequency value, selects higher operating frequency under the safe prerequisite of proof load power and switching device as far as possible, because n gets the waste that can cause resource too greatly equally.
Fig. 3 is discharge simultaneously columns n=2, the work wave when discharging and recharging time scale N=2.Columns Y=n+N*n=2+2*2=6 row.The electric capacity waveform of every row does not draw among the figure.As can be seen from the figure, arbitrarily in the pulse period, the power supply simultaneously of 2 row is arranged all, also be output voltage all be uninterrupted power supply at any time, can obtain output voltage waveforms more stably.What can predict is, if n=3, N=2, then when the rising edge switch motion of each pulse, will be littler to the influence of output and input voltage, because have 2 to be listed in power supply this moment, 2 are listed in and replace.If n=4, N=2 then have 3 row power supplies, 2 row alternately.Because what the rising edge of each pulse replaced has only 2 to be listed as, so the increase of n has improved capacitance matrix to importing the not steady of power supply, output voltage is more steady when ensureing big electric current simultaneously.
In sum, when series connection input output in parallel has solved transducing, also given prominence to the capacitance discharges function.The clutter that row series connection wheel current charge, row discharge in turn in parallel have promptly solved the input power supply injects, and has solved the spike problem in the output voltage again, has also solved the lasting problem of output current simultaneously.Impulse current reduced when output also allowed the switching tube action side by side---and the essence reason of impulse current is that High Pressure Difference causes.Because the charging interval is long, discharge time is short, and the voltage drop on the transducing electric capacity is little, that is to say that the voltage difference after input voltage is to capacitances in series is little, and the switch motion of low pressure reduction has reduced the loss of charge switch.Because multiple row alternately output in parallel, the output voltage fluctuation is very little, even can ripple-free voltage, and concern X=Uin/ (Uout+1) as can be known according to line number and input and output, the voltage of every electric capacity adds tube voltage drop (one of input pipe, 2 of efferent ducts, Schottky diode only is 0.3V, get 1V altogether for three), the pressure reduction of discharge tube is also very little, reduced the loss of efferent duct, opened and close the fluctuation that has further reduced supply voltage and load voltage simultaneously when 2 row replace, thereby further reduced switching loss.
Since be the series connection input, output in parallel, thus not high to the performance requirement of electric capacity, because single-row operating frequency only is 1/ (3n) of CP, reduced the operating frequency of electric capacity, reduced the loss of electric capacity.Operating frequency to switching diode and switch triode has also just reduced accordingly.Because the charging of electric capacity and the no high pressure of discharge add low-loss and low frequency, this technical scheme has found another approach for realizing the middle low power power supply with the electric capacity transducing.
Description of drawings
Fig. 1---capacitance matrix fundamental diagram.Dotted line representation switch control line, the output voltage sample line is represented in the section setting-out, and solid arrow is represented the direction of voltage drop.The structure of broken string in the frame is in the capacitance matrix, except that first trip and tail are capable, and the composition structure of middle row unit.
The working waveform figure of Fig. 2---Fig. 1.CP is by the pulse of the timer interruption generation of single-chip microcomputer, t indicating impulse cycle.
Fig. 3---columns n=2 o'clock of discharging simultaneously, matrix are the working waveform figures of 6 row.The work wave of electric capacity does not draw among the figure.
Embodiment:
The voltage stabilizing scheme: because the pulse character of electric capacity, it is best adopting the fixed pulse width mode of frequency regulation.When zero load, allow with time uniformly-spaced single-row to electric, to reduce circuit loss.Along with the increase of load current, control frequency levels off to f=1/[(m+n gradually) t] single-row frequency, the columns of powering simultaneously is increased to n.
The PCB element should be selected patch-type for use, reduces lead-in inductance.Modularized design can reach optimum performance.
Electric capacity should be selected the electric capacity of low ESR, low-leakage current for use, has certain high frequency characteristics.
Diode should be selected low pressure drop, high back-pressure diode for use.
Triode should be selected MOSFET for use, to reduce the drive circuit loss.
Single-chip microcomputer should be selected band A/D function for use, and A/D changes digital quantity in order to the analog quantity with output, input voltage, electric current, so that routine processes can reduce the unreliability that loose mail brings simultaneously.I/O selects the parallel port for use, to reduce the element of drive circuit, can reduce the power consumption of control circuit simultaneously.
All of the port is high level after the initialization of drive circuit single-chip microcomputer, single-chip microcomputer does not have the ability (being generally 5V) of direct termination high pressure yet, but it is used in the matrix circuit, control and debugging are finished by program, very convenient, can simplify the complexity of matrix circuit greatly, reduce device and wiring, increase reliability.So increasing drive circuit is the method for relatively economical material benefit.
Claims (1)
1. one kind by electric capacity, diode, DC decompression matrix circuit and control method thereof that triode constitutes, it is characterized by: matrix respectively is listed as only to have with negative pole at a positive pole of importing power supply and is connected, each row of matrix only has with negative pole at the positive pole of out-put supply and is connected, and out-put supply and input power supply have 1 common terminal, each unit of first row is by 1 electric capacity and 1 triode, the non-common terminal diode that 1 diode connects into and the wherein end of triode is connected in parallel on the input power supply is used for the out-put supply common terminal, second row is connected into by 1 electric capacity and 3 diodes to each unit of row second from the bottom and wherein 1 diode other 2 diodes of 2 electric capacity of being used for forward series connection adjacent lines are respectively applied for out-put supply common terminal and non-common terminal, each unit of last column is by 1 electric capacity and 1 triode, 1 diode of non-common terminal that the end that 2 diodes connect into and an end of electric capacity is connected to input power sharing end triode is connected to out-put supply be used to connect adjacent lines 2 electric capacity in addition 1 diode be used for the non-common terminal of out-put supply, the control method of aforementioned matrix circuit be the every row of matrix 1 conducting at any time of 2 triodes in addition 1 by and the conducting and ending in turn of each row triode.
(1) its method of claim 1 described " matrix respectively is listed as only to have with negative pole at a positive pole of importing power supply and is connected " is: an end of an end the 3rd row switch 3 (S3) of an end (S1) secondary series switch 2 (S2) of the first row switch 1 of matrix is in the positive pole parallel connection of input power supply (Uin), and the negative pole of negative pole the 3rd column capacitance C9 of the negative pole secondary series capacitor C 6 of the matrix first column capacitance C3 is in the negative pole parallel connection of input power supply (Uin).
(2) its method of claim 1 described " each row of matrix only have with negative pole at the positive pole of out-put supply be connected " is: the negative pole of the electric capacity 3 (C3) of anodal the third line of the diode 5 (D5) of positive pole second row of the diode 3 (D3) of first row of matrix first row is in the negative pole parallel connection of out-put supply (Uout), the negative pole of negative pole the third line diode 6 (D6) of the diode 4 (D4) of positive pole second row of the first row electric capacity 1 (C1) of matrix first row is parallel to an end of switch 4 (S4), the negative pole of the electric capacity 6 (C6) of anodal the third line of the diode 11 (D11) of positive pole second row of the diode 9 (D9) of first row of matrix secondary series is in the negative pole parallel connection of out-put supply (Uout), the negative pole of negative pole the third line diode 12 (D12) of the positive pole second row diode 10 (D10) of the first row electric capacity 4 (C4) of matrix secondary series is parallel to an end of switch 5 (S5), the negative pole of the electric capacity 9 (C9) of anodal the third line of the diode 17 (D17) of positive pole second row of the diode 15 (D15) of tertial first row of matrix is in the negative pole parallel connection of out-put supply (Uout), the negative pole of negative pole the third line diode 18 (D18) of the positive pole second row diode 16 (D16) of the tertial first row electric capacity 7 (C7) of matrix is parallel to an end of switch 6 (S6), the other end of switch 4 (S4), the other end of switch 5 (S5), the other end of switch 6 (S6) is anodal in parallel out-put supply (Uout).
(3) method of attachment of the element of claim 1 described " each unit of first row " is: one of switch 1 (S1) is terminated at input power supply (Uin) positive pole, the positive pole of another termination capacitor 1 (C1) of switch 1 (S1) and an end of switch 4 (S4), the negative pole of electric capacity 1 (C1) is connected to diode 3 (D3) and diode 1 (D1).
(4) method of attachment of the element of each unit of claim 1 described " second row is to row second from the bottom " is: the positive pole of diode 1 (D1) is connected to the negative pole of electric capacity 1 (C1) and the negative pole of diode 3 (D3), claim 1 described " forward series connection " is: diode 1 (D1) is with electric capacity 1 (C1) and the series connection of electric capacity 2 (C2) forward, and diode 2 (D2) is with electric capacity 2 (C2) and the series connection of electric capacity 3 (C3) forward.
(5) method of attachment of the element of each unit of claim 1 described " last column " is: the positive pole of diode 2 (D2) is connected to the negative pole of electric capacity 2 (C2) and the positive pole of diode 6 (D6), the negative pole of electric capacity 3 (C3) is received input power sharing end, and the negative pole of diode 6 (D6) is connected to switch 4 (S4).
(6) control method of the described matrix circuit of claim 1 is: connect switch 1 (S1), cut-off switch 2 (S2) in the time of switch 5 (S5), switch 4 (S4), wait for control impuls (CP) cycle, connect switch 2 (S2), cut-off switch 3 (S3) in the time of switch 6 (S6), switch 5 (S5), wait for control impuls (CP) cycle, connect switch 3 (S3), cut-off switch 1 (S1) in the time of switch 4 (S4), switch 6 (S6), wait for control impuls (CP) cycle, after this under control impuls (CP) effect, each switch of matrix repeats above-mentioned steps separately respectively.
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| CN2010105645349A CN102035374A (en) | 2010-11-29 | 2010-11-29 | Capacitance matrix direct current-direct current voltage reduction technology |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103856085A (en) * | 2014-03-24 | 2014-06-11 | 卫斌鹏 | Changeless voltage-reducing rectification converter |
Citations (5)
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|---|---|---|---|---|
| CN1047944A (en) * | 1990-05-26 | 1990-12-19 | 季长青 | Switch capacitor isolated dc transducer |
| CN1076317A (en) * | 1992-03-10 | 1993-09-15 | 周符明 | Divider |
| JPH11110992A (en) * | 1997-10-03 | 1999-04-23 | Toshiba Corp | Boosting circuit, semiconductor device and its manufacture |
| CN1474500A (en) * | 2002-08-05 | 2004-02-11 | 电子科技大学 | Circuit and method for realizing DC transformer using switch capacitor array |
| CN101765963A (en) * | 2007-11-05 | 2010-06-30 | 株式会社理光 | Operation control method of charge pump circuit |
-
2010
- 2010-11-29 CN CN2010105645349A patent/CN102035374A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1047944A (en) * | 1990-05-26 | 1990-12-19 | 季长青 | Switch capacitor isolated dc transducer |
| CN1076317A (en) * | 1992-03-10 | 1993-09-15 | 周符明 | Divider |
| JPH11110992A (en) * | 1997-10-03 | 1999-04-23 | Toshiba Corp | Boosting circuit, semiconductor device and its manufacture |
| CN1474500A (en) * | 2002-08-05 | 2004-02-11 | 电子科技大学 | Circuit and method for realizing DC transformer using switch capacitor array |
| CN101765963A (en) * | 2007-11-05 | 2010-06-30 | 株式会社理光 | Operation control method of charge pump circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103856085A (en) * | 2014-03-24 | 2014-06-11 | 卫斌鹏 | Changeless voltage-reducing rectification converter |
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Address after: 610045 Sichuan city of Chengdu province Jitou town Fuk a 3-2-12 tide Applicant after: Ma Donglin Address before: 610045 Sichuan city of Chengdu province Jitou town Fuk tide a 3 unit 2 Building No. 11 Applicant before: Ma Donglin |
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Address after: 610211 Sichuan Province, Chengdu city Shuangliu County Street West Road No. 33 2 Hong Kong sheep double unit 1 Building No. 705 Applicant after: Ma Donglin Address before: 610045 Sichuan city of Chengdu province Jitou town Fuk a 3-2-12 tide Applicant before: Ma Donglin |
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Application publication date: 20110427 |