CN102035166B - System and method for negative voltage protection - Google Patents
System and method for negative voltage protection Download PDFInfo
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- CN102035166B CN102035166B CN2010102907388A CN201010290738A CN102035166B CN 102035166 B CN102035166 B CN 102035166B CN 2010102907388 A CN2010102907388 A CN 2010102907388A CN 201010290738 A CN201010290738 A CN 201010290738A CN 102035166 B CN102035166 B CN 102035166B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
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Abstract
An electronic system is disclosed, which includes a connector unit to communicate data with a host system, an electronic circuit to store the data, and a switch to convey the data to and from the electronic circuit via the connector unit. The switch includes a negative voltage protection unit coupled to the connector unit, and a transistor switch coupled to the negative voltage protection unit, the connector unit, and the electronic circuit. The negative voltage protection unit forces the transistor switch off if a negative voltage is detected.
Description
The related application of cross-reference
The application's case is advocated to file an application on October 7th, 2009 in this, the temporary transient patent application case of the U.S. the 61/249th of case name " negative voltage detecting and the strangulation of cmos switch ", the rights and interests of No. 362 (procurator's reference number of a document SE-2720-AN).The temporary transient patent application case of the U.S. the 61/249th, No. 362 and be incorporated to as reference in this.
The accompanying drawing explanation
Be with need understanding, graphicly only be to describe exemplary embodiment, therefore not be regarded as the scope restriction, example embodiment will by utilize appended graphic and carry out extra concrete and describe in detail, wherein:
Fig. 1: it is for showing the calcspar of an embodiment who utilizes the system with negative voltage detecting and protection switch;
Fig. 2: it is for showing a calcspar that can be used to carry out a system of shown system in the 1st figure;
Fig. 3: it is the calcspar of an embodiment with switch of negative voltage detecting and protection;
Fig. 4: it is for showing a circuit diagram that can be used to carry out an embodiment of shown sensing circuit in Fig. 3;
Fig. 5: it is for showing a circuit diagram that can be used to carry out an embodiment of shown control logic circuit in Fig. 3; And
Fig. 6: it is for showing a circuit diagram that can be used to carry out an embodiment of shown drive circuit in Fig. 3.
According to the practice of custom, the feature of various narrations is not drawn in the mode that meets ratio, but is plotted as the specific characteristic of emphasizing to be relevant to example embodiment.
Preferred forms
In ensuing describing in detail, to form a part of of narration and utilize particular examples embodiment to be shown appended graphic and as a reference, yet, be understandable that, also can adopt other embodiment, and, also can carry out in logic, mechanically and the change electrically, moreover, the method presented in institute's graph plotting type and instructions is not limited the execution sequence of indivedual actions by construction, therefore, ensuing describing in detail is not also to be conceived to restriction and to carry out construction.
Switch can be used in various application, wherein, arrive/from the I/O (I/Os) of these switches, understand and see through cable and be connected to outside voltage source, high universalizable and interchangeability due to cable plug, cable likely can be inserted into because of wrong operation in unsuitable voltage source, for example, if when being connected to a cable of an I/O terminal of a switch and being inserted into a negative voltage source, just having excessive electric current produces, and it will damage the electronic circuit of the other-end (for example,, on the downstream of this switch) that is connected to this switch.Embodiments of the invention can detect a negative voltage of an end that is positioned at a switch rapidly; and; this switch can cut out; be coupled to the Circuits System of one second terminal of this switch with protection; by this, embodiments of the invention can not need a negative charge to help the negative voltage protection of activation to used switch under the situation of Pu or negative supply supply.
Fig. 1 is the calcspar that shows the embodiment of the system 100 of utilizing switch 104, and in an embodiment, switch 104 is an integrated circuit (IC) switches.Refer to the 1st figure, system 100 comprises a connector 102, one switch 104, an and electronic circuit 106, wherein, switch 104 comprises a negative voltage detecting/protected location 108, an and electric crystal switch 110, moreover, Fig. 1 also shows a host computer system 112, it is connected to an I/O terminal of connector 102 by a circuit 114, for example, this circuit 114 can be the cable in system 100 outsides, in addition, host computer system 112 can be PC (PC), the general service computer, networking computer or servomechanism, or audio system, video system, the mixed-media system, or can be used to any kenel numerical digit or the analogy communication system of being linked up with electronic circuit via switch 104.
The I/O terminal of connector 102 is to utilize circuit 116 and the one first I/O terminal that is connected to electric crystal switch 110, and utilize circuit 118 and be connected to an input of negative voltage detecting/protected location 108, one second I/O terminal of electric crystal switch 110 is to utilize circuit 122 and the I/O terminal that is connected to electronic circuit 106, in addition, one output of negative voltage detecting/protected location is to utilize circuit 120 and the control terminal that is connected to electric crystal switch 120, as illustrated, see through electric crystal switch 110 and cable 114, connector 102 can be used to electronic circuit 106 is coupled to an external system, for example, for example, host computer system 112.
When operation; connector 102 can be directly or indirectly (for example; see through cable 114) be inserted in a connector of the host computer system 112 that comprises a signal and/or voltage source; for example; if connector 102 is inserted in a connector of the host computer system 112 that comprises a voltage source; and, when the End of Data of this connector or voltage source is reversed, negative voltage detecting/protected location 108 will detect negative voltage on the circuit 116 of the I/O switch that is coupled to electric crystal switch 110.Then, negative voltage detecting/protected location 108 can produce and export suitable signal voltage usings as responding, and is sent to a control inputs of electric crystal switch 110 via circuit 120.Then, electric crystal switch 110 can be responded the signal voltage that receives on circuit 120 and block current flow, and the contact of effectively opening electric crystal switch 110.Therefore, by detecting rapidly negative input voltage and closing this electric crystal switch 110, just can allow switch 104 be enabled in protection electronic circuit 106.
Fig. 2 shows the calcspar of an embodiment of the system 200 of utilizing switch 204 (for example a, integrated circuit).For example, system 200 can be used to carry out system 100 shown in the 1st figure.Refer to Fig. 2, system 200 comprises a connector 202, one switches 204, and a Portable media apparatus 206.In one embodiment, connector 202 may be embodied as and adopts a universal serial bus (USB) connector, and switch 204 may be embodied as employing one analogy complementary metal oxide semiconductor (CMOS) (CMOS, Complementary Metal-Oxide Semiconductor) switch.Switch 204 comprises logical circuit 208, one detecting voltages/holding circuit 210, and an electric crystal switch 212.Portable media apparatus 206 comprises a microcontroller 214, one first transceiver 216, one second transceiver 218, be connected to one first data storage unit 220 of this first transceiver 216, and the one second data storage unit 222 that is connected to this second transceiver 218.For example, Portable media apparatus 206 can be can store and playback (plays back) numerical digit video, digit audio frequency or from a portable apparatus of the digital content of a PC (PC) or other data storage devices.In certain embodiments, switch 204 can be USB switch, audio switch, video switch, digital date switch or the general purpose switch in application and/or product.And thus, 202 of connectors are to may be embodied as to adopt respectively USB connector, audio connector, video-frequency connector, data connector or general purpose connector.
In one embodiment, the first terminal of connector 202 (VBUS) is to be connected to an I/O terminal of microcontroller 214 by circuit 202a.One second terminal (D-) is the first contact that is connected to first terminal (D-) and the electric crystal switch 212 of detecting voltage/holding circuit 210 by circuit 202b.Third terminal (D+) is to be connected to second terminal (D+) of detecting voltage/holding circuit 210 and the second contact of electric crystal switch 212 by circuit 202c.The 4th terminal (GND) is to be connected to the grounding terminals of switch 204 by circuit 202d; and; the outlet terminal of detecting voltage/holding circuit 210 is to be connected to the input of logical circuit 208 by circuit 209; moreover; in one embodiment; a plurality of circuits 202a-202d can gather together to form the electric current conductive wire of cable (for example, USB cable, voice-frequency cable, vision cable, data cable or mixed-media cable).In other embodiment, in circuit 202a-202d, each is conductive wire (for example, the call wire on printed circuit board (PCB)) separately.
When operation; connector 202 can be directly or indirectly (for example; see through the cable extension device) be inserted in the connector that comprises signal and/or voltage source; for example; if connector 202 is inserted in the connector that comprises voltage source; and, when D+ this connector or voltage source and D-terminal are reversed (reversed), detecting voltage/holding circuit 210 will be on circuit 202c and the terminal D of switch 204+detecting negative voltage.Detecting voltage/holding circuit 210 produces and export suitable signal voltage, and (for example, OUT) using as responding, this signal voltage can be transferred into the input of logical circuit 208 on circuit 209.Receive this signal voltage in order to respond on circuit 209, logical circuit 208 can produce and output control signal voltage to the input of electric crystal switch 212, with block current flow and these contacts of effectively opening this switch.Therefore, by detecting rapidly negative input voltage and closing this electric crystal switch, just can allow switch 204 be enabled in protection Portable media apparatus 106.
The calcspar of the embodiment of Fig. 3 display switch 300, for example, switch 300 can adopt switch shown in Fig. 1 104 or shown switch 204 in Fig. 2.In one embodiment, switch 300 is to be fabricated on independent semiconductor wafer.In certain embodiments, switch 300 can use the part that is formed a plurality of semiconductor devices.In one embodiment, switch 300 can comprise N passage electric crystal switch, for example, and for example, utilize the formed N channel field of triple wells (triple-well) semiconductor fabrication process effect electric crystal (NFET, N-channel Field Effect Transistor) switch.
Refer to Fig. 3, switch 300 comprises drive circuit 302, one electric crystal switch 304, one sensing circuit 306, one control logic circuits 308, and a resistor 310.The first output of drive circuit 302 is to be connected to the gate of electric crystal switch 304 by circuit 312, and the second output of drive circuit 302 is the effective source electrode (effective source) that is connected to electric crystal switch 304 by circuit 314 and the input that is connected to sensing circuit 306 by circuit 316.The Circuits System downstream that the source electrode of electric crystal switch 304 can be coupled to this switch (it should be noted that, in switch mosfet, compared to the voltage on gate, the actual position of source electrode and drain can be reversed or exchange according to the polarity of voltage on these electrodes, so, with regard to this respect, source electrode can be than the drain in the N channel switch more negative (negative)), in addition, the output of sensing circuit 306 is first inputs that are connected to control logic circuit 308 by circuit 318, the second input of control logic circuit 308 is to be connected to a terminal (ON) of the on/off state that is used to gauge tap 300 by circuit 319.The first output of control logic circuit 308 is first inputs that are connected to drive circuit 302 by circuit 320, the second output is the second input that is connected to drive circuit 302 by circuit 322, and the 3rd output is to be connected to the 3rd input of drive circuit 302 by circuit 324.
In one embodiment, resistor 310 is connected between the P well main body (P-well body) and circuit ground of N passage electric crystal switch 304, and this circuit ground produces a bias voltage on this P well main body of this switch.For example, if, when the bias voltage on this P well main body of this switch is pulled down to a negative potential (, lower than circuit ground), the numerical value of resistor 310 will be selected to stop the electric current by electric crystal switch 304.Thus, if, when the voltage on its P well main body is negative value, electric crystal switch 304 can be adjusted to and cut out.
When operation, for example, when if sensing circuit 306 detects negative voltage (, this D+ end of the switch 204 in Fig. 2) on circuit 316, sensing circuit 306 can produce and export a signal voltage that is coupled to control logic circuit 308, OUT.And, as responding, 308 of control logic circuits are to produce and to export the plurality of signals voltage that is coupled to drive circuit 302, INB, EN, and NEGOV.As response, the signal voltage that drive circuit 302 can produce and export the gate that is coupled to electric crystal switch 304, NGATE.According to the state (can be narrated according to Fig. 6 afterwards) of NGATE signal voltage, electric crystal switch 304 can be enabled in the passing through of block current flow, and closes when sensing circuit 306 detects a negative voltage on circuit 316.
Fig. 4 is the circuit diagram that shows the embodiment of sensing circuit 400; it can be used to carry out sensing circuit 306 shown in Fig. 3; in addition; for example; sensing circuit 400 also can be used to carry out negative voltage detecting/protected location 108 shown in the 1st figure, or in Fig. 2 shown detecting voltage/protected location 210.Refer to Fig. 4, sensing circuit 400 comprises one the one NFET electric crystal 402, and one the 2nd NFET electric crystal 404.In one embodiment, each electric crystal 402,404 is all triple well NFET or a N lane device, the source electrode of electric crystal 402 can be connected to the drain of electric crystal 404, to form a cascade/repeatedly connect framework (cascaded/cascoded configuration), and their gate can be connected to circuit ground.The drain of electric crystal 402 can be connected to a terminal of first node 406 and pullup resistor (pull-up resistor) 408, and the second terminal of resistor 408 can be connected to service voltage, VDD.The source electrode of electric crystal 404 can be connected to terminal 410 (IN), and the P well main body of electric crystal 404 can be connected to a terminal of the second resistor 412.The second terminal of resistor 412 can be connected to circuit ground.For example, the terminal (IN) be presented in Fig. 4 can be a terminal that is connected to circuit shown in Fig. 3 316 (IN).
In one embodiment, these cascades/repeatedly connect electric crystal 402, these main body terminals of 404 can be connected to relative service voltage, to eliminate the inappropriate parasitic diode action (parasitic diode action) in these P well main bodys of these electric crystals.The P well main body of each NFET electric crystal 402,404 with and N+ source electrode (or drain) respectively can form parasitic diode, it can produce at this source electrode (or drain) forward bias (forward-biased) during lower than earthing potential.Therefore, if while on terminal 410, detecting negative voltage, resistor 412 can be used to this source terminal that Limited Current flows into electric crystal 404.
Extraly, node 430 can be connected to the gate of a PFET electric crystal 434 and the gate of a NFET electric crystal 436.The source electrode of electric crystal 434 can be connected to this service voltage, VDD, and the source electrode of electric crystal 436 can be connected to circuit ground.The drain of electric crystal 434 can be connected to drain and the outlet terminal 438 (OUT) of electric crystal 436.For example, the terminal 438 (OUT) be presented in Fig. 4 can be a terminal that is connected to circuit shown in Fig. 3 318.
It should be noted that in certain embodiments, each PFET electric crystal 414,426, and 432 source electrode can be connected to this service voltage, VDD.Yet, just as shown in FIG. 4, for the voltage that maximizes sensing circuit 400 is controlled ability, each electric crystal 414,426 and 432 source electrode all can be connected to reference voltage, VREF, it is than service voltage, VDD, the lower inner positive voltage that produces of numerical value.In addition, as previous, narrate, although in one embodiment, electric crystal 402, the 404th, triple well NFET or N lane device, yet, other NFET electric crystal 416,418,420,424 and 436 is to may be implemented as (for example, non-triple well) or the triple well device that utilizes standard.
Under normal operation, the voltage on circuit 410 (IN) can be between zero (GND) and service voltage, VDD, between a positive.Therefore, cascade/repeatedly connect electric crystal 402 and 404 can be closed, and node 406 can be at this service voltage, VDD, locate to produce bias voltage.Then, the right output (node 422) of phase inverter that electric crystal 414,416 forms can be dragged down.This input to phase inverter and output can be connected to drive this differential pair of electric crystal 424,418.Therefore, node 430 can be pulled low to earthing potential (GND), and node 428 can be drawn high to reference voltage, VREF, and it is steady state (SS) that the electric crystal 426,432 of cross-coupled can be used to the voltage breech lock (latch) at node 406 and 422 places.Therefore, under aforesaid bias state, in terminal 438 (OUT), locate high output voltage.
Yet, if the voltage IN on circuit 410 is down to negative numerical value (lower than ground connection), namely during the upset operation state in context, electric crystal 402 and 404 will start conduction.Because the impedance value of pullup resistor 408 is high relatively, so can be dragged down at the voltage of node 406.Therefore, at the voltage of node 422, can be pulled to reference voltage, VREF, and then can switch the cross-coupled breech lock, the state of electric crystal 426,432.Therefore, if when the voltage on circuit 410 (IN) is pulled to negative current potential, the output voltage of locating in terminal 438 (OUT) will be pulled low to earthing potential.It should be noted that the switching point that is appreciated that sensing circuit 400 is can be by the suitable impedance value of selecting for pullup resistor 408, and adjusted for the proper width of these electric crystals shown at Fig. 4 and channel size.
Fig. 5 is a circuit diagram that shows an embodiment of a control logic circuit 500, and it can be used to carry out control logic circuit 308 shown in Fig. 3.In addition, for example, control logic circuit 500 also can be used to carry out logical circuit 208 shown in Fig. 2.Refer to Fig. 5, control logic circuit 500 comprises one first entry terminal (ON), and it is connected to one first input of an AND gate 504 by a circuit 502.For example, this first entry terminal (ON) can be connected to the circuit 319 be shown in Fig. 3.The output of AND gate 504 is to be connected to the input of first accurate deviator 506 by a circuit 505.The output of the accurate deviator 506 in position is connected to one first outlet terminal (INB) of control logic circuit 500 by circuit 508.
Extraly, this second entry terminal (OUT) is to be connected to the input of one the 3rd phase inverter 526 by a circuit 524.The output of phase inverter 526 is to be connected to one the 3rd outlet terminal (NEGOV) of control logic circuit 500 by a circuit 528.In addition, each accurate deviator 506,520 can be adjusted to receive a skew and be controlled voltage (6V_CP or VDD), to be used for being offset to one of them of these voltage levels VDD or 6V_CP in the position standard of inputting respectively the voltage that the IN place receives of this accurate deviator 506,520.
In operation, control logic circuit 500 can be enabled and receive these input voltages ON, OUT, and produces and these voltage of output INB, EN and/or NEGOV.With regard in this respect, table 1 (below) is an exemplary truth table (truth table) of listing the possible numerical value that closes the logic function that is connected in control logic circuit 500:
Table 1
For example, refer to table 1, if control logic circuit 500 has received one first input voltage ON and one second input voltage OUT, control logic circuit 500 will be exported these voltage INB, EN.As another example, if control logic circuit 500 has received one first input voltage ON and do not received the second input voltage OUT, control logic circuit 500 will output voltage NEGOV.
Fig. 6 is a circuit diagram that shows an embodiment of a drive circuit 600, and it can be used to carry out this drive circuit 302 shown in Fig. 3.In addition, for example, drive circuit 600 also can be implemented among the switch shown at Fig. 2 204 part part or a part part of electric crystal switch 212 of logical circuit 208 (for example, as).In Fig. 1, drive circuit 600 can be implemented among switch 104, as part part or a part part of electric crystal switch 110 of negative voltage detecting/protected location 108.Refer to Fig. 6, drive circuit 600 comprises one first entry terminal (INB) 602, one second entry terminal (EN) 604 and one the 3rd entry terminal (NEGOV) 606.For example, entry terminal 602,604 and 606 can be connected to respectively circuit shown in Fig. 3 320,322 and 324.
The first entry terminal (INB) 602 can be connected to the signal input of one first inverter buffer 608, the output of this first inverter buffer 608 can be connected to the signal input of one second inverter buffer 610, and one second reference voltage 6V_CP can be connected to the difference voltage supply terminal of the first and second inverter buffer 608,610.The output of the second inverter buffer 610 can be connected to the difference signal input of one the 3rd inverter buffer 612 and one the 4th inverter buffer 614.This reference voltage VREF can be connected to this voltage of the 3rd inverter buffer 612 and supply with terminal, and this second reference voltage 6V_CP can be connected to this voltage supply terminal of the 4th inverter buffer 614.Moreover the second entry terminal (EN) 604 can be connected to the signal input of one the 5th inverter buffer 615, and this second reference voltage 6V_CP can be connected to this voltage supply terminal of the 5th inverter buffer 615.
The output of the 5th inverter buffer 615 can be connected to the gate of one the one P passage electric crystal 616, the output of the 4th inverter buffer 614 can be connected to the gate of one the 2nd P passage electric crystal 618, and the output of the 3rd inverter buffer 612 can be connected to the gate of one the 3rd P passage electric crystal 620.The source electrode of the one P passage electric crystal 616 can be connected to this second reference voltage 6V_CP with and drain can be connected to the source electrode of the 2nd P passage electric crystal 618.Similarly, the drain of the 2nd P passage 618 can be connected to the source electrode of the 3rd P passage electric crystal 620.As illustrated, these P passage electric crystals 616,618,620 can be connected to a cascade framework (cascadedconfiguration).The output of the 3rd inverter buffer 612 also can be connected to the gate of one the one N passage electric crystal 622, and the drain of a N passage electric crystal 622 can be connected to the drain of the 3rd P passage electric crystal 620 and one first outlet terminal (NGATE) 634 of drive circuit 600.For example, the first outlet terminal (NGATE) 634 can be connected to the circuit 312 be shown in Fig. 3.
Extraly, the second entry terminal (EN) 604 can be connected to the signal input of one the 6th inverter buffer 626.The voltage of the 6th inverter buffer 626 is supplied with terminal can be connected to this reference voltage VREF.The output of the 6th inverter buffer 626 can be connected to the difference gate of one the 4th P passage electric crystal 628, one the 2nd N passage electric crystal 630 and one the 3rd N passage electric crystal 632.The source electrode of the 4th P passage electric crystal 628 can be connected to this reference voltage VREF with and drain can be connected to the drain of the 2nd N passage electric crystal 630 and the gate of one the 4th N passage electric crystal 624.The source electrode of the 2nd N passage electric crystal 630 can be connected to the drain of the 3rd N passage electric crystal 632, and the source electrode of the 3rd N passage electric crystal 632 can be connected to one second outlet terminal (NSOURCE) 640 of drive circuit 600.For example, the second outlet terminal (NSOURCE) 640 can be connected to the circuit 314,316 be shown in Fig. 3.Moreover the source electrode of a N passage electric crystal 622 can be connected to the drain of the 4th N passage electric crystal 624, and the source electrode of the 4th N passage electric crystal 624 can be connected to circuit ground.
The 3rd entry terminal (NEGOV) 606 can be connected to the signal input of one the 7th inverter buffer 642.The voltage of the 7th inverter buffer 642 supply with terminal can be connected to this service voltage VDD with and output can be connected to the signal input of one the 8th inverter buffer 644.This voltage of the 8th inverter buffer 644 supply with terminal can be connected to this reference voltage VREF with and output can be connected to the difference gate of one the 5th N passage electric crystal 636 and one the 6th N passage electric crystal 638.The drain of Five-channel electric crystal 636 can be connected to the first outlet terminal (NGATE) 634, with and source electrode can be connected to the drain of the 6th N passage electric crystal 638.The source electrode of the 6th N passage electric crystal 638 can be connected to the second outlet terminal (NSOURCE) 640.As illustrated, the 5th and the 6th N passage electric crystal 636,638 can be used as voltage clamp (voltage clamps).
In one embodiment, these P passage electric crystals that are shown in Fig. 6 are preferably the PFET device, and these N passage electric crystals are preferably the NFET device.The NFET device (630,632) of three pairs, (622,624), (636,638) can be configured to respectively cascade framework (cascaded configurations).In addition, these P well main bodys of these three pairs of cascade NFET devices also can be connected to relative direction, to avoid any parasitic P well/N+ source electrode diode occurring each cascade centering.Moreover in one embodiment, triple well NFET devices can be used to carry out three pairs of NFET devices shown in Fig. 6.
Extraly, in one embodiment, a CMOS phase inverter can be used to carry out each of these eight inverter buffers be shown in Fig. 6.For example, each phase inverter can be carried out an independent PFET device for utilizing source electrode to be connected to positive supply rail (the most positive rail) source electrode of connecting and be connected to an independent NFET device of circuit ground.Under any circumstance, this positive supply rail for these inverter buffers between this reference voltage VREF (for example can be selected to carry, nominal (nominally)+2.2V), this service voltage VDD (for example, nominal+3.3V) or for example, a voltage between one second service voltage 6V_VDD (, nominal+6V).Can minimize the source of drawing voltage (the drain-to-source voltage across each electric crystal for the positive service voltage of NFET and PFET electric crystal and the utilization of cascade configuration, VDS) and lock source voltage (gate-to-source voltage, VGS), and therefore can meet the maximum voltage ability of used manufacturing course.
In operation, refer to Fig. 5 and Fig. 6, the signal voltage on the first outlet terminal (NGATE) 634 can be three kinds of states, that is, " open (on) ", " close (off) " or " clamp (clamped) ", one of them.For example, for example, if this related electric crystal switch (, shown electric crystal switch 304 in Fig. 3) while being unlocked ("On" state), signal at the first and second entry terminal (INB) 602 and (EN) 604 places can be all height, and can be for low at the signal at the 3rd input end (NEGOV) 606 places.Therefore, these P passage electric crystals 616,618,620 and 628 can be unlocked, and these N passage electric crystals 622,636 and 638 can be closed.During this " is somebody's turn to do " state, these clamp electric crystals 636,638 can be closed.Therefore, this output signal NGATE can locate to carry out bias voltage at 6V_CP (clamping voltage).Because N passage electric crystal 622 is closed, so, its comparatively speaking lower leakage just can seriously not affect the position of this clamping voltage 6V_CP accurate.Therefore, this clamping voltage 6V_CP can provide a positive charge side Pu voltage effectively in drive circuit 600 scopes, and afterwards, drive circuit 600 can then see through this electric crystal switch and a suitable conducting resistance (on-resistance) is provided.
For example, if this related electric crystal switch (is closed, "Off" state), can be for low at these signal voltages of this first entry terminal (INB) 602 and the 3rd entry terminal (NEGOV) 606, and this signal voltage on this second entry terminal (EN) 604 can be height.Therefore, these P passage electric crystals 618,620 can be closed, and these N passage electric crystals 622,624 can be unlocked.During this "Off" state, these clamp electric crystals 636,638 can be closed.Therefore, this gate terminal of this related electric crystal switch can be connected to circuit ground, and therefore, this electric crystal switch can stop that any positive signal voltage is by therebetween.
This third state (" clamp ") can be used to stop that any negative signal voltage is by this related electric crystal switch.During this " clamp " state, these signal voltages on this first entry terminal (INB) 602 and the second entry terminal (EN) 604 can be for low, and this signal voltage on the 3rd entry terminal (NEGOV) 606 can be height.For example, when this signal voltage on the 3rd entry terminal (NEGOV) 606 only can this signal voltage on this first entry terminal (IN) 602 becomes lower than this earthing potential, just can uprise.Under this bias condition, these P passage electric crystals 618,620 can be closed, and these N passage electric crystals 630,632 can be unlocked, and therefore, the gate of N passage electric crystal 624 can be by clamp to a negative voltage, and is closed.In addition, these N passage electric crystals 636,638 can be unlocked, and the gate of this related electric crystal switch (for example, in Fig. 3 shown electric crystal switch 304) can by clamp to should negative signal voltage IN (for example, in Fig. 3 on shown circuit 314).Should bear signal voltage by for example, gate clamp by this electric crystal switch (, switch 304) to what receive on its source terminal, this electric crystal switch can be closed (to avoid by this leakage and to stop that any negative signal voltage is by therebetween).
Say and narrate although at this, specific embodiments is carried out to figure, this area tool knows that the knowledgeable it will be appreciated that usually, is presumed to any configuration that can reach identical purpose and all can be used to replace shown specific embodiments.Therefore, the present invention only be intended in by claim and with its etc. justice person and being limited.
Claims (20)
1. an electronic system comprises:
A connector unit, to link up data with a host computer system;
One electronic circuit, to store this data; And
One switch, via this connector unit, this data transmission is transmitted this data to this electronic circuit and from this electronic circuit, wherein, this switch comprises:
One negative voltage protected location, it is coupled at least one End of Data of this connector unit; And
One electric crystal switch; it is coupled to this negative voltage protected location, this connector unit and this electronic circuit; wherein, this negative voltage protected location is when described at least one End of Data place of described connector unit detects a negative voltage to force this electric crystal switch to close.
2. according to 1 described system of claim the, wherein, the negative voltage that this negative voltage protected location detecting receives in this connector unit, and produce a signal and indicate this negative voltage received.
3. according to 1 described system of claim the; wherein; this switch more comprises a logical circuit; it is coupled to this negative voltage protected location and this electric crystal switch; and wherein; the negative voltage that this negative voltage protected location detecting receives on this connector unit; and export one first signal and indicate this negative voltage received; and this logical block responds and receive this first signal and produce one second signal and force this electric crystal switch to close, and protect this electronic circuit to avoid receiving this negative voltage.
4. according to 1 described system of claim the, wherein, this switch more comprises:
One logical circuit, it is coupled to this negative voltage protected location; And
One actuator unit; it is coupled to this logical circuit and this electric crystal switch; and wherein; the negative voltage that this negative voltage protected location detecting receives in this connector unit; and export one first signal and indicate this negative voltage received; and this logical block responds and receives this first signal and produce one second signal and close this electric crystal switch, and this actuator unit to respond this second signal received and produce one the 3rd signal and close this electric crystal switch.
5. according to 1 described system of claim the, wherein, this electric crystal switch is N passage complementary metal oxide semiconductor (CMOS) (CMOS) electric crystal device.
6. according to 1 described system of claim the, wherein, this electric crystal switch is triple wells (triple-well) N channel field effect electric crystals (NFET) device.
7. according to 1 described system of claim the, wherein, this electric crystal is triple well NFET devices that comprise a P well main body, and the earthing potential of this P well main body in this electric crystal switch in being coupled to this switch, between this P well main body and ground connection, to provide a bias voltage.
8. according to 1 described system of claim the, wherein, this electric crystal switch is a NFET device that comprises a P well main body, and if have a negative voltage to be applied to this P well main body of this electric crystal switch, this electric crystal switch can operate block current flow and cut out.
9. according to 1 described system of claim the, wherein, this connector unit is a universal serial bus (USB) connector, and this electric crystal switch is a USB switch, and this electronic circuit is a Portable media apparatus.
10. one kind has the data communication system that negative voltage is protected, and comprising:
One system, it is for the communication data;
One circuit, it is for receiving this data;
Connector, it for transmitting this data between this system and this circuit;
One electric crystal, it comprises an input data terminal, the control terminal for receiving this data and an outlet terminal that is coupled to this circuit;
One sensing circuit, it is coupled to this input data terminal;
One logical circuit, it is coupled to an output of this sensing circuit; And
One drive circuit, it is coupled to output and this control terminal of this electric crystal of this logical circuit, wherein, when this logical circuit detects a negative voltage at this sensing circuit on this input data terminal, makes this drive circuit allow this electric crystal anergy.
11. according to 10 described data communication systems of claim the, wherein:
If this sensing circuit detects a negative voltage on this input data terminal, this sensing circuit produces one first signal and indicates the detecting for this negative voltage, this logical circuit receives this first signal, and produce at least one logic signal, this drive circuit receives this at least one logic signal, and produce a control signal, and this electric crystal receives this control signal, and be closed.
12. according to 10 described data communication systems of claim the, wherein, this electric crystal comprises a P well main body, and if a negative voltage be coupled to this P well main body of this electric crystal, this electric crystal can operate block current flow and close.
13., according to 10 described data communication systems of claim the, wherein, this drive circuit produces a control signal voltage and is supplied with by clamp to a positive voltage.
14., according to 10 described data communication systems of claim the, wherein, this drive circuit produces one and controls signal voltage, with one of them state in a plurality of modes of operation of indicating this electric crystal switch.
15. the method for a negative voltage protection comprises:
Send a voltage signal from a system;
Receive this voltage signal in electronic circuit;
Transmit this voltage signal between this system and this electronic circuit;
Receive this voltage signal on an input data terminal of an electric crystal switch;
Whether this voltage signal that decision receives on this input data terminal is a negative voltage; And
If, when this voltage signal received is a negative voltage, close this electric crystal switch on this input data terminal of this electric crystal switch.
16., according to 15 described methods of claim the, it more comprises:
One sensing circuit is coupled to this input data terminal of this electric crystal switch, wherein, the step of this decision is to carry out by this sensing circuit.
17. according to 15 described methods of claim the, wherein, the step that receives this voltage signal more is included on a P well main body of this electric crystal switch and receives this negative voltage, and the step of closing this electric crystal switch comprises that block current flow passes through this electric crystal switch.
18., according to 15 described methods of claim the, it more comprises:
If this voltage signal received on this input data terminal of this electric crystal switch is a negative voltage, producing a signal voltage, to indicate this voltage signal received on this input data terminal be a negative voltage.
19., according to 15 described methods of claim the, wherein, the step that receives this voltage signal on this input data terminal of this electric crystal switch is included on an entry terminal of triple well N passage electric crystals and receives this voltage signal.
20. according to 15 described methods of claim the, wherein, the step that receives this voltage signal on this input data terminal of this electric crystal switch is included at least one of them the entry terminal of a USB switch, an audio switch, a video switch and a media switch and receives this voltage signal.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US24936209P | 2009-10-07 | 2009-10-07 | |
| US61/249,362 | 2009-10-07 | ||
| US12/761,057 US8385036B2 (en) | 2009-10-07 | 2010-04-15 | System and method for negative voltage protection |
| US12/761,057 | 2010-04-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102035166A CN102035166A (en) | 2011-04-27 |
| CN102035166B true CN102035166B (en) | 2013-12-18 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102907388A Expired - Fee Related CN102035166B (en) | 2009-10-07 | 2010-09-16 | System and method for negative voltage protection |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8385036B2 (en) |
| CN (1) | CN102035166B (en) |
| TW (1) | TWI429158B (en) |
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| CN102931882B (en) * | 2011-08-10 | 2015-07-08 | 快捷半导体(苏州)有限公司 | Power supply module with reverse polarity protection function |
| TWM453285U (en) * | 2012-06-19 | 2013-05-11 | Nuvoton Technology Corp | Connector and control chip |
| TWI484313B (en) * | 2013-08-05 | 2015-05-11 | Nuvoton Technology Corp | Reference voltage generating circuit and voltage adjusting device having negative charge protection mechanism of the same |
| US9838004B2 (en) * | 2015-03-24 | 2017-12-05 | Fairchild Semiconductor Corporation | Enhanced protective multiplexer |
| WO2017119876A1 (en) | 2016-01-06 | 2017-07-13 | Hewlett-Packard Development Company, L.P. | Detection circuits |
| TWI571025B (en) * | 2016-01-21 | 2017-02-11 | 旺玖科技股份有限公司 | Negative voltage protection system |
| US9608616B1 (en) * | 2016-05-27 | 2017-03-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Power clamp circuits and methods |
| CN108628428A (en) * | 2017-03-22 | 2018-10-09 | 鸿富锦精密工业(武汉)有限公司 | Protect circuit |
| US10503235B2 (en) | 2017-10-24 | 2019-12-10 | Hing S Tong | Wake from off state power system |
| US11101673B2 (en) * | 2018-03-13 | 2021-08-24 | Cypress Semiconductor Corporation | Programmable gate driver control in USB power delivery |
| TWI670936B (en) * | 2018-10-22 | 2019-09-01 | 瑞昱半導體股份有限公司 | Interface circuit and method for controlling switching circuit within interface circuit |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN102035166A (en) | 2011-04-27 |
| US8385036B2 (en) | 2013-02-26 |
| TWI429158B (en) | 2014-03-01 |
| US20110080206A1 (en) | 2011-04-07 |
| TW201114135A (en) | 2011-04-16 |
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