CN101996684A - Shift register and touch device - Google Patents

Shift register and touch device Download PDF

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CN101996684A
CN101996684A CN2010105413939A CN201010541393A CN101996684A CN 101996684 A CN101996684 A CN 101996684A CN 2010105413939 A CN2010105413939 A CN 2010105413939A CN 201010541393 A CN201010541393 A CN 201010541393A CN 101996684 A CN101996684 A CN 101996684A
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transistor
drain
source
output terminal
gate
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CN101996684B (en
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林谷亮
施文凯
谢昇良
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AUO Corp
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AU Optronics Corp
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Abstract

The invention relates to a touch device, which comprises a plurality of gate lines, a plurality of pixels, a plurality of sensing control lines and a plurality of sensing units, wherein each pixel is electrically coupled to one of the gate lines to determine whether to receive data according to the potential of the gate line, and each sensing unit is electrically coupled to one of the sensing control lines to determine whether to perform touch sensing operation according to the potential of the sensing control line. The touch device further comprises a shift register string, the shift register string comprises a plurality of shift registers connected in series, each shift register is provided with a first output end and a second output end, the first output end provides a first clock pulse signal to one of the grid lines to control the electric potential of the grid line, the second output end provides a second clock pulse signal to one of the sensing control lines to control the electric potential of the sensing control line, and the first clock pulse signal is different from the second clock pulse signal. The invention also discloses a shift register.

Description

移位寄存器及触控装置 Shift register and touch device

技术领域technical field

本发明涉及一种显示触控技术领域,且特别是有关于一种显示触控面板的触碰点扫描次数决定方法。The present invention relates to the field of display touch technology, and in particular to a method for determining the scanning times of touch points of a display touch panel.

背景技术Background technique

随着科技的发展,平面显示器(例如,液晶显示器)因具有高画质、体积小、重量轻及应用范围广等优点,而被广泛地应用于移动电话、笔记型电脑、桌上型显示装置以及电视等各种消费性电子产品中,并已经逐渐地取代传统的阴极射线管显示器而成为显示器的主流。With the development of technology, flat-panel displays (such as liquid crystal displays) are widely used in mobile phones, notebook computers, and desktop display devices due to their advantages of high image quality, small size, light weight, and wide application range. And various consumer electronic products such as TV, and have gradually replaced the traditional cathode ray tube display and become the mainstream of the display.

触控面板提供了一种新的人机互动的界面,其在使用上更直觉、更符合人性。而将触控面板与平面显示器整合在一起以组合成为显示触控面板,使平面显示器具有触控功能,是平面显示器发展的一种应用趋势。The touch panel provides a new human-computer interaction interface, which is more intuitive and more humane in use. Integrating the touch panel and the flat-panel display to form a display touch panel, so that the flat-panel display has a touch function, is an application trend in the development of the flat-panel display.

为使显示器产品更加薄型化以及其成本更加具竞争力,显示器会趋向于采用阵列上栅极(Gate-On-Array,GOA)型栅极驱动电路来产生栅极驱动信号,而GOA型栅极驱动电路通常包括串接的多个移位寄存器以依序输出多个栅极驱动信号,同时每一移位寄存器的输出还可作为下一级移位寄存器的启始脉冲信号(Start Pulse Signal)。In order to make the display product thinner and its cost more competitive, the display will tend to use the gate-on-array (Gate-On-Array, GOA) type gate drive circuit to generate the gate drive signal, and the GOA type gate The driving circuit usually includes multiple shift registers connected in series to sequentially output multiple gate drive signals, and the output of each shift register can also be used as the start pulse signal (Start Pulse Signal) of the next shift register. .

然而,对于现有技术中整合有电容式触控面板的显示器,由于电容式触控面板通常接受连续的时钟脉冲信号,再利用多路复用器将此时钟脉冲信号分配至各个感测控制线上作为驱动信号(driving signal)来驱动与各个感测控制线电性耦接的感测单元以决定这些感测单元是否进行触碰感测操作,从而致使多路复用器的输出通道(channel)数必需随触控面板的解析度提高而增加;因此,当触控面板的解析度提高时,多路复用器的成本将大幅度提高。However, for a display integrated with a capacitive touch panel in the prior art, since the capacitive touch panel usually receives a continuous clock pulse signal, a multiplexer is used to distribute the clock pulse signal to each sensing control line As a driving signal (driving signal) to drive the sensing units electrically coupled with each sensing control line to determine whether these sensing units perform touch sensing operations, so that the output channel of the multiplexer (channel ) must increase as the resolution of the touch panel increases; therefore, when the resolution of the touch panel increases, the cost of the multiplexer will increase significantly.

发明内容Contents of the invention

本发明的目的之一是提供一种移位寄存器,当其应用于触控装置时可降低触控装置的成本。One of the objectives of the present invention is to provide a shift register, which can reduce the cost of the touch device when applied to the touch device.

本发明的再一目的是提供一种触控装置,以降低成本。Another object of the present invention is to provide a touch device to reduce costs.

本发明实施例提出的一种移位寄存器,包括:上拉模块、输出模块以及稳定模块。其中,上拉模块接收输入信号并将输入信号提供至上拉模块的输出端。输出模块具备第一输出端与第二输出端,输出模块接收相异的第一时钟脉冲信号与第二时钟脉冲信号,且输出模块电性耦接至上拉模块的输出端,以根据上拉模块的输出端上的电位决定是否将第一时钟脉冲信号与第二时钟脉冲信号分别提供至第一输出端与第二输出端。稳定模块电性耦接至上拉模块的输出端、第一输出端与第二输出端,以在预定时段中将上拉模块的输出端、第一输出端与第二输出端稳定至特定电位。A shift register provided by an embodiment of the present invention includes: a pull-up module, an output module and a stabilization module. Wherein, the pull-up module receives the input signal and provides the input signal to the output terminal of the pull-up module. The output module has a first output terminal and a second output terminal, the output module receives different first clock pulse signals and second clock pulse signals, and the output module is electrically coupled to the output terminal of the pull-up module, so as to use the pull-up module The potential on the output end of the first output end determines whether to provide the first clock pulse signal and the second clock pulse signal to the first output end and the second output end respectively. The stabilizing module is electrically coupled to the output terminal, the first output terminal and the second output terminal of the pull-up module to stabilize the output terminal, the first output terminal and the second output terminal of the pull-up module to a specific potential during a predetermined period.

在本发明的实施例中,在第一时钟脉冲信号的致能周期内,第二时钟脉冲信号具有多个脉冲。In an embodiment of the invention, the second clock signal has a plurality of pulses during the enable period of the first clock signal.

在本发明的实施例中,上述的上拉模块可包括晶体管,且晶体管具有栅极、第一源/漏极与第二源/漏极;晶体管的栅极与第一源/漏极同时接收上述的输入信号,晶体管的第二源/漏极为上拉模块的输出端。In an embodiment of the present invention, the above-mentioned pull-up module may include a transistor, and the transistor has a gate, a first source/drain and a second source/drain; the gate of the transistor and the first source/drain simultaneously receive For the above input signal, the second source/drain of the transistor is the output terminal of the pull-up module.

在本发明的实施例中,上述的输出模块可包括第一晶体管与第二晶体管;其中,第一晶体管具有栅极、第一源/漏极与第二源/漏极,第一晶体管的栅极电性耦接至上拉模块的输出端,第一晶体管的第一源/漏极接收第一时钟脉冲信号,第一晶体管的第二源/漏极作为第一输出端;第二晶体管具有栅极、第一源/漏极与第二源/漏极,第二晶体管的栅极电性耦接至上拉模块的输出端,第二晶体管的第一源/漏极接收第二时钟脉冲信号,第二晶体管的第二源/漏极作为第二输出端。In an embodiment of the present invention, the above-mentioned output module may include a first transistor and a second transistor; wherein, the first transistor has a gate, a first source/drain and a second source/drain, and the gate of the first transistor The polarity is electrically coupled to the output end of the pull-up module, the first source/drain of the first transistor receives the first clock pulse signal, and the second source/drain of the first transistor serves as the first output end; the second transistor has a gate electrode, the first source/drain and the second source/drain, the gate of the second transistor is electrically coupled to the output end of the pull-up module, the first source/drain of the second transistor receives the second clock pulse signal, The second source/drain of the second transistor serves as the second output terminal.

在本发明的实施例中,上述的稳定模块可包括第一晶体管、第二晶体管与第三晶体管;其中,第一晶体管具有栅极、第一源/漏极与第二源/漏极,第一晶体管的栅极接收稳定控制信号以在预定时段中开启第一晶体管,第一晶体管的第一源/漏极电性耦接至上拉模块的输出端,第一晶体管的第二源/漏极电性耦接至上述的特定电位;第二晶体管具有栅极、第一源/漏极与第二源/漏极,第二晶体管的栅极接收稳定控制信号以在预定时段中开启第二晶体管,第二晶体管的第一源/漏极电性耦接至第一输出端,第二晶体管的第二源/漏极电性耦接至特定电位;第三晶体管具有栅极、第一源/漏极与第二源/漏极,第三晶体管的栅极接收稳定控制信号以在预定时段中开启第三晶体管,第三晶体管的第一源/漏极电性耦接至第二输出端,第三晶体管的第二源/漏极电性耦接至特定电位。In an embodiment of the present invention, the aforementioned stabilization module may include a first transistor, a second transistor, and a third transistor; wherein, the first transistor has a gate, a first source/drain, and a second source/drain, and the first transistor has a gate, a first source/drain, and a second source/drain, and the second The gate of a transistor receives a stable control signal to turn on the first transistor in a predetermined period, the first source/drain of the first transistor is electrically coupled to the output terminal of the pull-up module, and the second source/drain of the first transistor Electrically coupled to the above-mentioned specific potential; the second transistor has a gate, a first source/drain and a second source/drain, the gate of the second transistor receives a stable control signal to turn on the second transistor in a predetermined period of time , the first source/drain of the second transistor is electrically coupled to the first output terminal, the second source/drain of the second transistor is electrically coupled to a specific potential; the third transistor has a gate, a first source/ The drain and the second source/drain, the gate of the third transistor receives a stable control signal to turn on the third transistor in a predetermined period, the first source/drain of the third transistor is electrically coupled to the second output terminal, The second source/drain of the third transistor is electrically coupled to a specific potential.

本发明实施例提出的一种触控装置,包括多个栅极线、多个像素、多个感测控制线及多个感测单元;每一像素电性耦接至栅极线之一以根据所电性耦接的栅极线的电位而决定是否接收数据,每一感测单元电性耦接至感测控制线之一以根据所电性耦接的感测控制线的电位而决定是否进行触碰感测操作。再者,触控装置更包括移位寄存器串,其中移位寄存器串包括串接的多个移位寄存器,每一移位寄存器具有第一输出端与第二输出端,第一输出端提供第一时钟脉冲信号至栅极线之一以控制此栅极线的电位,第二输出端提供第二时钟脉冲信号至感测控制线之一以控制此感测控制线的电位,且第一时钟脉冲信号与第二时钟脉冲信号不同(例如,在第一时钟脉冲信号的致能周期,第二时钟脉冲信号具有多个脉冲)。A touch device provided by an embodiment of the present invention includes a plurality of gate lines, a plurality of pixels, a plurality of sensing control lines, and a plurality of sensing units; each pixel is electrically coupled to one of the gate lines to Whether to receive data is determined according to the potential of the electrically coupled gate line, and each sensing unit is electrically coupled to one of the sensing control lines to be determined according to the potential of the electrically coupled sensing control line Whether to perform touch sensing operations. Moreover, the touch device further includes a shift register string, wherein the shift register string includes a plurality of shift registers connected in series, each shift register has a first output end and a second output end, and the first output end provides a second output end. a clock pulse signal to one of the gate lines to control the potential of the gate line, the second output terminal provides a second clock pulse signal to one of the sensing control lines to control the potential of the sensing control line, and the first clock The pulse signal is different from the second clock signal (for example, the second clock signal has a plurality of pulses during the enable period of the first clock signal).

本发明实施例通过对移位寄存器进行特定的电路设计(例如,采用二个晶体管来同时输出栅极驱动信号与触控驱动信号)并搭配复合式控制时序(例如,采用多个不同频率的时钟脉冲信号),能大幅减少因触控面板解析度提高而产生的成本支出。In the embodiment of the present invention, a specific circuit design is performed on the shift register (for example, using two transistors to simultaneously output the gate driving signal and the touch driving signal) and combined with a composite control sequence (for example, using multiple clocks with different frequencies pulse signal), which can greatly reduce the cost incurred due to the improvement of the resolution of the touch panel.

为让本发明的上述和其他目的、特征和优点能更明显易懂,下文特举较佳实施例,并配合所附附图,作详细说明如下。In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.

附图说明Description of drawings

图1绘示出本发明实施例的触控装置的结构示意图;FIG. 1 shows a schematic structural diagram of a touch device according to an embodiment of the present invention;

图2绘示出图1所示触控装置中的移位寄存器的内部电路结构示意图;FIG. 2 shows a schematic diagram of the internal circuit structure of the shift register in the touch device shown in FIG. 1;

图3绘示出相关于图1所示触控装置的多个信号的时序图。FIG. 3 shows a timing diagram of a plurality of signals related to the touch device shown in FIG. 1 .

其中,附图标记Among them, reference signs

10:触控装置               11:显示部10: Touch device 11: Display

110:栅极线                112:数据线110: Gate line 112: Data line

114:像素                  13:触控部114: pixel 13: touch control department

130:感测控制线            132:读取线130: Sensing control line 132: Reading line

134:感测单元                          15:移位寄存器串134: Sensing unit 15: Shift register string

SR(n)、SR(n+1)、SR(n+2):移位寄存器    151:上拉模块SR(n), SR(n+1), SR(n+2): shift register 151: pull-up module

153:输出模块                          155:稳定模块153: Output module 155: Stability module

ST:启始脉冲信号                       Vss:接地电位ST: start pulse signal Vss: ground potential

STN(n-1)、STN(n)、STN(n+1)、STN(n+2)、STN(n+3):栅极驱动信号STN(n-1), STN(n), STN(n+1), STN(n+2), STN(n+3): gate drive signal

N(n)、N(n+1)、N(n+2):触控驱动信号N(n), N(n+1), N(n+2): touch drive signal

CK1、CK2、XCK1、XCK2:时钟脉冲信号     T1~T6:晶体管CK1, CK2, XCK1, XCK2: Clock pulse signal T1~T6: Transistor

Q(n):致能信号                         DT1、DT2:致能周期Q(n): enable signal DT1, DT2: enable cycle

具体实施方式Detailed ways

请参阅图1,其绘示出本发明实施例的触控装置的结构示意图。如图1所示,触控装置10在此兼具显示及触控功能,其包括显示部11、触控部13与移位寄存器串15。其中,显示部11包括多个栅极线110、多个数据线112以及多个像素114;栅极线110与数据线112分别沿两个相异的方向延伸,且每一像素114电性耦接至栅极线110之一与数据线112之一,以根据所电性耦接的栅极线111上的电位而决定是否从数据线112接收显示数据。触控部13包括多个感测控制线130、多个读取线132以及多个感测单元134;感测控制线130与读取线132沿两个相异的方向延伸,且每一感测单元134电性耦接至感测控制线130之一与读取线132之一,以根据所电性耦接的感测控制线130上的电位而进行触碰感测操作。当某一感测单元134进行触碰感测操作时,可从此感测单元134所电性耦接的读取线132上将触碰结果读取出来。在此需要说明的是,图1中示出的栅极线110、数据线112、像素114、感测控制线130、读取线132以及感测单元134的数量仅为举例说明,并非用来限制本发明。Please refer to FIG. 1 , which is a schematic structural diagram of a touch device according to an embodiment of the present invention. As shown in FIG. 1 , the touch device 10 has both display and touch functions, and includes a display portion 11 , a touch portion 13 and a shift register string 15 . Wherein, the display portion 11 includes a plurality of gate lines 110, a plurality of data lines 112 and a plurality of pixels 114; the gate lines 110 and the data lines 112 respectively extend along two different directions, and each pixel 114 is electrically coupled connected to one of the gate lines 110 and one of the data lines 112 to determine whether to receive display data from the data lines 112 according to the potential on the electrically coupled gate lines 111 . The touch part 13 includes a plurality of sensing control lines 130, a plurality of reading lines 132 and a plurality of sensing units 134; the sensing control lines 130 and the reading lines 132 extend along two different directions, and each sensor The detection unit 134 is electrically coupled to one of the sensing control lines 130 and one of the reading lines 132 to perform a touch sensing operation according to the potential on the electrically coupled sensing control line 130 . When a certain sensing unit 134 performs a touch sensing operation, the touch result can be read out from the reading line 132 electrically coupled to the sensing unit 134 . It should be noted here that the numbers of gate lines 110, data lines 112, pixels 114, sensing control lines 130, reading lines 132 and sensing units 134 shown in FIG. limit the invention.

承上述,移位寄存器串15接收外部电路例如时序控制器(Timing Controller)提供的时钟脉冲信号CK1、XCK1、CK2、XCK2以及启始脉冲信号ST,且包括串接的多个移位寄存器例如SR(n)、SR(n+1)及SR(n+2)。每一移位寄存器SR(n)、SR(n+1)及SR(n+2)依据二时钟脉冲信号(例如CK1与CK2,或者XCK1与XCK2)而在其二输出端分别输出栅极驱动信号STN(n)、STN(n+1)及STN(n+2)中的一相应者与触控驱动信号N(n)、N(n+1)及N(n+2)中的一相应者;在此,各个移位寄存器SR(n)、SR(n+1)及SR(n+2)的输出栅极驱动信号STN(n)、STN(n+1)及STN(n+2)的输出端电性耦接至显示部11的栅极线110,且其输出触控驱动信号N(n)、N(n+1)及N(n+2)的输出端则电性耦接至触控部13的感测控制线130。Based on the above, the shift register string 15 receives the clock pulse signals CK1, XCK1, CK2, XCK2 and the start pulse signal ST provided by an external circuit such as a timing controller (Timing Controller), and includes a plurality of shift registers connected in series such as SR (n), SR(n+1) and SR(n+2). Each of the shift registers SR(n), SR(n+1) and SR(n+2) respectively outputs gate drive at its two output terminals according to two clock pulse signals (such as CK1 and CK2, or XCK1 and XCK2). One of the signals STN(n), STN(n+1) and STN(n+2) corresponding to one of the touch driving signals N(n), N(n+1) and N(n+2) Correspondingly; here, the output gate drive signals STN(n), STN(n+1) and STN(n+ 2) The output end is electrically coupled to the gate line 110 of the display portion 11, and the output end of which outputs touch driving signals N(n), N(n+1) and N(n+2) is electrically coupled The sensing control line 130 is coupled to the touch portion 13 .

更具体地,移位寄存器SR(n)接收时钟脉冲信号CK1及CK2与接地电位Vss,并接受栅极驱动信号STN(n-1)与STN(n+1)的控制,以依据时钟脉冲信号CK1及CK2分别输出栅极驱动信号STN(n)及触控驱动信号N(n)至显示部11的栅极线110与触控部13的感测控制线130。类似地,移位寄存器SR(n+1)接收时钟脉冲信号XCK1及XCK2与接地电位Vss,并接受栅极驱动信号STN(n)与STN(n+2)的控制,以依据时钟脉冲信号XCK1及XCK2分别输出栅极驱动信号STN(n+1)及触控驱动信号N(n+1)至显示部11的栅极线110与触控部13的感测控制线130;移位寄存器SR(n+2)接收时钟脉冲信号CK1及CK2与接地电位Vss,并接受栅极驱动信号STN(n+1)与STN(n+3)的控制,以依据时钟脉冲信号CK1及CK2分别输出栅极驱动信号STN(n+2)及触控驱动信号N(n+2)至显示部11的栅极线110与触控部13的感测控制线130。More specifically, the shift register SR(n) receives the clock pulse signals CK1 and CK2 and the ground potential Vss, and is controlled by the gate driving signals STN(n-1) and STN(n+1), so as to CK1 and CK2 respectively output the gate driving signal STN(n) and the touch driving signal N(n) to the gate line 110 of the display portion 11 and the sensing control line 130 of the touch portion 13 . Similarly, the shift register SR(n+1) receives the clock pulse signals XCK1 and XCK2 and the ground potential Vss, and is controlled by the gate driving signals STN(n) and STN(n+2), so as to be controlled by the clock pulse signal XCK1 and XCK2 respectively output the gate drive signal STN(n+1) and the touch drive signal N(n+1) to the gate line 110 of the display part 11 and the sensing control line 130 of the touch part 13; the shift register SR (n+2) receives the clock pulse signals CK1 and CK2 and the ground potential Vss, and accepts the control of the gate drive signals STN(n+1) and STN(n+3), so as to output the gate respectively according to the clock pulse signals CK1 and CK2 The pole driving signal STN(n+2) and the touch driving signal N(n+2) are sent to the gate line 110 of the display part 11 and the sensing control line 130 of the touch part 13 .

请参阅图2,其绘示出相关于图1所示触控装置10的时钟脉冲信号CK1、XCK1、CK2及XCK2,栅极驱动信号STN(n)、STN(n+1)及STN(n+2)与触控驱动信号N(n)、N(n+1)及N(n+2)的时序图。从图2中可以得知,时钟脉冲信号CK2相较于CK1具有较高的频率,在时钟脉冲信号CK1的致能周期DT1内,时钟脉冲信号CK2具有多个脉冲;而在时钟脉冲信号CK1的禁能周期(图3中未标示)内,时钟脉冲信号CK2无脉冲。类似地,时钟脉冲信号XCK2相较于XCK1具有较高的频率,在时钟脉冲信号XCK1的致能周期DT2内,时钟脉冲信号XCK2具有多个脉冲;而在时钟脉冲信号XCK1的禁能周期内,时钟脉冲信号XCK2无脉冲。再者,栅极驱动信号STN(n)、STN(n+1)及STN(n+2)依序输出,且触控驱动信号N(n)、N(n+1)及N(n+2)也依序输出;并且同一移位寄存器例如SR(n)输出的栅极驱动信号例如STN(n)与触控驱动信号例如N(n)同步输出。Please refer to FIG. 2 , which shows the gate driving signals STN(n), STN(n+1) and STN(n) related to the clock pulse signals CK1, XCK1, CK2 and XCK2 of the touch device 10 shown in FIG. +2) and the timing diagram of touch driving signals N(n), N(n+1) and N(n+2). It can be known from FIG. 2 that the clock pulse signal CK2 has a higher frequency than CK1. In the enabling period DT1 of the clock pulse signal CK1, the clock pulse signal CK2 has multiple pulses; while in the clock pulse signal CK1 During the disable period (not shown in FIG. 3 ), the clock pulse signal CK2 has no pulse. Similarly, the clock pulse signal XCK2 has a higher frequency than XCK1. During the enable period DT2 of the clock pulse signal XCK1, the clock pulse signal XCK2 has multiple pulses; and during the disable period of the clock pulse signal XCK1, The clock pulse signal XCK2 has no pulse. Furthermore, the gate driving signals STN(n), STN(n+1) and STN(n+2) are sequentially output, and the touch driving signals N(n), N(n+1) and N(n+ 2) are also output sequentially; and the gate driving signal such as STN(n) output by the same shift register such as SR(n) is output synchronously with the touch driving signal such as N(n).

下面将详细描述图1所示触控装置10中的各个移位寄存器SR(n)、SR(n+1)及SR(n+2)的内部电路结构,以借此说明各个移位寄存器SR(n)、SR(n+1)及SR(n+2)依据二不同频率的时钟脉冲信号来同时产生栅极驱动信号与触控驱动信号的工作原理。本发明实施例中,由于各个SR(n)、SR(n+1)及SR(n+2)可具有相同的内部电路结构,因此以下仅以移位寄存器SR(n)作为代表进行举例说明。如图3所示,移位寄存器SR(n)包括上拉模块151、输出模块153与稳定模块155。The internal circuit structure of each shift register SR(n), SR(n+1) and SR(n+2) in the touch device 10 shown in FIG. 1 will be described in detail below, so as to illustrate each shift register SR (n), SR(n+1) and SR(n+2) simultaneously generate the gate driving signal and the touch driving signal according to the working principle of two clock pulse signals with different frequencies. In the embodiment of the present invention, since each SR(n), SR(n+1) and SR(n+2) may have the same internal circuit structure, the following only uses the shift register SR(n) as an example for illustration . As shown in FIG. 3 , the shift register SR(n) includes a pull-up module 151 , an output module 153 and a stabilization module 155 .

其中,上拉模块151包括晶体管T1,晶体管T1具有栅极、漏/源极以及源/漏极,晶体管T1的栅极与漏/源极同时接收上一级移位寄存器输出的栅极驱动信号STN(n-1)作为输入信号,晶体管T1的源/漏极作为上拉模块151的输出端以输出致能信号Q(n)。Wherein, the pull-up module 151 includes a transistor T1, and the transistor T1 has a gate, a drain/source, and a source/drain, and the gate and the drain/source of the transistor T1 simultaneously receive the gate drive signal output by the upper-stage shift register STN(n−1) is used as the input signal, and the source/drain of the transistor T1 is used as the output terminal of the pull-up module 151 to output the enabling signal Q(n).

输出模块153包括晶体管T2及T3,晶体管T2及T3皆具有栅极、漏/源极以及源/漏极,晶体管T2及T3的栅极皆电性耦接至上拉模块151的输出端以根据致能信号Q(n)的电位决定是否开启晶体管T2及T3,晶体管T2的漏/源极接收时钟脉冲信号CK1,晶体管T2的源/漏极作为栅极驱动信号STN(n)的输出端,晶体管T3的漏/源极接收时钟脉冲信号CK2,晶体管T3的源/漏极作为触控驱动信号N(n)的输出端。本实施例中,当致能信号Q(n)为高电位期间,晶体管T2及T3皆开启,时钟脉冲信号CK1及CK2分别通过开启的晶体管T2及T3传递至输出模块153的二输出端;而当致能信号Q(n)跳变为低电位后,晶体管T2及T3皆截止,时钟脉冲信号CK1及CK2则停止传递至输出模块153的二输出端。The output module 153 includes transistors T2 and T3. The transistors T2 and T3 both have a gate, drain/source and source/drain. The gates of the transistors T2 and T3 are electrically coupled to the output terminal of the pull-up module 151 to achieve The potential of the enable signal Q(n) determines whether to turn on the transistors T2 and T3, the drain/source of the transistor T2 receives the clock pulse signal CK1, the source/drain of the transistor T2 serves as the output terminal of the gate drive signal STN(n), and the transistor T2 The drain/source of the transistor T3 receives the clock pulse signal CK2, and the source/drain of the transistor T3 serves as an output terminal of the touch driving signal N(n). In this embodiment, when the enabling signal Q(n) is at a high potential, the transistors T2 and T3 are both turned on, and the clock pulse signals CK1 and CK2 are transmitted to the two output terminals of the output module 153 through the turned-on transistors T2 and T3 respectively; When the enabling signal Q(n) transitions to a low potential, both the transistors T2 and T3 are turned off, and the clock pulse signals CK1 and CK2 stop being transmitted to the two output terminals of the output module 153 .

承上述,稳定模块155包括晶体管T4、T5及T6;其中,晶体管T4、T5及T6皆具有栅极、漏/源极以及源/漏极,晶体管T4、T5及T6的栅极皆接收下一级移位寄存器输出的栅极驱动信号STN(n+1)作为稳定控制信号,晶体管T4的漏/源极电性耦接至上拉模块的输出端,晶体管T5及T6的漏/源极分别电性耦接至输出模块153的二输出端,晶体管T4、T5及T6的源/漏极皆电性耦接至特定电位例如接地电位Vss。本实施例中,当稳定控制信号STN(n+1)为高电位期间,晶体管T2及T3截止,晶体管T4、T5及T6皆开启,从而将上拉模块151的输出端以及输出模块153的二输出端上的电位拉至接地电位Vss。Based on the above, the stabilizing module 155 includes transistors T4, T5 and T6; wherein, the transistors T4, T5 and T6 all have a gate, a drain/source and a source/drain, and the gates of the transistors T4, T5 and T6 all receive the next The gate drive signal STN(n+1) output by the stage shift register is used as a stable control signal, the drain/source of transistor T4 is electrically coupled to the output terminal of the pull-up module, and the drain/source of transistor T5 and T6 are electrically connected to The source/drain of the transistors T4, T5 and T6 are all electrically coupled to a specific potential such as the ground potential Vss. In this embodiment, when the stable control signal STN(n+1) is at a high potential, the transistors T2 and T3 are turned off, and the transistors T4, T5 and T6 are all turned on, so that the output terminal of the pull-up module 151 and the two terminals of the output module 153 are turned on. The potential on the output is pulled to ground potential Vss.

在此需要说明的是,移位寄存器SR(n)并不限于采用STN(n-1)作为上述的输入信号,也不限于采用STN(n+1)作为上述的稳定控制信号,具体采用何种信号作为上述的输入信号及稳定控制信号可由设计人员弹性设定;此外,移位寄存器SR(n)中的上拉模块151、输出模块153及稳定模块155并不限于图3所示的电路结构,只要能实现依据多个时钟脉冲信号同时输出具有不同频率的栅极驱动信号与触控驱动信号均可。It should be noted here that the shift register SR(n) is not limited to using STN(n-1) as the above-mentioned input signal, nor is it limited to using STN(n+1) as the above-mentioned stable control signal. The above-mentioned input signal and stable control signal can be flexibly set by designers; in addition, the pull-up module 151, output module 153 and stable module 155 in the shift register SR(n) are not limited to the circuit shown in Figure 3 structure, as long as the gate driving signal and the touch driving signal with different frequencies can be simultaneously output according to a plurality of clock pulse signals.

综上所述,本发明实施例通过对移位寄存器进行特定的电路设计(例如采用二晶体管来同时输出栅极驱动信号与触控驱动信号)并搭配复合式控制时序(例如采用多个不同频率的时钟脉冲信号),能大幅减少因触控面板解析度提高而产生的成本支出。To sum up, the embodiment of the present invention implements a specific circuit design for the shift register (for example, using two transistors to simultaneously output the gate driving signal and the touch driving signal) and cooperates with a composite control sequence (for example, using multiple different frequency clock pulse signal), which can greatly reduce the cost incurred due to the improvement of the resolution of the touch panel.

当然,本发明还可有其它多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员当可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。Certainly, the present invention also can have other multiple embodiments, without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and deformations according to the present invention, but these corresponding Changes and deformations should belong to the scope of protection of the appended claims of the present invention.

Claims (11)

1.一种移位寄存器,其特征在于,包括:1. A shift register, characterized in that, comprising: 一上拉模块,接收一输入信号,并将该输入信号提供至该上拉模块的输出端;A pull-up module, receiving an input signal and providing the input signal to the output terminal of the pull-up module; 一输出模块,具备一第一输出端与一第二输出端,该输出模块接收相异的一第一时钟脉冲信号与一第二时钟脉冲信号,且该输出模块电性耦接至该上拉模块的输出端,以根据该上拉模块的输出端上的电位决定是否将该第一时钟脉冲信号与该第二时钟脉冲信号分别提供至该第一输出端与该第二输出端;以及An output module has a first output terminal and a second output terminal, the output module receives a different first clock signal and a second clock signal, and the output module is electrically coupled to the pull-up The output terminal of the module is used to determine whether to provide the first clock pulse signal and the second clock pulse signal to the first output terminal and the second output terminal respectively according to the potential on the output terminal of the pull-up module; and 一稳定模块,电性耦接至该上拉模块的输出端、该第一输出端与该第二输出端,以在一预定时段中将该上拉模块的输出端、该第一输出端与该第二输出端稳定至一特定电位。a stabilizing module, electrically coupled to the output terminal of the pull-up module, the first output terminal and the second output terminal, so as to make the output terminal of the pull-up module, the first output terminal and the second output terminal in a predetermined period of time The second output terminal is stable to a specific potential. 2.根据权利要求1所述的移位寄存器,其特征在于,在该第一时钟脉冲信号的一致能周期内,该第二时钟脉冲信号具有多个脉冲。2 . The shift register according to claim 1 , wherein the second clock signal has a plurality of pulses in an enabled period of the first clock signal. 3 . 3.根据权利要求1所述的移位寄存器,其特征在于,该上拉模块包括一晶体管,该晶体管具有栅极、第一源/漏极与第二源/漏极,该晶体管的栅极与第一源/漏极同时接收该输入信号,该晶体管的第二源/漏极为该上拉模块的输出端。3. The shift register according to claim 1, wherein the pull-up module comprises a transistor, the transistor has a gate, a first source/drain and a second source/drain, the gate of the transistor The input signal is received simultaneously with the first source/drain, and the second source/drain of the transistor is the output terminal of the pull-up module. 4.根据权利要求1所述的移位寄存器,其特征在于,该输出模块包括:4. shift register according to claim 1, is characterized in that, this output module comprises: 一第一晶体管,具有栅极、第一源/漏极与第二源/漏极,该第一晶体管的栅极电性耦接至该上拉模块的输出端,该第一晶体管的第一源/漏极接收该第一时钟脉冲信号,该第一晶体管的第二源/漏极作为该第一输出端;以及A first transistor has a gate, a first source/drain and a second source/drain, the gate of the first transistor is electrically coupled to the output terminal of the pull-up module, the first transistor of the first transistor is The source/drain receives the first clock pulse signal, and the second source/drain of the first transistor serves as the first output terminal; and 一第二晶体管,具有栅极、第一源/漏极与第二源/漏极,该第二晶体管的栅极电性耦接至该上拉模块的输出端,该第二晶体管的第一源/漏极接收该第二时钟脉冲信号,该第二晶体管的第二源/漏极作为该第二输出端。A second transistor has a gate, a first source/drain and a second source/drain, the gate of the second transistor is electrically coupled to the output terminal of the pull-up module, the first of the second transistor The source/drain receives the second clock pulse signal, and the second source/drain of the second transistor serves as the second output terminal. 5.根据权利要求1所述的移位寄存器,其特征在于,该稳定模块包括:5. The shift register according to claim 1, wherein the stabilizing module comprises: 一第一晶体管,具有栅极、第一源/漏极与第二源/漏极,该第一晶体管的栅极接收一稳定控制信号以在该预定时段中开启该第一晶体管,该第一晶体管的第一源/漏极电性耦接至该上拉模块的输出端,该第一晶体管的第二源/漏极电性耦接至该特定电位;A first transistor has a gate, a first source/drain and a second source/drain, the gate of the first transistor receives a stable control signal to turn on the first transistor in the predetermined period, the first The first source/drain of the transistor is electrically coupled to the output terminal of the pull-up module, and the second source/drain of the first transistor is electrically coupled to the specific potential; 一第二晶体管,具有栅极、第一源/漏极与第二源/漏极,该第二晶体管的栅极接收该稳定控制信号以在该预定时段中开启该第二晶体管,该第二晶体管的第一源/漏极电性耦接至该第一输出端,该第二晶体管的第二源/漏极电性耦接至该特定电位;以及A second transistor has a gate, a first source/drain and a second source/drain, the gate of the second transistor receives the stable control signal to turn on the second transistor in the predetermined period, the second the first source/drain of the transistor is electrically coupled to the first output terminal, and the second source/drain of the second transistor is electrically coupled to the specific potential; and 一第三晶体管,具有栅极、第一源/漏极与第二源/漏极,该第三晶体管的栅极接收该稳定控制信号以在该预定时段中开启该第三晶体管,该第三晶体管的第一源/漏极电性耦接至该第二输出端,该第三晶体管的第二源/漏极电性耦接至该特定电位。A third transistor has a gate, a first source/drain and a second source/drain, the gate of the third transistor receives the stable control signal to turn on the third transistor in the predetermined period, the third The first source/drain of the transistor is electrically coupled to the second output terminal, and the second source/drain of the third transistor is electrically coupled to the specific potential. 6.一种触控装置,包括多个栅极线、多个像素、多个感测控制线及多个感测单元,每一这些像素分别电性耦接至这些栅极线之一以根据所电性耦接的该栅极线的电位而决定是否接收数据,每一这些感测单元电性耦接至这些感测控制线之一以根据所电性耦接的该感测控制线的电位而进行触碰感测操作,其特征在于:6. A touch device, comprising a plurality of gate lines, a plurality of pixels, a plurality of sensing control lines and a plurality of sensing units, each of these pixels is respectively electrically coupled to one of the gate lines for Whether to receive data is determined by the potential of the electrically coupled gate line, and each of the sensing units is electrically coupled to one of the sensing control lines so as to be based on the electrically coupled sensing control line Potential to perform touch sensing operation, characterized in that: 该触控装置更包括一移位寄存器串,该移位寄存器串包括串接的多个移位寄存器,每一这些移位寄存器具有一第一输出端与一第二输出端,该第一输出端提供一第一时钟脉冲信号至这些栅极线之一以控制该栅极线的电位,该第二输出端提供一第二时钟脉冲信号至这些感测控制线之一以控制该感测控制线的电位,且该第一时钟脉冲信号与该第二时钟脉冲信号不同。The touch device further includes a shift register string, the shift register string includes a plurality of shift registers connected in series, each of these shift registers has a first output end and a second output end, the first output The terminal provides a first clock pulse signal to one of the gate lines to control the potential of the gate line, and the second output terminal provides a second clock signal to one of the sensing control lines to control the sensing control The potential of the line, and the first clock signal is different from the second clock signal. 7.根据权利要求6所述的触控装置,其特征在于,在该第一时钟脉冲信号的一致能周期内,该第二时钟脉冲信号具有多个脉冲。7 . The touch device according to claim 6 , wherein the second clock signal has a plurality of pulses within an enable period of the first clock signal. 8.根据权利要求6所述的触控装置,其特征在于,每一这些移位寄存器包括:8. The touch device according to claim 6, wherein each of these shift registers comprises: 一上拉模块,接收一输入信号,并将该输入信号提供至该上拉模块的输出端;A pull-up module, receiving an input signal and providing the input signal to the output terminal of the pull-up module; 一输出模块,具备该第一输出端与该第二输出端,该输出模块接收该第一时钟脉冲信号与该第二时钟脉冲信号,且该输出模块电性耦接至该上拉模块的输出端,以根据该上拉模块的输出端上的电位决定是否将该第一时钟脉冲信号与该第二时钟脉冲信号分别提供至该第一输出端与该第二输出端;以及An output module, having the first output terminal and the second output terminal, the output module receives the first clock pulse signal and the second clock pulse signal, and the output module is electrically coupled to the output of the pull-up module terminal, to determine whether to provide the first clock signal and the second clock signal to the first output terminal and the second output terminal respectively according to the potential on the output terminal of the pull-up module; and 一稳定模块,电性耦接至该上拉模块的输出端、该第一输出端与该第二输出端以在一预定时段中将该上拉模块的输出端、该第一输出端与该第二输出端稳定至一特定电位。A stabilizing module, electrically coupled to the output terminal of the pull-up module, the first output terminal and the second output terminal so as to connect the output terminal of the pull-up module, the first output terminal and the second output terminal within a predetermined period of time The second output terminal is stable to a specific potential. 9.根据权利要求8所述的触控装置,其特征在于,该上拉模块包括一晶体管,该晶体管具有栅极、第一源/漏极与第二源/漏极,该晶体管的栅极与第一源/漏极同时接收该输入信号,该晶体管的第二源/漏极为该上拉模块的输出端。9. The touch device according to claim 8, wherein the pull-up module comprises a transistor, the transistor has a gate, a first source/drain and a second source/drain, the gate of the transistor The input signal is received simultaneously with the first source/drain, and the second source/drain of the transistor is the output terminal of the pull-up module. 10.根据权利要求8所述的触控装置,其特征在于,该输出模块包括:10. The touch device according to claim 8, wherein the output module comprises: 一第一晶体管,具有栅极、第一源/漏极与第二源/漏极,该第一晶体管的栅极电性耦接至该上拉模块的输出端,该第一晶体管的第一源/漏极接收该第一时钟脉冲信号,该第一晶体管的第二源/漏极作为该第一输出端;以及A first transistor has a gate, a first source/drain and a second source/drain, the gate of the first transistor is electrically coupled to the output terminal of the pull-up module, the first transistor of the first transistor is The source/drain receives the first clock pulse signal, and the second source/drain of the first transistor serves as the first output terminal; and 一第二晶体管,具有栅极、第一源/漏极与第二源/漏极,该第二晶体管的栅极电性耦接至该上拉模块的输出端,该第二晶体管的第一源/漏极接收该第二时钟脉冲信号,该第一晶体管的第二源/漏极作为该第二输出端。A second transistor has a gate, a first source/drain and a second source/drain, the gate of the second transistor is electrically coupled to the output terminal of the pull-up module, the first of the second transistor The source/drain receives the second clock pulse signal, and the second source/drain of the first transistor serves as the second output terminal. 11.根据权利要求8所述的触控装置,其特征在于,该稳定模块包括:11. The touch device according to claim 8, wherein the stabilization module comprises: 一第一晶体管,具有栅极、第一源/漏极与第二源/漏极,该第一晶体管的栅极接收一稳定控制信号以在该预定时段中开启该第一晶体管,该第一晶体管的第一源/漏极电性耦接至该上拉模块的输出端,该第一晶体管的第二源/漏极电性耦接至该特定电位;A first transistor has a gate, a first source/drain and a second source/drain, the gate of the first transistor receives a stable control signal to turn on the first transistor in the predetermined period, the first The first source/drain of the transistor is electrically coupled to the output terminal of the pull-up module, and the second source/drain of the first transistor is electrically coupled to the specific potential; 一第二晶体管,具有栅极、第一源/漏极与第二源/漏极,该第二晶体管的栅极接收该稳定控制信号以在该预定时段中开启该第二晶体管,该第二晶体管的第一源/漏极电性耦接至该第一输出端,该第二晶体管的第二源/漏极电性耦接至该特定电位;以及A second transistor has a gate, a first source/drain and a second source/drain, the gate of the second transistor receives the stable control signal to turn on the second transistor in the predetermined period, the second the first source/drain of the transistor is electrically coupled to the first output terminal, and the second source/drain of the second transistor is electrically coupled to the specific potential; and 一第三晶体管,具有栅极、第一源/漏极与第二源/漏极,该第三晶体管的栅极接收该稳定控制信号以在该预定时段中开启该第三晶体管,该第三晶体管的第一源/漏极电性耦接至该第二输出端,该第三晶体管的第二源/漏极电性耦接至该特定电位。A third transistor has a gate, a first source/drain and a second source/drain, the gate of the third transistor receives the stable control signal to turn on the third transistor in the predetermined period, the third The first source/drain of the transistor is electrically coupled to the second output terminal, and the second source/drain of the third transistor is electrically coupled to the specific potential.
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