CN101976654A - Method for enhancing radiation resistant characteristic of LDMOS (Laterally Diffused Metal Oxide Semiconductor) - Google Patents

Method for enhancing radiation resistant characteristic of LDMOS (Laterally Diffused Metal Oxide Semiconductor) Download PDF

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Publication number
CN101976654A
CN101976654A CN 201010280674 CN201010280674A CN101976654A CN 101976654 A CN101976654 A CN 101976654A CN 201010280674 CN201010280674 CN 201010280674 CN 201010280674 A CN201010280674 A CN 201010280674A CN 101976654 A CN101976654 A CN 101976654A
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dielectric layer
ldmos
drift region
type ldmos
type
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薛守斌
杨东
黄如
张兴
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Peking University
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Peking University
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Abstract

The invention provides a method for enhancing the radiation resistant characteristic of an LDMOS (Laterally Diffused Metal Oxide Semiconductor), belonging to the technical field of radiation resistance of an integrated circuit and aiming at the conventional LDMOS transistor structure of a radio-frequency power device. The method is characterized in that materials selected by and used for a drift region STI dielectric layer and a device isolation region dielectric layer of an N type LDMOS transistor are different from the materials selected by and used for a drift region STI dielectric layer and a device isolation region dielectric layer of a P type LDMOS transistor; the drift region STI dielectric layer and a device isolation region of the N type LDMOS transistor select and use the materials which are easier to trap electrons after being radiated; and the filling materials of the drift region STI dielectric layer and the device isolation region dielectric layer of the P type LDMOS transistor are materials which are easier to trap cavities. The invention is used for the radiation resistant design of a semiconductor device and the integrated circuit and can enhance the radiation resistant capability of the integrated circuit and reduce the strengthening cost.

Description

A kind of method that improves the LDMOS radiation-resisting performance
Technical field
The invention relates to the anti-irradiation technique of integrated circuit, be specifically related to a kind of method that is used to improve power device LDMOS anti-radiation performance.
Background technology
Along with the development of radio frequency integrated circuit and the continuous increase in wireless telecommunications market, the radio-frequency power device is at wireless telecommunications such as individual/family wireless communication apparatus, aspect such as mobile communication equipment or even military radar, the concern that is subjected to is more and more, and demand is also increasing.In the receive-transmit system of radio circuit, power amplifier is a very important part.Power amplifier requires to handle large-signal usually, and requires good stability, and this just requires the core power element of circuit to need good high-voltage resistance capability and reliability.Based on the horizontal double diffusion ldmos transistor of silicon materials, have that puncture voltage is higher, the linearity is better, unfailing performance is good and advantage such as with low cost.Prepare from device, the preparation technology of LDMOS and existing C MOS process compatible are realized easily; The size of LDMOS, especially ditch is long, can significantly reduce along with the development of CMOS technology, helps obtaining better high frequency performance; With the CMOS process compatible, also just mean easily and other Circuits System integrated, simultaneously, can simplify the impedance matching in the radio-frequency power amplifier.Therefore, the LDMOS device is the important selection that realizes integrated radio-frequency power amplifier (PA).Adopt the CMOS compatible technique to prepare LDMOS, maximum challenge is to improve puncture voltage.A kind of drift region Electric Field Distribution of improving device, improving high voltage bearing way is a kind of novel structure, Xiao Han etc. have proposed a kind of preparation method of horizontal dual pervasion field effect transistor, application number: CN200810103871.0.By in the drift region of conventional LDMOS device, introducing RESURF structure and dielectric area simultaneously, to improve the distribution of electric field in the drift region, improve the puncture voltage of device, we are referred to as REDI LDMOS (RESURF and Dielectric Inserted LDMOS) with this structure.Provided the generalized section of n type LDMOS structure among Fig. 1.Compare with the LDMOS of routine, this structure has been introduced STI dielectric area and P type doped region in the drift region of device.Introduce P type doped region and be to introduce the RESURF structure, with the puncture voltage and the dead resistance of optimised devices.The effect of introducing the STI medium is to improve the Electric Field Distribution in the drift region, allows power line in the drift region concentrate in the dielectric area that dielectric constant is lower than silicon materials, allows sti region bear bigger electric field.Thereby, the potential drop and the electric field of reduction tagma and drift region PN junction.
Semiconductor device is a primary element of forming integrated circuit, and the effect that irradiation bombs such as x ray, proton, neutron, heavy particle cause in device directly affects the reliability of circuit.After traditional devices is subjected to irradiation, the main influence of considering irradiation effect to component grid oxidizing layer and isolated area, in oxide layer, produce electric charge, produce interfacial state etc. at the interface, for example cause that threshold drift, mutual conductance decline, the subthreshold amplitude of oscillation increase, leakage current increases or the like, high energy particle can cause that also permanent damage such as grid puncture or the like.Along with dwindling of device size, characteristic size enters the sub-micro epoch, and the influence of irradiation effect can change.The gate oxide attenuation, device is that intrinsic is reinforced concerning irradiation.But isolated area is because area is bigger, and thickness is big, remains the sensitizing range of irradiation.Because REDI LDMOS structure power device has good radiofrequency characteristics, the application at aspects such as wireless telecommunications, military radar, Aero-Space, the concern that is subjected to is more and more, and demand is also increasing.But because this structure has been introduced the STI dielectric area in the drift region, be subjected to understanding trapped hole behind the irradiation, this has just increased electric field, has reduced the puncture voltage of device, cause performance degradation, this has just seriously influenced the reliability under the radiation environment of space of device and circuit.
Summary of the invention
Be subjected to cause the problem that the LDMOS device electric breakdown strength reduces behind the irradiation at drift region in the above-mentioned sub-micro device, in order to guarantee the safe operation of integrated circuit in radiation environment based on the sub-micro manufacturing process, the present invention innovates from the drift region design, propose a kind of method that improves the anti-irradiation of ldmos transistor, further improved the anti-radiation performance of semiconductor device and integrated circuit.
Used material all is identical in the drift region STI dielectric layer of forming LDMOS in the conventional cmos radio frequency integrated circuit and the device trenches spacer medium layer process, selects earth silicon material usually for use.The dielectric layer structure that the present invention is used and the structure of conventional ldmos transistor are identical, and the selected material of the drift region STI dielectric layer of N type that different is in advanced radio frequency integrated circuit and P type LDMOS and the dielectric layer of device isolation region is different.In order to improve the radiation-resisting performance of LDMOS, avoid the device electric breakdown strength behind the irradiation to reduce and the increase of device off-state leakage current, N type LDMOS field-effect transistor drift region STI dielectric layer and device trenches isolated area are selected the material of easier trapped electron behind the irradiation usually for use, for example the All Media layer all is a silicon nitride medium, and the packing material of P type LDMOS field-effect transistor drift region dielectric layer and channel separating zone dielectric layer is the material of easier trapped hole, such as being silica dioxide medium.
Operation principle of the present invention is as follows: for N type LDMOS device, all dielectric layers have been captured a large amount of electronics behind the irradiation.At first the puncture voltage of analysis device has been captured electronics owing to the drift region dielectric layer, and the power line that sends from drain terminal has more ending at herein, and this has just reduced the drain terminal electric field, has improved the breakdown characteristics of device, and reaches the anti-irradiation effect of device; For the off-state leakage current of device, because device isolation region also is to have captured electronics, this just makes the threshold voltage of device side parasitic transistor increase, and the OFF state that has reduced device is greatly leaked.So the present invention has not only improved the breakdown characteristics of LDMOS, also reduced the off-state current of device, thereby reached anti-irradiation effect.For P type LDMOS All Media layer is silicon dioxide, because the easier trapped hole of silica dioxide medium layer behind the irradiation, principle is the same, and this just is equivalent to P type LDMOS Radiation Characteristics is that intrinsic is reinforced.In sum, so the integrated circuit of forming for the LDMOS of anti-irradiation is compared with traditional handicraft, the drift region dielectric layer of P type device and device isolation region dielectric layer material are the material of easier trapped hole, as silica dioxide medium; The drift region dielectric layer of N type device and device isolation region dielectric layer are the material of easier trapped electron, such as silicon nitride, nitrogen-oxygen-silicon etc.In addition, the anti-irradiation design of device is not limited to the body silicon device, also is applicable to the LDMOS device of SOI substrate.
A kind of advantage that improves the anti-irradiation reinforcement technique of LDMOS of the present invention:
1 is simple and effective, identical with the structure of traditional ldmos transistor
2. with the conventional cmos process compatible
3. used isolated material all is a CMOS technology material commonly used
4. the use of reinforcement technique does not reduce other performance of device
5. do not increase extra cost when improving anti-irradiation
Therefore, the anti-irradiation reinforcement technique of a kind of raising LDMOS proposed by the invention, can be used for the anti-irradiation design of semiconductor device and integrated circuit, in the application of the anti-irradiation ability that improves integrated circuit, reduction reinforcing expense, remarkable advantages and broad application prospect be arranged.
Description of drawings
The generalized section of Fig. 1 .REDI LDMOS structure;
In Fig. 2 .CMOS integrated circuit, the generalized section of the N type of the anti-irradiation of isolated area and drift region different materials and P type REDI LDMOS structure;
Fig. 3. (a)-(e) be LDMOS field-effect transistor isolated area of the present invention and drift region preparation method's technological process.
Specific embodiment:
The present invention is in integrated circuit preparation, and the used material of the channel separating zone that forms N type and P type LDMOS device and drift region dielectric layer is different, therefore, the processing step of N type and P type ldmos transistor isolated area and drift region preparation separately, technology is as follows:
Fig. 3 (a)-(e) is N type of the present invention and P type LDMOS device isolation region and drift region preparation method's technological process and respectively goes on foot pairing generalized section.
The silicon dioxide of 101---deposit; The N trap body area of 102---P type ldmos transistor; The P trap drift region of 103---P type ldmos transistor; The P trap body area of 104---N type ldmos transistor; The N trap drift region of 105---N type ldmos transistor; The 106---photoresist; 107---nitride medium.
Channel separating zone and the concrete technology of drift region dielectric layer:
A.LPCVD deposit layer of silicon dioxide as Fig. 3 (a), is filled the drift region dielectric layer and the isolated area dielectric layer that form P type ldmos transistor;
The B.CMP chemico-mechanical polishing is as Fig. 3 (b); Photoetching, the HF wet etching forms N type LDMOS groove, as Fig. 3 (c);
C. remove photoresist, LPCVD deposition of nitride layer is as Fig. 3 (d); Fill and form the drift of N type ldmos transistor
District's dielectric layer and channel separating zone dielectric layer, the CMP chemico-mechanical polishing makes the silicon chip surface planarization, forms the trench area of different medium, as Fig. 3 (e).
Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.

Claims (3)

1. method that improves the LDMOS radiation-resisting performance, this method is at the conventional ldmos transistor structure in the radio-frequency power device, it is characterized in that, N type LDMOS field-effect transistor drift region STI dielectric layer and device trenches isolated area are selected behind the irradiation the easily material of trapped electron for use, and the packing material of P type LDMOS field-effect transistor drift region dielectric layer and channel separating zone dielectric layer is the material of easy trapped hole.
2. the method for claim 1 is characterized in that, N type LDMOS field-effect transistor drift region STI dielectric layer and device trenches isolated area are silicon nitride medium.
3. the method for claim 1 is characterized in that, P type LDMOS field-effect transistor drift region dielectric layer and channel separating zone dielectric layer are silica dioxide medium.
CN 201010280674 2010-09-14 2010-09-14 Method for enhancing radiation resistant characteristic of LDMOS (Laterally Diffused Metal Oxide Semiconductor) Pending CN101976654A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104157571B (en) * 2013-05-15 2017-03-01 中芯国际集成电路制造(上海)有限公司 The preparation method of LDNMOS pipe

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101266930A (en) * 2008-04-11 2008-09-17 北京大学 A method for making horizontal dual pervasion field effect transistor
CN101630660A (en) * 2009-07-07 2010-01-20 北京大学 Method for improving irradiation resistance of CMOS transistor, SMOS transistor and integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101266930A (en) * 2008-04-11 2008-09-17 北京大学 A method for making horizontal dual pervasion field effect transistor
CN101630660A (en) * 2009-07-07 2010-01-20 北京大学 Method for improving irradiation resistance of CMOS transistor, SMOS transistor and integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104157571B (en) * 2013-05-15 2017-03-01 中芯国际集成电路制造(上海)有限公司 The preparation method of LDNMOS pipe

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Open date: 20110216