CN101971347A - Structure and fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications - Google Patents
Structure and fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications Download PDFInfo
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
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Abstract
An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 220, 220U, 220V, 220W, 380, 480, 500, 510, 530, or 540) has a hypoabrupt vertical dopant profile below one (104, 264, or 564) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone and adjoining body material (108, 268, or 568). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material increases by at least a factor of 10 in moving from that source/drain zone down to an underlying body-material location no more than 10 times deeper below the upper semiconductor surface than that source/drain zone. The body material preferably includes a more heavily doped pocket portion (120, 280, or 580) situated along the other source/drain zone (102, 262, or 562). The combination of the hypoabrupt vertical dopant profile below the first- mentioned source/drain zone, normally serving as the drain, and the pocket portion along the second- mentioned source/drain zone, normally serving as the source, enables the resultant asymmetric transistor to be especially suitable for high-speed analog applications.
Description
Technical field
The present invention relates to semiconductor technology, and refer to the field-effect transistor (FET) of insulated gate electrode type especially.Unless in addition for indicating, all insulated gate electrode field-effect transistors (IGFET) hereinafter described are surperficial channel enhancement mode IGFET.
Background technology
IGFET is a kind of semiconductor device, wherein, gate dielectric be with the gate electrode electric insulation in channel region, this channel region is extended between source area and drain region.Channel region among the enhancement mode IGFET is a part that often is called the body regions of substrate or substrate regions, and body regions is to form the PN junction that has source electrode and drain electrode separately.In enhancement mode IGFET, channel region is made up of all semi-conducting materials between source electrode and the drain electrode.IGFET operating period, charge carrier is to see through the channel of inducting in the channel region along the semiconductor-on-insulator surface to move to drain electrode from source electrode.Critical voltage be grid to source voltage values, on this voltage, IGFET is at connecting and the known definition of dissengaged positions and switching between its connection and dissengaged positions.Passage length is the distance along the semiconductor-on-insulator surface, between source electrode and drain electrode.
IGFET applies to integrated circuit (IC) to carry out all numerals and analog functuion.Along with the IC serviceability rises year by year, it is littler that IGFET has little by little become, and causes smallest passage length to reduce gradually.The IGFET that moves in the mode of the classical model defined of IGFET is described as " long channel " device usually.Make the IGFET behavior significantly break away from the degree of common IGFET model when passage length is reduced to, then IGFET is described as " short channel " device.Though short channel and long channel IGFET all apply to IC, utilizing the most IC layouts that are used for digital function in the integrated application of ultra-large type is to have the minimum channel length of reliably utilizing available photoetching technique to make.
A borderline region extends along the interface between source electrode and the body regions.Another borderline region extends along the interface between drain electrode and the body regions.High electric field is present in each borderline region.Under certain conditions, particularly less when passage length, the grain boundaries zone can laterally extend to the source electrode borderline region and merge with the below on its semiconductor-on-insulator surface.This phenomenon is to be called (main body) to penetrate.When penetrating generation, the operation of IGFET will can not controlled by its gate electrode.Penetrate is to avoid.
Along with the IGFET size reduces, all technology have been used the performance that improves IGFET, comprise that those run on jitty mechanism.A kind of improved properties technology relates to: provide to have the IGFET that is used to reduce by the two parts drain electrode that heat carrier injects.This IGFET also provides two part source electrodes of similar framework usually.
Fig. 1 illustrated as in United States Patent (USP) the 6th, 548,842B1 number people such as () Bulucea long n passage IGFET 20 that described this kind is commonly used.IGFET 20 upper surfaces are provided with the field insulating regions 22 of the electric insulation of depression, and it is laterally around active semiconductor island portion 24, and this active semiconductor island portion 24 has n type source/drain (S/D) district 26 and 28.Each S/ D district 26 or 28 is made up of the major part 26M or the 28M of utmost point severe doping and the horizontal expansion part 26E or the 28E of more slightly mix (but still being that severe is mixed).
S/ D district 26 and 28 is separated from one another by the channel region 30 of the bulk material 32 of p type, and middle trap portion 36 and top 38 that bulk material 32 is mixed by bottom 34, the severe of slight doping are formed.Though the major part of top bulk material part 38 is medium doped, top 38 comprises the severe doping ring bag portion 40 and 42 of the ions implantation that it extends along S/ D district 26 and 28 respectively.IGFET 20 further comprise gate dielectric 44, on gate sidewall spacer 48 and 50, and the metal silicide layer 52,54 and 56 of the gate electrode 46, the electric insulation that cover.
S/ D district 26 and 28 is mainly mirror image each other.Ring bag portion 40 and 42 mirror images that also are mainly each other make channel region 30 about channel dopant concentration reflected gradient (graded) longitudinally.As a result, IGFET 20 is symmetrical mountings.In IGFET operating period, S/ D district 26 or 28 can be used as source electrode, and another S/ D district 28 or 26 can be used as drain electrode.This is to be in particular the digital situation that is applicable to, wherein, S/ D district 26 and 28 in some time durations respectively as source electrode and drain electrode, and during At All Other Times respectively as drain electrode and source electrode.
Fig. 2 is that explanation is directed to IGFET 20, along with what net doping agent concentration N of the function of fore-and-aft distance x
NBecause IGFET 20 is symmetrical mountings, Fig. 2 only presents that half works the curve that starts from channel center.Represent regional 26M, 26E, 28M, 28E, 30,40 and 42 net doping agent concentration respectively in curved section 26M*, 26E*, 28M*, 28E*, 30*, 40* and the 42* of Fig. 2.Point-like curved section 40 " or 42 " be meant the total concentration of the p type dopant that forms ring bag portion 40 or 42, be included in the process be introduced into that forms bag portion 40 or 42 p type dopant for the position of S/ D district 26 or 28.
Except helping to alleviate in the decay of not expecting of the critical voltage of short channel length, existence in the ring bag portion 40 of IGFET 20 and 42 makes in the p of channel region 30 type concentration of dopant along each S/ D district 26 or 28 and improve, particularly along each horizontal expansion part 26E or 28E.Because along the S/D district 26 of source electrode effect or the thickness of the channel region part of the borderline region that extends of 28 interface be to reduce, so thereby alleviate the outbreak that penetrates.
Additional doping characteristic is implanted anti-(APT) dopant that penetrates of p type by ion and is reached in p type top bulk material part 38, and p type APT dopant surpasses 0.1 micron and be no more than 0.4 micron the degree of depth and reach Cmax below upper surface below the semiconductor-on-insulator surface.Be directed to the situation of Fig. 3 a representative, wherein, main S/ D part 26M and 28M extend about 0.2 micron below upper surface, and p type APT dopant reaches Cmax in about 0.2 micron degree of depth.By p type APT dopant is set in this way, along the S/D district 26 of source electrode effect or the thickness of the channel region part of the borderline region that extends of 28 PN junction be and then reduce, and then alleviate and penetrate.
United States Patent (USP) the 6th, 548, what disclose for 842B1 number is: by implanting additional p type dopant (its degree of depth between the degree of depth of the Cmax of APT and trap portion dopant reaches Cmax), may further be planarization along the p type dopant dose varied curve that sees through the above-mentioned vertical line of main S/D part 26M or 28M.This situation is illustrated in Fig. 3 b, for the such variation of IGFET 20, wherein, and curved section 58 " be meant by the caused variation of p type dopant of expanding.In Fig. 3 b, the Cmax of the p type mm dopant of expansion is between the Cmax of APT and trap portion dopant.Therefore, the concentration N of total p type dopant
TEqually move to part 26M or 28M reduces less than 5 times from the position of maximum trap portion concentration of dopant.
Only flow through in the electric current of device operating period that (particularly many simulation application) do not need a kind of symmetrical IGFET structure under the situation of IGFET with a direction.As so be discussed in United States Patent (USP) the 6th, 548,842B1 number, ring bag portion can delete from drain side.IGFET 20 thereby become long n passage IGFET 60 is as in shown in Fig. 4 a.IGFET 60 is a kind of asymmetrical units, because channel region 30 is the gradual changes of asymmetric longitudinally dopant.In the S/ D district 26 and 28 of IGFET 60 is respectively as source electrode and drain electrode.Fig. 4 b explanation is corresponding to the asymmetric short n passage IGFET 70 of long-channel IGFET 60.In IGFET 70, the ring bag portion 40 of source side is closely near drain electrode 28.Be directed to respectively IGFET 60 and 70 along semiconductor-on-insulator surface and as the net doping agent concentration N of the function of fore-and-aft distance x
NBe to be shown in Fig. 5 a and 5b.
United States Patent (USP) the 6th, 078, No. 082 and 6,127, No. 700 (being Bulucea) describes the IGFET with asymmetric channel region, but it has the United States Patent (USP) of being different from the 6th, 548, the vertical dopant characteristic of being somebody's turn to do that 842B1 number invention IGFET is used.IGFET with asymmetric channel region also checks the document in other prior art, such as: (a) " at asymmetric ring source electrode GOLD drain electrode (HS-GOLD) degree of depth time half micron n-MOSFET design of reliability and performance " (IEDM Tech.Dig. of people such as Buti, on December 3rd to 6,1989,26.2.1 to 26.2.4 page or leaf); (b) people's such as Chai " at the effective 0.25 micron L of cost that is characterized as gradual change channel cmos (GCMOS) and accurate self-aligned (QSA) NPN of RF wireless application
EffThe BiCMOS technology " (Procs.2000 Bipolar/BiCMOS Circs.andTech.Meeting, on September 24th to 26,2000,110 to 113 pages); (c) people's such as Chen " at the channel engineering of time 1.0V power supply unit degree of depth time micrometre CMOS at a high speed " (1999 Symp.VLSI Tech., Dig.Tech.Paps., on June 14th to 16,1999,69 and 70 pages); (d) people's such as Deshpande " at the channel engineering of the analogue means design of the degree of depth time micrometre CMOS technology of system on chip application " (IEEE Trans.Elec.Devs., in September, 2002,1558 to 1565 pages); (e) " high-performance 0.1 micro MOS FET " (IEDM Tech.Dig., December nineteen ninety-five, 17.7.1 to the 17.7.4 page or leaf) of Hiroki with dissymmetrical channel profile; (f) " improvement is directed to the manufacturing power of the RF gradual change channel cmos process of wireless application " (SPIE Conf.Microelec.Dev.Tech.II., in September, 1998,147 to 155 pages) of people such as Lamey; (g) people's such as Ma " the gradual change passage MOSFET (GCMOSFET) that uses at high-performance, low-voltage DSP " (IEEE Trans.VLSISysts.Dig., in December, 1997,352 to 358 pages); (h) people's such as Matsuki " at horizontal doping passage (LDC) structure of inferior four minutes micro MOS FET " (1991 Symp.VLSI Tech., Dig.Tech.Paps., on May 28th to 30,1991,113 and 114 pages); And (i) " at the open-ended infra micro MOS FET of the high-performance of hybrid simulation/digital application " (IEDMTech.Dig., in December, 1991,367 to 370 pages) of people such as Su.
Term " mixed-signal " is meant the IC that contains numeral and analog module.Digital circuit is the n channel and the p channel IGFET of positive expansion of utilization usually, to obtain the maximum potential digital speed for set electric current leakage specification.Analog circuit is to utilize IGFET and/or bipolar transistor according to the performance requirement that is different from digital IGFET.The demand of Simulation with I GFET generally includes: the gain of high linear voltage, for the good little signal of high frequency and the frequency response of big signal, good parameter matching, low input noise, to initiatively with the electric parameter of the suitable control of driven member, and the parasitics, the particularly parasitic capacitance of Jiang Diing that reduce.Though utilizing identical transistor is will economic attractiveness be arranged in simulation with digital module, this measure is the simulated performance that will normally cause dying down.For many demands of Simulation with I GFET performance is that the result that expands with numeral is for conflicting.
Comparatively in particular, to compare the IGFET of digital module be according to stricter specification to the electric parameter of Simulation with I GFET.Be the Simulation with I GFET of amplifier in running, the output resistance of this IGFET is necessary for maximization, makes its inherent gain be maximization whereby.Output resistance also is important in the performance of the high frequency of setting Simulation with I GFET.Otherwise output resistance is evident as more inessential in digital circuit.In higher current drives of the reduction value tolerable exchange of the output resistance of digital circuit and therefore higher digital switch speed, as long as this digital circuit can be distinguished its logic state, for example: logical zero and logical one.
The shape of passing the electrical signal of analog transistor is critical concerning circuit performance and must be maintained no harmonic distortion and noise as far as possible usually.Harmonic distortion is mainly caused by the nonlinearity of transistor gain and transistor capacitance.Therefore, the requirement of the linearity of analog transistor is very high.Have in the parasitic capacitance of PN junction and to be necessary for the non-linear to voltage degree that alleviates in the essence of analog module.On the contrary, the signal linearity is generally the less important importance for digital circuit.
The analog rate performance of little signal that applies to the IGFET of analogue amplifier be the gain that is decided by the frequency limitation of little signal and relates to little signal with along parasitic capacitance at the PN junction of source electrode and drain electrode.The analog rate performance of the big signal of analogue amplifier IGFET is in like manner for to be decided by the frequency limitation of big signal and to relate to the non-linear of IGFET characteristic.
The digital speed of gate is to define according to the switching time of the big signal of transistor/load combinations, thereby relates to drive current and output capacitance.Therefore, the analog rate performance is to be different from digital speed ability and to determine.Simulation can be different with the optimization of digital speed, cause different transistor parameter demands.
The IGFET of the minimum that the utilization of digital circuit blocks advantage ground can be made.Because it is the size range that causes is that constitutionally is big, frequent for quite of poor quality in the parameter matching of digital circuit.Otherwise good parameter matching needs analog circuit to reach necessary performance usually.Usually require: analog transistor is compared digital IGFET and is made large-size, makes Simulation with I GFET for short as far as possible, has the propagation delay of alap source electrode to drain electrode whereby.
In view of aforesaid consideration, need have a kind of semiconductor framework that the good analog feature of IGFET is provided.This Simulation with I GFET should have high essence gain, high output resistance, the high little signal speed of reduction parasitic capacitance, particularly along source electrode and the interfacial reduction parasitic capacitance of drain electrode.What is also needed is: this kind framework is that high performance digital IGFET can be provided.
Summary of the invention
The present invention proposes this kind framework.According to the present invention, a kind of semiconductor construction contains mainly (principal) IGFET, and it has along the quite low parasitic capacitance of at least one of the PN junction that forms the source/drain border.Though can be used for digital application, main IGFET is specially adapted to simulation application and can obtains superior simulated performance.
Semiconductor construction of the present invention can comprise and is similar to main IGFET but is additional (additional) IGFET that is constituted of opposite polarity.This two IGFET thereby form the complementary IGFET framework that it is particularly useful in analog circuit.This semiconductor construction also can contain its expansion that is specially adapted to digital circuit (further) IGFET, or the IGFET of the opposite polarity of two expansions.So whole framework can apply to the IC of mixed-signal.
Get back to main IGFET, it contains channel region, a pair of source/drain (S/D) distinguishes, is overlying on the gate dielectric on the channel region and be overlying on gate electrode on the gate dielectric of channel region top.Main IGFET is formed by the semiconductor body of the semiconductor dopant with first conductivity-type of mixing with the bulk material that becomes first conductivity-type.Channel region is the part of bulk material and is first conductivity-type therefore.The S/D district is positioned at this semiconductor body, along its upper surface, and serve as reasons this channel region institute laterally separately.Each S/D district is second conductivity-type opposite with first conductivity-type, forms the PN junction with bulk material whereby.Bulk material extends laterally at the below in this S/D district.
Importantly, dopant in first conductivity-type of bulk material has concentration, it is in moving to the S/D district of this appointment up and reduce at least 10 times from lower floor bulk material position, be preferably and reduce at least 20 times, this lower floor bulk material position is no more than below the semiconductor-on-insulator surface specifies 10 times in S/D district dark, be preferably be no more than 5 times dark.Substitute, concentration in the dopant of first conductivity-type of bulk material is from specifying the S/D district to move to the bulk material position down and increase at least 10 times, be preferably at least 20 times, this bulk material position is dark for being no more than 10 times in this S/D district below the semiconductor-on-insulator surface, be preferably be no more than 5 times dark.This time the bulk material position on top layer (subsurface) is usually located at mostly below each whole in channel and S/D district.By providing this " inferior precipitous (hypoabrupt) " dopant distribution at this bulk material, then the parasitic capacitance along the PN junction between bulk material and appointment S/D district is quite low.Therefore main IGFET can reach high simulated performance.
Main IGFET is generally asymmetrical unit, is: channel region is the vertically dopant gradual change of asymmetric ground.Clear and definite, in the concentration of the dopant of first conductivity-type of this bulk material channel region along semiconductor-on-insulator surface meeting should specify S/D district part ratio at channel region along the upper surface meeting should to remain S/D district part low.In IGFET operating period, the common formation drain electrode in appointment S/D district and residue S/D district formation source electrode.In the concentration of the dopant of first conductivity-type of this bulk material channel region along the upper surface meeting should the drain electrode part than at channel region along upper surface meeting should low at least 10 times usually of source electrode parts are preferably hanged down at least 20 times.Substitute, in the concentration of the dopant of first conductivity-type of this bulk material channel region along upper surface meeting should the source electrode part than at channel region along the upper surface meeting should the part that drains often up to lacking 10 times, is preferably at least 20 times of height.
Shield this source electrode along the high dopant of the source side of channel region and avoid quite high electric field influence in drain electrode, end at the position and be near the channel region of source electrode and Ionized dopant atom near the higher channel region concentration of dopant of source electrode is provided because come from the electric field line of drain electrode, but not be directed to absolute value from the current potential barrier of most of charge carriers of source electrode for ending at along the Ionized dopant atom of the exhaustion region of source electrode and unfavorable reduction.Alleviate thus and penetrate.In this appointment S/D district the above-mentioned inferior precipitous vertical dopant quantitative change curve in the below of (that is: at this be drain electrode), reach and can thereby reach high simulated performance in the combination of the channel region concentration of dopant of the raising of source side and do not have the inefficacy of penetrating.
Inferior precipitous vertical dopant quantitative change curve in the below of specifying the S/D district can various ways be implemented.In an embodiment, place the maximum of specifying the bulk material position, aforementioned top layer under the S/D district and reaching the part at it in the concentration of the dopant of first conductivity-type of this bulk material.In the concentration of the dopant of first conductivity-type of this bulk material usually since then the bulk material position move to up and specify the S/D district and reduce gradually.
In making its aforementioned enforcement according to main IGFET of the present invention, the semiconductor well portion dopant of first conductivity-type is generally by the ion implantation and is introduced into semiconductor body to limit the trap portion of first conductivity-type.The ion implantation applies to carry out trap portion doping step makes this trap portion dopant to reach its Cmax in bulk material position, aforesaid top layer.Gate electrode is located at the semi-conducting material top that is intended to channel region, and by being separated from this semi-conducting material by grid dielectric material.Semiconductor source electrode/the drain dopants of second conductivity-type is introduced into semiconductor body to form the S/D district.
Carry out the manufacturing of additional treatments with the aforementioned enforcement of finishing main IGFET.Trap portion doping step and additional treatments are causing the vertical dopant quantitative change curve below appointment S/D district to form for inferior precipitous condition.In particular, the concentration of trap portion dopant is moved upward to this appointment S/D district and reduces at least 10 times from bulk material position, aforesaid top layer.
Bulk material is first conductivity-type, at least when IGFET makes end.Make the semi-conducting material that finishing when and constitute bulk material and S/D district in IGFET and may be initially second conductivity-type.If so, bottom to the first conductivity-type of this material of trap portion doping step conversion.For a form of manufacture process, counter doping is carried out to change remainder to the first conductivity-type of this material by the semiconductor dopant of first conductivity-type.Another form for manufacture process, the part of trap portion dopant during additional treatments and spread material top so far up, cause whereby this material basically all parts can after trap portion doping step, significantly not be subjected to first or second conductivity-type other doping influence and be converted to first conductivity-type.
Implement in the another kind of main FET, move to up from this bulk material position, aforesaid top layer in the concentration of the dopant of first conductivity-type of bulk material and specify in the S/D district basically experience to go on foot grade to reduce.For example, bulk material can contain: inferior top layer (imbedding) bulk material part; And the surface that directly is overlying on the upper strata is in abutting connection with the bulk material part, and it extends to this semiconductor-on-insulator surface and it contains the S/D district.Inferior top layer bulk material partly is place the S/D district following, and in it near this S/D district part, dark for being no more than 10 times in this S/D district below the semiconductor-on-insulator surface, be preferably be no more than 5 times dark.For example, bulk material part in inferior top layer can most ofly evenly be mixed.Stride across partly to the surface in abutting connection with bulk material in the part basically in the concentration of the dopant of first conductivity-type of bulk material from this time top layer bulk material that experience step level reduces (being generally at least 10 times), and see through this surface in abutting connection with bulk material partly progressive move to up to specify to keep than this time top layer bulk material in the S/D district partly hang down at least 10 times.
In brief, the invention provides a kind of semiconductor framework of the IGFET with the IGFET that is specially adapted to analog circuit or a pair of opposite polarity.This framework can comprise the expansion IGFET that is specially adapted to digital circuit or the expansion IGFET of a pair of opposite polarity.The framework that causes is very suitably handled mixed-signal and is used.Therefore the present invention provides it to be better than the major progress of prior art.
Description of drawings
Fig. 1 is the elevational cross-section figure of the long n passage of a kind of symmetry of prior art IGFET.
Fig. 2 is aimed at the curve chart along the net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Fig. 1, as the function of the fore-and-aft distance at self-channel center.
Fig. 3 a and 3b be aimed at Fig. 1,4a and 4b IGFET in the absolute concentration of dopant curve chart along the vertical line that sees through source/drain regions of the different trap doping condition of two difference, as the function of the degree of depth.
Fig. 4 a and 4b are the asymmetric length of other prior art of branch and the elevational cross-section figure of short n passage IGFET.
Fig. 5 a and 5b are aimed at the net doping agent concentration curve chart along the semiconductor-on-insulator surface of the difference IGFET of Fig. 4 a and 4b, as the function of the fore-and-aft distance at self-channel center.
The elevational cross-section figure of a kind of asymmetric long n passage IGFET that Fig. 6 is according to the present invention to be constituted has the semiconductor well portion as the same conductivity type of direct underlaid semi-conducting material whereby.
Fig. 7 a to 7c is aimed at other curve chart of branch along indivedual, the absolute and net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Fig. 6,18a, 68a or 68b, as the function of fore-and-aft distance.
Fig. 8 a to 8c is other curve chart of branch along indivedual, the absolute and net doping agent concentration of the vertical line that sees through source electrode of Fig. 6,11 or 13 IGFET, as the function of the degree of depth.
Fig. 9 a to 9c be Fig. 6,11,13 or 15 IGFET along other curve chart of branch that sees through channel region, as the function of the degree of depth to indivedual, the absolute and net doping agent concentration of vertical line.
Figure 10 a to 10c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that sees through the vertical line that drains of the IGFET of Fig. 6,11,13,18a or 18b, as the function of the degree of depth.
The elevational cross-section figure of a kind of asymmetric short n passage IGFET that Figure 11 is according to the present invention to be constituted has the semiconductor well portion as the same conductivity type of direct underlaid semi-conducting material whereby.
Figure 12 a to 12c is aimed at other curve chart of branch along indivedual, the absolute and net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Figure 11, as the function of fore-and-aft distance.
The elevational cross-section figure of the another kind of asymmetric long n passage IGFET that Figure 13 is according to the present invention to be constituted has the semiconductor well portion as the same conductivity type of direct underlaid semi-conducting material whereby.
Figure 14 a to 14c is aimed at other curve chart of branch along indivedual, the absolute and net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Figure 13,15,18b or 18c, as the function of fore-and-aft distance.
The elevational cross-section figure of another asymmetric long n passage IGFET that Figure 15 is according to the present invention to be constituted has the semiconductor well portion as the same conductivity type of direct underlaid semi-conducting material whereby.
Figure 16 a to 16c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that extends the vertical line that sees through source electrode of the IGFET of Figure 15, as the function of the degree of depth.
Figure 17 a to 17c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that extends the vertical line that sees through drain electrode of the IGFET of Figure 15 or 18c, as the function of the degree of depth.
The elevational cross-section figure of other long n passage IGFET of three kinds of branches that Figure 18 a to 18c is according to the present invention to be constituted has the semiconductor well portion as the same conductivity type of direct underlaid semi-conducting material whereby.
Figure 19 a to 19c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that extends the vertical line that sees through source electrode of the IGFET of Figure 18 a or 18b, as the function of the degree of depth.
Figure 20 a to 21c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that extends the vertical line that sees through source electrode of the IGFET of Figure 18 c, as the function of the degree of depth.
The elevational cross-section figure of a kind of asymmetric long n passage IGFET that Figure 21 is according to the present invention to be constituted has the semiconductor well portion as the same conductivity type of direct underlaid semi-conducting material whereby.
Figure 22 a to 22c is aimed at other curve chart of branch along indivedual, the absolute and net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Figure 21, as the function of fore-and-aft distance.
Figure 23 a to 23c is other curve chart of branch along indivedual, the absolute and net doping agent concentration of the vertical line that sees through source electrode of the IGFET of Figure 21 or 25, as the function of the degree of depth.
Figure 24 a to 24c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that sees through the vertical line that drains of the IGFET of Figure 21,25,27a or 27b, as the function of the degree of depth.
The elevational cross-section figure of the another kind of asymmetric long n passage IGFET that Figure 25 is according to the present invention to be constituted has the semiconductor well portion for the opposite conductivity type of direct underlaid semi-conducting material whereby.
Figure 26 a to 26c is aimed at other curve chart of branch along indivedual, the absolute and net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Figure 25 or 27b, as the function of fore-and-aft distance.
The elevational cross-section figure of other long n passage IGFET of two kinds of branches that Figure 27 a and 27b are according to the present invention to be constituted has the semiconductor well portion for the opposite conductivity type of direct underlaid semi-conducting material whereby.
Figure 28 a to 28c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that extends the vertical line that sees through source electrode of the IGFET of Figure 27 a or 27b, as the function of the degree of depth.
The elevational cross-section figure of two parts of a kind of complementary IGFET semiconductor construction that Figure 29 .1 and 29.2 is according to the present invention to be constituted.
The elevational cross-section figure of two parts of the another kind of complementary IGFET semiconductor construction that Figure 30 .1 and 30.2 is according to the present invention to be constituted.
Figure 31 a to 31o, 31p.1 to 31r.1 and 31p.2 to 31r.2 are elevational cross-section figure, represent the step of the complementary IGFET semiconductor construction of shop drawings 29.1 and 29.2.The step of Figure 31 a to 31o is the structure part of using as for shown in the two of Figure 29 .1 and 29.2.P.1, Figure 31 is to present its structure that causes Figure 29 .1 further step partly to 31r.1.P.2, Figure 31 is to present its structure that causes Figure 29 .2 further step partly to 31r.2.
Figure 32 a to 32c is elevational cross-section figure, and representative is used for a kind of variation of the complementary IGFET semiconductor construction of shop drawings 29.1 and 29.2 according to a kind of alternative step of the step for Figure 31 e of the present invention, starts from repeating the structure into Figure 31 d of Figure 32 a.
Figure 33 a to 33f is elevational cross-section figure, the step that representative substitutes according to the another kind of the step for Figure 31 c to 31f of the present invention, be used for a kind of variation of the complementary IGFET semiconductor construction of shop drawings 29.1 and 29.2, start from repeating structure into Figure 31 b of Figure 33 a.
The elevational cross-section figure of a kind of asymmetric long p passage IGFET that Figure 34 is according to the present invention to be constituted, so that have the opposite conductivity type of the semi-conducting material that directly places lower floor and the semiconductor well portion of the manufacturing according to the present invention, and utilization compensation n type dopant is not implanted to as the semi-conducting material above the trap portion of initial qualification.A kind of enforcement according to the asymmetric p channel IGFET of the alternative steps manufacturing of the manufacture process of Figure 31 a to 31o, 31p.1 to 31r.1 and 31p.2 to 31r.2 and utilization Figure 32 a to 32c or Figure 33 a to the 33f p passage IGFET that is Figure 34.
Figure 35 a to 35c is aimed at other curve chart of branch along indivedual, the absolute and net doping agent concentration on semiconductor-on-insulator surface of the IGFET of Figure 34, as the function of fore-and-aft distance.
Figure 36 a to 36c is other curve chart of branch along indivedual, the absolute and net doping agent concentration of the vertical line that sees through source electrode of the IGFET of Figure 34, as the function of the degree of depth.
Figure 37 a to 37c be Figure 34 IGFET along other curve chart of branch that sees through channel region, as the function of the degree of depth to indivedual, the absolute and net doping agent concentration of vertical line.
Figure 38 a to 38c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that sees through the vertical line that drains of the IGFET of Figure 34, as the function of the degree of depth.
Figure 39 and 40 is aimed at a kind of asymmetric short n passage IGFET that following difference Computer Simulation (i) is constituted according to the present invention, and the three-dimensional curve diagram of the net doping agent concentration of the short n passage of the symmetry of (ii) a kind of reference IGFET, as the function of the degree of depth and fore-and-aft distance.
Figure 41 and 42 is the curve charts that present the dopant profile of other Computer Simulation of the branch IGFET that is directed to Figure 39 and 40, as from the degree of depth of source electrode position and the function of fore-and-aft distance.
Figure 43 is aimed at the curve chart of net doping agent concentration of the Computer Simulation IGFET of Figure 39 and 40, as the function from the fore-and-aft distance of source electrode position.
Figure 44 a and 44b are aimed at other curve chart of branch of absolute and net doping agent concentration of the Computer Simulation IGFET of Figure 39 and 40, as respectively through the function to the degree of depth of vertical line of source electrode and drain electrode.
Figure 45 a and 45b be respectively the Computer Simulation IGFET that is directed to Figure 39 and 40 in critical and the line mutual conductance of saturation conditions and the curve chart of line drain current, as the function of grid to source voltage.
Figure 46 a and 46b are respectively in the line mutual conductance of critical and saturation conditions and the curve chart of line drain current, as the function of grid, be directed to following Computer Simulation (i) and summarize corresponding to the asymmetric long n passage IGFET of a kind of invention of the jitty IGFET of the invention of Figure 39 and (ii) summarize asymmetric long n passage IGFET corresponding to a kind of reference of the jitty IGFET of the reference of Figure 40 to source voltage.
Figure 47 is aimed at the IGFET of the invention of following Computer Simulation (i) Figure 39, the (ii) reference IGFET of Figure 40, reach the curve chart that (iii) lacks the short n passage of the reference symmetry IGFET branch line drain current densities that resists the expansion that penetrates implant, as the function of grid to source voltage.
Figure 48 is aimed at the curve chart of line drain current of IGFET of the Computer Simulation of Figure 39 and 40, as the function of grid to source voltage.
Figure 49 is a kind of n passage IGFET and the circuit diagram of related parasitic capacitance.
Figure 50 is the n passage IGFET of Figure 49 and the circuit diagram of a kind of little signal model of related parasitic capacitance.
Figure 51 a to 51c is the circuit diagram that is configured to single IGFET amplifier of common source, common gate and common drain configuration respectively.
Figure 52 is the circuit diagram that is configured to single IGFET amplifier of common source, short circuit output configuration.
Figure 53 is the circuit diagram of a kind of little signal model of the amplifier of Figure 52.
Figure 54 is the curve chart at the net doping agent concentration of three kinds of different p type dopant distribution models, as the function from the distance of PN junction.
Figure 55 is the curve chart at the vague and general layer capacitance of three kinds of dopant distribution models of Figure 54, as the function of reverse biased.
Figure 56 is the curve chart at a kind of clean bulk doped agent concentration of a kind of model of interface capacitor, and as the function from the distance of PN junction, its slight doped side is to have the dopant dose varied curve that the step level of experience concentration of dopant changes.
Figure 57 is at the curve chart of modelling in the face interface electric capacity of the interface capacitor of Figure 56, as the function of reverse biased.
Figure 58 a and 58b are at the synthetic elevational cross-section figure/curve chart of other asymmetric weak point of the branch that is constituted according to the present invention with the dopant profile of long n passage IGFET, as the degree of depth at self-channel center and the function of fore-and-aft distance.
Figure 59 is at the curve chart of the line of the Computer Simulation IGFET of Figure 39 and 40 drain electrode to this body capacitance, as draining to the function of bulk voltage.
Figure 60 is the curve chart at this body capacitance of line source best of the Computer Simulation IGFET of Figure 39 and 40, as the function of source electrode to bulk voltage.
Figure 61 is the curve chart at the cut-off frequency of the invention IGFET of the expansion of the Computer Simulation IGFET of Figure 39 and 40 and Figure 63, as the function of line drain current.
Figure 62 is the curve chart of cut-off frequency, function as the line drain current, be directed to the asymmetric long n passage IGFET of following Computer Simulation (i) corresponding to a kind of invention of the jitty IGFET of the invention of Figure 39, (ii) corresponding to the long n passage of the symmetry IGFET of a kind of reference of the jitty IGFET of the reference of Figure 40, and (iii) corresponding to the asymmetric long n passage IGFET of the invention of a kind of expansion of the jitty IGFET of the invention of the expansion of Figure 63.
The elevational cross-section figure of the asymmetric short n passage IGFET of the another kind of Computer Simulation that Figure 63 is according to the present invention to be constituted.
Figure 64 is aimed at the curve chart of net doping agent concentration of the Computer Simulation IGFET of Figure 39 and 63, as the function from the fore-and-aft distance of source electrode position.
Figure 65 is the curve chart of critical voltage, function as channel length, be directed to the asymmetric n passage IGFET that (i) constituted according to the present invention, (ii) it has along the symmetrical n passage of the reference IGFET of the ring bag portion of each source/drain regions, and (iii) it does not have along the symmetrical n passage of the reference IGFET of the ring bag portion of each source/drain regions.
The elevational cross-section figure of another complementary IGFET semiconductor construction that Figure 66 is according to the present invention to be constituted.
Figure 67 is the curve chart of absolute concentration of dopant, and as the function of the degree of depth, two kinds of asymmetric n passage IGFET at (i) constituted according to the present invention reach the symmetrical n passage of (ii) a kind of reference IGFET.
The elevational cross-section figure of two kinds of asymmetric long n passage IGFET that expand respectively that Figure 68 a and 68b are according to the present invention to be constituted.
Figure 69 a to 69c is other curve chart of branch along indivedual, the absolute and net doping agent concentration of the vertical line that sees through source electrode of the IGFET of Figure 68 a or 68b, as the function of the degree of depth.
Figure 70 a to 70c be Figure 68 a or 68b IGFET along other curve chart of branch that sees through channel region, as the function of the degree of depth to indivedual, the absolute and net doping agent concentration of vertical line.
Figure 71 a to 71c is other curve chart of branch along indivedual, the absolute and net doping agent concentration that extends the vertical line that sees through drain electrode of the IGFET of Figure 68 a or 68b, as the function of the degree of depth.
The elevational cross-section figure of four kinds of other complementary IGFET semiconductor constructions of line bonus that Figure 72 a to 72d is according to the present invention to be constituted.
Same reference symbol be apply to graphic and in the explanation of preferred embodiment to represent identical or very similar project.In containing curve chart graphic, have single apostrophe ('), two apostrophe ("), asterisk (*) is zone or the district that is instructed in other graphic same label respectively with the numerical portion of the reference symbol of pound sign (#) mark." X " mark of cross-sectional view that the IGFET of semiconductor well portion dopant is provided is the position of the Cmax of indication trap portion dopant.Electric insulation sept (not shown) may be positioned at along the sidewall of the gate electrode of the IGFET of Figure 13,15,18b, 18c, 25,27b and 34, how to make on this IGFET and decides.
For the dopant distribution curve chart, " indivedual (individual) " concentration of dopant is represented the n type dopant and the individual concentrations of each p type dopant of introducing respectively that each is introduced respectively, and " definitely (absolute) " concentration of dopant is represented total n type concentration of dopant and p type concentration of dopant.In " clean (net) " of dopant distribution curve chart concentration of dopant is in definitely (or total) n type concentration of dopant and the definitely difference between (or total) p type concentration of dopant.The net doping agent concentration is to be designated as only " n type " in absolute n type concentration of dopant for surpassing absolute p type concentration of dopant, and is designated as only " p type " in absolute p type concentration of dopant for surpassing absolute n type concentration of dopant.
Preferred implementation
Reference signs and other regulation
Apply to hereinafter with graphic in reference symbol be to have following meaning, wherein, adjective " line (lineal) " expression per unit IGFET width, and adjective " face (areal) " expression per unit horizontal area:
A
IThe ≡ current gain
C
Da≡ face borderline region electric capacity
C
D0a≡ is in the face borderline region capacitance of zero reverse voltage
C
DBThe ≡ drain electrode is to this body capacitance
C
DBwThe drain electrode of ≡ line is to this body capacitance
C
GBThe ≡ grid is to this body capacitance
C
GDThe ≡ grid is to capacitance of drain
C
GIa≡ face gate dielectric electric capacity
C
GSThe ≡ grid is to source capacitance
C
LThe ≡ load capacitance
C
SBThe ≡ source electrode is to this body capacitance
C
SBwThis body capacitance of ≡ line source best
F ≡ frequency
f
TThe ≡ cut-off frequency
f
TpeakThe peak value of ≡ cut-off frequency
g
mThe essential mutual conductance of ≡ IGFET
g
MwThe line mutual conductance of ≡ IGFET
g
MbThe mutual conductance of ≡ body electrode
g
Meff≡ IGFET is in the effective mutual conductance that has source resistance
g
Msatw≡ IGFET is in saturated line mutual conductance
H
A≡ amplifier transfer function
I
DThe ≡ drain current
I
Dw≡ line drain current
I
D0wThe leakage value of ≡ in zero grid to the line drain current of source voltage
i
iThe little signal input current of ≡
i
oThe little signal output current of ≡
K
SThe relative dielectric coefficient of ≡ semi-conducting material
K ≡ ripple time graceful constant
The length of L ≡ passage
L
GThe length of ≡ gate electrode
L
GDoverlapThe fore-and-aft distance of ≡ gate electrode overlapping (or covering) drain electrode
L
GSoverlapThe fore-and-aft distance of ≡ gate electrode overlapping source electrode
N
AThe acceptor doped agent concentration of ≡
N
B≡ is in the net doping agent concentration of bulk material
N
B0, N
B0' ≡ in the slight doped side of PN junction in the net doping agent concentration value of material interface near-end fixed concentration part
N
B1, N
B1' ≡ in the slight doped side of PN junction in the net doping agent concentration value of the long-range fixed concentration part of material interface
N
D≡ executes the body concentration of dopant
N
D0≡ in PN junction than the severe doped side in the net doping agent concentration value of fixed concentration material
N
I≡ other concentration of dopant
N
N≡ net doping agent concentration
N
TThe absolute concentration of dopant of ≡
n
i≡ essence carrier concn
Q ≡ electron charge
R
D≡ is in the series resistance of the drain electrode of IGFET
R
G≡ is in the series resistance of the gate electrode of IGFET
R
OnThe connection resistance of the range of linearity of ≡ IGFET
R
S≡ is in the series resistance of the source electrode of IGFET
S ≡ conversion parameter
T ≡ temperature
t
d≡ borderline region thickness
t
D0≡ is in the borderline region one-tenth-value thickness 1/10 of zero reverse voltage
t
G1The ≡ gate dielectric thickness
V
BIThe ≡ built-in voltage
V
BS≡ DC body is to source voltage
V
DB≡ DC drains to bulk voltage
V
DDThe high supply of ≡ voltage
V
DS≡ DC drains to source voltage
V
GS≡ DC grid is to source voltage
V
g≡ grid voltage amplitude
V
In≡ input voltage amplitude
V
Out≡ output voltage amplitude
V
R≡ DC reverse voltage
V
RmaxThe maximum of ≡ DC reverse voltage
V
SB≡ DC source electrode is to bulk voltage
V
SSThe ≡ low supply voltage
V
TThe ≡ critical voltage
v
GsThe little signal grid of ≡ is to source voltage
v
NsatThe ≡ electron saturation velocities
W ≡ channel width
X ≡ fore-and-aft distance
Y ≡ is from the degree of depth, vertical range or the distance of PN junction
y
d≡ is from the distance value of PN junction as for the long-range border of bulk material borderline region
y
D0≡ is the distance value to bulk material interface near-end fixed concentration part from PN junction, and bulk material is to have in the step of even net doping agent concentration level to change
y
Dmax≡ is the distance value to the long-range fixed concentration part of bulk material interface from PN junction, and bulk material is to have in the step of even net doping agent concentration level to change
y
D≡ is in the depth value of the bottom of drain electrode
y
S≡ is in the depth value of the bottom of source electrode
y
ST≡ is in the depth value on the long-range border of bulk material part, interface near-end top
y
W≡ is in the depth value of the Cmax position of trap dopant
ε
0The dielectric coefficient of ≡ free space (vacuum)
μ
n≡ electronics mobility
ω ≡ angular frequency
ω
In≡ is in the angular frequency value of input limit
ω
Out≡ is in the angular frequency value of output limit
ω
z≡ is in the angular frequency value at zero point
ω
p≡ is in the angular frequency value of limit
Long channel and short channel n channel IGFET are called long and short n passage IGFET at this (that is: hereinafter with above).In like manner, long channel and short channel p channel IGFET are called long and short p passage IGFET at this.As apply to hereinafter, term " surface is in abutting connection with (adjoining) " expression is in abutting connection with (or extending to) semiconductor-on-insulator surface, that is: the semiconductor body upper surface of being made up of monocrystalline (or being mainly monocrystalline) semi-conducting material.
No specific channel length values is to summarize short channel and the long channel mode of distinguishing the IGFET operation or summarize difference short channel IGFET and long channel IGFET.The short channel IGFET IGFET of short channel mode (or operate in) only is that characteristic is the IGFET that significantly is subjected to short-channel effect and is influenced.The long channel IGFET IGFET of long channel mode (or operate in) is the opposite of short channel IGFET.Although be about the passage length of 0.4 millimeter (mm) is to be directed to United States Patent (USP) the 6th for constituting roughly, 548, boundary between the short channel of 642B1 number background technology and the short channel mode, the boundary of long channel/short channel can occur in higher or lower path length values, decide the characteristic size of printing such as: gate dielectric thickness, I, channel region dopant thickness, and the interface degree of depth of source/drain-body on all factors.
Vertical bulk material dopant dose varied curve in the drain electrode below is inferior precipitous
IGFET is owing to the inferior top layer maximum of trap portion concentration of dopant
Fig. 6 is a kind of asymmetric long n passage IGFET100 that explanation is constituted according to the present invention, so that be specially adapted to simulation application at a high speed.Long-channel IGFET 100 is formed by monocrystalline silicon (single silicon) semiconductor body, wherein, is to be positioned at along the semiconductor-on-insulator surface to utmost point severe doped n type source/drain (S/D) district 102 and 104.S/ D district 102 and 104 be because its usually (though non-) for necessary act as source electrode respectively and be called source electrode 102 and drain 104 respectively at hereinafter summarizing with drain electrode.
Because trap portion 116 is the doped semiconductor materials that are positioned at the same conductivity type (p type) as trap portion 116, the border, trap portion 116 up and down that severe is mixed is some inaccuracy.As hereinafter pointed, the semi-conducting material that limits trap portion 116 has and is generally low quite uniformly p type background doped agent concentration.Border, trap portion 116 up and down normally defines the position that p type trap portion concentration of dopant equals p type background doped agent concentration.Except trap portion 116 extends to any position of comparing other p section bar material that trap portion 116 mixes for severe more, along the concentration of total p type dopant on border, trap portion 116 up and down two times of p type background doped agent concentration.Under these margin definition, trap portion 116 coboundaries are 0.2 to 0.5 micron (μ m) below the semiconductor-on-insulator surface usually, is generally 0.3 micron.The lower boundary of trap portion 116 is 0.9 to 1.3 micron below upper surface usually, is generally 1.1 microns.
The borderline region (not shown) extends to drain electrode-body PN junction 112 in IGFET operating period for the source electrode-body PN junction 110 that strides across channel region 106 along the semiconductor-on-insulator surface certainly.The average thickness in surface-boundary zone is to be generally less than 0.1 millimeter, is generally about 0.05 micron.Though border, trap portion 116 up and down is some inaccuracy, the concentration of p type trap portion dopant drops to electric small level in upper surface below less than 0.1 micron the degree of depth usually.Be to be essentially the position below the surface-boundary zone with, trap portion 116.
P type top bulk material part 118 comprises the severe bag portion 120 of mixing, and it extends upwardly to the semiconductor-on-insulator surface and ends at source electrode 102 and the position between 104 of draining along source electrode 120.Fig. 6 illustrates and p+ bag portion 120 compares source electrode 102 extend in the upper surface below with drain electrode 104 be darker example.Particularly, Fig. 6 describes this bag portion 120 for extending laterally at source electrode 102 belows and mainly arriving the example of p+ trap portion 116.As association hereinafter discussed in Figure 18 a to 18c, bag portion 120 compares shown in Figure 6 and may extend to the less degree of depth below the upper surface.The residue of p type top bulk material part 118 part of the outside of bag portion 120 (that is :) refers to in the project 124 of Fig. 6.Top bulk material residue 124 is slightly to mix and extend along drain electrode 104.Channel region 106 that all p N-type semiconductor N materials between 104 are formed in source electrode 102 and drain electrode thereby part are formed by the p+ bag portion 120 of source side and part 124 of p-top bulk material residues by drain side.
126 of gate dielectrics are on the semiconductor-on-insulator surface and extend in above the channel region 106.Gate electrode 128 is the gate dielectrics 126 that are positioned at channel region 106 tops.Gate electrode 128 parts are for extending in source electrode 102 and drain electrode 104 tops.In the example of Fig. 6, gate electrode 128 is made up of polysilicon (poly-silicon) institute of its utmost point severe Doped n-type.Gate electrode 128 can form by other electric conducting material, such as: metal or abundant doped p type are the poly-silicon of conductivity.
Existence along the p+ bag portion 120 of source electrode 102 causes channel region 106 to be relevant to the channel concentration of dopant and vertically gradual change, that is: in the direction of passage length.Because the mirror image basically of the bag portion 120 of source side is not positioned at along drain electrode 104, channel region 106 is asymmetric dopant gradual change in longitudinal direction.P+ trap portion 116 is positioned at it and extends along the below of the p-top bulk material residue 124 of drain electrode 104.This configuration of p+ trap portion 116 and p-top bulk material residue 124 causes the vertical dopant quantitative change curve of its bulk material 108 parts below drain electrode 104 for inferior precipitous.That is, the concentration of p type dopant sees through p-top bulk material residue 124 to p+ trap portions 116 and greatly raising down from drain electrode-body interface 112, is generally at least 10 times.Make IGFET 100 have very good analog feature and avoid penetrating in the vertical asymmetric dopant gradual change of channel region 106 and combination in the inferior precipitous vertical dopant quantitative change curve that sees through drain electrode 104 of bulk material 108 parts of drain electrode 104 belows.
In the vertical asymmetric dopant gradual change of channel region 106 and in the understanding of inferior precipitous vertical dopant quantitative change curve of bulk material 108 parts of drain electrode 104 belows by means of Fig. 7 a to 7c (collective is " Fig. 7 "), Fig. 8 a to 8c (collective is " Fig. 8 "), Fig. 9 a to 9c (collective is " Fig. 9 "), reach Figure 10 a to 10c (collective is " Figure 10 ") and promote.Fig. 7 is the concentration of dopant that presents along the example on upper semi-body surface, as the function of fore-and-aft distance x.Be presented in Fig. 8 as concentration of dopant along the example of the function of the depth y of the vertical line 130 that sees through source electrode 102.Fig. 9 presents the concentration of dopant of example, as along the function to the depth y of vertical line 132 and 134 that sees through channel region 106.Vertical line 132 is the bag portions 120 by source side.Vertical line 134 is by the upright position between bag portion 120 and drain electrode 104.Be presented in Figure 10 as concentration of dopant along the example of the function of the depth y of the vertical line 136 that sees through drain electrode 104.
Fig. 7 a offers some clarification on along the concentration N of indivedual semiconductor dopants on semiconductor-on-insulator surface
I, the main localized area 102,104,120 of this dopant and 124 and vertical dopant gradual change of therefore setting up channel region 106.Fig. 8 a, 9a and 10a offer some clarification on along the concentration N of indivedual semiconductor dopants of vertical line 130,132,134 and 136
ITherefore, this dopant is vertical localized area 102,104,114,116,120 and 124 and build on the inferior precipitous vertical dopant quantitative change curve of bulk material 108 parts of the below of drain electrode 104.The concentration N with the n type dopant that forms source electrode 102 and drain electrode 104 is respectively used in curve 102 ' and 104 ' representative
I(surface and vertical).Curve 114 ', 116 ', 120 ' and 124 ' representative utilization are to form the concentration N of the p type dopant in zone 114,116,120 and 124 respectively
I(surface and/or vertical).Project 110
#With 112
#Be meant net doping agent concentration N
NReduce to zero part and therefore indicate the position of PN junction 110 and 112 respectively.
Along the semiconductor-on-insulator surface in zone 102,104,120 and 124 the total p type and the total concentration N of n type dopant
TBe to be shown in Fig. 7 b.Fig. 8 b, 9b and 10b describe along vertical line 130,132,134 and 136 in zone 102,104,114,116,120 and 124 the total p type and the total concentration N of n type dopant
TCorrespond respectively to zone 114,116,120 and 124 curved section 114 ", 116 ", 120 " and 124 " represent the total concentration N of p type dopant
TProject 106 in Fig. 7 b " be corresponding to channel region 106 and signature song line segment 120 " with 124 " and the channel region part.The total concentration N of n type dopant
TBe by corresponding respectively to the curve 102 of source electrode 102 with drain electrode 104 " and 104 " representative.Curve 102 in Fig. 7 b " and 104 " be to be respectively the curve 102 ' and 104 ' that is same as Fig. 7 a.Curve 102 in Fig. 8 b and 10b " and 104 " be to be respectively the curve 102 ' and 104 ' that is same as Fig. 8 a and 10a.
Fig. 7 c explanation is along the net doping agent concentration N on semiconductor-on-insulator surface
NNet doping agent concentration N along vertical line 130,132,134 and 136
NBe presented in Fig. 8 c, 9c and 10c.Curved section 114*, 116*, 120* and 124* are the net concentration N that represents in the p type dopant of individual areas 114,116,120 and 124
NIn the project 106* of Fig. 7 c is to represent the curved section 120* of channel region and the combination of 124*, and therefore is presented in the concentration N of the clean p type dopant of channel region 106
NIn the concentration N of source electrode 102 with the clean n type dopant of drain electrode 104
NRespectively by curve 102* and 104* representative.
Consider the aforesaid summary argument about Fig. 7 to 10, Fig. 7 a is pointed out that: the p type dopant in the bag portion 120 of source side is two fundamental components that have along the semiconductor-on-insulator surface, is provided in the component of two doping operation that is:.Along the fundamental component in the p of bag portion 120 type dopant of upper surface is p type background doped agent by the curved section 124 ' representative of Fig. 7 a.The agent of p type background doped is rendered as low (most of for the even) concentration that runs through they whole single silicon materials that comprise zone 102,104,114,116 and 120 usually.Bag portion 120 with above bulk material residue 124 below, the agent of p type background doped is by as Fig. 8 a, 9a and the indicated curved section 114 ' representative of 10a.The concentration of p type background doped agent is generally 1 * 10
15To 1 * 10
16Atom/cubic centimetre is generally 5 * 10
15Atom/cubic centimetre.
In another fundamental component of the p type dopant of the bag portion 120 of source side is by indicated p type bag portion (or the passage gradual change) dopant of the curved section 120 ' of Fig. 7 a.P type bag portion dopant is provided in high upper surface concentration, is generally 5 * 10
17To 2 * 10
18Atom/cubic centimetre is generally 1 * 10
18Atom/cubic centimetre is to limit bag portion 120.The particular value of p type bag portion dopant upper surface concentration is strict the adjustment, is generally in 10% accuracy, to set the critical voltage of IGFET 100.
The border of the bag portion 120 of source side is made up of following: (a) section on semiconductor-on-insulator surface (b) by source electrode-body interface 110 formed PN junction sections, reaches (c) the p type section of bulk material 108.Though the p type section on the border of bag portion 120 is some inaccuracy, the concentration that p type bag portion section normally is limited to its p type bag portion dopant equals the concentration part of p type background doped agent.For not get involved to the scope of trap portion 116, is two times of background doped agent concentration along the p type concentration of dopant of the p type section on the border of bag portion 120 in bag portion 120, and comprising: p type bag portion border segment is a junction semiconductor-on-insulator surface part.
P type bag portion dopant also is present in source electrode 102, and is indicated as the curve 120 ' in Fig. 7 a.Concentration N in the p of source electrode 102 type bag portion dopant
IBe essentially fixing along its upper surface.Longitudinally move to channel region 106 along the semiconductor-on-insulator surface from source electrode 102, the concentration N of p type bag portion dopant
IBe in to distinguish 106 be fixing upper surface level basically midway, and then zero with the position between the drain electrode 104 for dropping to basically from this level in source electrode 102.
Because along the total p type dopant in channel region 106 on semiconductor-on-insulator surface is along the p type background of upper surface and the summation of bag portion dopant, be curved section 106 by Fig. 7 b along the dopant of the channel region of total p type of upper surface " representative.In curved section 106 " variation show be: longitudinally move to drain electrode 104 and stride across channel region 106 from source electrode 102, along upper surface in the concentration N of total p type dopant in district 106
TBe in to distinguish 106 be fixing basically high level midway, in the position between source electrode 102 and the drain electrode 104 for being decreased to low p type background level from this high level, and then in to drain 104 all the other apart from for maintaining low background level.
In some embodiment, in the concentration N of the p of source electrode 102 type bag portion dopant
IMay be fixing basically source electrode level in the part that only has, and may then move, reduce to source electrode-body interface 110 with the position in source electrode 102 upper surfaces along the semiconductor-on-insulator surface longitudinal along source electrode 102 upper surfaces.In this situation, vertically move towards drain electrode 104 in striding across district 106, in the concentration N of the p of channel region 106 type bag portion dopant
IAfter striding across source electrode-body interface 110 and begin immediately to reduce.Be with, stride across channel region 106 and longitudinally move to drain electrode 104 from source electrode 102, along upper surface in the concentration N of district's total p type dopant of 106
TSimilarly reduce for after striding across interface 110, beginning immediately, rather than to distinguish 106 be fixing basically source electrode level midway.
Though along the semiconductor-on-insulator surface in the concentration N of the p of channel region 106 type bag portion dopant
IFor vertically to distinguish 106 from the distance of the non-zero of source electrode-body interface 110 whether in source electrode level basically, along upper surface in the concentration N of total p type dopant in district 106
TCompare district's 106 junction source electrodes, 102 parts and drain electrode 104 parts of joining in district 106 are low.In particular, in the concentration N of district's total p type dopant of 106
TCompare at source electrode-body interface 110 along upper surface, low at drain electrode-body interface 112 usually along upper surface, and be at least 10 times, and preferred hanging down is at least 20 times, more preferably hangs down to be at least 50 times, low usually is 10 times or bigger.
Fig. 7 c be show be: as curve 106* representative, along the semiconductor-on-insulator surface in the concentration N of the clean p type dopant of channel region 106
NBe the concentration N that is similar to total p type dopant in district 106
TAnd change, except: along upper surface in the net doping agent concentration N of district's clean p type dopant of 106
NBe in PN junction 110 and 112 and drop to zero.Therefore the source side of channel region 106 is compared drain side and is had the high clean p type dopant of measuring.Make along the thickness of the channeling side part of the borderline region of source electrode-body interface 110 in the p type dopant of the high source side amount of channel region 106 and to reduce.
In addition, along the high p type concentration of dopant shielding source electrode 102 of the source side of channel region 106 in order to avoid 104 the quite high electric field of draining.This is because end at the ionization p type dopant atom of bag portion 120 from 104 the electric field line of draining, but not ends at along the ionization dopant atom of the borderline region of source electrode 102, and is unfavorable for reducing the current potential barrier that is directed to electronics.Along the borderline region of source electrode-body interface 110 thereby prevent to penetrate into borderline region along drain electrode-body interface 112.By suitably choosing, avoid penetrating in IGFET 100 in the amount of the high source side p of channel region 106 type dopant.
The p type dopant of source electrode 102, channel region 106 and bulk material 108 parts of the below of drain electrode 104 has as in Fig. 8 a, 9a and three indicated fundamental components of 10a.A fundamental component of the p type dopant of the bulk material part of the below in zone 102,104 and 106 is the p type background doped agent by curved section 124 ' or the 114 ' representative of Fig. 8 a, 9a and 10a.Second fundamental component is as limiting the p type trap portion dopant of trap portion 116 by indicated its of the curved section 116 ' of Fig. 8 a, 9a and 10a.
In last fundamental component of the bulk material p type dopant partly of 102,104 and 106 below, zone is by the indicated p type bag portion dopant of the curve 120 ' of Fig. 8 a and 9a.P type bag portion dopant exists only in bulk material 108 parts of below of source electrode 102 and the adjacent part of channel region 106.The amount of p type bag portion dopant that is present in bulk material 108 parts of drain electrode 104 below is in the nature zero or very low, and electrical properties is inessential basically.Therefore, only be essentially in the total p type bag portion dopant of bulk material 108 parts of drain electrode 104 below and formed by p type trap portion and background doped agent, as in Figure 10 a along the obtained curve 116 ' of vertical line 136 and 124 ' or 114 ' indicate respectively.
In total p type dopant of bulk material 108 parts of drain electrode 104 below is curved section 116 by Figure 10 b " and extend 124 " (up) and 114 " (down) indicated.Curved section 116 " represent in the summation of the p of trap portion 116 type trap portion and background doped agent.Curved section 114 " with 124 " correspond respectively to p-below bulk material part 114 and p-top bulk material residue 124.Because the concentration N of p type background doped agent
IQuite even, in the concentration N of total p type dopant of bulk material 108 parts of drain electrode 104 below
TBe in being substantially equal to depth y
WPosition, inferior top layer and reach maximum, that is: reach its Cmax part at p type trap portion dopant basically.
As curved section 116 by the combination of Figure 10 b "/124 " variation shown in, in the concentration N of total p type dopant of bulk material 108 parts of the below of drain electrode 104
TMove to drain electrode 104 from position, inferior top layer up along vertical line 136, and inferior precipitous formula is reduced at least 10 times in the Cmax of the p of trap portion 116 type dopant.Concentration N in total p type dopant of bulk material 108 parts of drain electrode 104 below
TBe to be moved upward to drain electrode 104 in position and to be preferably and to be reduced at least 20 times, more preferably at least 40 times, or even more preferably at least 80 times, be generally near 100 or bigger multiple from maximum p type trap portion concentration.In addition, as curved section 116 by combination "/124 " indicated, in the concentration N of total p type dopant of bulk material 108 parts of drain electrode 104 below
TPosition from maximum p type trap portion concentration is moved upward to drain electrode 104, reduces and be generally gradually.
Net doping agent in bulk material 108 parts of drain electrode 104 below is a p type dopant.What Figure 10 c showed is: as the combination representative of curved section 116* and 124*, in the concentration N of the net doping agent of bulk material 108 parts of 104 the below of draining
NBe similar to the concentration N of total p type dopant of bulk material 108 parts of drain electrode 104 below
TAnd vertical change, except: in the concentration N of bulk material 108 parts of drain electrode 104 below
NBe to drop to zero in drain electrode-body interface 112.Because hereinafter and then the reason of discussing, the inferior precipitous vertical dopant quantitative change curve in bulk material 108 parts of the below of drain electrode 104 is that its parasitic capacitance that is associated with drain electrode-body interface 112 is reduced.This energy IGFET 100 has the analog rate of raising.
Advance to along the dopant distribution of the vertical line 130 that sees through source electrode 102, total p type dopant in bulk material 108 parts of the below of source electrode 102 is made up of p type trap portion, background and bag portion dopant, points out respectively as curve 116 ', 124 ' and 120 ' institute by Fig. 8 a.Be directed to the example of Fig. 6, wherein, the bag portion 120 of source side meets at the trap portion 116 of the below of source electrode 102, makes the concentration N of p type trap portion and bag portion dopant
IAll above in the p of junction position type background concn, are curved sections 116 by Fig. 8 b in total p type dopant of bulk material 108 parts of the below of source electrode 102 " with 120 " combination indicated.In an embodiment, wherein, bag portion 120 extends in the below of source electrode 102 and the trap portion 116 that do not join, and is will be for by curved section 116 in total p type dopant of bulk material 108 parts of the below of source electrode 102 " with 120 " and indicated corresponding to the combination of the curved section of p-top bulk material residue 124.
As curved section 116 by the combination of Fig. 8 b "/120 " shown in, in the concentration N of total p type dopant of bulk material 108 parts of the below of source electrode 102
TBe initially to be reduced to 10 times up, it typically is multiple near 30 from moving through bulk material 108 in the position, inferior top layer of the p of trap portion 116 type dopant Cmax.When arriving, in the concentration N of total p type dopant of bulk material 108 parts of the below of source electrode 102 in the local minimum of the below of source electrode 102
TThen before arriving source electrode 102 and rise.
Net doping agent in bulk material 108 parts of the below of source electrode 102 is a p type dopant.What Fig. 8 c showed is: as the combination representative of curved section 116* and 120*, be directed to the example of Fig. 6, wherein, the bag portion 120 of source side is a junction trap portion 116, in the concentration N of the net doping agent of bulk material 108 parts of the below of source electrode 102
NBe similar to the concentration N of total p type dopant of bulk material 108 parts of the below of source electrode 102
TAnd vertical change, except: in the net doping agent concentration N of bulk material 108 parts of the below of source electrode 102
NBe to drop to zero in source electrode-body interface 110.Decide on all factors, such as: the degree of depth of bag portion 120 is the amount that surpasses the degree of depth of source electrode 102, in this vertical dopant quantitative change curve of the below of source electrode 102 sometimes for causing along the parasitic capacitance of source electrode-body interface 110 to reducing, though it typically is less than reduction along the parasitic capacitance of drain electrode-body interface 112.
Simply with reference to figure 9, it is about along vertical line 132 that sees through channel region 106 and 134 concentration of dopant N
I, N
TWith N
N, in reference symbol 120 ', 120 " with 120* after bracket in column " 132 " be meant along the concentration of dopant of vertical line 132.In reference symbol 124 ', 124 " with 124* after bracket in column " 134 " be meant along the concentration of dopant of vertical line 134.
A kind of asymmetric short n passage IGFET 140 that Figure 11 describes according to the present invention to be constituted is so that be specially adapted to simulation application at a high speed.Short channel IGFET 140 is a kind of variations of long channel IGFET100, and wherein, passage length foreshortens to the degree that this IGFET operation occurs in the short channel mode.Passage length is that the length by suitable reduction gate electrode 128 shortens.In the example of Figure 11, p type bag portion 120 extends to fully far away and strides across channel region 106 just in time to serve as the drain electrode 104 of joining.
Figure 12 a to 12c (collective is " Figure 12 ") presents the concentration of dopant N along the example on semiconductor-on-insulator surface of IGFET 140 respectively
I, N
TWith N
N,, be beneficial to asymmetric vertical dopant gradual change of the channel region 106 of understanding IGFET 140 whereby as the function of fore-and-aft distance x.All analyses that are associated with the above-mentioned IGFET of being directed to 100 of Fig. 7 are to be applied to IGFET140, except: making in the dopant distribution of the channel region 106 of IGFET 140 in the length of the shortening of the channel region 106 of IGFET 140 is the dopant distribution that is different from the channel region 106 of IGFET 100, as is associated with the hereinafter explanation of Figure 12.
As be same as Fig. 7 a, along the concentration N of the p type bag portion dopant on semiconductor-on-insulator surface
IIt is curve 120 ' representative by Figure 12 a.The channel region 106 that is different from IGFET 100 takes place, the concentration N along the p type bag portion dopant of channel region 106 upper surfaces of IGFET 140
INot in source electrode 102 and drain electrode between 104 the position and be in the nature and drop to zero.But, as in shown in the curve 120 ' of Figure 12 a, the concentration N of IGFET 140 along the p type bag portion dopant of channel region 106 upper surfaces
IBe along the channel region upper surface all be greater than zero basically, and be in little finite value therefore in 106/ bag of portion of channel region 120 drain electrode 104 parts of joining.Concentration N in the bag portion dopant of IGFET 140
IIn district's 106/ bag of portion's 120 junction source electrode 102 (along the channel region upper surface) part is in big many values.
IGFET 140 along in the concentration N of the p type bag portion dopant of channel region 106 upper surfaces
IAforementioned variation be the absolute concentration of dopant N that is reflected in IGFET 140 along the semiconductor-on-insulator surface
TWith net doping agent concentration N
NAs be same as Fig. 7 b, in the curved section 106 of Figure 12 b " be representative along the semiconductor-on-insulator surface in the concentration N of total p type dopant of channel region 106
T, being directed to it, the total p type dopant in district 106 is along the p type background on semiconductor-on-insulator surface and the summation of bag portion dopant.Curved section 106 in Figure 12 b " variation show be: move to drain electrode 104 in seeing through channel region 106 from source electrode 102, the concentration N of IGFET 140 at total p type dopant in district 106 along the semiconductor-on-insulator surface along the semiconductor-on-insulator surface
TBe to distinguish 106 midway for being fixed in the high level of source electrode 102 basically, and then should be a bit larger tham the low-level of background doped agent concentration to be decreased to by high level certainly when arriving drain electrode 104.More in particular, IGFET's 140 in the concentration N of total p type dopant of channel region 106
TBe to distinguish to this in way of 106 junction source electrodes, 102 parts and improve gradually in drain electrode 104 parts of joining from this district 106 along the semiconductor-on-insulator surface.
Be similar to about IGFET 100 above-mentioned, in along upper surface and from source electrode 102 stride across channel region 106 longitudinally move to the drain electrode 104, in the p type bag concentration of dopant N of portion of IGFET 140 along the semiconductor-on-insulator surface
IBe can be after and begin immediately to reduce by source electrode-body PN junction 110.As draining 104 certainly to source electrode 102 but not by being looked from source electrode 102 to drain electrode 104 in moving, along semiconductor-on-insulator surface and certainly 104 parts that should district 106 junctions drain are up to distinguishing 106 junction source electrodes, 102 parts to this, in the concentration N of total p type dopant of the channel region 106 of IGFET 140
TSo increase gradually.In any case, IGFET 140 along upper surface in the concentration N of district's total p type dopant of 106
TBe to satisfy the specification mentioned above at IGFET 100,104 parts that drain of joining in this district 106 are compared this to distinguish 106 junction source electrodes, 102 parts low.
What Figure 12 c showed is: as curve 106* representative, along the concentration N of the clean p type dopant of channel region 106 upper surfaces of IGFET 140
NBe the concentration N that is similar to IGFET 140 along total p type dopant in the district 106 on semiconductor-on-insulator surface
TAnd change, except: in the concentration N of IGFET140 along the clean p type dopant in the district 106 on semiconductor-on-insulator surface
NBe in PN junction 110 and 112 and reduce to zero.As be same as the channel region 106 of IGFET 100, the p type dopant of comparing the drain side of IGFET 140 and having high clean amount in the source side of the channel region 106 of IGFET 140.In the high source side p type of the channel region 106 of IGFET 140 mix make its along thickness of the channeling side part of the borderline region that source electrode-body interface 110 extends for reducing.
Compare IGFET 100 with drain electrode 104 and near each other in the source electrode 102 of IGFET 140.Be with, likelyly be: compare IGFET 100, the borderline region that extends along source electrode 102 will be in IGFET 140 for penetrating into the borderline regions that extend along drain electrode 104.Yet with respect to the short n passage IGFET of a kind of others that lack bag portion 120 for equivalence, the source side p type dopant in a large amount of channel region 106 of IGFET 140 reduces the possibility that penetrates that it betides IGFET 140.
Is to be essentially to be same as IGFET 100 in IGFET 140 along seeing through source electrode 102, channel region 106 and the vertical line 130,132 of drain electrode 104 and 136 concentration of dopant respectively.In the concentration N shown in Fig. 8 to 10 along vertical line 130,132 and 136
I, N
TWith N
NTherefore for being applied to IGFET 140.It is the inferior precipitous vertical dopant quantitative change curve that has bulk material 108 parts below drain electrode 104 with, IGFET 140.This reduces the parasitic capacitance that is associated with drain electrode-body PN junction 112, as hereinafter institute and then description, makes IGFET 140 have the analog rate of raising.
A kind of asymmetric long n passage IGFET 150 that Figure 13 explanation is constituted according to the present invention is specially adapted to simulation application at a high speed, and especially has source/drain dopant gradual change longitudinally to reduce source resistance R
SInject with the heat carrier of drain side.IGFET 150 is configured to as IGFET 100, except: (a) the major part 102M that mixed by utmost point severe of n type source electrode 102 is formed with the slight horizontal expansion part 102E that mixes, and (b) the horizontal expansion part 104E of the major part 104M that mixed by utmost point severe of n type drain electrode 104 and slight doping are formed.Is more slightly to mix though compare n++ main S/ D part 102M and 104M, horizontal expansion part 102E and 104E use (such as this) and still are the severe doping in inferior micron complementary IFGET.N+ horizontal expansion part 102E and 104E end at channel region 106 along the semiconductor-on-insulator surface.Gate electrode 128 is that part extends n+ horizontal expansion part 102E and 104E on each, still normally not on the main source electrode portion 102M of n++ or n++ mainly drain part 104M.
Main S/D part 102M compares horizontal expansion part 102E and 104E usually respectively with 104M and is that extension is darker below the semiconductor-on-insulator surface.As a result, in the source electrode depth y of IGFET 150
SWith the drain electrode depth y
DBe respectively the degree of depth of main source electrode portion 102M and main drain electrode part 104M.Bag portion 120 is the belows (and part is along the next door) that extend in main source electrode portion 102M, feasible drain electrode depth y
DBe generally equally above the source electrode depth y
SIn addition, bag portion 120 is the belows (and being along the next door) that extend in source electrode extension 102E.As a result, drain extension 104E compares source electrode extension 102E usually and is that extension is darker below upper surface.
Along the semiconductor-on-insulator surface in the maximum net concentration of dopant N of the main source electrode portion 102M of n++
NBe generally at least 1 * 10
20Atom/cubic centimetre is generally 4 * 10
20Atom/cubic centimetre.Along the semiconductor-on-insulator surface in mainly the drain maximum net concentration of dopant N of part 104M of n++
NBe generally at least 1 * 10
20Atom/cubic centimetre is generally and is a bit larger tham 4 * 10
20Atom/cubic centimetre is whereby just in the maximum upper surface N of main source electrode portion 102M
NConcentration.Along the semiconductor-on-insulator surface in the maximum net concentration of dopant N of n+ source electrode extension 102E
NBe generally 1 * 10
18To 1 * 10
19Atom/cubic centimetre is generally 3 * 10
18Atom/cubic centimetre.Along the semiconductor-on-insulator surface in the maximum net concentration of dopant N of n+ drain extension 104E
NBe generally and be a bit larger tham 3 * 10
18Atom/cubic centimetre is whereby just in the maximum upper surface N of source electrode extension 102E
NConcentration.
According in source electrode 102 vertical dopant gradual change, be substantially the same in IGFET 100 and asymmetric vertical dopant gradual change in the channel region 106 of IGFET 150 with drain electrode 104.Figure 14 a to 14c (collective is " Figure 14 ") presents the concentration of dopant along the example on semiconductor-on-insulator surface of IGFET 150, as the function of fore-and-aft distance x, is used to check in the vertical dopant gradual change of source electrode 102 with drain electrode 104.Figure 14 a describes its main localized area 102M, 102E, 104M, 104E along the semiconductor-on-insulator surface, the concentration N of indivedual semiconductor dopants of 120 and 124
IAlong regional 102M, the 102E on semiconductor-on-insulator surface, 104M, 104E, total p type of 120 and 124 concentration N with total n type dopant
TBe depicted in Figure 14 b.Figure 14 c explanation is along the net doping agent concentration N on semiconductor-on-insulator surface
N
Figure 14 a is similar to Fig. 7 a, except: curve 102M ', 102E ', 104M ' and 104E ' representative along the utilization on semiconductor-on-insulator surface to form the n type concentration of dopant N of regional 102M, 102E, 104M and 104E respectively
IFigure 14 b is similar to Fig. 7 b, and condition is the total concentration N along the n type dopant on semiconductor-on-insulator surface
TBy following representative: (a) curve 102 " by the section 102M that corresponds respectively to main source electrode portion 102M and source electrode extension 102E " and 102E " institute forms and (b) curve 104 " by section 104M that corresponds respectively to main drain electrode part 104M and drain extension 104E " and 104E " form.Figure 14 c is similar to Fig. 7 c, condition be (a) representative along the semiconductor-on-insulator surface in the net doping agent concentration N of source electrode 102
NCurve 102* form by the section 102M* and the 102E* that correspond respectively to main source electrode portion 102M and source electrode extension 102E, and (b) represent along the semiconductor-on-insulator surface in draining 104 net doping agent concentration N
NCurve 104* form by the section 104M* and the 104E* that correspond respectively to main drain electrode part 104M and drain extension 104E.
In the source electrode 102 of IGFET 150 and vertical dopant gradual change reduction source resistance R of drain electrode 104
SAnd the heat carrier that alleviates drain side injects, but does not have the asymmetric vertical dopant gradual change of any appreciable impact in channel region 106.Be with, be mainly in the asymmetric channel region dopant gradual change of IGFET 150 and be same as IGFET 100 and avoid penetrating.
Be essentially in the configuration of the trap portion 116 of IGFET 150 and top bulk material residue 124 and be same as IGFET 100, and cause see through drain electrode 104 to the vertical dopant quantitative change curves of lower floor's bulk material 108 for time precipitous.Because by main source electrode portion 102M of n++ and the n++ part 104M that mainly drains, the vertical dopant concentration curve of Fig. 8 to 10 is essentially and is applied to IGFET 150 vertical line 130 and 136 for respectively.Being associated with the reduction parasitic capacitance that drain electrode-body interface 112 is caused can make IGFET 150 have the analog rate of raising.In source resistance R
SReduction be with hereinafter the mode of opinion and the progressive simulated performance that strengthens.
About preamble, Figure 15 illustrates that formation is to be specially adapted to a kind of asymmetric long n passage IGFET 160 of high speed simulation application according to the present invention.IGFET 160 all is provided for reducing source resistance R
SVertical dopant gradual change of the source/drain that injects with the heat carrier of drain side and being used to reduces the vertical dopant gradual change of source/drain of the parasitic capacitance of source/drain.IGFET 160 is configured to be same as IGFET 150, except: (a) source electrode 102 comprises that further it compares main source electrode portion 102M is the slight bottom 102L that mixes, and (b) drain electrode 104 comprises that further it compares main drain electrode part 104M is the bottom 104L that slightly mixes.Below source electrode portion 102M and below drain electrode part 104M are the severe Doped n-type.
Source electrode depth y in IGFET 160
SWith the drain electrode depth y
DBe respectively the degree of depth of n+ below source electrode portion 102L and n+ below drain electrode part 104L (placing main source electrode portion 102M of n++ and n++ the following of part 104M that mainly drain) owing to it is respectively.Bag portion 120 is the belows that extend in below source electrode portion 102L.As a result, drain electrode depth y
DBe generally equally above the source electrode depth y
S
The source electrode 102 of IGFET 160 comprises the horizontal source electrode of n+ extension 102E and the horizontal drain extension 104E of n+ respectively with drain electrode 104, to reach source electrode-drain dopants gradual change longitudinally.Have in the gradual change of source/drain dopant longitudinally of IGFET 160 and to be essentially the characteristic that is same as IGFET 150.Be with, be associated with the vertical upper surface concentration of dopant curve chart of Figure 14 of IGFET 150 and the explanation of Figure 14 and be applied to IGFET 160.The gradual change of source/drain dopant longitudinally of (and therefore in IGFET 160) does not have the asymmetric vertical dopant gradual change of any great influence in channel region 106 because IGFET150, is essentially in the asymmetric channel region dopant gradual change of IGFET160 to be same as IGFET 100 and to avoid penetrating in IGFET 160.
In the understanding of the vertical dopant gradual change of IGFET 160 is to be promotion by means of Figure 16 a to 16c (collective is " Figure 16 ") with Figure 17 a to 17c (collective is " Figure 17 "), Figure 16 and Figure 17 present along being respectively through the concentration of dopant of source electrode 102 with the example of the vertical line 130 that drains 104 (comprising: be respectively through below source electrode portion 102L and below drain electrode part 104L) and 136, as the function of depth y.Figure 16 a and Figure 17 a offer some clarification on the concentration N of its vertical localized area 102M, 102L, 104M, 104L, 114,116, other semiconductor dopant (respectively along line 130 and 136) of 120 and 124
IAlong line 130 and 136 in regional 102M, 102L, 104M, 104L, 114,116, total p type of 120 and 124 concentration N with total n type dopant
TBe depicted in Figure 16 b and 17b respectively.Figure 16 c and 17c illustrate the net doping agent concentration N along line 130 and 136 respectively
N
Figure 16 a and 17a are similar to Fig. 8 a and 10a respectively, except: (a) curve 102M ' and 102L ' represent the concentration N along vertical line 130 of its utilization with the n type dopant that forms main source electrode portion 102M and below source electrode portion 102L respectively
I, and (b) curve 104M ' and 104L ' represent its utilization to form the drain concentration N along vertical line 136 of n type dopant of part 104L of main drain electrode part 104M and below respectively
IIn like manner, Figure 16 b and 17b are similar to Fig. 8 b and 10b respectively, and condition is: (a) along the concentration N of total n type dopant of line 130
TCorrespond respectively to the section 102M of main source electrode portion 102M and below source electrode portion 102L by it " and 102L " this curve of forming 102 of place " representative, and (b) along the concentration N of total n type dopant of line 136
TCorrespond respectively to the section 104M of main drain electrode part 104M and below drain electrode part 104L by it " and 104L " and at this curve of forming 104 " representative.
Figure 16 c and 17c are similar to Fig. 8 c and 10c respectively, and condition is: (a) representative along line 130 in the net doping agent concentration N of source electrode 102
N Curve 102* this by correspond respectively to main source electrode portion 102M with below section 102M* and the 102L* of source electrode portion 102L formed, and (b) represent along line 136 in draining 104 net doping agent concentration N
NCurve 104* this by correspond respectively to main drain electrode part 104M with below section 104M* and the 104L* of drain electrode part 104L formed.In addition, the vertical line 132 along seeing through channel region 106 of IGFET 160 is substantially the same with 134 concentration of dopant in IGFET 100.Therefore, along vertical line 132 and 134 in concentration N shown in Figure 9
I, N
TWith N
NBe to be applied to IGFET160.
, substantially the same with the configuration of bag portion 120 in IGFET 100 according to it in the trap portion 116 of IGFET 160 about the source electrode 102 of IGFET 160 and the aforementioned argument of the vertical dopant gradual change of drain electrode 104.Be with, substantially the same in the vertical dopant quantitative change curve of IGFET 160 in IGFET 100 in drain electrode 104 below.Therefore, the parasitic capacitance that is associated with drain electrode-body interface 112 is to be reduced to IGFET 160, thereby makes it have the analog rate of raising.Vertical dopant gradual change in source electrode 102 and drain electrode 104 is to reduce along the parasitic capacitance of drain electrode-body interface 112 along the parasitic capacitance of source electrode-body interface 110 and by progress by reduction (or progressive reduction) to make IGFET 160 have higher analog rate.In the source electrode 102 of IGFET 160 and vertical dopant gradual change reduction source resistance R of drain electrode 104
SAnd alleviate simultaneously in the heat carrier of drain side and inject.
Figure 18 a to 18c illustrates the form 170,180 and 190 of asymmetric long n passage IGFET 100,150 and 160 respectively, wherein, bag portion 120 compare source electrode 102 with drain electrode 104 below the semiconductor-on-insulator surface for extending to small depth.Be directed to the long n passage IGFET 180 or 190 that its source electrode 102 and drain electrode 104 comprise source electrode extension 102E and drain extension 104E respectively, bag portion 120 extends in the below of extension 102E and extension 104E.
Above explain orally as being associated with IGFET 100, the p type paragraph qualification in the border of the bag portion 120 of each IGFET 170,180 or 190 is: the position that equals the concentration of p type background doped agent in the concentration of its p type bag portion dopant.Along total p type concentration of dopant of the p type section on bag portion 120 borders is in two times of the background doped agent concentration of IGFET 170,180 or 190.Therefore, some of p type bag portion dopant are to be present in the source electrode 102 of IGFET 170,180 or 190 and to be in the degree of depth of the below shown in the bag portion 120 that is directed to Figure 18 a to 18c.In this additional p type bag portion dopant of source electrode 102 be offset (compensation) its to limit source electrode 102 be along the n type dopant of its lower surface some.Be with, drain electrode depth y in IGFET 170,180 or 190
DBe to surpass the source electrode depth y
SAlthough, for comparing a small amount of of IGFET 100.
IGFET 170,180 and 190 each channel region 106 are essentially and are directed to IGFET 100,150 and 160 and asymmetric vertical dopant gradual change as mentioned above respectively.About this point, be directed to the concentration of dopant N of IGFET 170 along the semiconductor-on-insulator surface
I, N
TWith N
NAlso be essentially respectively and represent in Fig. 7.Figure 14 is essentially and presents the concentration of dopant N along upper surface that is directed to IGFET 180 and 190
I, N
TWith N
NIn the above-mentioned mode that is directed to IGFET100, penetrate so avoid in IGFET 170,180 and 190.
IGFET 170,180 and 190 each be essentially be directed to as mentioned above IGFET100,150 and 160 and have the drain electrode 104 below inferior precipitous vertical dopant quantitative change curve.Figure 10 also presents basically respectively and is directed to IGFET 170 and 180 each concentration N along the vertical line 136 that sees through drain electrode 104
I, N
TWith N
NBe directed to the concentration N of IGFET 190 along the vertical line 136 that sees through drain electrode 104
I, N
TWith N
NBasically represent in Figure 17.Be thereby reduce that along parasitic capacitance the IGFET 100 that is directed to as indicated above causes each IGFET 170,180 or 190 for having the analog rate of raising in the drain electrode-body interface 112 of each IGFET 170,180 or 190.
Figure 19 a to 19c (collective is " Figure 19 ") and Figure 20 a to 20c (collective be " Figure 20 ") present be directed to IGFET 170,180 and 190 along concentration of dopant, as the function of depth y through the example of the vertical line 130 of source electrode 102.Figure 19 is applied to IGFET 170 and 180.Figure 20 is applied to IGFET 190.Figure 19 a and 19b offer some clarification on it along line 130 and the concentration N of indivedual semiconductor dopants of vertical localized area 102,114,116 and 120
IAlong line 130 in zone 102,114,116 and 120 the total p type and the total concentration N of n type dopant
TBe depicted in Figure 19 b and 20b.Figure 19 c and 20c illustrate the net doping agent concentration N along line 130 respectively
N
As curved section 116 by Figure 19 b and 20b " with 124 " variation shown in, in total p type concentration of dopant N of bulk material 108 parts of the below of source electrode 102
TBe from moving to source electrode 102 up and inferior precipitous formula is reduced at least 10 times along vertical line 130 in the position, inferior top layer of the Cmax of the p of trap portion 116 type dopant.Compare source electrode 102 and constitute more shallow bag portion 120 with drain electrode 104, so cause the inferior precipitous vertical quantitative change curve of total p type dopant of bulk material 108 parts of the below that is directed to source electrode 102.This measure takes place, because compare IGFET100,150 and 160, many less p type dopants are the belows that are positioned at the source electrode 102 of IGFET 170,180 and 190.In the representative of Fig. 8 b, 16b, 19b and 20b total p type bag concentration of dopant N of portion along the vertical line 130 that sees through source electrode 102
T Curved section 120 " be that most of position is in the source electrode depth y in Figure 19 b and 20b
SThe top and extend in depth y in Fig. 8 b and 16b quite a lot ofly
SThe below.
The inferior precipitous vertical dopant quantitative change curve of bulk material 108 parts of the below of IGFET 170,180 or 190 source electrode 102 is inferior precipitous vertical dopant quantitative change curves of bulk material 108 parts of the below that quite is similar to the drain electrode 104 of IGFET 170,180 or 190 (and therefore in the below of the drain electrode 104 of IGFET 100,150 or 160).Be compared to the curved section 116 of Figure 19 b and 20b along the combination of the vertical line 130 that sees through source electrode 102 "/120 " and in the curved section 116 along the combination that sees through 104 the vertical line 136 of draining of Figure 10 b and 17b "/120 ".Bulk material 108 parts that are similar to drain electrode 104 below take place, in total p type concentration of dopant N of bulk material 108 parts of the below of the source electrode 102 of each IGFET 170,180 or 190
TBe to be the utmost point severe dopant material that is moved upward to source electrode 102, be reduced at least 20 times and be preferably from the position, inferior top layer of maximum p type trap portion concentration, more preferably at least 40 times, even more preferably at least 80 times, be generally multiple near 100.In IGFET 170,180 or 190, cause the parasitic capacitance that is associated with source electrode-body interface 110 for reducing in the inferior precipitous vertical dopant quantitative change curve of bulk material 108 parts of the below of the utmost point severe dopant material of source electrode 102.IGFET 170,180 or 190 analog rate and then raising.
IGFET 170,180 or 190 concentration of dopant N along the vertical line 134 that sees through channel region 106
I, N
TWith N
NBasically be rendered as as shown in Fig. 9.IGFET 170,180 or 190 (comprising: the concentration of dopant N of vertical line 134 bag portion 120) along seeing through channel region 106
I, N
TWith N
NBe be similar to shown in Figure 9, except the concentration N that is directed to IGFET 170,180 or 190 along the p type bag portion dopant of line 132
I Curve 120 " be similar to the curve 120 ' of Figure 19 a or 20a along line 130.
For in describe IGFET 100,140,150,160,170,180 with 190 easy, what above supposed is: the concentration of p type background doped agent be fixed as basically run through its contain IGFET 100,140,150,160,170,180 and 190 times semi-conducting material.Yet the concentration of p type background doped agent is for changing, as long as the peak value of p type background doped agent is compared the concentration of other p type dopant for quite low.
Substitute, directly the semi-conducting material under trap portion 116 can be the opposite conductivity type for trap portion 116.Because trap portion 116 is p types, so directly the semi-conducting material under trap portion 116 is the n type.This substitutes to appear at usually when p+ trap portion 116 and p+ bag portion 120 and slightly is doped in net doping agent concentration quite uniformly for being formed at the initiation region of n N-type semiconductor N material, being generally.In an embodiment, the initial n type area part (that is: the position is at the initial n type area part of (or be directed to the intention position of trap portion 116 above) above the trap portion 116) that intention becomes top bulk material part 118 is to mix to have the agent of p type counter doping to its absolute concentration greater than the n type background doped agent concentration in initial n N-type semiconductor N zone, makes the whole p of being types of top bulk material part 118 whereby.In another embodiment, intention is to be converted to p type conductivity by upwards the spreading of part in the p of trap portion 116 type trap portion dopant with the initial n type area part that becomes top bulk material part 118.
In the p type compensation of top bulk material part 118 or the net concentration N of trap portion dopant
NMinimum value can be and approach n type background doped agent concentration.Yet, are p types in order to ensure whole bulk material parts 118, in the concentration N of compensation of the p of part 118 type or trap portion dopant
NMinimum value be generally significant amount greater than n type background doped agent concentration, for example: be at least two times.At the p type compensation of most of bulk material part 118 in the outside of trap portion 120 or the concentration N of trap portion dopant
NMinimum value therefore be generally significantly greater than n type background doped agent concentration.
Figure 21 illustrates according to the present invention and is a kind of variation 100V that is similar to the asymmetric long n passage IGFET100 of Fig. 6 that wherein, bulk material part 114 is replaced by slight doped n type lower zone 192 under the p-, and it forms the below PN junction 194 for p+ trap portion 116.Because lower zone 192 is non-to be p type conductivity, is made up of trap portion 116 IGFET 100 top bulk material parts 118 upper sections 196 alternative with it in the p of IGFET 100V type bulk material 108.IGFET 100V top bulk material part 196 parts are formed by p+ bag portion 120.Top bulk material remainder 196 part of the outside of bag portion 120 (that is :) is meant the project 198 in Figure 21.Top bulk material residue 198 is slight doped p types with some higher net concentration of comparing n-below part 192.It is to reach by above-mentioned p type counter doping agent that the slight p type of bulk material residue 198 mixes.Except aforementioned difference and synthesizing blender agent concentration difference, IGFET 100V is essentially and is same as IGFET 100 and configuration and formation.
Figure 22 a, 23a and 24a illustrate the concentration N of indivedual semiconductor dopants of its defined range 102,104,116,120,192,196 and 198
IOn behalf of it, curve 192 ' and 198 ' clearly respectively define n-lower zone 192 and the n type background doped agent of p-top bulk material residue 198 and the concentration N of p type counter doping agent respectively
IProject 194
#The net doping agent concentration N of finger below trap portion 116
NBecome zero part and the therefore position of indication below PN junction 194.
The concentration N of the total p type in regional 102,104,116,120,192,196 and 198 and total n type dopant
TBe depicted in Figure 22 b, 23b and 24b.Curved section 192 in Figure 22 b, 23b and 24b " with 198 " correspond respectively to n-lower zone 192 and p-top bulk material residue 198.Figure 22 c, 23c and 24c are illustrated in the concentration N of all regional 102,104,116,120,192,196 and 198 clean p type dopant and clean n type dopant
N Curved section 192* and 198* in Figure 22 c, 23c and 24c correspond respectively to n-lower zone 192 and p-top bulk material residue 198.
Figure 22 to 24 represents an example, wherein: (a) in the concentration N of the n of IGFET 100V type background doped agent
IBe approximately equal to the p type background doped agent concentration N of IGFET 100
I, (b) the concentration N of IGFET 100V along the p type counter doping agent on semiconductor-on-insulator surface
IBe in the concentration N of the n of IGFET 100V type background doped agent
I2 to 3 times, and (c) the concentration N of p type counter doping agent
IMaximum be concentration N along the p type counter doping agent on semiconductor-on-insulator surface
I2 to 3 times and therefore be the concentration N of n type background doped agent
I4 to 9 times.Except these differences, the concentration N of other dopant of IGFET 100V
IMost of respectively for being same as IGFET 100.
More in particular, in the concentration N of the p of IGFET 100V type bag portion dopant
ISubstantially the samely vertically change in IGFET 100.In what the curved section 120 ' of Figure 22 a showed be: move to channel region 106 along IGFET 100V semiconductor-on-insulator surface longitudinal, the concentration N of p type bag portion dopant from source electrode 102
IBe in to distinguish 106 be approximately fixing upper surface level midway, and then zero with the position that drains between 104 for dropping to basically from this level in source electrode 102.
Total p type dopant of 106 along the semiconductor-on-insulator surface in channel region of IGFET 100V is the summation of bag portion and counter doping agent.This is different from IGFET 100, and wherein: total p type dopant of 106 is the summation of bag portion and background doped agent along the semiconductor-on-insulator surface in channel region.Because the concentration N of the p type counter doping agent of illustrated example
IBe the concentration N of n type background doped agent
I2 to 3 times and therefore be in the concentration N of the p of IGFET 100 type background doped agent
I2 to 3 times, the total p type concentration of dopant N in the IGFET of illustrated example 100V along upper surface
IMinimum value be the total p type concentration of dopant N of IGFET 100 along upper surface
I2 to 3 times of minimum value.
With reference to figure 22c, project 106* represents the combination of channel region curved section 120* and 198* at this.Section 198* according to the curve 106* that is directed to IGFET 100V is the section 124* that is higher than the curve 106* that is directed to IGFET 100 of Fig. 7 c a little, is quite similar in the curve 106* of Fig. 7 c and 22c.Be with, the p type dopant of comparing drain side and having high clean amount in the source side of the channel region 106 of IGFET 100V.Be thereby reduce in the thickness of IGFET 100V along the channel side part of the exhaustion region of source electrode-body interface 110.In addition, being directed to and being associated with above-mentioned (field wire termination) reason of IGFET 100, is shielding source electrode 102 in order to avoid 104 the quite high electric field of draining in the high p type concentration of dopant along the source side of channel region 106 of IGFET 100V.Penetrate is to avoid the 100V in IGFET.
The p type dopant of the source electrode 102 of IGFET 100V and bulk material 108 parts of the below of drain electrode 104 by the curve 116 ' of Figure 23 a and 24a and 198 ' the trap portion and the counter doping agent of indicating respectively formed, and be directed to source electrode 102 by also being formed by curve 120 ' the indicated bag portion dopant of Figure 23 a.In what the variation of the curve 198 ' of Figure 23 a and 24a showed be: the concentration N of p type counter doping agent
IBe to reach maximum with the bottom of drain electrode 104 near source electrode 102.This maximum is in the concentration N of the n of the particular instance of Figure 23 a and 24a type background doped agent
I4 to 9 times.P type counter doping agent concentration N in the example of Figure 23 a and 24a
IBe in depth y less than the maximum p type concentration of dopant of trap portion 116
WThe degree of depth and being in the nature drop to zero.
Total p type dopant of bulk material 108 parts of the below of the drain electrode 104 of IGFET 100V is because the curved section 116 of Figure 24 b " and its (up) extension 198 " indicated.Because the concentration N of p type counter doping agent
IBe in less than depth y
WThe degree of depth and essence drops to zero, the concentration N of total p type dopant of the bulk material part of the below of drain electrode 104
TBe in being substantially equal to y
WPosition, inferior top layer and reach maximum.As betiding IGFET 100, in the build-up curve section 116 of Figure 24 b "/198 " variation show be: the concentration N of total p type dopant of bulk material 108 parts of the below of the drain electrode 104 of IGFET 100V
TMove to drain electrode 104 up from position, inferior top layer and inferior precipitous formula is reduced at least 10 times in the Cmax of total p type dopant of trap portion 116.
In the particular instance of Figure 24 b, the concentration N of total p type dopant of bulk material 108 parts of the below of the drain electrode 104 of IGFET 100V
TBe to be generally in moving up from the position of this maximum p type trap portion concentration to draining 104 and be reduced to and approach 15 multiple.The general value that reduces in precipitous concentration this time of IGFET100V be approach 15 multiple but not for the reason that approaches 100 multiple (as coming across IGFET 100) be to be: in the concentration N of the p type counter doping agent of the bottom of the drain electrode 104 of the IGFET 100V of the example of Figure 24 a
IBe in the concentration N of the p type background doped agent of the bottom of the drain electrode 104 of IGFET 100
I4 to 9 times.Yet the vertical dopant quantitative change curve that is directed to the agent of p type counter doping is the concentration N that can reduce with the p type counter doping agent that is reduced to drain electrode 104 bottom
IThe value, and still guarantee be: the whole p of being types of top bulk material part 196.Concentration N in total p type dopant of bulk material 108 parts of the below of the drain electrode 104 of IGFET 100V
TBe can be in moving up from the position of the Cmax of total p type dopant of trap portion 116 to draining 104 and be easy to be reduced at least 20 times, and be generally at least 40 times.
As the combination representative by curved section 116* and 198*, what Figure 24 c showed is: in the concentration N of the clean p type dopant of bulk material 108 parts of the below of the drain electrode 104 of IGFET 100V
NVertical change is the concentration N of total p type dopant that is similar to the bulk material part of drain electrode 104 below
T, except: the concentration N of the bulk material part of the below of drain electrode 104
NBe in PN junction 112 and 194 and drop to zero.Owing to inferior precipitous vertical dopant quantitative change curve of the bulk material part of the below of the drain electrode 104 of IGFET 100V, the parasitic capacitance that is associated with drain electrode-body interface 112 is similarly that being directed to improves reduces in the reason of hereinafter argumentation.Though compare IGFET 100, in along the parasitic capacitance of interface 104 to reduce be possible be less in IGFET 100V, IGFET 100V is the analog rate that still has raising.
Concentration is the existence greater than the p type counter doping agent of the p type background doped agent of IGFET 100, compare the vertical dopant quantitative change curve that sees through drain electrode 104 of IGFET 100V, have the vertical dopant quantitative change curve that see through source electrode 102 of rather less influence, because p type bag portion dopant is the below that also is present in the source electrode 102 of IGFET 100V in IGFET 100V.As Figure 23 relatively is obviously with Figure 24, about the vertical dopant quantitative change curve that sees through source electrode 102 of IGFET 100 and above-mentioned argument is to summarize the vertical dopant quantitative change curve through source electrode 102 that is applied to IGFET 100V.
Figure 25 illustrates according to the present invention and is similar to a kind of variation 150V of the asymmetric long n passage IGFET150 of Figure 13 that wherein, n-bottom 192 replaces p-below bulk material part 114 once more.IGFET 150V contains p type top bulk material part 196 equally, and it replaces IGFET 150 top bulk material parts 118.The p-residue 198 of top bulk material part 196 is compared n-bottom 192 and is in higher a little net doping agent concentration once more.As IGFET 100V, the slight p type doping of bulk material residue 198 is to reach by the counter doping agent of p type above IGFET 150V.According to n-bottom 192 existence with p-top bulk material residue 198, IGFET 150V is essentially and is same as IGFET 150 and constitutes, and has source/drain dopant gradual change longitudinally whereby, to reduce source resistance R
SInject with the heat carrier of drain side.
Figure 26 a to 26c (general name " Figure 26 ") presents the concentration of dopant along the example on semiconductor-on-insulator surface of IGFET 150V, is used to check in the vertical dopant gradual change of source electrode 102 with drain electrode 104.Concentration N along the main localized area 102M of upper surface, 102E, 104M, 104E, 120, indivedual semiconductor dopants of 192 and 198
IBe to be depicted in Figure 26 a.Figure 26 b explanation is along regional 102M, the 102E of upper surface, 104M, 104E, 120, total p type of 192 and 198 and the concentration N of n type dopant
TNet concentration N along upper surface
NBe illustrated in Figure 26 c.
Figure 26 repeat Figure 14 and according in modification respectively that Figure 22 presented to consider n-bottom 192 and p-top bulk material residue 198.Do not have the asymmetric vertical dopant gradual change of any significant impact in the source electrode 102 of IGFET 150V and vertical dopant gradual change of drain electrode 104 in channel region 106.Most of as be same as IGFET 150 and therefore most of as be same as IGFET 100 and avoid penetrating in the asymmetric channel region dopant gradual change of IGFET 150V.
In the configuration of the p+ of IGFET 150V trap portion 116 and p-top bulk material residue 198 make its see through drain electrode 104 and to the vertical dopant quantitative change curve of lower floor's bulk material 108 for inferior precipitous and substantially the same in IGFET 150.Figure 23 and 24 the vertical dopant concentration curve along vertical line 130 and 136 are applied to IGFET 150V basically.Drain electrode-body interface 112 in IGFET150V has the parasitic capacitance of reduction, reduces as being same as the many of IGFET 150 though be generally, makes IGFET 150V have the simulation switch speed of raising.
Figure 27 a and 27b explanation is according to the present invention and be respectively other the asymmetric long n passage IGFET 170 of branch that is similar to Figure 18 a and 18b and 180 variation 170V and 180V, and wherein, n-bottom 192 replaces bulk material part 114 below the p-once more.Each IGFET 170V or 180V contain p type top bulk material part 196 equally, and it replaces IGFET 170 or 180 top bulk material parts 118.The p-residue 198 of top bulk material part 196 is compared n-bottom 192 and is in higher a little net doping agent concentration once more.As IGFET 100V and 150V, the slight p type doping of bulk material residue 198 is to reach by the counter doping agent of p type above each IGFET 170V or 180V.According to n-bottom 192 existence with p-top bulk material residue 198, the bag portion 120 of each IGFET 170V or 180V compare source electrode 102 with drain 104 and below the semiconductor-on-insulator surface for extending to small depth.IGFET 180V also has the gradual change of source/drain dopant longitudinally of IGFET 150V, to reduce source resistance R
SInject with the heat carrier of drain side.
The channel region 106 of each of IGFET 170V and 180V is essentially as being directed to IGFET 100V and 150V vertical doping gradual change mentioned above and asymmetric respectively.Figure 22 presents the concentration N along the semiconductor-on-insulator surface that is directed to IGFET 170V basically
I, N
TWith N
NBe directed to and be associated with the above-mentioned reason of IGFET 100V, penetrate and be so avoid in IGFET170V.The concentration N of IGFET 180V along the semiconductor-on-insulator surface
I, N
TWith N
NBe to represent in Figure 26 respectively basically.IGFET 180V is mentioned above and therefore as to be directed to IGFET 100V mentioned above and avoid penetrating as being directed to IGFET 170V.
Each of IGFET 170V and 180V is mentioned above and have an inferior precipitous vertical dopant quantitative change curve of drain electrode of seeing through 104 as being directed to IGFET 100V.Figure 24 also presents the concentration N along the vertical line 136 that sees through drain electrode 104 that is directed to each IGFET 170V or 180V
I, N
TWith N
NAs a result, being directed to and being associated with the above-mentioned reason of IGFET 100V, is to reduce in the parasitic capacitance along drain electrode-body interface 112 of each IGFET 170V or 180V.IGFET 170V or 180V thereby have the analog rate of raising.
Figure 28 a to 28c (collective is " Figure 28 ") presents the concentration N along the vertical line 130 that sees through source electrode 102 that is directed to each IGFET 170V or 180V respectively
I, N
TWith N
NAs in the curved section 116 of Figure 28 b " with 198 " variation indicated, in the concentration N of total p type dopant of bulk material 108 parts of the below of source electrode 102
TFrom moving to source electrode 102 up and inferior precipitous formula is reduced at least 10 times along line 130 in the position, inferior top layer of the Cmax of the p of trap portion 116 type dopant.As betiding IGFET 170 and 180, in IGFET 170V and 180V, the more shallow bag of formation portion 120 is the inferior precipitous vertical quantitative change curves that cause the bulk material p type dopant partly of the below that is directed to source electrode 102 with drain electrode 104 to compare source electrode 102.
Being directed to each IGFET 170V or 180V, is the inferior precipitous vertical dopant quantitative change curves of bulk material 108 parts that quite are similar to the below of drain electrode 104 in the inferior precipitous vertical dopant quantitative change curve of bulk material 108 parts of the below of source electrode 102.In the particular instance of Figure 28, IGFET 170V or 180V in the concentration N of total p type dopant of the bulk material part of the below of source electrode 102
TBe moved upward to source electrode 102 and be reduced to from the position of this maximum p type trap portion concentration and approach 15 common multiple.Though these common 15 times are evident as common 10 times 0 of correspondence that betides IGFET 170 or 180 less than it, the vertical dopant quantitative change curve that is directed to the agent of p type counter doping is to reduce.Be similar to it about the vertical dopant quantitative change curve that sees through drain electrode 104 of IGFET 100V and in mentioned above, the concentration N of total p type dopant of the bulk material of the below of the source electrode 102 of IGFET 170V or 180V part
TBe can be easily to move to source electrode 102 up and be reduced at least 20 times, be generally at least 40 times from Cmax position in total p type dopant of trap portion 116.
The inferior precipitous vertical dopant quantitative change curve in bulk material 108 parts of the below of source electrode 102 of IGFET 170V or 180V reduces the parasitic capacitance that is associated with source electrode-body interface 110, although be generally compare IGFET 170 or 180 in a small amount.As a result, analog rate and then the raising of each IGFET 170V or 180V.
IGFET 140,160 and 190 variation can be provided with n-bottom 192 and p-top bulk material residue 198 (or p type top bulk material parts 196), are located at the identical mode of IGFET 100V, 150V, 170V and 180V with 192 and 198 (or 196), zone.IGFET140, these asymmetric long n passages of 160 and 190 change in hereinafter being called IGFET140V, 160V and 190V.
Be applicable to the complementary IGFET structure that mixed-signal is used
The jitty form of long-channel IGFET 150,160,170,180,190,100V, 150V, 160V, 170V, 180V and 190V can be manufacturing according to the present invention by suitable reduction passage length.P passage IGFET can (comprising: the conductivity-type of the semiconductor regions variation of the jitty of IGFET 150,160,170,180,190,150V, 160V, 170V, 180V and 190V) be similarly the manufacturing according to the present invention by reverse IGFET 100,140,150,160,170,180,190,100V, 140V, 150V, 160V, 170V, 180V and 190V.
N passage IGFET 100,140,150,160,170,180,190,100V, 140V, 150V, 160V, 170V, 180V and 190V (comprising: the variation of the jitty of IGFET 150,160,170,180,190,150V, 160V, 170V, 180V and 190V), and p passage IGFET can be provided in identical semiconductor construction separately, to produce a kind of complementary IGFET semiconductor framework that it is specially adapted to simulation application at a high speed.For example, n passage IGFET 100,140,150,160,170,180 and one or more variations that combine one or more p passages of IGFET100V, 140V, 150V, 160V, 170V, 180V and 190V of 190.Complementary IGFET is configured in and is formed by slight doped p N-type semiconductor N material, utilization p-below bulk material part 114 is directed to the variation of each p passage of IGFET 100V, 140V, 150V, 160V, 170V, 180V or 190V as the p type equivalence of n-bottom 192.Substitute, n passage IGFET 100V, 140V, 150V, 160V, 170V, 180V and 190V one or how can be in conjunction with the variation of one or more p passages of IGFET 100,140,150,160,170,180 and 190, by the manufacturing of slight doped n type semi-conducting material, utilization n-bottom 192 is directed to the variation of each p passage of IGFET 100,140,150,160,170,180 or 190 as the n type equivalence of p-below bulk material part 114.
The IGFET (n channel and p channel) that is specially adapted to digital circuit also can be provided in semiconductor construction.Bipolar system transistor (npn and pnp) is to be provided in semiconductor construction separately.Therefore the semiconductor framework that causes is applicable to the mixed-signal application.
Figure 29 .1 and 29.2 (collective is " Figure 29 ") describes according to the present invention formation two parts with a kind of complementary IGFET semiconductor construction that is specially adapted to mixed-signal and uses.The complementary IGFET structure of Figure 29 is formed by its single silicon semiconductor body with a kind of doping of below p-bulk material part 114.Usually the territory, patterning place 200 that is mainly the insulating material that silica forms is to be recessed to the semiconductor body upper surface, to limit group's oss-divided active semiconductor island portion (island).Four this kind island portions 202,204,206 and 208 come across Figure 29.
Four long-channel IGFET 210,220,230 and 240 are formed at the position of island portion 202,204,206 and 208 respectively along the semiconductor-on-insulator surface.IGFET 210 and the 220 main asymmetrical units that are intended to be used for simulation application at a high speed in Figure 29 .1.IGFET 230 and the 240 main symmetrical mountings that are intended to be used for digital application in Figure 29 .2.IGFET 210 and 230 is n CU channel unit.IGFET 220 and 240 is p CU channel unit.
Asymmetric n passage IGFET 210 is a kind of All Rangeses of implementing and containing IGFET 180 of the long n passage IGFET 180 of Figure 18 b.Be to be essentially with, IGFET 210 to be directed to IGFET 180 as mentioned above and therefore to have in the inferior precipitous vertical dopant quantitative change curve of the below of drain electrode 104 for being directed to IGFET 100 as mentioned above.Therefore in like manner, the channel region 106 of IGFET 210 is to be directed to IGFET 180 as mentioned above and to be essentially to be directed to IGFET 150 as mentioned above and to be asymmetric vertical doping gradual change.
The source electrode 102 of n passage IGFET 210, drain electrode 104 are to be positioned at island portion 202 with channel region 106.Except the zone of being described in Figure 18 b, IGFET 210 contains the sidewall spacer 250 and 252 to electric insulation, and it is in the relative lateral sidewalls along gate electrode 128.Metal silicide layer 254,256 and 258 is that the difference position is at the top along source electrode 102, drain electrode 104 and gate electrode 128.
Asymmetric p channel IGFET 220 is the enforcement of the p channel form of long n passage IGFET 180V, and wherein, n-bottom 192 is replaced by p-below bulk material part 114.IGFET 220 has the p type source electrode 262 and p type drain electrode 264 that the n type channel region 266 by n type bulk material 268 is separated, and the trap portion 276 that bulk material 268 is mixed by severe is formed with top 278.As the enforcement of the p channel form of n channel IGFET 180V, p passage IGFET 220 is essentially and is same as (must through conductivity-type oppositely) and is directed to n passage IGFET180V as mentioned above and therefore is directed to n passage IGFET 100V as mentioned above and has in the inferior precipitous vertical dopant quantitative change curve of the below of drain electrode 264.In like manner, the channel region 106 of p channel IGFET 210 be essentially and be same as (be similarly must through conductivity-type oppositely) be directed to n passage IGFET 180V as mentioned above and be asymmetric vertical doping gradual change therefore for being directed to n passage IGFET150V as mentioned above.
The source electrode 262 of p passage IGFET 220, drain electrode 264 are to be positioned at island portion 204 with channel region 266.Each p type S/ D district 262 or 264 is made up of the major part 262M or the 264M of utmost point severe doping and the horizontal expansion part 262E or the 264E of more slightly mix (but still being that severe is mixed), to reduce source resistance R
SInject with the heat carrier of drain side.P+ horizontal expansion part 262E and 264E end at channel region 266 along the semiconductor-on-insulator surface.
The severe doping bag portion 280 of n type top bulk material part 278 is to extend along source electrode 262, is mainly along source electrode extension 262E.As the bag portion 120 about IGFET 210, n+ bag portion 280 compares p+ source electrode extension 262E and darker for extending below the semiconductor-on-insulator surface, but is non-dark for as the main source electrode portion 262M of p++.The residue 284 of n type top bulk material part 278 is slightly to mix and extend along drain electrode 264.The most of identical of the p+ trap portion 116, p+ bag portion 120 that normally has respectively as be same as IGFET 180V in the n+ of IGFET 220 trap portion 276, n+ bag portion 280 and n-top bulk material residue 284 and p-top bulk materials residue 198 is reverse with vertical dopant characteristic and conductivity-type vertically.IGFET 220 is thereby avoids penetrating and have along the parasitic capacitance of the reduction of source electrode-body and drain electrode-body PN junction.
Be associated with the variation of the IGFET hereinafter described 220 of Figure 32 a to 32c and Figure 33 a to 33f in it, it only is the extension of n+ trap portion 276 that n-top bulk material residue 284 is in the nature.Slight n type doping in the n-top of this variation bulk material residue 284 produces in order to the n type dopant diffusion up partly that forms n+ trap portion 276 by it, causes residue 284 to be one of slight Doped n-type independent dopant introducing step to avoid it to be used to.
The n passage IGFET 230 of symmetry have that p type channel region 306 by p type bulk material 308 separated to n type S/ D district 302 and 304, bulk material 308 is made up of in abutting connection with trap portion 316 and top 318 below p-part 114, severe doping.S/ D district 302 and 304 and channel region 306 be to be positioned at island portion 206.Each n type S/ D district 302 or 304 is made up of the major part 302M of utmost point severe doping or the horizontal expansion part 302E or the 304E of 304M and severe doping (and therefore comparatively slightly mixing), to reduce the heat carrier injection of drain side.N+ horizontal expansion part 302E and 304E end at channel region 306 along the semiconductor-on-insulator surface.
The ring bag portion 320 and 322 that severe is mixed of p type top bulk material part 318 is respectively along S/ D district 302 and 304 extensions with symmetric mode.P+ ring bag portion 320 and 322 mainly extends along n+S/D extension 302E and 304E.In the example of Figure 29, p+ bag portion 320 compares n+ extension 302E and 304E with 322 and darker for extending below the semiconductor-on-insulator surface, but be non-for mainly drain as n++ part 302M and 304M deeply.Project 324 is medium doped p type residues of top bulk material part 318.
According to for being formed on the p-below bulk material part 214, the p passage IGFET240 of symmetry is essentially and is same as IGFET 230 and conductivity-type is the reverse long channel device that constitutes.IGFET 240 have therefore that n type channel region 346 by n type bulk material 348 separated to p type S/ D district 342 and 344, bulk material 348 is made up of the trap portion 356 and the top 358 of severe doping.S/ D district 342 and 344 and channel region 346 be to be positioned at island portion 208.Each p type S/ D district 342 or 344 is made up of the major part 342M or the 344M of utmost point severe doping and the horizontal expansion part 342E or the 344E of more slightly mix (but still being that severe is mixed), to reduce the heat carrier injection of drain side.P+ horizontal expansion part 342E and 344E end at channel region 346 along the semiconductor-on-insulator surface.
The ring bag portion 360 and 362 that severe is mixed of n type top bulk material part 358 is respectively along S/ D district 342 and 344 extensions with symmetric mode.N+ ring bag portion 360 and 362 is mainly along S/ D extension 342E and 344E to extend.In the example of Figure 29, n+ bag portion 360 compares n+ extension 342E and 344E with 362 and darker for extending below the semiconductor-on-insulator surface, but be non-for as n++ main S/ D part 342M and 344M deeply.Project 364 is medium doped n type residues of top bulk material part 358.
IGFET 210,220,230 and 240 gate dielectric 126,286,326 and 366 normally mainly are made up of silica, but can be made up of the dielectric material of silicon oxynitride and/or other high-dielectric coefficient.Dielectric layer 126,286,326 and 366 thickness are to be generally 2 to 8 rice (nm) how, are preferably 3 to 5nm, are directed to across the operation of 1.8 volt range and are generally 3.5nm.Medium thickness is aimed at across the operation of high voltage scope and suitably increases, or is directed to across the operation of low voltage scope and suitably reduces.Sidewall spacer 250,252,290,292,330,332,370 and 372 is to be shaped as roughly, has the right-angled triangle of convex hypotenuse and is illustrated in Figure 29 as it, but can have other shape.Silicide layer 254,256,258,294,296,298,334,336,338,374,376 and 378 is generally by cobalt silicide to be formed.
Each n++ main S/D part 302M that sees through IGFET 230 and 304M and to the vertical dopant quantitative change curve of the p of lower floor type bulk material 308 be similar to be directed to IGFET 20 in shown in Fig. 3 a and also be similar to hereinafter to be discussed in the reference dopant dose varied curve of the Computer Simulation shown in Figure 40,44a and the 44b.In like manner be applied to through each p++ main S/D part 342M of IGFET 240 and 344M and to the vertical dopant quantitative change curve of the n of lower floor type bulk material 348, according in bulk material 348 for being formed at the PN junction of p-bottom 114 rather than being incorporated into the single silicon of slight Doped n-type of lower floor.The concentration of the moderate in the p type dopant of top bulk material part 324 of IGFET 230 (but for raising) is, and to be operate together with the severe p type concentration of dopant that is provided by ring bag portion 320 and 322 betide IGFET 230 to prevent to penetrate.In like manner make it avoid penetrating in IGFET 240 top bulk material parts 364 and ring bag portion 360 with 362 corresponding doping.
As its Cmax of p type trap portion dopant that limits the trap portion 116 of IGFET 210, the p type trap portion dopant that limits trap portion 316 is being about same depth and reaching Cmax below the semiconductor-on-insulator surface usually.Because the concentration N of p type background doped agent
IBe quite even, as be same as the Cmax of total p type dopant of the trap portion 116 of IGFET 210, be generally the same depth that is about of the below that occurs in upper surface in the Cmax of total p type dopant of the trap portion 316 of IGFET 230.IGFET 230 top bulk material parts 318 provide the p type anti-penetrate (APT) dopant with rising upper section 318 to moderate p type doped level.Compare the Cmax of p type trap portion dopant of trap portion 316 in the p type APT of top bulk material part 318 dopant and the less degree of depth below the semiconductor-on-insulator surface for reaching Cmax.
Combination in total p type dopant (that is: p type trap portion, APT and background doped agent) of bulk material 308 parts of the below of n++ main S/ D part 302M or 304M makes in the concentration N of total p type dopant of this bulk material part
TFor quite smooth from vertical line that the position, inferior top layer in the maximum p type concentration of dopant of trap portion 316 extends upwardly to main S/ D part 302M or 304M along it.In particular, in the concentration N of total p type dopant of bulk material 308 parts of the below of main S/ D part 302M or 304M
TBe moved upward to part 302M or 304M from position and change (reducing) usually for less than 10 times, and be generally less than 5 times in the maximum p type concentration of dopant of trap portion 316.
In like manner betide IGFET 240.As its Cmax of n type trap portion dopant that limits the trap portion 276 of IGFET 220, the n type trap portion dopant that limits the trap portion 356 of IGFET 240 is generally being about same depth and reaching Cmax below the semiconductor-on-insulator surface.As be same as the Cmax of total n type dopant of the trap portion 276 of IGFET 220, therefore be generally the same depth that is about of the below that occurs in upper surface in the Cmax of total n type dopant of the trap portion 356 of IGFET 240.IGFET 240 top bulk material parts 358 provide n type APT dopant with rising upper section 358 to moderate n type doped level.Compare the Cmax of n type trap portion dopant of trap portion 356 in the n type APT of top bulk material part 358 dopant and the less degree of depth below the semiconductor-on-insulator surface for reaching Cmax.
Combination in total n type dopant of bulk material 348 parts of the below of S/ D district 342M or 344M (that is: be mainly n type trap portion and APT dopant) makes in the concentration N of total n type dopant of this bulk material part
TFor quite smooth along the vertical line that extends upwardly to main S/ D part 342M or 344M from position, inferior top layer in the maximum n type concentration of dopant of trap portion 356.Clear and definite, in the concentration N of total n type dopant of bulk material 348 parts of the below of main S/ D part 342M or 344M
TBe in move up from the position of the maximum n type concentration of dopant of trap portion 356 to part 342M or 344M and be changed to usually less than 10 times, be generally less than 5 times.
Really, indivedual IGFET 210 and 220 ring bag portion 120 and 280 are substitutable for that to compare indivedual source electrodes 102 darker for extending below the semiconductor-on-insulator surface with drain electrode 262.So IGFET 210 is the IGFET 150 that implement Figure 13, and IGFET 220 is p channel forms of implementing IGFET 150V.The ring bag portion 320 of n passage IGFET 230 and 322 comparability S/D districts 300 and 302 and darker for extending below the semiconductor-on-insulator surface take place with reference to short channel structure B as the Computer Simulation in Figure 40 hereinafter.The ring bag portion 360 of p passage IGFET 240 and 362 can compare S/D district 340 and 342 and darker for extending below the semiconductor-on-insulator surface equally.
Figure 30 .1 and 30.2 (collective is " Figure 30 ") describe its according to the present invention formation to be in particular two parts of the another kind of complementary IGFET semiconductor construction that is applicable to that mixed-signal is used.The complementary IGFET structure of Figure 30 contains asymmetric p passage IGFET 220 and asymmetric long n passage IGFET 380, it constitutes and is same as asymmetric n passage IGFET 210, except severe Doped n-type time top layer 382 is that the position is between p+ trap portion 116 and the p-bottom 114, serving as that isolation is from p-bottom 114 with p type top bulk material part 118 with p+ trap portion 116.As a result, the p type bulk material 108 that is directed to IGFET 380 does not comprise p-bottom 114 but only by being made up of with p type top bulk material part 118 p+ trap portion 116.
The complementary IGFET structure of Figure 30 further comprises symmetrical p passage IGFET 240 and the long n passage IGFET 390 of symmetry, it constitutes and is same as symmetrical n passage IGFET 230, except severe Doped n-type time top layer 392 is between p+ trap portion 316 and p-bottom 114, serving as that isolation is from p-bottom 114 with p type top bulk material part 318 with p+ trap portion 316.Be directed to the p type bulk material 308 of IGFET 390 thereby do not comprise p-bottom 114 and only by being formed with p type top bulk material part 318 by p+ trap portion 316.Except n+ top layer 382 and 392, n passage IGFET 380 and 390 is respectively and is same as n passage IGFET 210 and 230 and operate.
Circuit unit except IGFET 210,220,230,240,380 and 390 can be located at the other parts (not shown) of the complementary IGFET structure of Figure 29 or 30.For example, IGFET 210,220,230,240,380 and 390 jitty form are to be present in any complementary IGFET structure.Bipolar transistor and resistor, capacitor and/or the inductor of planting type are the complementary IGFET structures that can be located at Figure 29 or 30.Characteristic on the adjunct circuit assembly is decided, and the electrical isolation that is fit to also is provided in to be directed to any complementary IGFET structure of add-on assemble.Really, in some pure complementary IGFET structures for simulation, IGFET 240 and 230 or 390 is deletable.
Be applicable to the manufacturing of the complementary IGFET structure that mixed-signal is used
P.1, p.2 Figure 31 a to 31o, Figure 31 illustrate according to a kind of semiconductor fabrication of the present invention to 31.r2 (collective is " Figure 31 ") to 31r.1 and Figure 31, are used to make it and contain a kind of complementary IGFET semiconductor construction that is summarized in long-channel IGFET shown in Figure 29 210,220,230 and 240.Up to stage before the creation of gate sidewall spacer 250,252,290,292,330,332,370 and 372 just, the step that is involved in the manufacturing of IGFET 210,220,230 and 240 is shown in Figure 31 a to 31o.Figure 31 p.1 to 31r.1 be explanation sept 250,252,290 and 292 manufacturing with and cause as the IGFET 210 that painted in Figure 29 .1 and 220 subsequent step.Figure 31 p.2 to the manufacturing of 31.r2 explanation sept 330,332,370 and 372 with and cause as in IGFET 230 shown in Figure 29 .2 and 240 subsequent step.
IGFET 210,220,230 and 240 jitty form are to apply to make the manufacturing step of long channel IGFET 210,220,230 and 240 and make simultaneously according to it.Short channel IGFET compares long-channel IGFET 210,220,230 and 240 to be less passage length, but is same as middle IGFET outward appearance shown in Figure 31 in others for summarizing.Long-channel IGFET 210,220,230 and 240 and to make the short channel form time be to implement by it has the barricade (light net) of the pattern that is directed to long channel and short channel IGFET.
Except bag portion (comprising: ring bag portion) ion implantation step and the source/drain pole extension ion implantation step, in all ion implantation step summarys of this manufacture process for perpendicular to semiconductor surface down and therefore summary for carrying out perpendicular to the semiconductor-on-insulator surface.More in particular, all implantation steps except bag portion and source/drain pole extension ion implantation step are the low-angles that are executed in for vertical line, are generally 7 degree.This little deviation from perpendicularity is used to avoid unacceptable ion channel effect.In order to simplify, be not instructed in Figure 31 from the little deviation of perpendicularity.
Only in addition for indicating, the species of n type dopant of each n type ion implantation that are used in the manufacture process of Figure 31 are made up of the appointment n type dopant of element form.That is, each n type ion implant be with the ion of specifying n type dopant element but not for its ion of compound that contains n type dopant performed.The species that apply to the p type dopant of each p type ion implantation are made of separately the p type dopant (being generally boron) of element or compound form.Therefore, each p type ion is implanted and is generally with boron ion or performed with the ion of the compound (boron difluoride) that contains boron.
In some manufacturing steps of Figure 31, opening (basically) extends through the photoresistance shielding above the active semiconductor region that is directed to two IGFET at it.The example cross section that is formed at Figure 31 as two IGFET is for laterally adjacent one another are, and two photoresistance openings are to be illustrated as single opening in Figure 31, even it may be in the opening that hereinafter is described as separating.
The letter " P " that comes across the graphic reference symbol end of Figure 31 point out for its be shown in Figure 29 and its " P " reference symbol part identification before of serving as reasons in the predecessor (precursor) in the zone of Figure 29.When this predecessor be fully development be formed in the corresponding region of Figure 29 with major part, letter " P " is from removing in this graphic reference symbol of Figure 31.
The starting point that is directed to the manufacture process of Figure 31 is generally single silicon semiconductor body that the slight doped p type epitaxial loayer 114P by severe doped p type substrate 400 and upper strata is formed.Consult Figure 31 a, p+ substrate 400 is semiconductor crystal wafers, by its doped with boron to being about 5 * 10
18The concentration of atom/cubic centimetre with reach 0.015 Ao Mu-centimetre (the common resistivity of Ω-cm)＜100〉single silicon formed.In order to simplify, substrate 400 is not shown in the remainder of Figure 31.Substitute, starting point can only be slightly to be doped to substantially the same p type substrate in p-epitaxial loayer 114P.
Photoresistance shielding 404 with the opening above island portion 202 and 206 is formed at screen oxide layer 402, as in shown in Figure 31 c.The p type trap portion dopant of being made up of borohydride species is in severe dosage and high-energy and ion is implanted as through the unmasked portion of screen oxide 402 and to single silicon of lower floor, to limit p+ forerunner's trap 316P of portion that (a) is directed to the p+ trap portion 116 of IGFET 210 and (b) is directed to IGFET 230.In the part of the epitaxial loayer 114P above the trap portion 116 is to constitute bulk material part 118P above the p-forerunner who is directed to IGFET 210.Remove photoresistance 404.
Photoresistance shielding 406 with the opening above island portion 206 is formed at screen oxide 402.Consult: Figure 31 d.The p type APT dopant of being made up of borohydride species is in moderate dosage and ion is implanted as through the unmasked portion of screen oxide 402 and to single silicon of lower floor, is directed to the p forerunner top bulk material part 324P of IGFET 230 with qualification.Remove photoresistance 406.
Photoresistance shielding 408 with the opening above island portion 204 and 208 is formed at screen oxide 402, as in shown in Figure 31 e.The n type trap portion dopant of being made up of phosphorus or arsenic is in severe dosage and high-energy and ion is implanted as through the not overlay segment of screen oxide 402 and to single silicon of lower floor, to limit n+ forerunner's trap 356P of portion that (a) is directed to the n+ trap portion 276 of IGFET 220 and (b) is directed to IGFET 240.
Along with photoresistance shielding 408 is in the location, be similarly the n type counter doping agent of forming by phosphorus or arsenic and be in slight dosage and in energy and ion be implanted as the not overlay segment that sees through the oxide 402 above island portion 204 and to single silicon of lower floor, to limit bulk material part 278P above its n-forerunner who is directed to IGFET 220.N-forerunner's bulk material part 278P is overlying in the n+ trap portion 276, is present in the stage of Figure 31 e as it.The dosage that the agent of n type counter doping is implanted is generally fully so that the whole n of being type conductivity of forerunner's bulk material part 278P with the implantation energy.
The agent of n type counter doping also the oxide 402 by island portion 208 tops not overlay segment and be directed to single silicon of the lower floor of IGFET 240 to it.Utilize the appointing of these two n type doping operations of photoresistance 408 to can be first execution.Remove photoresistance 408.If expectation is: the single silicon that is directed to IGFET240 does not receive the agent of any n type counter doping, the operation of n type counter doping is can be by it has above island portion 204 not performed in the additional photoresistance shielding of the opening of (and also not above island portion 202 and 206) above the island portion 208, remove additional photoresistance thereafter.
During follow-up manufacturing step, utilization is the semi-conducting materials that diffuse to up above n+ trap portion 276 with some of n type trap portion dopant that qualification is directed to the forerunner n+ trap portion 276 of IGFET 220, is present in this point of the manufacture process of Figure 29 as it.That is, the part of n type trap portion dopant is island portion 204 upper layer of material that diffuse to its initial slight p type that mixes up.The diffusion up of the part of the n type trap portion dopant of qualification n+ trap portion 276 is mainly and betides during the subsequent fabrication steps that is executed in elevated temperature (that is: remarkable temperature greater than room temperature).
Decide on all factors, mainly be following the two summary effect: (a) elevated temperature of subsequent fabrication steps during with the temperature parameter that (b) is beneficial to the increase diffusion of dopant by this elevated temperature, the diffusion part up that limits the n type trap portion dopant of n+ trap portion 276 can become the distribution transfixion pin for the island portion 204 of IGFET 220 so that contra-doping whole in the p of island portion 204 type dopant at present.Ignore its follow-up any other dopant that is introduced into island portion 204, this of n type trap portion dopant up diffusion part can to make the whole of island portion 204 be to be converted to n type conductivity.In this situation, implant the step of n type counter doping agent sometimes and can delete to simplify manufacture process and to reduce manufacturing cost.Be discussed in hereinafter Figure 32 a to 32c and two kinds of variations of Figure 33 a to 33c manufacture process of describing Figure 31, wherein, the step of n type counter doping agent is implanted in deletion.
During follow-up manufacturing, utilization is the semi-conducting materials that also diffuse to up above the n+ trap 356P of portion with some of n type trap portion dopant that qualification is directed to the n+ trap 356P of portion of IGFET 240, is present in this point of the manufacture process of Figure 29 as it.Yet, such as hereinafter argumentation, island portion 208 whole that are directed to IGFET 240 are when its ion that is introduced into the n type APT dopant of island portion 208 is implanted end with related activation and be n type conductivity.Therefore, the decision-making of reservation or removal n type compensation implant is determined by its condition that is applied to the subsequent fabrication steps of the island portion 204 that is directed to IGFET220.
Photoresistance shielding 410 with the opening above island portion 208 is formed at screen oxide 402.Consult: Figure 31 f.The n type APT dopant of being made up of phosphorus or arsenic is in moderate dosage and ion is implanted as through the unmasked portion of screen oxide 402 and to single silicon of lower floor, to limit its n forerunner who is directed to IGFET 240 top bulk material part 358P.Remove photoresistance 410.
A kind of thermal annealing such as rapid thermal annealing (RTA, rapid thermal anneal) can be executed in the semiconductor substrate that causes, to repair p type that crystal lattice damage and storing implanted and n type dopant in energy stable status more.Consult: Figure 31 g.The semiconductor-on-insulator surface is peace and quiet.The dielectric layer 412 that contains gate dielectric is provided as along the semiconductor-on-insulator surface, as in shown in Figure 31 h.Dielectric layer 412 forms by a kind of hot growth technology.
Forerunner's gate electrode 128P, 288P, 328P and 368P are formed at its dielectric layer that contains gate dielectric 412 and distinguish the fragment top of bulk material part 118P, 278P, 318P and 358P up.Consult: Figure 31 i.Forerunner's gate electrode 128P, 288P, 328P and 368P by the major part of sedimentary deposit do not mix (essence) poly-silicon in dielectric layer 412 and then patterning should form by poly-silicon.Place forerunner's gate electrode 128P, 288P, 328P and 368P under the part of dielectric layer 412 constitute gate dielectric 126,286,326 and 366 respectively.By gate dielectric 126,286,326 and 366 formed grid dielectric materials is to be summarised as the bulk material fragment of separating gate electrode 128P, 288P, 328P and 368P respectively and being intended to other channel region 106,266,306 of branch and 346.
Photoresistance shielding 418 with opening of the top, intention position that is summarised in its p+ bag portion 120 that is directed to IGFET 210 is formed at dielectric layer 414 and 416.Consult: Figure 31 j.Photoresistance 418 strictnesses are in alignment with forerunner's gate electrode 128P.The p type bag portion dopant of forming by borohydride species be with the oblique angle mode in moderate dosage and ion be implanted as through the unmasked portion of oxide layer 416 and to single silicon of lower floor, to limit p+ forerunner's bag 120P of portion that it is directed to IGFET 210.P type bag portion implants and is executed in its two opposing inclined angles for vertical line usually.Substitute, p type bag portion implants can be executed in single angle of inclination.Remove photoresistance 418.
Photoresistance shielding 420 with opening of the top, intention position that is summarised in its n+ bag portion 280 that is directed to IGFET 220 is formed at dielectric layer 414 and 416.Consult: Figure 31 k.Photoresistance 420 strictnesses are in alignment with forerunner's gate electrode 288P.The n type bag portion dopant of forming by phosphorus or arsenic in the oblique angle mode in severe dosage and ion is implanted as the unmasked portion that sees through surperficial dielectric medium 416 and to single silicon of lower floor, to limit n+ forerunner's bag 280P of portion that it is directed to IGFET 220.N type bag portion implants and is executed in two opposing inclined angles usually, but can be executed in single angle of inclination.Remove photoresistance 420.
Photoresistance shielding 422 with the opening above island portion 202 and 206 is formed at dielectric layer 414 and 416, as in shown in Figure 31 l.The n type source/drain pole extension dopant of being made up of arsenic or phosphorus is in severe dosage and ion is implanted as the unmasked portion that sees through surperficial dielectric medium 416 and to single silicon of lower floor, with limit independent n+ forerunner's drain extension 104EP that n+ forerunner's source electrode extension 102EP, (b) that (a) be directed to IGFET 210 be directed to IGFET 210, and (c) be directed to IGFET 230 to oss-divided n+ forerunner's source/drain pole extension 302EP and 304EP.Remove photoresistance 422.
Photoresistance shielding 424 with the opening above island portion 206 is formed at dielectric layer 414 and 416.Consult: Figure 31 m.The p type ring dopant of forming by borohydride species in the oblique angle mode in severe dosage and ion is implanted as the unmasked portion that sees through surperficial dielectric medium 416 and to single silicon of lower floor, with limit its be directed to IGFET 230 to oss-divided p type forerunner ring bag 320P of portion and 322P.Remove photoresistance 424.
Photoresistance shielding 426 with the opening above island portion 204 and 208 is formed at dielectric layer 414 and 416, as in shown in Figure 31 n.The p type source/drain pole extension dopant of being made up of borohydride species is in severe dosage and ion is implanted as through the unmasked portion of oxide on surface 416 and to single silicon of lower floor, with limit independent p+ forerunner's drain extension 264EP that p+ forerunner's source electrode extension 262EP, (b) that (a) be directed to IGFET 220 be directed to IGFET 220, and (c) be directed to IGFET 240 to oss-divided p+ forerunner's source/drain pole extension 342EP and 344EP.Remove photoresistance 426.
Photoresistance shielding 428 with the opening above island portion 208 is formed at dielectric layer 414 and 416.Consult: Figure 31 o.The n+ ring dopant of forming by phosphorus or arsenic be in the oblique angle mode in severe dosage and ion is implanted as the unmasked portion that sees through surperficial dielectric medium 416 and to single silicon of lower floor, with limit its be directed to IGFET 240 to oss-divided n+ forerunner's ring bag 360P of portion and 362P.Remove photoresistance 428.
Low temperature oven annealing can be carried out at this moment to remove the caused defective of being implanted by the source/drain pole extension of severe dosage.
In the remainder of the manufacture process of Figure 31, each the processing stage complementary IGFET structure illustrate with " 31z.2 " that by right figure " 31z.1 " wherein, " z " is the letter that changes from " p " to " r ".Z.1, each Figure 31 illustrates that it carries out forming the processing of asymmetric IGFET 210 and 220, and z.2 each Figure 31 illustrates that it carries out simultaneously to form the processing of symmetrical IGFET 230 and 240.For convenience, z.1 each right Figure 31 is called " Figure 31 .z " with 31z.2 in collective hereinafter, and wherein, " z " changes from " p " to " r ".For example, p.1 Figure 31 is called " Figure 31 .p " with 31p.2 collective.
Gate sidewall spacer 250,252,290,292,330,332,370 and 372 forms the lateral sidewalls along forerunner's gate electrode 128P, 288P, 328P and 368P, as in shown in Figure 31 p.Sidewall spacer 250,252,290,292,330,332,370 and 372 formation be by deposition of dielectric materials in the top of structure and then remove its non-intention and carry out with the dielectric material that constitutes sept 250,252,290,292,330,332,370 and 372, remove and be mainly the anisotropic etching of being carried out perpendicular to the semiconductor-on-insulator surface usually by it. Dielectric layer 414 and 416 part also remove for part (but not all). Project 430 and 432 in Figure 31 p refers to non-residue for sept 250,252,290,292,330,332,370 and 372 dielectric layers that covered 414 and 416 respectively.
Photoresistance shielding 434 with the opening above island portion 202 and 206 is formed at dielectric layer 430 and 432 and sept 290,292,370 and 372.Consult: Figure 31 q.The main source/drain dopant of being made up of arsenic or antimony of n type is in utmost point severe dosage and ion is implanted as through the unmasked portion of surface dielectric layer 432 and to single silicon of lower floor, with limit the main source electrode portion 102M of n++ that (a) be directed to IGFET 210 and n++ mainly drain part 104M, reach the n++ main S/D part 302M and the 304M that (b) are directed to IGFET 230.The main source/drain dopant of n type is also to enter forerunner's electrode 128P and 328P so that it is converted to n++ gate electrode 128 and 328 respectively.Remove photoresistance 434.
Constitute n+ source electrode extension 102E, n+ drain extension 104E and the p+ bag portion 120 that is directed to IGFET 210 respectively at regional 102EP, the 104EP in the outside of main S/ D part 102M and 104M and the part of 120P.P-top bulk material residue 124 is remaining slight dopant materials of forerunner top bulk material part 118P (bulk material part 118 above this is the p type).Part at regional 302EP, 304EP, 320P and the 322P in the outside of main S/ D part 302M and 304M constitutes n+S/ D extension 302E and 304E and the p+ ring bag portion 320 and 322 that is directed to IGFET 230 respectively.P-top bulk material residue 324 is remaining slight doped p type materials of forerunner top bulk material part 318P (bulk material part 318 above this is the p type).
When main source/drain dopant by being formed by arsenic, thermal annealing can be carried out to repair crystal lattice damage, activates this main n type source/drain dopant, and is towards outdiffusion.This annealing (being generally RTA) also activates bag portion and source/drain pole extension dopant.
Photoresistance shielding 436 with the opening above island portion 204 and 208 is formed at dielectric layer 430 and 432 and sept 250,252,330 and 332, as in shown in Figure 31 r.The main source/drain dopant of being made up of borohydride species of p type is in utmost point severe dosage and ion is implanted as through the unmasked portion of surface dielectric layer 432 and to single silicon of lower floor, with limit the main source electrode portion 262M of p++ that (a) be directed to IGFET 220 and p++ mainly drain part 264M, reach the p++ main S/D part 342M and the 344M that (b) are directed to IGFET 240.The main source/drain dopant of p type also enters forerunner's electrode 288P and 368P so that it is converted to p++ gate electrode 288 and 368 respectively.Remove photoresistance 436.
Constitute p+ source electrode extension 262E, p+ drain extension 264E and the n+ bag portion 280 that is directed to IGFET 220 respectively at regional 262EP, the 264EP in the outside of main S/ D part 262M and 264M and the part of 280P.N-top bulk material residue 284 is remaining slight Doped n-type materials of n-top bulk material part 278P (bulk material part 278 above this is the n type).Part at regional 342EP, 344EP, 360P and the 362P in the outside of main S/ D part 342M and 344M constitutes p+S/ D extension 342E and 344E and the n+ ring bag portion 360 and 362 that is directed to IGFET 240 respectively.N-top bulk material residue 364 is remaining slight Doped n-type materials of n-forerunner top bulk material part 358P (bulk material part 358 above this is the n type).
The cover layer (not shown) that is generally the dielectric material of silica is formed at the top of this structure.Semiconductor construction is followed thermal annealing to repair the main p type source/drain dopant that crystal lattice damage and activation are implanted.Do not carry out if be used to activate the annealing a little earlier of main n type source/drain dopant, this final annealing is activation bag portion's dopant and all source/drain dopant.Final annealing is generally RTA.
The dielectric material of thin layer (comprising: dielectric layer 430 and 432) be to remove along semiconductor-on-insulator surface and along the top surface of gate electrode 128,288,328 and 368.Metal silicide layer 254,256,258,294,296,298,334,336,338,374,376 and 378 is respectively along regional 102M, 104M, 128,262M, 264M, 288,302M, 304M, 328,342M, 344M and 368 upper surfaces and forms.This is generally needs the suitable material of stringer (being generally cobalt) in this textural surface and carry out low temperature step this metal and lower floor's silicon are chemically reactive to make.Remove the not metal of chemically reactive.Carry out second low temperature step, finishing the chemical reaction of this metal and lower floor's silicon, and form silicide layer 254,256,258,294,296,298,334,336,338,374,376 and 378 by this.It is the basic manufacturing of finishing IGFET 210,220,230 and 240 that metal silicide forms.Synthetic complementary IGFET structure is rendered as in shown in Figure 29.
The enforcement of the p type trap portion of Figure 31 c to 31f, p type APT, n type trap portion, the compensation of n type and n type APT can be summarized as and is executed in any order.The enforcement of the p type bag portion of Figure 31 j to 31o, n type bag portion, n type source/drain pole extension, p type ring, p type source/drain pole extension and n type ring can be summarized as and is executed in any order.The enforcement of the main source/drain of n type of Figure 31 q is usually before the enforcement of the main source/drain of the p of Figure 31 r type and carry out, particularly when the dopant of main source/drain is made up of arsenic.Yet, can be before the enforcement of the main source/drain of n type during the implementing of the main source/drain of p type and carry out.
The angle of inclination that is directed to p type bag portion, n type bag portion, p type ring and the enforcement of n type ring of Figure 31 j, 31k, 31m and 31o is generally at least 15 degree.Be carried out up to other though be generally variation from an oblique angle, be directed to each oblique angle and implement to be generally 25 to 45 degree.
Except it changed the n+ separator 382 and 392 of IGFET 210 and 230 to IGFET 380 and 390 respectively, the complementary IGFET structure of Figure 30 was generally the substantially the same step of constructing according to the complementary IGFET as Figure 29 and makes.Separator 382 and 392 is formed between the stage of Figure 31 b and 31c usually, uses it to have the additional photoresistance shielding of the opening above island portion 202 and 206.Additional photoresistance shielding also has opening, is used to form severe Doped n-type zone, and its connection separator 382 and 392 supreme semiconductor surfaces are to receive suitable isolation voltage.The isolation dopant of being made up of arsenic or phosphorus is in severe dosage and ion is implanted as through the not overlay segment of screen oxide 402 and as for single silicon of lower floor, reaches (b) n+ separator join domain to limit the n+ separator 382 and 392 that (a) be directed to IGFET 380 and 390 respectively.
The manufacture process of Figure 31 is can be revised as described belowly to be a kind of enforcement from the asymmetric n passage IGFET190 of a kind of Figure 18 of being carried out up to c of IGFET 180 to change asymmetric n passage IGFET 210, wherein, n type S/ D district 102 and 104 further comprise respectively its place respectively n++ main S/ D part 102M and 104M under n+ below S/D part 102L and 104L.Because below S/D part 102L compares main S/ D part 102M and 104M with 104L is slight Doped n-type, below S/ D part 102L and 104L provide the vertical dopant gradual change of source/drain with the progressive parasitic capacitance that reduces source/drain, and be mentioned above as the IGFET 160 that is directed to Figure 15.
It is to implant n++ main S/ D part 102M and 104M in the location to apply to ion that this manufacture process is revised the stage and the photoresistance shielding 434 that start from Figure 31 q.The dopant of the n type below source/drain of being made up of phosphorus or arsenic is in severe dosage and ion is implanted as through the not overlay segment of surface dielectric layer 432 and to single silicon of lower floor, to limit n+ below S/D part 102L and 104L.The implantation of n+ below S/ D part 102L and 104L can be before or after the implantation of n++ main S/ D part 102M and 104M and carries out.
Choose the implantation energy that is directed to the main dopant with the below source/drain of n type, make below the n type dopant of source/drain compare the dopant of the main source/drain of n type and be bigger transplanting scope.Only to see through surface dielectric layer 432 performed because the implantation of the implantation of the main source/drain of n type and n type below source/drain is, and the dopant of n type below source/drain is compared the dopant of the main source/drain of n type and is implanted to the big mean depth of the below on semiconductor-on-insulator surface.The dopant of comparing n type below source/drain owing to the dopant of the main source/drain of n type is implanted in utmost point severe dosage and therefore for heavy dose of, below the n+ S/D part 102L compare n++ main S/ D part 102M and 104M with 104L and be more slightly mix and the below that extends in the semiconductor-on-insulator surface for darker.
Symmetry n passage IGFET 230 is simultaneously for being converted to a kind of variation, and wherein, n type S/ D district 302 and 304 comprises further that respectively it compares main S/ D part 302M and 304M and be the slight right below S/D part of doping.As n+ below S/ D part 102L and 104L about the aforementioned variation that is directed to IGFET 210, the below S/D that is directed to the variation of IGFET 230 partly is the severe Doped n-type.If expectation IGFET 230 has a kind of variation of n+ below S/D part for non-conversion to it, the implantation of n type below source/drain dopant can be performed by additional photoresistance shielding, this additional photoresistance shielding additional photoresistance remove the back for have above the island portion 202 not at the opening of (and also not above island portion 204 and 208) above the island portion 206.
The manufacture process of Figure 31 can similar modification be a kind of enforcement from the p channel form of a kind of n of being carried out up to passage IGFET 190V of the p channel form of n passage IGFET 180V to change asymmetric p passage IGFET 220, be directed to it, p type S/ D district 262 and 264 further comprise respectively its be respectively place p++ main S/ D part 262M and 264M under to severe doped p type below S/D part.P+ below S/D partly provides the vertical dopant gradual change of source/drain with the progressive parasitic capacitance that reduces source/drain, and it is mentioned above to be similar to the IGFET160 that is directed to Figure 15.
It is to implant p++ main S/ D part 262M and 264M in the location to apply to ion that this additional manufacture process is revised the stage and the photoresistance shielding 436 that start from Figure 31 r.The dopant of the p type below source/drain of being made up of borohydride species is in severe dosage and ion is implanted as through the not overlay segment of surface dielectric layer 432 and to single silicon of lower floor, is directed to two p+ below S/D parts of the variation of IGFET 220 with qualification.The implantation of p+ below source/drain can be before or after the implantation of the main source/drain of p++ and carry out.In an example, the dopant of p type below source/drain is made up of the boron of element state, and the dopant of the main source/drain of p type is made up of boron difluoride.
Choose the implantation energy that is directed to the main dopant with the below source/drain of p type, make below the p type dopant of source/drain compare the dopant of the main source/drain of p type and be bigger transplanting scope.Only to see through surface dielectric layer 432 performed because the implantation of the implantation of the main source/drain of p type and p type below source/drain is, and the dopant of p type below source/drain is compared the dopant of the main source/drain of p type and is implanted to the big mean depth of the below on semiconductor-on-insulator surface.The dopant of comparing p type below source/drain owing to the dopant of the main source/drain of p type is for being implanted in utmost point severe dosage and therefore being heavy dose, the p+ below S/D that is directed to the variation of IGFET 220 partly compares p++ main S/ D part 262M and 264M and for more slightly mixing, and the below that extends in the semiconductor-on-insulator surface is for darker.
Symmetry p passage IGFET 240 is simultaneously for being converted to a kind of variation, and wherein, p type S/ D district 362 and 364 comprises further that respectively it compares main S/D part 362M and 364M and be the slight right below S/D part of doping.As the p+ below S/D part about the variation that is directed to IGFET 220, the below S/D that is directed to the variation of IGFET 240 partly is the severe doped p type.If IGFET 240 has a kind of variation of below S/D part for non-conversion to it, p type below source/drain is implanted can be performed by additional photoresistance shielding, this additional photoresistance shielding additional photoresistance remove the back for have above the island portion 204 not at the opening of (and also not above island portion 202 and 206) above the island portion 208.
Avoid the manufacture process of n type compensation implant to change
Figure 32 a to 32c (collective is " Figure 32 ") illustrates according to a kind of of the step of Figure 31 e of the present invention and substitutes, and is used to make a kind of variation of the complementary IGFET semiconductor construction of Figure 29.As being to revise to include substituting of Figure 32 in, utilization to the island portion 204 (with island portion 208) of n type compensation implant is the manufacture process of avoiding in Figure 31.As a result, the complementary IGFET structure of the alternative manufacturing by utilization Figure 32 contains a kind of variation 220V of asymmetric p passage IGFET 220.
The alternative structure that starts from Figure 31 d of the manufacture process of Figure 32, it repeats as Figure 32 a at this.Be associated with the structure that the above-mentioned n type trap portion doping step of Figure 31 e is executed in Figure 32 a.In particular, photoresistance shielding 408 is formed at screen oxide layer 402, as in shown in Figure 32 b.Photoresistance shielding 408 openings that have equally above island portion 204 and 208.Be similarly the n type trap portion dopant of forming by phosphorus or arsenic and be in severe dosage and high-energy and ion is implanted as through the not overlay segment of screen oxide 402 and as for single silicon of lower floor, to limit n+ forerunner's trap 356P of portion that (a) is directed to the forerunner n+ trap 276P of portion of asymmetric p passage IGFET 220V and (b) is directed to symmetrical p passage IGFET 240.
By photoresistance 408 in the location and the n type of the island portion 204 that arrives (with island portion 208) compensation implant is not executed in this.But, only remove photoresistance 408.After the removing of photoresistance 408, the slight doped p type part 278Q that is directed to the island portion 204 of IGFET 220V is present in the forerunner n+ trap 276P of portion top.The slight doped p type part 358Q of island portion 208 that is directed to IGFET 240 is similar to being present in the forerunner n+ trap 356P of portion top.
The alternative continuation of Figure 32 is to form photoresistance shielding 410 in screen oxide 402.Consult: Figure 32 c.Photoresistance shielding 410 openings that have equally above island portion 208.Equally the n type APT dopant of being made up of phosphorus or arsenic is in moderate dosage and ion is implanted as through the not overlay segment of screen oxide 402 and as for single silicon of lower floor, is directed to the n forerunner top bulk material part 358P of IGFET 240 with qualification.Remove photoresistance 410.
Be implanted to all p-part 358Q to n type conductivity of the n type APT dopant conversion island portion 208 of island portion 208.As a result, p-part 358Q disappears.Because do not have a large amount of n type APT dopants for entering island portion 204, the p-part 278Q of island portion 204 still is present in this fabrication stage.
The structure of Figure 32 c is progressive the processing, according to its be associated with Figure 31 g to 31o, Figure 31 p.1 to 31r.1 and Figure 31 p.2 to the above-mentioned manufacturing step of 31r.2, comprising: related annealing operation.Some of these further steps are the temperature that are executed in rising, are similarly remarkable temperature greater than room temperature.During the elevated temperature step, utilization partly is to diffuse to p-part 278Q up with the n type trap portion dopant that qualification is directed to the forerunner n+ trap 276P of portion of IGFET 220V.The part of diffusion up of n type trap portion dopant is to become to distribute to run through island portion 204, makes before significantly not to be subjected to all its p-materials that p type or n type mix after the n type trap portion doping step be to make end and is converted to n type conductivity.According to the n type top bulk material part of comparing fully according to the basic manufacture process manufacturing of Figure 31 278 is some slight Doped n-type, and p-part 278Q is that major part becomes as revising with substituting of utilization Figure 32 according to the n type top bulk material part 278 of the formed complementary IGFET structure of the manufacture process of Figure 31.N-top bulk material residue 284 is similarly the remaining slight Doped n-type material of n type bulk material part 278.
As for revising including substituting of Figure 32 in, present as in shown in Figure 29 according to the formed complementary IGFET structure major part of the manufacture process of Figure 31.Figure 34 that the summary form of alternative formed asymmetric p passage IGFET 220V by utilization Figure 32 is depicted in hereinafter to be discussed.
Figure 33 a to 33f (collective is " Figure 33 ") illustrate for the step of Figure 31 c to 31f according to a kind of substitute of the present invention, be used to make the variation of the complementary IGFET semiconductor construction of Figure 29.As about the substituting of Figure 32, the alternative of Figure 33 is to avoid using the compensation of n type to be implanted to island portion 204 (with island portion 208).As a result, as for revising including substituting of Figure 33 in, contain asymmetric p passage IGFET 220V to replace IGFET 220 according to the complementary IGFET structure of the manufacture process manufacturing of Figure 31.
The manufacture process of Figure 33 substitutes the structure start from repeating into Figure 31 b of Figure 33 a.In the stage of Figure 33 a, screen oxide layer 402 forms along epitaxial loayer 114P upper surface.Yet there is no ion, to be implanted to appointing of island portion 202,204,206 and 208 be to form.
Photoresistance shielding 408 with the opening above island portion 204 and 208 is formed at screen oxide 402, as in shown in Figure 33 b.Be similarly the n type trap portion dopant of forming by phosphorus or arsenic and be in severe dosage and high-energy and ion is implanted as through the not overlay segment of screen oxide 402 and as for single silicon of lower floor, to limit n+ forerunner's trap 356P of portion that (a) is directed to n+ forerunner's trap 276P of portion of IGFET 220V and (b) is directed to IGFET 240.Remove photoresistance 408.After the removing of photoresistance 408, the p-part 278Q that is directed to the island portion 204 of IGFET 220V is present in n+ forerunner's trap 276P of portion top.The p-part 358Q of island portion 208 that is directed to IGFET 240 is similar to being present in n+ forerunner's trap 356P of portion top.
A kind of thermal annealing that is preferably RTA is executed in the semiconductor substrate that causes at this usually, to repair n type trap portion dopant that crystal lattice damage and storing implanted in energy stable status more.Consult: Figure 33 c.During annealing, utilization is to diffuse to p-part 278Q up with the part of n type trap portion dopant that qualification is directed to the forerunner n+ trap 276P of portion of IGFET 220V.Utilization is directed to IGFET 240 with qualification the part of n type trap portion dopant of the forerunner n+ trap 356P of portion is similar to diffusing to p-part 358Q up.The diffusion up of these parts of n type trap portion dopant is generally fully bottom with conversion p- part 278Q and 358Q to n type conductivity.The bottom of the conversion like this of p- part 278Q and 358Q is to be denoted as respectively in the forerunner n-of Figure 33 c top bulk material part 278P and 358P.Owing to the formation of forerunner n-top bulk material part 278P and 358P, p-part 278Q is of a size of vertical contraction with 358Q, as summarizing the directions in Figure 33 c.
As so be described in hereinafter, utilization is during the step after a while of the manufacture process of Figure 31 and diffuse to p-part 278Q up with the n type trap portion dopant that limits the forerunner n+ trap 276P of portion more, as for revising substituting with utilization Figure 33.Being similar to the alternative of Figure 32 takes place, in the n type trap portion dopant that substitutes of Figure 33 always up diffusion part become to distribute and run through island portion 204, make its significantly be not subjected to after the n type trap portion doping step its p-material that p type and/or n type mix all be making finish before and be converted to n type conductivity.Importantly, the part of n type trap portion dopant spreads up to limit forerunner n-top bulk material part 278P (as the stage that is present in Figure 33 c) and takes place and do not influence the dopant of p type trap portion dopant, n type APT dopant, p type APT dopant or any source/drain, carries out as yet because be used to introduce this dopant to the step of semiconductor construction.Therefore, carry out in this stage of manufacture process n type trap portion implant help to guarantee be: the p-material that is not subjected to the p type of other (after a while) and/or the island portion 204 that the n type mixes all is converted to n type conductivity at last and does not cause the unacceptable diffusion of the dopant of p type trap portion dopant, n type APT dopant, p type APT dopant or any source/drain.
Photoresistance shielding 410 is formed at screen oxide 402.Consult: Figure 33 d.Photoresistance 410 is similarly the opening that has above island portion 208.N type APT dopant (being made up of phosphorus or arsenic) is in moderate dosage and ion is implanted as through the unmasked portion of screen oxide 402 and to single silicon of lower floor, is directed to the forerunner top bulk material part 358P of IGFET 240 with qualification.Be implanted to all p-part 358Q to n type conductivity of the n type APT dopant conversion island portion 208 of island portion 208, thereby make p-part 358Q for disappearing.Remove photoresistance 410.
Photoresistance shielding 404 is formed at screen oxide layer 402, as in shown in Figure 33 e.Photoresistance 404 has the opening above island portion 202 and 206 equally.P type trap portion dopant (it is made up of borohydride species) is in severe dosage and high-energy and ion is implanted as through the unmasked portion of screen oxide 402 and to single silicon of lower floor, to limit p+ forerunner's trap 316P of portion that (a) is directed to the p+ trap portion 116 of IGFET 210 and (b) is directed to IGFET 230.In the part of the epitaxial loayer 114P above the trap portion 116 is to be similarly to constitute bulk material part 118P above the p-forerunner who is directed to IGFET 210.Remove photoresistance 404.
Photoresistance shielding 406 is formed at screen oxide 402.Consult: Figure 33 f.Photoresistance 406 has the opening above island portion 206 equally.P type APT dopant (it is made up of borohydride species) is in moderate dosage and ion is implanted as through the unmasked portion of screen oxide 402 and to single silicon of lower floor, is directed to the p forerunner top bulk material part 324P of IGFET 230 with qualification.Remove photoresistance 406.
The structure of Figure 33 f is progressive the processing, according to its be associated with Figure 31 g to 31o, Figure 31 p.1 to 31r.1, and Figure 31 p.2 to the above-mentioned manufacturing step of 31r.2, comprising: related annealing operation.During elevated temperature step after a while, utilization is directed to the forerunner n+ trap 276P of portion of IGFET 220V with qualification the more of n type trap portion dopant is the p-part 278Q that diffuses to island portion 204 up, up to all be converted to n type conductivity for the p-of the island portion material that is not subjected to the doping of other p type or n type during manufacture process.According to the n type top bulk material part of comparing fully according to the basic manufacture process manufacturing of Figure 31 278 is some slight Doped n-type, and p-part 278Q major part becomes as revising to utilize substituting of Figure 33 according to the n type top bulk material part 278 of the formed complementary IGFET structure of the manufacture process of Figure 31.N-top bulk material residue 284 is similarly the remaining slight Doped n-type material of n type bulk material part 278.
Substituting of utilization Figure 33 and being rendered as in shown in Figure 29 according to the formed complementary IGFET structure major part of the manufacture process of Figure 31.The p passage IGFET in Figure 34 described that is hereinafter discussed also is the summary form by the alternative formed IGFET 220V of utilization Figure 33.
As mentioned above, the semiconductor portions of p passage IGFET 220V is that slight doped p section bar material by island portion 204 is formed.In order to ensure: be not subjected to the p-of island portion material that p type or n type mix except mixing and all be in the n type trap portion during the manufacture process make finish before and be converted to n type conductivity, when making end must be above in the initial concentration of the p of island portion 204 type dopant along the concentration of the n type trap portion dopant of island portion 204 upper surfaces.Because island portion 204 is formed by the part of p-epitaxial loayer 114P (or substantially the same in the slight doped p type substrate of epitaxial loayer 114P), must surpass when making end in the p of epitaxial loayer 114P type background doped agent concentration in the n of island portion 204 type trap portion dopant upper surface concentration.
Choose as being at least two times that are contemplated in the p of epitaxial loayer 114P type background doped agent concentration for revising to include the substituting of Figure 32 or 33 in, to make the concentration of making when finishing along the n type trap portion dopant of island portion 204 upper surfaces in the doping and the heat-treat condition of an enforcement of the manufacture process of Figure 31.Choosing in this way mixes makes with heat-treat condition and very contingently to be: in view of common manufacture process changes, make when finishing in the n of island portion 204 type trap portion dopant upper surface concentration with reality for surpassing in the p of epitaxial loayer 114P type background doped agent concentration.So choose mix with heat-treat condition may need from above-mentioned with change in the p of epitaxial loayer 114P type background doped agent concentration and/or from above-mentioned to change n type trap portion doping condition.This change is associated with Figure 35 a to 35c, Figure 36 a to 36c, Figure 37 a to 37c, and Figure 38 a to 38c and progressive the processing in hereinafter.
The channel region 266 of p channel IGFET 220V is similar to (and be generally some strong (bigger) in), and to be directed to p passage IGFET 220 above-mentioned and be generally asymmetric vertical dopant gradual change.Condition be conductivity-type oppositely, in asymmetric vertical gradual change of the channel region 266 of IGFET 220V therefore be similar to (and be generally some be better than) be directed to IGFET 180V and 150V above-mentioned.
P passage IGFET 220V is similar to (but for some be weaker than) and is directed to the p passage IGFET 220 above-mentioned inferior precipitous vertical dopant quantitative change curves that have in the below of drain electrode 264 that are generally.In particular, the concentration of total n type dopant of bulk material 268 parts of the below of the drain electrode 264 of IGFET 220V be in move vertically upward from drain to draining 264 and be reduced at least 10 times (being generally about 15 multiple), comparing in the position, inferior top layer of the Cmax of the n of trap portion 276 type dopant in the position of the n of trap portion 276 type dopant Cmax 264 and below the semiconductor-on-insulator surface for being no more than 10 times dark (being no more than 5 times usually).Similarly, condition be conductivity-type oppositely, inferior precipitous vertical dopant quantitative change curve of the below of the drain electrode 264 of IGFET 220V therefore be generally be similar to (but being that some is weaker than) be directed to n passage IGFET 180V and 100V above-mentioned.Be directed to the reason of hereinafter discussing that is associated with Figure 38 a to 38c, the inferior precipitous vertical dopant quantitative change curve of the below of the drain electrode 264 of IGFET 220V is the analog rate with raising.
In an alternative manufacture process embodiment, adjust in the p of epitaxial loayer 114P type background doped agent concentration, n type trap portion's doping condition and follow-up heat-treat condition, make the concentration of total n type dopant of bulk material 268 parts of below of the drain electrode 264 of IGFET 220V upwards move vertically to drain electrode 264 and be reduced to less than 10 times from position, inferior top layer in the Cmax of the n of trap portion 276 type dopant.Though the analog rate that causes may be not as when the vertical dopant quantitative change curve of the below of the drain electrode 264 of IGFET220V for time precipitous big, still simplify manufacture process and reduce manufacturing cost to make IGFET 220V according to this manufacture process embodiment.
Asymmetric p passage IGFET 220V can be replaced in the IGFET 220 of the complementary IGFET semiconductor construction of Figure 30.Except it is converted to IGFET 210 and 230 respectively the n+ separator 382 and 392 of IGFET 380 and 390, the modification like this of the complementary IGFET structure of Figure 30 normally is essentially the manufacture process manufacturing according to Figure 31, as for revising to include substituting of Figure 32 or 33 in.In substituting of utilization Figure 32, separator 382 and 392 was similarly between the stage that is formed at Figure 31 b and 31c usually, used its above-mentioned additional photoresistance of opening that has above island portion 202 and 206 to shield.When Figure 33 alternative is utilization, separator 382 and 392 was formed between the stage of Figure 33 a and 33b, as the alternative same way as of Figure 32.Betide substituting of utilization Figure 33 and directly after n type trap portion implants the isolation diffuse dopants during the performed thermal annealing be generally and do not have damage effect basically and construct in the complementary IGFET that causes.
In substituting of utilization Figure 32 or 33, additional photoresistance shielding equally also has opening, is used to form severe Doped n-type zone, and its connection separator 382 and 392 supreme semiconductor surfaces are to receive isolation voltage.The isolation dopant of being made up of arsenic or phosphorus is in severe dosage and ion is implanted as through the not overlay segment of screen oxide 402 and as for single silicon of lower floor, to limit n+ separator 382 and 392 that (a) be directed to IGFET 380 and 390 respectively, to reach (b) n+ separator join domain.
P channel with inferior precipitous vertical bulk material dopant dose varied curve of drain electrode below
IGFET owing to the inferior top layer maximum of trap portion concentration of dopant, and avoids the compensation of n type to plant
Go into thing
Figure 34 explanation is according to a kind of summary form 220U of asymmetric p passage IGFET 220V of the present invention, and wherein, n+ trap portion 276 is the opposite conductivity-type for the p-semi-conducting material part 114 that directly places lower floor.Asymmetric p passage IGFET 220U is manufacturing and the IGFET characteristic that causes according to the present invention, and utilization compensation n type dopant is implanted to its p type part for the direct position island portion 204 above n+ trap portion 276 (implant as the ion of n type trap portion dopant institute is initial to be limited).In essence, as being a kind of enforcement of IGFET 220U for the IGFET 220V that substitutes that revises to include Figure 32 or 33 in according to the manufacture process manufacturing of Figure 31.
Be meant PN junction between source electrode 262 and bulk material 268 in the project 396 of Figure 34.Project 398 is meant the PN junction between drain electrode 264 and bulk material 268.Be similar to n channel IGFET, project y
SWith y
DBe respectively 264 degree of depth that extend to the below on semiconductor-on-insulator surface respectively of source electrode 262 and drain electrode of indication p passage IGFET 220U.
In order to simplify, the n type top bulk material residue 394 of IGFET 220U is to be denoted as " n-" in Figure 34, and how the n type top bulk material residue 284 that is similar to IGFET 220 is by being discerned in this paper by mark " n-".Yu Ruwei revises to include substituting of Figure 32 or 33 in according to the manufacture process of Figure 31 making IGFET 220U, and top bulk material residue 394 is generally and receives it for basically only by the upwards n type dopant of diffusion of n+ trap portion of lower floor 276.As improving and explain orally in hereinafter, be generally in reducing gradually from trap portion 276 supreme semiconductor surfaces up in the n type concentration of dopant of bulk material residue 394 for being associated with Figure 37 a to 37c.Because trap portion 276 is severe Doped n-type, bulk material remains 394 alternative being considered as in plotting mode and is made up of slight Doped n-type surface adjacent part and its medium doped n type pars intermedia branch between n+ trap portion 276 and slight Doped n-type surface adjacent part.
The understanding of the doping characteristic of IGFET 220U be by means of Figure 35 a to 35c (collective for " Figure 35 "), Figure 36 a to 36c (collective is " Figure 36 "), Figure 37 a to 37c (collective is " Figure 37 "), and Figure 38 a to 38c (collective is " Figure 38 ") promote.Figure 35 presents along the concentration of dopant of the example on upper semi-body surface, as the function of fore-and-aft distance x.Be presented in Figure 36 as concentration of dopant along the example of the function of the depth y of the vertical line 130U that sees through source electrode 262.Figure 37 presents the concentration of dopant of example, as along the function to the depth y of vertical line 132U and 134U that sees through channel region 266.Vertical line 132U is by the bag portion 280 of source side.Vertical line 134U is by the upright position between bag portion 280 and drain electrode 264.Be presented in Figure 38 as concentration of dopant along the example of the function of the depth y of the vertical line 136U that sees through drain electrode 264.Vertical line 130U, 132U, 134U and the 136U that is directed to p passage IGFET 220U corresponds respectively to the vertical line 130,132,134 and 136 that is directed to n passage IGFET of the present invention.
Figure 35 a explanation is along the concentration N of indivedual semiconductor dopants on semiconductor-on-insulator surface
I, the main localized area 262,264,280 of this dopant and 394 and vertical dopant gradual change of therefore setting up channel region 266.Figure 36 a, 37a and 38a explanation are along the concentration N of indivedual semiconductor dopants of vertical line 130U, 132U, 134U and 136U
ITherefore, this dopant is vertical localized area 114,262,264,270,280 and 394 and build on the inferior precipitous vertical dopant quantitative change curve of bulk material 268 parts of the below of drain electrode 264.Curve 262 ' and 264 ' represents its utilization to form the concentration N of source electrode 262 and the p type dopant of drain electrode 264 respectively
I(surface and vertical).Curve 276 ', 280 ' and 394 ' is to represent its utilization to form the concentration N of the n type dopant in zone 276,280 and 394 respectively
I(surface and/or vertical).Project 396
#With 398
#Be meant net doping agent concentration N
NFor reducing to zero part and therefore referring to the position of PN junction 396 and 398 respectively.
Along the semiconductor-on-insulator surface in zone 262,264,280 and 394 the total p type and the total concentration N of n type dopant
TBe shown in Figure 35 b.Figure 36 b, 37b and 38b describe along vertical line 130U, 132U, 134U and 136U in zone 114,262,264,276,280 and 394 the total p type and the total concentration N of n type dopant
TCorrespond respectively to zone 276,280 and 394 curved section 276 ", 280 " and 394 " represent the total concentration N of n type dopant
TProject 266 in Figure 35 b " corresponding to channel region 266 and signature song line segment 280 " with 394 " and the channel region part.The total concentration N of p type dopant
TBe by corresponding respectively to the curve 262 of source electrode 262 with drain electrode 264 " and 264 " representative.
Figure 35 c is the net doping agent concentration N of explanation along the semiconductor-on-insulator surface
NNet doping agent concentration N along vertical line 130U, 132U, 134U and 136U
NBe presented in Figure 36 c, 37c and 38c.Curved section 276*, 280* and 394* represent in the net concentration N of the n type dopant of individual areas 276,280 and 394
NIn the project 266* of Figure 35 c is to represent the curved section 280* of channel region and the combination of 394*, and therefore is presented in the concentration N of the clean n type dopant of channel region 266
NIn the concentration N of source electrode 262 with the clean p type dopant of drain electrode 264
NRespectively by curve 262* and 264* representative.
Be directed to p passage IGFET 220U in the shown upper surface dopant distribution of Figure 35 be respectively substantially the same in be directed to n passage IGFET 180V in the shown upper surface dopant distribution of Figure 26, except: (a) as the background p type concentration of dopant that is directed to p-bottom 114 in the curve 114 ' indication of Figure 35 a be less than as in the background n type concentration of dopant that is directed to n-bottom 192 of the project 192 ' indication of Figure 26 a; And (b) as in the project 394 ', 394 of Figure 35 a " with the 394* indication be directed to n-top bulk material remain 394 upper surface concentration of dopant be less than as in the project 198 ', 198 of Figure 26 " remain 198 upper surface concentration of dopant with the p-top bulk material that is directed to of 198* indication.However, p passage IGFET 220U is similar to n passage IGFET 180V and constitutes.Therefore, about be directed to n passage IGFET180V in the shown upper surface dopant distribution of Figure 26 and in argument mentioned above most of for be applied to be directed to p passage IGFET 220U in the shown upper surface dopant distribution of Figure 35, change into the zone 262 that is directed to IGFET 220U, 262M, 262E, 264,264M, 264E, 266,280,114 and 394 and according to the zone 102 that will be directed to IGFET 180V respectively, 102M, 102E, 104,104M, 104E, 106,120,192 and 198 according to pointed concentration of dopant difference.
Then consider Figure 37.N type dopant in n+ bag portion 280 is made up of following: (a) in the indicated major part that is made of n type bag portion dopant of the concentration of dopant curve 280 ' of Figure 37 a; And the less important part that (b) constitutes in concentration of dopant curve 276 ' the indicated branch of diffusion part up of Figure 37 a by n type trap portion dopant.The n type dopant of bulk material residue 394 only is essentially and is made up of the branch of diffusion part up of n type trap portion dopant above n-.Concentration N in the diffusion part up of the n type trap portion dopant of n-bulk material residue 394
IBe indicated in the part 394 ' of the n of Figure 37 a type trap portion concentration of dopant curve 276 '.Other concentration of dopant curve 276 of branch in Figure 37 b and 37c " with the part 394 of 276* " similar with 394* for being instructed in total concentration of dopant N of n-bulk material residue 394 respectively
TWith net doping agent concentration N
N
Since the bag portion 280 of the source side of IGFET 220U by the severe Doped n-type and since the n type of n-top bulk material residue 394 be doped to basically only by being provided from upwards spreading of n+ trap portion 276, in the minimum concentration of dopant of channel region 266 be betide n-bulk material residue 394 along or approach its upper surface place, whether on any significant quantity of the upwards diffusion part of n type trap portion dopant is decided for piling up along residue 394 upper surfaces.Figure 37 illustrates an example, wherein, does not exist any significant n type trap portion dopant that remains 394 upper surfaces along the n-bulk material to pile up.
As mentioned above, being associated with its semiconductor portion and being divided into the manufacturing that is formed at by the p channel IGFET 220V of the formed island of the part portion 204 of p-epitaxial loayer 114P (or substantially the same in the slight doped p type substrate of epitaxial loayer 114P), is to surpass in the p of epitaxial loayer 114P type background doped agent concentration in the n type trap portion concentration of dopant of making when finishing along island portion 204 upper surfaces.In being applied to IGFET 220U, this makes the n type trap concentration of dopant N of portion of doping demand translated channel district 266 upper surfaces (the clear and definite n-of being top bulk material remains 394 upper surfaces)
IFor surpassing in the p of p-bottom 114 type background doped agent concentration N
IMixing with heat-treat condition is to choose so that to make in IGFET 220V when finishing be at least two times that are contemplated in the p of epitaxial loayer 114P type background doped agent concentration in the n of island portion 204 type trap portion dopant upper surface concentration, and the similar structure doping demand that is converted to of this desirable manufacturing objective is: the n type trap concentration of dopant N of portion that remains 394 upper surfaces along the n-bulk material
IBe to be at least p type background doped agent concentration N
ITwo times.
Figure 35 to 38 describes an example, wherein, remains the n type trap concentration of dopant N of portion of 394 upper surfaces along the n-bulk material
I(indicated as the curved section 394 ' in Figure 35 a and 37a) is approximately the p type background doped agent concentration N of (indicated as the curved section 114 ' in Figure 35 a and 37a) p-lower zone 114
ITwo times.Therefore, the example of Figure 35 to 38 satisfies the doping demand of particular configuration: the n type trap concentration of dopant N of portion that remains 394 upper surfaces along the n-bulk material
IBe to be at least p type background doped agent concentration N
ITwo times.
In the example of Figure 35 to 38, p type background doped agent concentration N
IBe to be about 1 * 10
15Atom/cubic centimetre.This is aimed at the above-mentioned set scope 1 * 10 of p type background doped agent concentration
15To 1 * 10
16The lower limit of atom/cubic centimetre.Yet, be IGFET 220V in the alternative of utilization Figure 32 or 33 to implement IGFET 220U, the lower limit that is directed to the scope of p type background doped agent concentration is to change to 5 * 10 down
14Atom/cubic centimetre or littler.Be directed to its utilization forming the island portion 204 of IGFET 220U, this provides more elasticity to guarantee: be not subjected to except mixing in the n type trap portion during the manufacture process the p-of island portion material that p type and/or n type mix all making finish before and be converted to n type conductivity.
Concentration N in the n of IGFET 220U type trap portion dopant
IDepth y below the semiconductor-on-insulator surface
wAnd reach maximum.The source electrode 262 of IGFET 220U only is made up of n type trap portion dopant with total n type dopant of bulk material 268 parts of the below of drain electrode 264, and is indicated as the curve 276 ' in Figure 36 a and 38a.As a result, total n type concentration of dopant N of p-bulk material 268 parts of the below of the source electrode 262 of IGFET 220U and drain electrode 264
TIn depth y
wAnd reach maximum, and as in the curve 276 of Figure 36 b and 38b " indicated.
As in the curve 276 of Figure 38 b " variation shown in, total n type concentration of dopant N of bulk material 268 parts of the below of the drain electrode 264 of IGFET 220U
TBe in along vertical line 136U for moving from 264 being reduced at least 10 times to draining in the position, inferior top layer of the Cmax of the n of trap portion 276 type dopant, be generally about 15 multiple.In addition, compare in the position of the Cmax of total n type dopant of trap portion 276 drain electrode 264 below the semiconductor-on-insulator surface for being no more than 10 times dark (be generally and be no more than 5 times).Therefore, the vertical dopant quantitative change curve of the below of the drain electrode 264 of IGFET 220U is inferior precipitous.Again, total n type concentration of dopant N of bulk material 268 parts of the below of the drain electrode 264 of IGFET 220U
TUsually move to drain electrode 264 from the position of maximum n type trap portion concentration and reduce gradually, as be indicated by the part of curve 276 ', it extends from the depth y of total n type dopant Cmax of bulk material 268 parts of 264 the below of draining
w Project 398# to its representative drain electrode-body interface 398.
The net doping agent of bulk material 268 parts of the below of the drain electrode 264 of IGFET 220U is n type dopants.What Figure 38 c showed is: as in curve 276* representative, and the concentration N of the net doping agent of bulk material 268 parts of the below of the drain electrode 264 of IGFET 220U
NVertical change is the concentration N of total n type dopant that is similar to bulk material 268 parts of drain electrode 264 below
T, except: the concentration N of bulk material 268 parts of the below of drain electrode 264
NDrop to zero in drain electrode-body interface 398.Be directed to it and be associated with p passage IGFET220 of the present invention and the above-mentioned reason of asymmetric n passage IGFET, the inferior precipitous vertical dopant quantitative change curve of bulk material 268 parts of the below of the drain electrode 264 of IGFET 220U reduces its parasitic capacitance that is associated with drain electrode-body interface 398.Though in inferior precipitous vertical dopant quantitative change curve of bulk material 268 parts of drain electrode 264 below is strong as be same as IGFET 220 (its utilization n type compensates implant) in IGFET 220U (it avoids n type compensation implant), the inferior precipitous vertical dopant quantitative change curve of bulk material 26 parts of the below of the drain electrode 264 of IGFET 220U makes drain electrode-body interface 398 have the parasitic capacitance that reduces.IGFET 220U thereby have the analog rate of raising.
The concentration N of total n type dopant of bulk material 268 parts of the below of the source electrode 262 of IGFET 220U
IWith N
TVertical change is the concentration N of total n type dopant of major part bulk material 268 parts that are same as drain electrode 264 below
IWith N
TBe compared to the curve 276 ' and 276 of Figure 36 a and 36b " (obtained) along the vertical line 130U that sees through source electrode 262 and in the curve 276 ' and 276 of Figure 38 a and 38b " (obtained) along vertical line 136U through source electrode 264.What note is: the net doping agent of bulk material 268 parts of the below of the source electrode 262 of IGFET 220U is n type dopants, the concentration N of the net doping agent of bulk material 268 parts of the below of source electrode 262
NVertical change is the concentration N of the net doping agent of major part bulk material 268 parts that are same as drain electrode 264 below
NAs in the curve 276* of Figure 36 c representative, the concentration N of the net doping agent of bulk material 268 parts of the below of the source electrode 262 of IGFET 220U
NTherefore vertical change is the concentration N of total n type dopant of bulk material 268 parts that is similar to the below of source electrode 262
T, except: the concentration N of bulk material 268 parts of the below of source electrode 262
NDrop to zero in source electrode-body interface 396.This vertical dopant quantitative change curve of the below of the source electrode 262 of IGFET 220U makes usually along the parasitic capacitance of source electrode-body interface 396 and reduces.
The Computer Simulation of summarizing
Carry out equipment energy characteristic and the feature performance benefit of Computer Simulation, particularly be directed to simulation application to check the IGFET that it is constituted according to the present invention. The Medici two-dimensional device simulator that company provided is performed.Micro Tec simulator mainly is used in big signal (DC) emulation.The Medici simulator mainly applies to little signal emulation.
The n channel IGFET of two types is Computer Simulations in the device level: the asymmetric n passage IGFET that (a) is constituted according to the present invention and (b) summarize symmetric reference n passage IGFET corresponding to the n passage IGFET of the invention of (but be different from for invention character) Computer Simulation.The asymmetric IGFET of the Computer Simulation of this invention is structure " A " in hereinafter summarizing the directions for.The asymmetric IGFET of the invention of the Computer Simulation of structure A summarizes corresponding to the long n passage IGFET 150 of Figure 13 or corresponding to the jitty form of IGFET 150.The symmetrical IGFET of the Computer Simulation of reference is identified as structure " B " in hereinafter summarizing.The reference IGFET of the Computer Simulation of structure B summarizes corresponding to the long n passage IGFET 230 of Figure 29 or corresponding to the jitty form of IGFET 230, the ring bag portion 320 and 322 that is directed to IGFET 230 is the situation that extends in the below of S/ D district 302 and 304 respectively.
Structure A and B are based on the amount of analysis varied curve model of summarizing utilization Gauss (Gaussian) dopant dose varied curve.What suppose is: structure A and B in each group that compares are according to the same treatment flow process manufacturing such as Figure 31.Except the variation that produces bulk material doping feature of the present invention and only point out in addition in hereinafter, has substantially the same dopant distribution with B at structure A of relatively each group.Structure A and B in relatively each group also have essentially identical physical dimension, for example: grid length, stack height, reach source/drain length.Its device that is manufactured in 0.18 micron technology node is represented in Computer Simulation in structure A and B, that is: the characteristic size by its I printing is the IGFET of 0.18 micron design rule manufacturing.
Computer Simulation is summarised as and is directed to the enhancing simulated performance.Structure B so Computer Simulation are directed to the parameter value of the enhancing simulated performance of structure A with generation in its expection.Because the basic framework of structure B is directed to digital application, applying to Computer Simulation structure B is to be different from it will produce the parameter value that strengthens digital performance to reach some parameter value that strengthens simulated performance.
What suppose is: structure A and B are disposed at a plurality of IGFET structures, and the ditch portion of insulation filling used implementing an insulating regions, such as: in the field of Figure 29 insulating regions 200, be used for the IGFET that lateral isolation is constructed in a plurality of IGFET.Have be directed to structure A and B be the ditch portion of same size be compare the digital performance of the reference configuration B of optimization in a plurality of IGFET structures required and dark for up to 50% and broad for up to 20%.Required with the digital performance of comparing this structure of optimization B in the p+ trap portion 116 of the symmetrical n passage IGFET230 of Figure 29 with 316 IGFET trap portion and dark in up to 20% corresponding to the asymmetric n passage IGFET 150 that is directed to Figure 13 respectively.The structure A of invention seems for needing broad/darker ditch portion, is to be lower than the trap portion that is directed to the optimized structure of numerical the subject of knowledge and the object of knowledge B to keep between good IGFET and isolate when there being its average dopant concentration whereby.
Structure A all has identical critical voltage V with B
TWith identical background p type concentration of dopant, that is: 0.4 volt and 5 * 10
15Atom/cubic centimetre.Be directed to the p type background doped agent concentration of set value, limit its p type implant and control its critical voltage V along the bag portion on structure A and B semiconductor-on-insulator surface
TIn view of this, suitably adjust in the peak value upper surface concentration of the p type bag portion dopant of inventing single the bag portion that constructs A to reach its caused identical critical voltage of peak value upper surface concentration by the p type ring dopant of two ring bag portions of reference configuration B.Clearer and more definite, the asymmetric structure A of invention compares the symmetric construction B of reference and receives bag portion dopant than severe dosage, is to consider the fact: reference configuration B has many two times bag portions of invention structure A.Higher-doped in single the bag portion of the asymmetric structure A of invention is to improve it to penetrate resistance, compare except the bag portion in asymmetric structure relatively be that the identical doping that has as any one bag portion of reference symmetric construction B is to be same as the asymmetric IGFET that constructs A to construct.
Figure 39 presents the dopant dose varied curve of the three-dimensional that the jitty form of the asymmetric structure A that is directed to invention implements.The dopant dose varied curve that is directed to the three-dimensional of implementing with reference to the corresponding jitty form of symmetric construction B is presented in Figure 40.Figure 39 and 40 offers some clarification on net doping agent concentration N
NFunction for fore-and-aft distance x and depth y.The enforcement of structure A and B only partly be presented in Figure 39 and 40 for single silicon.Though structure A and B all are assumed to be and are manufactured in 0.18 micron technology node, Computer Simulation all have grid length L in the structure A of Figure 39 and 40 and the enforcement of B
GBe 0.2 micron, causing its passage length L that aims at owing to lithography is 0.12 to 0.14 micron.
In the enforcement of the invention of Figure 40 structure A is short channel form corresponding to IGFET 150 substantially.In the enforcement of the reference configuration B of Figure 40 is short channel form corresponding to IGFET 230 substantially, simulates in the parameter value of the simulated performance of the enforcement that strengthens structure A and is the below that extends in S/ D district 302 and 304 respectively according to the ring bag portion 320 and 322 of IGFET 230 according to summarizing in being embodied as of the structure B of Figure 40.For convenience, be denoted as in the enforcement of the jitty of Figure 39 and 40 structure A and B and have the reference symbol of its utilization with single silicon area of discerning IGFET 150 and 230.Simulate owing to structure B is directed to simulation application, S/ D district 302 and 304 is denoted as the source electrode 302 and drain electrode 304 in Figure 40 respectively.Except as hereinafter indicated, be shown in Figure 39 and 40 enforcements of demonstration respectively for the jitty form of structure A and B or for the structure A and the mentioning of B of jitty.
Each S/D district of each structure A or B is made up of with the horizontal expansion part of more slightly mix (but still being the severe doping) the major part that utmost point severe is mixed.The drain electrode 104 of the jitty form of structure A is therefore by being made up of major part 104M and horizontal expansion part 104E.Yet the regional 104M of drain electrode 104 and 104E are difficult to discern in Figure 39 and therefore for not being shown in Figure 39 separately.
Figure 41 and 42 presents the dopant profile (contour) of two dimension, is directed to other jitty form of branch of structure A and B.Dopant profile is the obtained along seeing through vertical plane of jitty structure A and B.The regional 104M of short channel structure A and 104E can know and discern in Figure 41 and so be shown in Figure 41.As by shown in the position of the PN junction 110 of Figure 41 and 112, the main drain electrode part 104M of short channel structure A compares main source electrode portion 102M and darker for extending in the semiconductor-on-insulator lower face.That is, be directed to the asymmetric structure A of invention, the drain electrode depth y
DBe greater than the source electrode depth y
SOtherwise, the check of Figure 42 be show be: the main source electrode portion 302M in reference symmetric construction B is the substantially the same degree of depth of extension with main drain electrode part 304M in the semiconductor-on-insulator lower face.
Figure 43 presents the net doping agent concentration N along the semiconductor-on-insulator surface of the jitty form that is directed to structure A and B
N, as the function of measuring certainly with reference to the fore-and-aft distance x of S/D zone position.Witness mark S/D zone position is that the self-channel district center is about 3.5 microns.Present the curve chart after a while of the computer simulation data that is directed to structure A and B with it in Figure 43, the curve post that representative is directed to invention structure A is shown little hollow circle, is the data that are directed to reference configuration B of extra flag not to distinguish its data and curves.In structure A and the position that B has substantially the same data, the curved section that is directed to structure A and B is visually for distinguishing each other.
Be similar to the curved section of Figure 14 c, represent the concentration N of the jitty structure A of invention in curved section 102M*, 104M*, 102E* and the 104E* of Figure 43 respectively along the clean n type dopant of regional 102M, 104M, 102E and the 104E on semiconductor-on-insulator surface
IIn the curved section 106* of Figure 43 and 120* is the concentration N along the clean p type dopant of the zone 106 on semiconductor-on-insulator surface and 120 that represents jitty structure A respectively
I Curved section 302M*, 304M*, 302E* and 304E* represent the concentration N along the clean p type dopant of regional 302M, 304M, 302E and the 304E on semiconductor-on-insulator surface of the jitty structure B of reference respectively
I Curved section 306*, 320* and 322* represent the concentration along the clean p type dopant of the zone 306,320 on semiconductor-on-insulator surface and 322 of jitty structure B respectively.
In the curved section 106* of Figure 43 is the asymmetric dopant gradual change of channel region 106 that is illustrated in the short channel structure A of invention.Especially, curved section 106* be show be: the net doping agent concentration N of jitty structure A along the semiconductor-on-insulator surface
IBe in reaching in being about 1 * 10 near source electrode 102
18The high value of atom/cubic centimetre, and reduce gradually towards drain electrode 104 for striding across channel region 106 in the position of moving from this high value then.Though be not shown in Computer Simulation, in the concentration N of total p type dopant of the channel region 106 of short channel structure A
T, compare zone 106 and be drain electrode 104 parts of joining along upper surface, be to be at least 10 times (low usually) for junction source electrode 102 parts are low in its zone 106 along upper surface for surpassing 100 multiples.Otherwise the symmetrical dopant gradual change of the channel region 306 of short channel structure B is illustrated by curved section 306*, demonstration be: the concentration N of jitty structure B along upper surface
IBe near source electrode 102 and drain electrode 104 in about peak value that equates, and be lower a little value in the centre of channel region 306.
Figure 44 a presents absolute (total p type and total n type) vertical dopant quantitative change curve that sees through the S/D position of the short channel form that is directed to structure A and B.The fore-and-aft distance x that applies to Figure 43 is directed to the absolute concentration of dopant N of the jitty structure A of invention for measuring the identical witness mark S/D zone position from it
TBe illustrated in Figure 44 a, be to equal 0.0 micron vertical line (or plane) and be to equal 0.7 micron vertical line in distance x in distance x along seeing through main drain electrode part 104M along seeing through main source electrode portion 102M.Figure 44 a in like manner describes to be directed to the concentration N of the jitty structure B of reference
T, be to equal 0.0 micron vertical line and to see through main drain electrode part 304M be to equal 0.7 micron vertical line in distance x along extending in distance x along extend seeing through main source electrode portion 302M.
Be similar to the curve of Fig. 8 b and 10b, in the curved section 102 of Figure 44 a " with 104 " be respectively corresponding to the source electrode 102 of the jitty structure A of invention and drain electrode 104 and therefore representative be the concentration N of total n type dopant of 0.0 and 0.7 micron vertical line along what see through source electrode 102 and drain electrode 104 (clearly being main source electrode portion 102M and main drain electrode part 104M) respectively at distance x
T Curved section 114 in Figure 44 a ", 116 ", 118 ", 120 " with 124 " be respectively summary corresponding to the zone 114,116,118,120 of short channel structure A with 124 and therefore represent separately along see through source electrode 102 with drain 104 be the concentration N of total p type dopant of 0.0 and 0.7 micron vertical line in distance x
TProject 110
#With 112
#Point out to be directed to the PN junction 110 and 112 of jitty structure A respectively.
Cmax in the p type trap portion dopant of the trap portion 116 of the jitty structure A of invention occurs in the depth y that it equals 0.7 micron
W, as curved section 116 owing to Figure 44 a " and indicated.Curved section 116 " with 124 " combination be illustrated in short channel structure A below drain electrode 104 and along in distance x being the inferior precipitous character of vertical dopant quantitative change curve that equals 0.7 micron vertical line.Particularly, the curved section 116 of combination "/124 " show: directly below drain electrode 104 in the concentration N of total p type dopant of bulk material part
TBe reduced to about 100 multiple in moving from the position of maximum p type trap portion concentration of dopant, and therefore be remarkable above 10 multiple in the PN junction 112 of drain electrode 104 bottoms.
In the jitty structure A about the invention of Figure 44 a, the depth y of drain electrode-body interface 112
DBe to be about 0.2 micron.Since below drain electrode 104 in the Cmax N of total p type dopant of bulk material part
TDepth y
WBe 0.7 micron, in jitty structure A below drain electrode 104 in the Cmax N of total p type dopant of bulk material part
TThe position compare drain electrode 104 and below the semiconductor-on-insulator surface, be about 3.5 times deeply.As a result, in the concentration N of total p type dopant of bulk material 108
TBe in (its compare drain electrode 104 and below the semiconductor-on-insulator surface for being no more than 5 times more deeply) moves to up to drain and 104 be reduced to about 100 multiple from the position of maximum p type trap portion concentration of dopant.
As situation, occur in the depth y that it equals 0.7 micron in the Cmax of the p type trap portion dopant of the trap portion 316 of the jitty structure B of reference about the trap portion 116 of the jitty structure A of invention
W, as curved section 316 owing to Figure 44 a " and indicated.Yet, in short channel structure B, curved section 316 ", 318 " with 322 " combination of (or 320 ") be in directly at the p type bulk material of the below of drain electrode 304 (or source electrodes 320) partly for quite smooth.The curved section 316 of combination "/318 "/322 " show: directly below drain electrode 304 in total p type concentration of dopant N of bulk material part
TBe the multiple of significantly changing in the PN junction of drain electrode 304 bottoms less than 5 in moving from the position of maximum p type trap portion concentration of dopant, and therefore be remarkable less than 10 multiple.That is: it is inferior precipitous constructing the directly non-in the vertical dopant quantitative change curve of bulk material part below drain electrode 304 of B in jitty.
Be directed to the jitty form of structure A and B, be presented in Figure 44 b corresponding to the clean vertical dopant quantitative change curve of the absolute vertical dopant quantitative change curve of Figure 44 a.Curved section 102* and 104* in Figure 44 b represent respectively in the source electrode 102 of the jitty structure A that invents and the concentration N of the clean n type dopant of drain electrode 104
N, be 0.0 and 0.7 micron vertical line respectively at distance x along what see through source electrode 102 and drain electrode 104 (clearly for seeing through main source electrode portion 102M and main drain electrode part 104M).Curved section 114*, 116*, 120* and 124* are the concentration N that represents separately in the clean p type dopant of the zone 114,116,120 of short channel structure A and 124
N, be 0.0 and 0.7 micron vertical line in distance x along what see through source electrode 102 and drain electrode 104.
Represent respectively in the source electrode 302 of the jitty structure B of reference and the concentration N of the clean n type dopant of drain electrode 304 in the curved section 302* of Figure 44 b and 304*
N, be 0.0 and 0.7 micron vertical line respectively at distance x along what see through source electrode 302 and drain electrode 304 (clearly for seeing through main source electrode portion 302M and main drain electrode part 304M).Curved section 114*, 316* and 318* represent respectively in the concentration N of the clean p type dopant of the zone 114,316 of short channel structure B and 318
N, be 0.0 and 0.7 micron vertical line in distance x along what see through source electrode 302 and drain electrode 304.Curved section 114* all applies to jitty structure A and B.
Figure 45 a and 45b illustrate line range of linearity mutual conductance g respectively
MwWith the saturated mutual conductance g of line
MsatwFor grid to source voltage V
GSFunction, be directed to the jitty form of structure A and B, its grid length L
GIt is 0.2 micron.Figure 46 a and 46b illustrate line range of linearity mutual conductance g respectively
MwWith the saturated mutual conductance g of line
MsatwFor grid to source voltage V
GSFunction, be directed to the long channel form of structure A and B, it constitutes for structure A and the B that is same as jitty substantially, except its grid length L
GIt is 0.5 micron.Be directed to the range of linearity g of Figure 45 a and 46a
MwCurve chart drains to source voltage V
DSIt is 0.1 volt.Be directed to the saturated g of Figure 45 b and 46b
MsatwCurve chart, voltage V
DSIt is 2.0 volts.Figure 45 a, 45b, 46a and 46b also indicate range of linearity mutual conductance g
MwWith saturated mutual conductance g
MsatwFor determining line drain current I from it
DwVariation.
As shown in Figure 46 a and 46b, compare the long-channel form of reference configuration B, it significantly is higher mutual conductance (range of linearity mutual conductance g that the long-channel form of invention structure A presents
MwWith saturated mutual conductance g
Msatw).As indicated, compare the jitty form of structure B, the range of linearity mutual conductance g that the jitty form of structure A presents higher a little (being higher 10% roughly) in Figure 45 a
MwWhat Figure 45 b showed is: the jitty form of structure A and B is the g that has much at one
MsatwCharacteristic.Be directed to the mutual conductance g of invention structure A
MwWith g
MsatwThe summary high value make it have higher voltage gain and therefore improve its simulated performance.
Figure 47 explanation is directed to the current-voltage transfer characteristic of the short channel form of structure A and B, that is: line drain current I
DwFor grid to source voltage V
GSVariation, in 2.0 volts grids to source voltage V
GSAs shown in Figure 47, the structure A and the B of short channel has and is almost identical I-E characteristic.Also for to be contemplated that: structure A will have most of identical I-E characteristic that is with the long-channel form of B.
Note following true: the jitty structure B top body part 318 of reference is provided with the p type APT dopant of high concentration to help avoiding penetrating in jitty structure B, what be directed to the jitty structure A I-E characteristic demonstration identical with being almost of B is: in invention structure A, do not exist p type APT dopant not result in penetrating of invention structure A in the position that summary is similar to the p type APT dopant of reference configuration B.The physical interpretation qualitatively that is directed to this result is: carry out p type bag portion dopant in the anti-penetration of structure A.More clear and definite, compare the bag portion 320 of reference configuration B and 322 p type ring implant and bigger doping is provided in the p type bag portion dopant of the bag portion 120 of invention structure A, be directed to and construct A to have identical critical voltage V as isostructure B
TThis difference can be by being compared to Figure 43 curved section 120* and curved section 320* and 322* find out.The higher-doped of constructing the p type bag portion implant of A in invention makes it avoid penetrating and operating in simultaneously the low current leakage of comparability in reference configuration B.
Aforementioned conclusion is by expanding progressive support the with reference to the jitty IGFET structure resulting computer simulation data of C, and structure C lacks with reference to the APT implant of jitty structure B and in others and constructs B for equaling jitty.Be directed to reference configuration C in V
DSValue is that 2.0 volts current-voltage transfer characteristic is indicated by the curve that is denoted as C of Figure 47.Leakage current I
D0wBe to source voltage V in grid
GSDrain current I for null value
DwValue.As shown in Figure 47, compare the jitty structure A of invention, be directed to the drain leakage current I of reference configuration C
D0wBe higher for about 50 times.This is to be pointed out that: penetrate and betide reference configuration C.
Figure 48 delineation lines drain current I
DwFor draining to source voltage V
DSFunction, be directed to the jitty form of structure A and B, be to source voltage V from 0.5 volt to 2.0 volts grid in scope
GSValue.As indicated, in each indication V in Figure 48
GSValue, the jitty structure A of invention compares with reference to jitty structure B and summarizes and reach drain current I
DwHigher a little value.Therefore the structure A of invention compares reference configuration B and has lower aisle resistance.In addition, compare reference configuration B, drain current I
DwBe in the high voltage V of invention structure A
DSBe draining along with increase to source voltage V
DSAnd increase to less.This is to point out: compare reference configuration B, less collapse multiplication and/or less channel width modulation betide invention structure A.
Analysis and the feature performance benefit of the asymmetric IGFET of invention
Be directed to good simulated performance, the source electrode of IGFET should as far as possible rationally be shallow, avoids the critical voltage V in short channel length whereby
TDecay.Source electrode also should mix for severe as far as possible, makes whereby in there being source resistance R
SEffective mutual conductance g of IGFET
MeffBe maximum.Effective mutual conductance g
MeffBe essential mutual conductance g by IGFET
mDetermine be:
Pointed as cotype (1), reduce source resistance R
SMake effective mutual conductance g
MeffImprove.Across source resistance R
SVoltage drop also subtract each other grid from essence to source voltage, make actual grid to source voltage V
GSBe in lower value.This removes bias voltage IGFET in its gate electrode.In brief, source resistance R
SShould as far as possible rationally be low.
Except needs have low series resistance in the source electrode of IGFET and drain electrode to reach the connection resistance R of IGFET
OnThan outside the low value, minimize source resistance R
SNeed be to maximize effective mutual conductance g
MeffMore especially, across source resistance R
SVoltage drop add to mutually total source electrode to the drain electrode voltage drop.This makes the connection resistance R
OnIncrease.
In order to reach high voltage capability and to reduce heat carrier and inject, the drain electrode of IGFET should as far as possible rationally be dark and slight the doping.These need to meet and do not cause the connection resistance R
OnFor enlarging markedly and not causing the critical voltage decay of short channel.
The parasitic capacitance of IGFET is served as vital task and is contained the speed ability of the circuit of IGFET in setting it, particularly in the high frequency operation of little signal.Figure 49 is the parasitic capacitance C that drain electrode D, the source electrode E, gate electrode E and the body regions electrode B that are associated with n passage IGFET Q separately are described
DB, C
SB, C
GB, C
GDWith C
GS, wherein, C
DBRepresentative drains to the electric capacity of body, C
SBRepresent the electric capacity of source electrode, C to body
GBRepresent the electric capacity of grid, C to body
GDRepresent the electric capacity of grid to drain electrode, and C
GSRepresent the electric capacity of grid to source electrode.The equivalent model of the little signal of IGFET Q is presented in Figure 50, wherein, and V
BSBe the voltage of body to source electrode, g
MbBe the mutual conductance of body electrode, and project 440 and 442 is current sources.
The frequency range of amplifier is defined as Amplifier Gain and drops to its low frequency value
The frequency values of (being about 0.707).Be summarised as and desirable be: the frequency range of amplifier is as far as possible for big.
The IGFET Q of Figure 49 is configurable in three kinds of main amplifier configurations, to provide as input voltage V
InThe amplification output voltage V of function
Out, according to being formula with ShiShimonoseki:
V
out＝H
AV
in (2)
Wherein, H
AIt is the plural transfer function of IGFET.These three kinds of configurations be in Figure 51 a to 51c the common source, common gate and the common drain configuration that show respectively, wherein, C
LBe load capacitance, V
DDBe high supply voltage, and V
SSIt is low supply voltage.Amplifier input voltage V
InSupply is from voltage source 444.Assembly 446 in Figure 51 b and 51c is current sources, and in the signal V of Figure 51 b
GIt is grid voltage.Be directed to the transfer function H of three kinds of configurations of Figure 51 a to 51c
ACheck be proof be: reduce parasitic draining to the body capacitor C
DBAnd/or parasitic source electrode is to the body capacitor C
SBBe to improve in each IGFET performance of these configurations:
Be directed to the transfer function H of the commonsource amplifier configuration of Figure 51 a
ABe input limit/output stage point function:
Wherein, R
DBe drain electrode (series connection) resistance, ω
InBe in the angular frequency of input limit, ω
OutBe that s is plural frequency calculation that equals j ω in the angular frequency of output limit, ω is an angular frequency.Parasitic capacitance in the IGFET of common source configuration Q is by the set following pole frequency ω of difference
InWith ω
OutAnd input type (3):
Parasitic drains to the body capacitor C
DBCome across the output stage dot frequency ω of formula (5)
OutBe directed to the source resistance R of common source configuration
SBe zero situation, according to formula (4), the input limit is unlimited.In the frequency range of the IGFET of Figure 51 a Q then by equaling as by the set ω of formula (5)
OutBe directed to the drain resistance R of set value
DWith the grid of parasitism to capacitance of drain C
GD, output stage dot frequency ω
OutAlong with draining of increasing to the body capacitor C
DBAnd improve.Reduce parasitic draining to the body capacitor C
DBTherefore desirable for to improve in the frequency range of the IGFET of Figure 51 a Q common source configuration.
In addition, as in shown in Figure 51 a, in draining of the parasitism of common source configuration to the body capacitor C
DBBe parallel to load capacitance C
LReduce and drain to the body capacitor C
DBTherefore favourable for reducing its output loading effect.
Be directed to the transfer function H of the common grid amplifier configuration of Figure 51 b
ABe input limit/output stage point function:
Wherein, be directed to the input pole frequency ω of common gate configuration
InBe to be intended to:
Reduce source electrode to the body capacitor C
SBMake input pole frequency ω
InImprove.This is to make that the performance of IGFET Q is the common gate configuration that improves in Figure 51 b.
Be directed to the output stage dot frequency ω of the common grid amplifier configuration of Figure 51 b
OutBe set by formula (5) institute.Reduce parasitic draining to the body capacitor C
DBTherefore increase the frequency range of the common gate configuration of Figure 51 b.
Be directed to the transfer function H of the common drain amplifier configuration of Figure 51 c
ABe simple zero/first order pole function:
Wherein, ω
zBe angular frequency zero point, and ω
pIt is angular frequency in limit.Parasitic capacitance is intended to following zero frequency ω respectively by it
zWith pole frequency ω
pAnd input type (8):
Parasitic source electrode is to the body capacitor C
SBCome across the pole frequency ω of formula (10)
pBy reducing capacitor C
SB, pole frequency ω
pImprove.This is the frequency characteristic that improves in the IGFET of the common drain configuration of Figure 51 c.
Be similar to draining about the common source configuration of Figure 51 a to the body capacitor C
DBTake place, in the common drain configuration shown in Figure 51 c, parasitic source electrode is to the body capacitor C
SBBe parallel to load capacitance C
LReduce source electrode to the body capacitor C
SBTherefore favourable for being reduced to its output loading effect of common drain configuration.
A kind of little signal model of the short circuit output form of the commonsource amplifier configuration of Figure 52 key diagram 51a.In the little signal model of Figure 52, the drain electrode D of IGFET Q is that electric short circuit is to source electrode S.Figure 53 presents a kind of little signal equivalent electric circuit of model of the IGFET Q of Figure 52.Assembly 448 in Figure 53 is voltage-controlled current sources.Project v in Figure 52 and 53
Gs, i
iWith i
oBe respectively the grid of little signal to the input current of source electrode (input) voltage, little signal, and the output current of little signal.
The cut-off frequency f of IGFET
TBe defined as the value of frequency f: in it, the current gain A of the short circuit of this IGFET output common source configuration
IAbsolute value for dropping to 1.That is:
Cut-off frequency f
TBe by the equivalent electric circuit of the little signal of Figure 53 and export as:
Capacitor C in formula (12)
GBIt is the parasitic capacitance between the IGFET body regions outside gate electrode G and its active area of being occupied by IGFET Q.
Improve the mutual conductance g that amplifies IGFET
mBe to improve its performance capability usually, because its voltage gain is to be generally increase.Because cut-off frequency f
TBe along with improving mutual conductance g according to formula (12)
mAnd improve, in the raising of cut-off frequency fT the pointer of improvement IGFET performance.
Long channel model in the allusion of IGFET Q (is directed to it: source resistance R
SBe zero), mutual conductance g
mBe:
Wherein, W is the IGFET width, and L is similarly channel length, μ
nBe the electronics mobility, and C
GIaBe the gate dielectric electric capacity of per unit area.In the speed saturated model of the short channel of IGFET Q, mutual conductance g
mBe:
g
m＝Wv
nsatC
GIa (14)
Wherein, v
NsatBe electron saturation velocities, because IGFET Q is the n CU channel unit.What the checking of formula (13) and (14) showed is: in the mutual conductance g of long channel and short channel model
mBe and be proportional to face gate dielectric capacitor C
GIa
Be directed to the long channel model of the allusion of IGFET Q, in saturated, capacitor C
GS, C
GDWith C
GBBe:
C
GD＝WL
GDoverlapC
GIa (16)
C
GB＝WLC
GIa (17)
Wherein, L
GSoverlapWith L
GDoverlapBe overlap the respectively source electrode of IGFET Q and the fore-and-aft distance of drain electrode of gate electrode.Item WL
GSoverlapC
GIaBe to result from the parasitic capacitance of gate electrode overlapping source electrode.Item WL
GDoverlapC
GIaBe to result from the overlap parasitic capacitance of drain electrode of gate electrode.Formula (15) to (17) is inserted into formula (12) generation is directed to desirable long-channel IGFET in saturated cut-off frequency f
T
Formula (15) and (16) be inexpectancy with accurately for being directed to asymmetric IGFET of the present invention, owing to asymmetric vertical doping gradual change of its channel region.Yet formula (15) and (16) can use in calculating parasitic capacitance C
GSWith C
GDTendency indication, be used to assess the cut-off frequency f of asymmetric IGFET of the present invention
TCapacitor C
GSWith C
GDCan determine by Computer Simulation than exact value.
According to definition, cut-off frequency f
TBe involved in the short circuit condition of the output of common source configuration.As a result, frequency f
TBe in the nature and eliminate parasitic draining to the body capacitor C
DBEffect.In addition, frequency f
TThe source electrode that is also unreacted parasitism is to the body capacitor C
SBEffect because it utilizes the common source configuration.
Cut-off frequency f
THave it and depend upon operating current (that is: drain current I
D) spike cutoff f
TpeakThough spike cut-off frequency f
TpeakBe useful on the IGFET performance of assessment high frequency, circuit operates in usually and is lower than peak value f
TpeakIt is 10 frequency to two multiples.Except being directed to the peak value f of IGFET
TpeakDesirable be high outside, be summarised as and desirable be: along with reducing operating current for being lower than corresponding to peak value f
TpeakThe operating current level, have cut-off frequency f
TThe variation of reduction.
Such as in the PN junction 110 and 112 of IGFET 100,140,150,160,170,180,190,210,100V, 140V, 150V, 160V, 170V, 180V and 190V of invention, source-body and drain body interface are generally reverse biased.When PN junction is a reverse biased, present the face capacitor C that it is intended to following little signal along interfacial borderline region
Da:
Wherein, ε
0Be absolute dielectric coefficient, K
SBe the relative dielectric coefficient of semi-conducting material, and t
dBe the interdependent thickness of voltage of borderline region.
Be directed to along the formed PN junction of the substrate of even doping, be directed to the thickness t of the borderline region of the desirable PN junction of this kind
dBe:
Wherein, V
RBe the reverse voltage that applies, V
BIBe interfacial built-in voltage, q is an electron charge, and N
B0It is uniform background doped agent concentration in substrate.Built-in voltage V
BIBe to be formula and along with background doped agent concentration N according to following pass
B0Change:
Wherein, k is ripple time graceful (Boltzmann ' s) constant, and T is a temperature, and n
iIt is essential carrier concn.
Figure 54 illustrates net doping agent concentration N
D-N
AFor how along with the distance y to the p type baseplate material of PN junction model changes, p type substrate can have the appointing of dopant dose varied curve of three kinds of fundamental types, wherein, and N
DWith N
ABe respectively absolute body and the acceptor doped agent concentration executed.The interface model is also to be shown in Figure 54.Therefore as pointed by the interface model of icon, p section bar material is compared interfacial n section bar material for thicker and be more slightly doping.Be instructed in the example of inferior precipitous, the smooth and super abrupt dopant dosage varied curve of p section bar material respectively in the curve 450,452 and 454 of Figure 54.Distance y
dBe meant its thickness along the p type part of interfacial borderline region.
Inferior precipitous quantitative change curve 450 is approximate each the vertical dopant quantitative change curves of below of drain electrode-body interface 112 in n passage IGFET 100,140,150,160,170,180,190,210,100V, 140V, 150V, 160V, 170V, 180V and the 190V of invention of representing.Comprise main drain electrode part 104M and laterally IGFET 150,160,180,190,210,150V, 160V, 180V and the 190V of drain extension 104E in its drain electrode 104, curve 450 is specific to be the vertical dopant quantitative change curves of representative along the below of the drain electrode-body interface 112 of the bottom of major part 104M.Be directed to its source electrode 102 compare bag portion 120 in the semiconductor-on-insulator lower face for extending darker IGFET 170,180,190,170V, 180V and 190V, curve 450 is also represented the vertical dopant quantitative change curve below source electrode-body interface 110, specific for be directed to IGFET 180,190,180V and 190V each along the interface of the bottom of main source electrode portion 102M partly below.According to conductivity-type is oppositely, and curve 450 is more represented each the vertical dopant quantitative change curve of below of bottom of major part 264M of drain electrode 264 in p passage IGFET220, the 220U of invention and 220V.Power 452 is represented the p section bar material of the desirable PN junction that is comprised by formula (18) to (20).
Figure 55 describes the face capacitor C of the parasitism of borderline region
DaBy how along with reverse voltage V across the modeled PN junction of Figure 54
RAnd change.Be meant the C of its curve that is directed to Figure 54 respectively 450,452 and 454 in the curve 460,462 and 464 of Figure 55
DaChange.Especially, curve 462 is that qualitative formula indication changes suc as formula the power side's rule that is directed to desirable PN junction that (18) are determined, utilization is from the t of formula (19)
dData (reach the V from formula (20)
BIData).
The draining of n passage IGFET 100,140,150,160,170,180,190,210,100V, 140V, 150V, 160V, 170V, 180V or the 190V of invention along the parasitism of drain electrode-body interface 112 to the body capacitor C
DBBe to be approximately the vague and general capacitor C of the face of being proportional to
Da, as in curve 460 representatives of Figure 55, curve 460 is the inferior precipitous quantitative change curves 450 corresponding to Figure 54.As shown in Figure 55, be directed to the vague and general capacitor C of curve 460
DaBe to be lower than (a) to be directed to corresponding to the curve 462 of precipitous interface quantitative change (smooth) curve 452 of Figure 54 or (b) to be directed to curve 464 corresponding to the super precipitous quantitative change curve 454 of Figure 54.Therefore, the super precipitous vertical dopant quantitative change curve in the below of drain electrode-body interface 112 of each IGFET 100,140,150,160,170,180,190,210,100V, 140V, 150V, 160V, 170V, 180V or 190V drains to the body capacitor C it
DBReduce.It in like manner is the capacitor C that is applied to p passage IGFET 220, the 220U of invention or 220V along the bottom of drain electrode 264
DBParasitic source electrode is to the body capacitor C
SBAlso be generally reduction, particularly compare bag portion 120 and be extension darker n passage IGFET 170,180,190,170V, 180V and 190V in the semiconductor-on-insulator lower face in its source electrode 102
In addition, as pointed, be directed to the vague and general capacitor C of face corresponding to the curve 460 of the inferior precipitous quantitative change curve 450 of Figure 54 by curve 460 that is compared to Figure 55 and curve 462 and 464
DaComparing curve 462 or 464 is along with reverse biased V
RAnd more slowly change.In draining of the parasitism of IGFET 100,140,150,160,170,180,190,210,100V, 140V, 150V, 160V, 170V, 180V, 190V, 220,220U or the 220V of each invention to the body capacitor C
DBTherefore be along with reverse voltage V
RChange and reduce.This is favourable, because less compensation need be to consider in capacitor C
DBVariation.Identical argument is to be applied to parasitic source electrode to the body capacitor C
SB, particularly in IGFET 170,180,190,170V, 180V and 190V.
In so inferior abrupt dopant dosage varied curve of check below drain electrode 104 and 204, considers a kind of extreme example of inferior precipitous interface quantitative change curve, wherein, along PN junction than the slight net doping agent concentration N of the semi-conducting material of doped side
BBe to form along the chosen distance of interfacial parasitic capacitance with influence near interface fully in it that step level to the higher second concentration of dopant value changes from the first concentration of dopant value.This example be modelling in Figure 56, its explanation net doping agent concentration N
BFor how along with changing from interfacial distance y.
The two step level formula PN junctions of Figure 56 are formed in following mode.The slight doped side of PN junction is to form about p section bar material, wherein, and net doping agent concentration N
BBe aimed at from interface and extend out to distance y
D0Distance be in the first value N
B0, in distance y
D0, concentration N
BBe to form the step level to be changed to the second value N
B1Distance y
D0Be with constituting the position on borderline region p type border, in reverse voltage V
RBe null value, if in p type concentration of material N
BBe in low value N
B0, surpass distance y
D0Outwards be at least to the position, surpass it, in p type concentration of material N
BVariation is along interfacial parasitic capacitance with appreciable impact not.
Along with reverse voltage V
RIncrease to certain maximum V from zero
Rmax, along in the interfacial borderline region expansion of the model of Figure 56 from distance y
D0And the ultimate range y that arrives
DmaxSurpass distance y
Dmax, in the net doping agent concentration N of p section bar material
BCan have any amount varied curve, as in shown in Figure 56.As also being indicated in Figure 56, along interfacial than severe doped n type concentration of material N
BBe to compare N in it
B1Be big many even value N
D0
Figure 56 is depicted in the quantitative change curve of the dopant of p section bar material, along with high concentration value N
B1Scope is from N
B0(in distance y
D0The step level of concentration be changed to disappearance) up to 20N
B0, in common y
D0Value is 0.2 micron and in common N
B0Value is 3 * 10
16Atom/cubic centimetre.If the PN junction of model is in the depth y of semiconductor-on-insulator lower face
DDrain electrode-body interface, from N
B0To N
B1Concentration N
BThe step level increase the depth y of the below occur in upper surface
D+ y
D0
The vague and general capacitor C of face of the two step level formula PN junctions of Figure 56
DaInfluenced by following differential expression:
Be according to condition: borderline region is as reverse voltage V
RIt is the zero distance y that extends to
D0, the integration of asking for formula (21) produces and is directed to distance y
D0Following value:
Convolution (18) produces with (20) and is directed to vague and general capacitor C
DaFollowing result:
Figure 57 illustrates the vague and general capacitor C of face
DaFor how along with reverse voltage V
RAnd change, being directed to its scope is from N
B0(being similarly the interface above model) is up to 20N
B0High concentration value N
B1All values, as being determined by formula (23).What Figure 57 showed is: the ratio N of increase
B1/ N
B0Make capacitor C
DaFor along with voltage V
RAnd more slowly change.Be directed to this, desirable is: concentration ratio N
B1/ N
B0As far as possible rationally be high, make parasitic capacitance C whereby
DBWith C
SDFor slowly changing in asymmetric IGFET of the present invention.
The vague and general electric capacity of face is as reverse voltage V
RBe zero and in initial value C
D0aBe set in the voltage V of formula (23)
RProduce when extremely zero:
As expected, initial vague and general capacitance C
D0aBe directed to the allusion value of the desirable PN junction of zero reverse voltage.According to formula (24), according to low value N
B0Square root, capacitance C
D0aAlong with reducing lower concentration values N
B0Institute reduces.Be incorporated into and choose concentration ratio N
B1/ N
B0The high value to have in parasitic capacitance C
DBWith C
SBSlow variation, lower concentration values N
B0Should be low so that capacitor C
DBWith C
SBIn zero reverse voltage V
RFor low.
Computer Simulation about electric capacity and frequency parameter
Consideration is about electric capacity and the above-mentioned information of frequency parameter, and little signal emulation is the characteristic of carrying out by Medici's (Medici) simulator with the interface electric capacity of describing the structure A that invents.Figure 58 a and 58b describe to be directed to short channel and the long channel form of the structure A that the interface capacitance characteristic describes is produced by Medici's simulator respectively.Project 470 and 472 is instructed in source electrode and the drain contact (or source electrode and drain electrode) of Figure 58 a and 58b respectively. Metal silicide layer 254 and 256 is included in respectively in contact 470 and 472.Be illustrated in gradual change (grading) character of the doping of bulk material 108 in each p type bulk material (or zone) 108 doping profile of Figure 58 a and 58b.The jitty IGFET of Figure 58 a has grid length L
GIt is 0.15 micron.Be directed to the grid length L of the long-channel IGFET of Figure 58 b
GIt is 1.0 microns.
Figure 59 illustrates that parasitic line drains to the body capacitor C
DBwFor draining to bulk voltage V
DBFunction, the jitty that is directed to the structure A of invention is implemented (jitty that quite is similar to the structure A of Figure 58 a is implemented) and is directed to the jitty enforcement of reference configuration B, its jitty for the structure A that corresponds essentially to Figure 59 in size aspect and dopant aspect is implemented, except the present invention mixes the feature.In the grid length of Figure 59 is 0.2 micron but not in 0.15 micron of Figure 58 a.Be directed to the C of Figure 59
DBwThe grid of simulation is to source voltage V
GSIt is 0.9 volt.Shown in Figure 59, compare the jitty form of the correspondence that is directed to reference configuration B, be directed to the draining of this jitty form of invention structure A to the body capacitor C
DBwBe lower quite a lot of.In particular, be directed to the capacitor C of the jitty form of the check of inventing structure A
DBwIn 0 to 2 volt V
DSScope is the capacitor C of jitty form that is directed to the check of reference configuration B
DBwAbout 50%.
Figure 60 describes parasitic line source best body capacitor C
SBwFor source electrode to bulk voltage V
SBFunction, be directed to the jitty of checking in the structure A of Figure 59 and B and implement.Grid is to source voltage V
GSBe to be similarly 0.9 volt.As in shown in Figure 60, compare the jitty form of the correspondence that is directed to reference configuration B, the source electrode that is directed to the jitty form of inventing the check of constructing A is to the body capacitor C
SBwBe lower quite a lot of.Though C
SBwReduction is not as C
DBwThat reduces is big, and the jitty form of the check of structure A is in 2.0 volts V
SBValue has about 35 to 40% lower C for the jitty form of comparing the check of constructing B
SBwValue, and in 0 volt V
SBValue has about 25 to 35% lower C for the jitty form of the check of comparing reference configuration B
SBwValue.
Be directed to the jitty form of checking in the structure A of Figure 59, in source electrode to the body capacitor C
SBwSome less improvement be expection because be owing to p type bag portion implant improves in total p type dopant of source electrode 102.In addition, in many application, source electrode is to the body capacitor C
SBwCompare and drain to the body capacitor C
DBwAnd more inessential, because source electrode 102 is to foreshorten to bulk material 108.As expected, be directed to the source electrode of the jitty form of constructing A to the body capacitor C
SBwProgressive reduction can be by making trap portion 116 for reaching deeply.
Figure 61 illustrates cut-off frequency f
TBe line drain current I
DwFunction, be directed to the jitty of checking in the structure A of Figure 59 and B and implement.Figure 61 also illustrate the jitty structure A that is directed to invention a kind of variation A ' along with line drain current I
DwCut-off frequency f
TVariation.Present the subsequent drawings of the computer simulation data of the structure A that is directed to invention and A ' in Figure 61 and in it, the curve post that representative is directed to the data of structure A ' is shown filled circles, to distinguish this data and the data that is denoted as empty circles that is directed to structure A.The special feature of the invention structure A ' that expands is to be associated with Figure 63 and 64 and be described in hereinafter.Indicated as Figure 61, be directed to jitty structure A, the A ' of emulation and the cut-off frequency f of B
TMajor part is identical.
Be directed to structure A, the A ' of Figure 61 and the long-channel form of the enforcement of B, along with line drain current I
DwCut-off frequency f
TVariation be illustrated in Figure 62.Indicated as Figure 62, be directed to the cut-off frequency f of the long channel form of the structure A of invention and A '
TMajor part is identical.Importantly be to be directed to the frequency f of the long channel form of the structure A of invention and A '
TCompare the long-channel form that is directed to reference configuration B and bigger quite a lot of.Be with, invention structure A compares the long-channel form of reference configuration B and has preferred performance with the long-channel form of A '.
Vertical bulk material dopant dose varied curve in the drain electrode below is time precipitous adding
IGFET is owing to the inferior top layer maximum of trap portion concentration of dopant
Figure 63 illustrates its a kind of short n passage enforcement 480 according to asymmetric IGFET structure A ' of the present invention.Except summarizing the display structure details, the doping profile that is directed to IGFET 480 is depicted in Figure 63, as depth y and function from the fore-and-aft distance x of source electrode position.The source electrode position that is used for measuring distance x is a self-channel district center and be about 0.35 micron.
Figure 64 presents invention structure A that is directed to Figure 39 and the net doping agent concentration N along the semiconductor-on-insulator surface that is directed to the invention structure A ' (that is: IGFET 480) of Figure 63
N, as function from the fore-and-aft distance x of aforementioned source electrode position.As being same as Figure 12 c and 14c, curved section 106* and 120* are the concentration N of representative in the clean p type dopant that divides other zone 106 and 120 at this
NAnd curved section 102M*, 102E*, 104M*, 104E* and 104* represent in the concentration N of the clean n type dopant that divides other regional 102M, 102E, 104M, 104E and 104
NThough only be denoted as hollow circle, curved section 102M*, 102E*, 106* and 120* all use to constructing A and structure A '.
Indicated as curved section 104* and 102M* in Figure 64, the IGFET480 of invention structure A ' compare main source electrode portion 102M and along upper surface in drain electrode 104 for reaching some lower maximum net concentration of dopant.More in particular, IGFET 480 along upper surface in drain electrode 104 net doping agent concentration N
NMaximum be generally concentration N in main source electrode portion 102M
NMaximum upper surface value 20 to 50%, be generally 30 to 40%.Though Figure 64 illustrates an example, wherein, in the concentration N of drain electrode 104
NMaximum upper surface value just over 1 * 10
20Atom/cm
2, the maximum upper surface N of the drain electrode 104 of jitty IGFET 480
NConcentration is to be easy to remarkable reduction, for example: 5 * 10
19Atom/cm
2Reduce to 1 * 10
19Atom/cm
2Or littler, be shown in the maximum upper surface N of main source electrode portion 102M
NConcentration and deciding.In addition, compare main source electrode portion 102M and darker for extending some below upper surface in the drain electrode 104 of IGFET 480.In essence, in its source electrode for the IGFET that forms by the major part and the transverse part branch that more slightly mixes (such as: IGFET 150) be that drain electrode with darker slight doping is replaced in IGFET 480 by the formed two segment boundses drain electrode in the major part and the lateral part of more slightly mixing.Mix in the reduction of the drain electrode 104 of IGFET 480 and to cause electric field, and make IGFET 480 impact ionization away from unacceptable drain electrode and occur in its electric field level to be operating as in the reduction of drain electrode 104.
Figure 65 illustrates that it is as grid length L
GThe critical voltage V of function
T, being directed to invention structure A ', reference configuration B, and the Computer Simulation of the IGFET of the symmetric reference structure D that expands, reference configuration D lacks the ring bag portion that construct B and is substantially the same in the size and the doping way of constructing B in others.In the simulation of Figure 65, gate dielectric thickness t
GIBe 4.0 rice (nm) how.
Shown in Figure 65, compare reference configuration B or D, the critical voltage decay is for being passed to critical voltage V in invention structure A '
TThan low value.What Figure 65 also showed is: invention structure A ' compares reference configuration B or D and causes less unacceptable reverse short-channel effect.That is, compare reference configuration B or D, invention structure A ' is along with the grid length L that increases in the long-channel territory
GAnd experience in critical voltage V
TLess variation (being generally less reducing).Therefore structure A compares reference configuration B or D and has preferred short channel and long channel characteristic.
The manufacturing of additional IGFET
The n passage IGFET 480 that implements the asymmetric IGFET structure A ' of Figure 63 is generally the manufacturing according to the present invention, be pursuant to the manufacture process of Figure 31 and use to make the step of asymmetric n channel IGFET 210, according to of the suitable modification of n type source/drain pole extension, and implant the utilization of operation according to additional mask step and related ion with main source/drain implantation step.These differences are aimed at IGFET 480 and are described in hereinafter, as are suitably, use it to be used to describe the same reference numerals of the manufacturing of IGFET 210.
In particular, in the stage of Figure 31 l, n+ forerunner's source electrode extension 102EP limits the n+ forerunner's drain extension that is directed to IGFET 480 and need not limits the correspondence that is directed to IGFET 480.This pattern of wants photoresistance shielding 422 with extend in forerunner's drain extension will otherwise form the top, position that is directed to IGFET 480, and have opening above the position of the forerunner's source electrode extension 102EP that is directed to IGFET480.In this measure, photoresistance 422 strictnesses are in alignment with the forerunner's gate electrode 128P that is directed to IGFET 480.It is to carry out as the above-mentioned Figure 31 of being associated with l that n type source/drain pole extension is implanted, and afterwards, removes photoresistance 422.Because photoresistance 422 is shielding needle positions for forerunner's drain extension of IGFET 480, forerunner's source electrode extension 102EP forms the forerunner's drain extension that is directed to IGFET 480 and forms correspondence.
In the stage of Figure 31 q, photoresistance shielding 434 formations have opening above the position of the main source area 102M that is directed to IGFET 480 with the top, position that extends in the drain electrode 104 that is directed to IGFET480 after a while.Photoresistance 434 strictnesses are in alignment with forerunner's gate electrode 128P of IGFET 480.It is to carry out as summarizing the above-mentioned Figure 31 of being associated with q that the main source/drain of n type is implanted, and afterwards, removes photoresistance 434.Because photoresistance 422 is shielding needle positions for the drain electrode 104 of IGFET 480, main source area 102M qualification is directed to IGFET 480 and need not limits drain electrode 104 again.Part at forerunner's source electrode extension 102EP in the outside of main source area 102M is to constitute source electrode extension 102E.Along with the part of forerunner's gate electrode 128P of IGFET 480 for during not being covered in implantation, the main source/drain dopant of n type also enters the unmasked portion of electrode 128P.
The additional photoresistance shielding (not shown) of opening with intention position top of the source electrode 102 that is directed to IGFET 480 be formed at the dielectric layer 430 that is directed to IGFET 480 and 432 and gate sidewall spacer 252, be directed to IGFET 210 gate sidewall spacer 250 and 252 and gate pole sidewall spacer 290,292,330,332,370 and 372 on.Should add the forerunner gate electrode 128P of photoresistance strictness in alignment with IGFET 480.N type drain dopants is in high dosage and ion is implanted as through the unmasked portion of surface dielectric layer and to single silicon of lower floor, to limit the n++ drain electrode 104 of IGFET 480.Though its utilization is high with the dosage of the n type drain dopants of the drain electrode 104 of qualification IGFET 480, the dosage of this n type drain dopants is less than the high dosage of its utilization with the main source/drain dopant of n type of the main source area 102M of qualification IGFET 480.Therefore, the drain electrode 104 of IGFET 480 is compared its main source area 102M for more slightly mixing.
The n type drain electrode that is directed to IGFET 480 is implanted and also is executed in its drain electrode 104 to extend in the semiconductor-on-insulator lower face be darker condition in order to compare its main source area 102M and its forerunner's source electrode extension 102EP.For example, be directed to that the main source/drain of the n type of IGFET 480 is implanted and the drain electrode of n type implant can be performed by identical n type dopant (arsenic or antimony).In this situation, the n type drain electrode implantation that is directed to IGFET 480 is compared the main source/drain implantation of n type and is executed in higher implantation energy.Substitute, two kinds of implantation can use different n type dopants performed, and the n type drain dopants of IGFET 480 is compared the main source/drain dopant of n type and low molecular weight.In an example, arsenic is main source/drain dopant and phosphorus is the n type drain dopants of IGFET 480.Comparing aforementioned circumstances, is more approaching each other in the implantation energy of this alternative.Yet in two situations, the scope of n type drain dopants is the scope greater than the main source/drain dopant of n type.After the n type drain electrode that is directed to IGFET 480 is implanted, remove this additional photoresistance.
The part of the forerunner's gate electrode 128P that is directed to IGFET 480 that is covered as major part is not to be covered in during the n type drain electrode implantation that is directed to IGFET 480 during main source/drain is implanted.This is to make the n type drain dopants that is directed to IGFET 480 to enter the part of the electrode 128P that is covered during the main source/drain of n type is implanted.As a result, forerunner's gate electrode 128P's of IGFET480 all is to be the severe Doped n-type this moment basically.Forerunner's gate electrode 128P of IGFET 480 thereby become its n++ gate electrode 128.
The n type drain electrode that is directed to IGFET 480 implant can carry out before the main source/drain of n type is implanted rather than after.In the shape of letting oneself go, the remainder of the manufacturing of IGFET 480 is above-mentioned and carry out as being directed to IGFET 210.
If IGFET 210 is also for being present in semiconductor construction, the photoresistance that is directed to the top, intention position of IGFET 210 shield 422 and 434 configuration be same as be respectively be associated with Figure 31 l and 31q above-mentioned.The formation of IGFET 480 does not influence the formation of IGFET 210.
Be applicable to the complementary IGFET structure of the expansion that mixed-signal is used
Figure 66 explanation is according to a kind of variation of the complementary IGFET structure of Figure 29 .1 of the present invention.The complementary IGFET structure of Figure 66 is specially adapted to mixed-signal and uses.Be with primary structure difference between 66 the complementary IGFET structure in Figure 29 .1: the complementary IGFET structure of Figure 66 is by forming such as a kind of start configuration that engages (bonded) wafer.
Complementary IGFET structure in Figure 66, be generally mainly inferior top layer electric insulation layer 482 formed by silica separately lower semiconductor layer 484 have island portion 202 and 204 upper semiconductor layers with it, island portion 202 and 204 is laterally separated by 200 of the insulating regions along the semiconductor-on-insulator surface.Lower semiconductor layer 484 is made up of single silicon of p type or n type usually.Figure 66 presents an example, and wherein, lower semiconductor layer 484 is slight doped p types.Being generally the ditch formula and being generally the electric insulation extension of mainly being made up of silica 486 equally is that self-fields insulating regions 200 extends to time top layer insulating barrier 482.Insulation 200 divides 486 common lateral circular island portions 202 and 204 with insulation extension, makes that it is complete dielectric cleaning isolation each other.
Except above-mentioned architectural difference with in the existence of two kinds of background doped agent concentrations of island portion 202, n passage IGFET 210W is substantially the same in n channel IGFET 210 and configuration and constituting.P-below bulk material part 488 is to delete, and makes p+ trap portion 116 extend downward time top layer insulating barrier 482.
Except not existing with the whole n of being types of guaranteeing top bulk material part 496 of above-mentioned architectural difference and n type counter doping agent concentration, p passage IGFET 220W is substantially the same to be disposed and formation in p channel IGFET 220.N-below bulk material part 494 can be deleted, and makes n+ trap portion 276 extend downward time top layer insulating barrier 482.
The manufacturing of the complementary IGFET structure that expands
The complementary IGFET structure of Figure 66 is to make in following mode according to the present invention.A kind of structure at first provides, and wherein, the insulating barrier 482 on inferior top layer is to be sandwiched between lower semiconductor layer 484 and the semiconductor-on-insulator zone, the semiconductor-on-insulator zone by low even concentration of dopant＜100〉n type list silicon are formed.This initial construction can form, for example: form time insulating material of top layer insulating barrier 482 by seeing through it, so that two semiconductor crystal wafers have been bonded on.The providing of this wafer is directed to semiconductor-on-insulator zone＜100〉n type list silicon.Another wafer provides it to be generally the lower semiconductor layer of being made up of single silicon 484 equally, as in the p type or the n type of the example of icon.
Insulation extension divides 486 to be formed at n-semiconductor-on-insulator zone according to a kind of deep trench isolation.Insulating regions 200 according to a kind of shallow isolating trough technology follow the outside that forms along n-semiconductor-on-insulator zone (on) surface is with qualification island portion 202 and 204.Use its shielding of photoresistance with the opening above island portion 202, being generally the p N-type semiconductor N dopant of being made up of aluminium is to be introduced into island portion 202 in the light diaphoretic prescription amount, and this light diaphoretic prescription amount is the p type conductivity of fully high all material with conversion island portion 202 as for low net concentration.When the p type doping of utilization aluminium with execution island portion 202, aluminium is that suitable rapid diffusion runs through island portion 202, makes it become even doped p type basically in the suitable short time.
Vertical bulk material dopant dose varied curve in the drain electrode below is inferior precipitous
IGFET is owing to the step level variation of bulk material concentration of dopant
The vertical dopant quantitative change curve in the drain electrode below of the asymmetric IGFET that is constituted according to the present invention can form super precipitous (hyperaburpt), and mode is to be different from it to have the concentration N that limits dopant in the conductivity-type of bulk material
TFrom the position of maximum trap portion concentration of dopant up to drain electrode and be reduced at least 10 times gradually.In particular, vertical dopant quantitative change curve in the below that drains can form inferior precipitous, by configuration pin for the bulk material of the below of drain electrode to comprise (a) drain electrode adjacent part, wherein, it is in uniform first concentration of major part that conductivity-type limits dopant; Reach the drain electrode remote portion that (b) directly places lower floor, wherein, it is in uniform second concentration of major part that conductivity-type limits dopant, and its conductivity-type of comparing the drain electrode adjacent part limits the concentration of dopant and significantly for bigger, is generally more at least 10 times.
So the concentration that conductivity-type limits dopant partly upwards sees through drain electrode in abutting connection with the bulk material part to drain electrode and experience step level reduces from the long-range bulk material of drain electrode, is reduced at least 10 times usually.Provide under the drain electrode of this second type the n passage IGFET of the asymmetry channel district doping characteristic of level abrupt dopant dosage varied curve and invention structure A or A ' to be summarised in this and be referred to as invention structure E.
Figure 67 general description is directed to that seeing through of the n passage IGFET that constitutes structure A/A ', B and E drains and to the vertical dopant quantitative change curve of lower floor's body regions.Comparatively in particular, be directed to each a kind of n passage IGFET of structure A/A ', B and E, as absolute concentration of dopant N along the function of the depth y that sees through the vertical line that drains
TVariation be shown in Figure 67.It is shown to be similar to Figure 56, along total p type concentration of dopant N of the vertical line of the drain electrode of the n passage IGFET that sees through structure E
TBe to depth y from the semiconductor-on-insulator surface
STAnd be in uniform concentration value N
B0, depth y
STBe to equal the depth y that drains
DAdd distance y
D0In from depth y
DTo depth y
STDrain electrode in abutting connection with bulk material part extended distance y
D0P type concentration of dopant N
TTherefore be N
B0Distance y
D0Be generally 0.05 to 1.0 micron, be generally 0.1 micron.
In depth y
ST, absolute concentration of dopant N
TForming the step level is varied to from N
B0And up to its greater than N
B0Value N
B1, it typically is greater than N
B0At least 10 times.Extend from depth y down in it
STThe concentration N of the long-range bulk material of drain electrode part
TBe in value N
B1, and surpass it outwards to certain degree of depth, do not have any significant impact in the interfacial characteristic of drain electrode-body in the concentration of the p of bulk material type dopant, particularly drain to the body capacitor C
DBBe with, in the concentration N of the p of bulk material type dopant
TBe in upwards striding across from its p type concentration of dopant N
TEqual N
B1The long-range bulk material of drain electrode part to its p type concentration of dopant N
TEqual N
B0Drain electrode form the step level in abutting connection with bulk material part and reduce (being generally at least 10 times) and then be maintained at N up to drain electrode-body interface
B0
Figure 68 a illustrates a kind of asymmetric n passage IGFET 500, and formation is specially adapted to simulation application at a high speed whereby to implement structure E according to the present invention for it.IGFET 500 is configured to substantially the same IGFET 170 in Figure 18 a, and the following degree skin section of being mixed by severe except: p type bulk material 108 divides 502 to extend to the surperficial adjacent part 504 in semiconductor-on-insulator surface with it and formed.P+ time top layer bulk material part 502 places the following of source electrode 102, drain electrode 104 and channel region 106.Inferior top layer bulk material part 502 top margins (top) are in the depth y of the below on semiconductor-on-insulator surface
STDepth y
STBe generally the drain electrode depth y that is no more than 10 times
D, be preferably and be no more than 5 times.In its most close source electrode 102 and drain electrode 104 parts, inferior top layer part 502 therefore compare source electrode 102 and drain electrode 104 for below the semiconductor-on-insulator surface, be generally be no more than 10 times dark, be preferably be no more than 5 times dark.
P type surface in abutting connection with bulk material part 504 be overlying on p+ top layer bulk material part 502 and for and its junction.Channel region 106 is surface parts in abutting connection with bulk material part 504.P+ bag portion 120 (comparing source electrode 102 for more shallow at this) also is the part of surface in abutting connection with bulk material part 504.Project 124 in Figure 68 a is the slight dopant material of surface in abutting connection with bulk material part 504, that is: the section of the part outside bag portion 120 504.
Surface below drain electrode 104 is presented in abutting connection with the p type dopant of the section of bulk material part 504 and is equaled N
B0Most of concentration uniformly.Be directed to concentration N
B0General value be 5 * 10
15Atom/cubic centimetre.Below the aforementioned section of bulk material part 504 and therefore the p type dopant of the section of the inferior top layer bulk material part 502 below drain electrode 104 is presented in and is equaled N on the surface
B1Most of evenly higher concentration.Value N
B1Be generally N
B0At least 10 times, be preferably N
B0At least 20 times, N more preferably
B0At least 40 times, be generally near N
B0100 times.
Figure 68 b illustrates that formation is in particular and is applicable to simulation application at a high speed with the another kind of asymmetric long n passage IGFET 510 of enforcement structure E according to the present invention for it.IGFET 510 is configured to be same as IGFET 500, except: being generally the inferior top layer electric insulation layer of mainly being made up of silica 512 is that contact time top layer bulk material part 502 is along its basal surface.In IGFET 510, from depth y
STPlace down to inferior top layer electric insulation layer 512 drain electrode 104 under the p type dopant major part of section of inferior top layer bulk material part 502 for evenly being doped in concentration N
B1
Figure 69 a, 70a and 71a explanation forms the concentration N of indivedual semiconductor dopants of the residue 124 of the bag portion 120 of bulk material part 504 of source electrode 102, drain electrode 104, inferior top layer bulk material part 502, surperficial adjacency and part 504 along its of vertical line 130,132,134 and 136
IAlong line 130,132,134 and 136 in zone 102,104,502,120 and 124 the total p type dopant and the total concentration N of n type dopant
TBe depicted in Figure 69 b, 70b and 71b.Figure 69 c, 70c and 71c describe the net doping agent concentration N along line 130,132,134 and 136
N
Curve/curved section 102 ', 102 in Figure 69 to 71 ", 102*, 104 ', 104 ", 104*, 120 ', 120 ", 120*, 124 ', 124 " have to be associated with and be similar to Fig. 8 to 10 meaning mentioned above respectively with 124*.Be meant along its of vertical line 130,132,134 and 136 in order to form time concentration N of the n type dopant of top layer bulk material part 502 in the curve 502 ' of Figure 69 a, 70a and 71a
I Curved section 502 in Figure 69 b, 70b and 71b " representative along line 130,132,134 and 136 in the concentration N of total n type dopant of inferior top layer part 502
TIn the curved section 502* of Figure 69 c, 70c and 71c be meant along line 130,132,134 and 136 in the concentration N of the clean n type dopant of part 502
N
With reference to figure 71a, IGFET 500 or 510 the p type dopant in bulk material 108 parts of drain electrode 104 below have two fundamental components, and it is called " below " p type dopant and " top " p type dopant at this.Indicated as curved section 502 ', below p type dopant is high fixed concentration N in inferior top layer bulk material part 502
B1Indicated as curve 124 ', top p type dopant is low fixed concentration N in the surface in abutting connection with the residue 124 of bulk material part 504
B0Top p type dopant also is present in drain electrode 104, as it is indicated to enter the extension of curve 124 ' of curve 104 ' institute's coverage area.
As mentioned above, high concentration value N
B1Be to be preferably N
B0At least 20 times, N more preferably
B0At least 40 times.Be with, in the concentration N of total p type dopant of bulk material 108 parts of drain electrode 104 below
TInferior precipitous reducing be to be preferably at least 20 times, more preferably at least 20 times.
What Figure 71 c showed is: as the combination representative by curved section 502* and 124*, in the concentration N of the clean p type dopant of bulk material 108 parts of the below of the drain electrode 104 of IGFET 500 or 510
NVertical change is the concentration N of total p type dopant that is similar to bulk material 108 parts of drain electrode 104 below
T, except: the concentration N of the clean p type dopant of bulk material 108 parts of the below of drain electrode 104
NIn the drain electrode depth y
D(that is: at drain electrode-body interface 112) drops to zero.As be same as aforesaid IGFET of the present invention, parasitic capacitance in inferior precipitous dopant dose varied curve reduction of bulk material 108 parts of the below of drain electrode 104 along the drain electrode-body interface 112 of IGFET500 or 510.The analog rate that improves thereby be achieved in IGFET 500 and 510.
Turn to vertical dopant profile, have in the curved section 502 ' and 124 ' of Figure 69 a and be essentially the shape that is same as Figure 71 a with reference to the below of the source electrode 102 of IGFET 500 or 510.Though curve 120 ' comes across Figure 69 a, total p type dopant of bulk material 108 parts of the below of source electrode 102 is in dividing other concentration N
B0With N
B1Below and top p type dopant form because in the example of Figure 68 a and 68b, p type bag portion 120 compares source electrode 102 for shallow.In Figure 69 b greater than the source electrode depth y
SThe build-up curve section 502 at degree of depth place " with 124 " and part, its be shaped as substantially the same in Figure 71 b greater than the drain electrode depth y
DThe build-up curve section 502 at degree of depth place "/124 " part.Be with, the concentration N of total p type dopant of bulk material 108 parts of the below of source electrode 102
TThe concentration N of total p type dopant of most of bulk material 108 parts for the below that is same as drain electrode 104
TAnd inferior precipitous formula changes.Therefore, the parasitic capacitance along source electrode-body interface 110 also reduces the progressive whereby simulated performance that strengthens IGFET 500 or 510.
The IGFET 100 that is similar to Fig. 6 takes place, and can be revised as in the p of IGFET 500 or 510 type bag portion 120 that to compare source electrode 102 darker for extending below the semiconductor-on-insulator surface with drain electrode 104.In this situation, cause the concentration N of total p type dopant of bulk material 108 parts of the below of source electrode 102 in the p of bag portion 120 type bag portion dopant
TTherefore, just to be some rising below source electrode-body interface 110 and below the bottom of source electrode 102, to be that some is greater than N just
B0The example of comparing Figure 68 a and 68b along the parasitic capacitance of source electrode-body interface 110 still still is reduction for high by suitably choosing of the doping that is directed to bag portion 120 and the degree of depth.This is similarly the simulated performance that strengthens IGFET 500 or 510.Comparing source electrode 102, to revise bag portion 120 more deeply be not have any great influence drain characteristics in IGFET 500 or 510 for extending with drain electrode 104 below the semiconductor-on-insulator surface, so be to be to drain 104 because be essentially no p type bag portion dopant.
Be applicable to the mixed-signal application and have and become in the step of bulk material concentration of dopant level
The complementary IGFET structure of the expansion of changing
Figure 72 a explanation according to the present invention formation construct with the another kind of complementary IGFET of the application that is specially adapted to mixed-signal.The complementary IGFET structure of Figure 72 a is formed by doped silicon material, such as: a kind of engagement type wafer.Extend along the silicon materials upper surface in the territory, patterning place 520 of insulating material, to limit the oss-divided semiconductor island portion of group, comprising: island portion 522 and 524.Two asymmetric long- channel IGFET 530 and 540 are the positions that are respectively formed at island portion 522 and 524 along the semiconductor-on-insulator surface.
It is the reverse a kind of p CU channel unit that constitutes that IGFET 540 is essentially the n passage IGFET 500 and the conductivity-type that are same as Figure 68 b.Therefore IGFET 540 has the severe doped p type source electrode 562 and slight doped p type drain electrode 564 that the channel region 566 by n type bulk material 568 is separated, and the following degree skin section that bulk material 568 is mixed by severe divides 572 to extend to the surperficial adjacent part 574 in semiconductor-on-insulator surface with it and formed.Source electrode 562, drain electrode 564 are positioned at island portion 524 with channel region 566.
N type dopant in inferior top layer bulk material part 572 is to be present in most of uniform concentration N
B0'.In the surface of drain electrode 564 below in abutting connection with the n type dopant of the section of bulk material part 574 for being present in it greater than N
B0' most of uniform concentration N
B1' this section.Be similar to concentration N
B1With N
B0, concentration N
B1' be generally N
B0' at least 10 times, be preferably N
B0' at least 20 times, N more preferably
B0' at least 40 times, be generally N
B0' near 100 times.Bulk material 568 parts in drain electrode 564 below, therefore IGFET 540 has to summarize and is same as the inferior abrupt dopant dosage varied curve of IGFET 530 haves in the character of bulk material 108 parts of the below of drain electrode 104.The vertical dopant quantitative change curve of IGFET 540 in bulk material 568 parts of the below of source electrode 562 be similarly quite be similar to IGFET 530 in the vertical dopant quantitative change curve of bulk material 108 parts of the below of source electrode 102.Be with, IGFET 540 has along the parasitic capacitance of its drain electrode-body and the interfacial reduction of source electrode-body.
A kind of variation of the complementary IGFET structure of Figure 72 b key diagram 72a.In the variation of Figure 72 b, an insulating regions 520 is provided with it and arrives time electric insulation extension 590 of the ditch formula that is generally of top layer insulating barrier 512.It is the inferior top layer bulk material part 502 of lateral circular IGFET 530 that insulating regions 520 and insulation extension divide 590 combination.This is the dielectric cleaning lateral isolation with IGFET 530 and 540 each other.
Can be reverse in the conductivity-type that the complementary IGFET of Figure 72 a and 72b constructs.Be＜110〉n type list silicon so be respectively corresponding to the n type bulk material that causes and the n-lower semiconductor layer of p type bulk material 108 with p-lower semiconductor layer 550.P type bulk material corresponding to n type bulk material 568 is＜110〉p type list silicon.
Another variation of the complementary IGFET structure of Figure 72 c depiction 72a.It is a kind of to change that the complementary IGFET of Figure 72 d depiction 72b constructs.In the variation of Figure 72 c and 72d, by slight doping＜110〉lower semiconductor layer formed of n type list silicon 592 replaces p-lower semiconductor layer 550.In the complementary IGFET of Figure 72 c and 72d structure, the n type bulk material 568 that is directed to p passage IGFET 540 forms by＜110〉n type list silicon but not is＜100〉n type list silicon.In the complementary IGFET structure of Figure 72 c and 72d, the p type bulk material 108 that is directed to n passage IGFET 530 continues as＜100〉p type list silicon.
Can be reverse in the conductivity-type that the complementary IGFET of Figure 72 c and 72d constructs.In this situation, the p type bulk material that causes and the p-lower semiconductor layer that are respectively corresponding to n type bulk material 568 and n-lower semiconductor layer 592 are＜100〉p type list silicon.N type bulk material corresponding to p type bulk material 108 is＜110〉n type list silicon.
Have in the complementary IGFET structure of the expansion of the step of bulk material concentration of dopant level variation
The manufacturing of making
The complementary IGFET structure of Figure 72 a is to make in following mode according to the present invention.A kind of structure at first provides, wherein: (a) by high uniform concentration N
B1Severe mix＜inferior top layer semiconductor regions that 100〉p type list silicon are formed is in abutting connection with the electric insulation layer on inferior top layer, (b) by low uniform concentration N
B0Slight doping＜semiconductor regions of the surface adjacency that 100〉p type list silicon are formed in abutting connection with and be overlying on time top layer semiconductor regions, and (c) by slight doping＜lower semiconductor layer that 100〉p type list silicon are formed in abutting connection with and following for the insulating barrier that places time top layer.Slight lower semiconductor layer of mixing constitutes p-lower semiconductor layer 550.
This initial construction can form, for example: form time insulating material of top layer insulating barrier so that two semiconductor crystal wafers have been bonded on by seeing through it.The slight doping with its formation lower semiconductor layer 550 of this wafer＜100〉p type list silicon substrates.Another wafer has it and evenly is doped in concentration N respectively basically
B1With N
B0Severe mix＜100〉p type list silicon substrates and the slight doping in upper strata＜100〉p type list silicon epitaxy layers, to form the semiconductor regions of this time top layer semiconductor regions and surperficial adjacency respectively.
Insulating regions 520 form along the semiconductor regions of p-surface adjacency outer (on) surface, be directed to the island portion 522 of IGFET 530 and the position that qualification is directed to the island portion 524 of IGFET 540 with qualification.Insulating regions 520 can partly extend to the semiconductor regions through p-surface adjacency, make in Figure 72 a shown finish after complementary IGFET structure, an insulation 520 extends to the bulk material part 504 that is deep to (but seeing through fully) p type surface adjacency.Substitute, an insulation 520 is extensible be to see through the semiconductor regions of p-surface adjacency fully and partly to p+ top layer semiconductor regions of lower floor.Partly constitute forerunner in the semiconductor regions of the p-of island portion 522 surface adjacency for the bulk material part 504 of p type surface adjacency.The underclad portion of p+ top layer semiconductor regions constitutes top layer bulk material part 502 basically p+ time.
In the position that is directed to island portion 524, chamber portion form to see through p-surface adjacency semiconductor regions, see through the lower layer section of p+ top layer semiconductor regions and see through time more lower layer section of top layer insulating barrier and court down to p-lower semiconductor layer 550.The remainder of inferior top layer insulating barrier constitutes time top layer insulating barrier 512.The severe doping＜100〉n type list silicon are in uniform concentration N
B1' and epitaxial growth in the exposed length like this of lower semiconductor layer 550, to form top layer bulk material part 572 basically n+ time.Slight doping＜100〉n type list silicon are in uniform concentration N
B0' and epitaxial growth in the inferior top layer of chamber portion part 572, to form forerunner for the bulk material part 574 of n type surface adjacency.Bulk material part 572 forms island portion 524 with forerunner for bulk material part 574.
The complementary IGFET that the complementary IGFET structure of Figure 72 b is same as Figure 72 a constructs and the manufacturing according to the present invention, except: the insulation extension for field insulating regions 520 divides 590 to be to be formed at the top layer semiconductor regions p+ time in forming a process of insulation 520.
The complementary IGFET structure of Figure 72 c and 72d is respectively the complementary IGFET structure that is same as Figure 72 a and 72b and the manufacturing according to the present invention, except: by slight doping＜lower semiconductor layer that 110〉n type list silicon are formed is a replacement p-lower semiconductor layer 550.Slight lower semiconductor layer of mixing is a n-lower semiconductor layer 592.Can be forming in order to the same way as of the initial construction of the complementary IGFET structure that forms Figure 72 a or 72b in order to the initial construction of the complementary IGFET structure that forms Figure 72 c or 72d as it, except: at first the wafer of Miao Shuing have slight doping＜110〉n type list silicon substrates but not for slight doping＜100〉p type list silicon substrates.
In addition, form chamber portion for the semiconductor regions that sees through p-surface adjacency, the lower layer section that sees through p+ top layer semiconductor regions, and see through time more lower layer section of top layer insulating barrier towards after n-lower semiconductor layer 592, the bulk material part 572 on n+ top layer is as being in concentration N
B1' severe mix＜110〉n type list silicon and epitaxial growth in the lower semiconductor layer 592 of chamber portion.For the forerunner of the bulk material part 574 of n-surface adjacency then as be in concentration N
B0' slight doping＜100 n type list silicon and epitaxial growth be in n+ top layer part 572 of chamber portion.
Change
Although the present invention describes about specific embodiment, this explanation only for the purpose of illustration and for not constituting to limit category of the present invention, it is advocated by following claim.For example, be other semi-conducting material to substitute in semiconductor body and/or silicon in gate electrode 128,288,328,368 and 588.Replacement candidates comprises: germanium, sige alloy, and such as the alloy of the 3a family-5a family of arsenic germanium.
Metal silicide layer can be provided as along the IGFET 530 of the complementary IGFET structure of Figure 72 a to 72d and 540 source electrode 102 and 562, drain 104 and 564 and gate electrode 128 and 588 upper surfaces.The IGFET 530 of the complementary IGFET structure of the IGFET 210,220,230,240,380 that the complementary IGFET in Figure 29 and 30 constructs and 390 synthetic gate electrode 128/258,288/298,328/338,368/378 and/or Figure 72 a to 72d and 540 gate electrode 128/588 are to be substitutable for the gate electrode of being formed or being made up of metal silicide fully basically by metal fully basically, for example: cobalt silicide or nickle silicide, dopant is for being provided in silicide gate electrode to control its operational function.Therefore all modifications can be formed by those skilled in the art and do not broken away from real category of the present invention, as being to be defined in the claim of enclosing.
Claims (according to the modification of the 19th of treaty)
1. a structure comprises main field-effect transistor (FET), and it comprises:
The main thoroughfare district of main bulk material with the semiconductor body on semiconductor-on-insulator surface, this bulk material fully mixes the semiconductor dopant of first conductivity-type so that become first conductivity-type;
A pair of main source/drain (S/D) district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this channel region, and be second conductivity-type relative with first conductivity-type, the horizontal expansion below this S/D district of this bulk material, the concentration of the dopant of first conductivity-type in this bulk material reduces at least 10 times from main level top layer bulk material down moves to one of the appointment in this S/D district up, bulk material position, this time top layer is that to be no more than 10 times of this appointment S/D district dark below this semiconductor-on-insulator surface;
Main gate dielectric, it overlays on this channel region; And
Main gate electrode, it overlays on the gate dielectric of this channel region top.
2. structure according to claim 1, wherein, bulk material position, this time top layer is dark for being no more than 5 times of this appointment S/D district below this semiconductor-on-insulator surface.
3. structure according to claim 1 and 2, wherein, bulk material position, this time top layer major part is positioned at all respectively belows in this channel and S/D district.
4. structure according to claim 1 and 2, wherein, the concentration of the dopant of first conductivity-type of this bulk material moves to up this appointment S/D district from bulk material position, this time top layer and reduces at least 20 times.
5. structure according to claim 1 and 2, wherein, the concentration of the dopant of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should specify place, S/D district to locate low than the residue S/D district that joins along the semiconductor-on-insulator surface at this channel region.
6. structure according to claim 5, wherein, the concentration of the dopant of first conductivity-type of this bulk material is at least hanged down 10 times along semiconductor-on-insulator surface meeting should remain place, S/D district at this channel region should specify the S/D district to locate ratio along the surperficial meeting of semiconductor-on-insulator at this channel region.
7. structure according to claim 5, wherein, the concentration of the dopant of first conductivity-type of this bulk material is at least hanged down 20 times along semiconductor-on-insulator surface meeting should remain place, S/D district at this channel region should specify the S/D district to locate ratio along the surperficial meeting of semiconductor-on-insulator at this channel region.
8. structure according to claim 5, wherein, this specifies the S/D district to extend darker below this semiconductor-on-insulator surface than this residue S/D district.
9. structure according to claim 1 and 2, wherein, the concentration of the dopant of first conductivity-type of this bulk material moves to up from bulk material position, this time top layer and experiences stepping basically this appointment S/D district and reduce.
10. structure according to claim 1 and 2, wherein, each S/D district comprise main S/D part and with the slight horizontal expansion part of mixing of this main S/D partial continuous, this channel region is stopped by this horizontal expansion part along the semiconductor-on-insulator surface.
11. structure according to claim 1 and 2, wherein, this remaining S/D district comprise main S/D part and with the slight horizontal expansion part of mixing of this main S/D partial continuous, this channel region is partly stopped by this horizontal expansion of specifying S/D district and this to remain the S/D district along the semiconductor-on-insulator surface.
12. structure according to claim 11, wherein, each S/D area definition is that its semiconductor dopant along the semiconductor-on-insulator surface arrives maximum net concentration, and it specifies the S/D district than low in this residue S/D district at this.
13. structure according to claim 12, wherein, the maximum net concentration ratio of the dopant in this S/D district should hang down 20% in residue S/D district at least.
14. structure according to claim 1 and 2, wherein, each S/D district comprises main S/D part and slight below part of mixing, its be positioned at this main S/D part the below and with this main S/D partial continuous.
15. structure according to claim 1 and 2 further comprises the expansion FET of the identical polar of this main FET, this expansion FET comprises:
The expansion channel region that this bulk material is formed;
A pair of expansion S/D district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this expansion channel region, and form by second conductivity-type, the concentration of the dopant of first conductivity-type of this bulk material moves to each up and expands the S/D district basic fixed or change less than 10 times from expanding down bulk material position, level top layer, this expand down bulk material position, level top layer below this semiconductor-on-insulator surface with above-mentioned should main time bulk material position, top layer approximately equally deeply;
Expand gate dielectric, it is overlying on this expansion channel region; And
Expand control electrode, it is overlying on the expansion gate dielectric of this expansion channel region top.
16. structure according to claim 15, wherein:
The concentration of the dopant of first conductivity-type of this bulk material in this main thoroughfare district along meeting of semiconductor-on-insulator surface should specify place, main S/D district to locate low than the remaining main S/D district that joins along the semiconductor-on-insulator surface in this main thoroughfare district; And
The concentration of the dopant of first conductivity-type of this bulk material in this expansion channel region meeting should expand place, S/D district and locate approximately identical with another this expansion S/D district that joins at this expansion channel region.
17. structure according to claim 1 and 2 further comprises the additional FET of the opposite polarity of this main FET, this additional FET comprises:
The additional channel district that the additional bulk material of this semiconductor body is formed, this additional bulk material fully mixes the semiconductor dopant of second conductivity-type to become second conductivity-type;
A pair of additional S/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, by this additional channel district institute laterally separately, and be first conductivity-type, what the concentration that the dopant of second conductivity-type that should additional bulk material has moved to appointment up from additional bulk material position, level top layer down should reduce at least 10 times the additional S/D district, and it is dark that bulk material position, level top layer was no more than 10 times of additional S/D district of this appointment under this was additional below this semiconductor-on-insulator surface;
The additional gate dielectric layer, it is overlying in this additional channel district; And
The additional gate electrode, it is overlying on the additional gate dielectric layer of this top, additional channel district.
18. structure according to claim 17, wherein:
The concentration of the dopant of first conductivity-type of this main bulk material in this main thoroughfare district along meeting of semiconductor-on-insulator surface should specify place, main S/D district than in this main thoroughfare district along semiconductor-on-insulator surface meeting should remain main S/D district and locate low; And
The concentration of the dopant of second conductivity-type that should additional bulk material in this additional channel district along semiconductor-on-insulator surface meeting should specify place, additional S/D district than in this additional channel district along semiconductor-on-insulator surface meeting should residue is added the S/D district locates low.
19. structure according to claim 17 further comprises the 3rd FET of the identical polar of this main FET, the 3rd FET comprises:
The third channel district that this main bulk material is formed;
A pair of the Three S's/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, the district laterally separates by third channel, and be second conductivity-type, the concentration of the dopant of first conductivity-type of this main bulk material moves to each the Three S's/D district basic fixed up or changes less than 10 times from bulk material position, the 3rd time level top layer, bulk material position, the 3rd time level top layer below this semiconductor-on-insulator surface with above-mentioned should main time bulk material position, top layer approximately same dark;
The 3rd gate dielectric, it is overlying in the third channel district; And
The 3rd control electrode, it is overlying on the 3rd gate dielectric of top, third channel district.
Therefore 20. structure according to claim 19 further is included as the identical polar of this additional FET and is the 4th FET of the opposite polarity of this main FET, the 4th FET comprises:
Should add the four-way district of bulk material;
A pair of the 4th S/D district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, by four-way district institute laterally separately, and be first conductivity-type, the concentration of the dopant of second conductivity-type that should additional bulk material moves in each the 4th S/D district basic fixed up or changes less than 10 times from the 4th lower floor bulk material position, the 4th lower floor bulk material position below this semiconductor-on-insulator surface with above-mentioned should additional time bulk material position, top layer approximately equally deeply;
The 4th gate dielectric, it is overlying in the four-way district; And
The 4th gate electrode, it is overlying on the 4th gate dielectric of top, four-way district.
21. a structure comprises main field-effect transistor (FET), it comprises:
Have the main thoroughfare district that the main bulk material of the semiconductor body on semiconductor-on-insulator surface is formed, this bulk material is first conductivity-type;
A pair of main source/drain (S/D) district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this channel region, and be second conductivity-type relative with first conductivity-type, the main trap portion of this bulk material extends below this passage and S/D district, this trap portion is limited by the main semiconductor well portion dopant of first conductivity-type, make this trap portion compare this bulk material upper strata and underclad portion for to mix than severe, the concentration that this trap portion dopant has reaches the top layer maximum main time along be no more than 10 times of dark positions below the des in this S/D district, thereby the concentration of all dopants of first conductivity-type of this bulk material moves to up in the appointment S/D district from the peaked position, inferior top layer of the concentration of this trap portion dopant and reduces at least 10 times;
Main gate dielectric, it is overlying on this channel region; And
Main gate electrode, it is overlying on the gate dielectric of this channel region top.
22. structure according to claim 21, wherein, the peaked position, inferior top layer of the concentration of this trap portion dopant is no more than 5 times of this appointment S/D district below this semiconductor-on-insulator surface dark.
23. according to claim 21 or 2 described structures, wherein, the bag portion of this bulk material extends along this S/D district of residue, make progress to the channel region on this semiconductor-on-insulator surface to comprise part, this bag portion is limited by the semiconductor bag portion dopant of first conductivity-type, make adjacent part that this bag portion compares this bulk material for mixing than severe, the concentration of all dopants of first conductivity-type of this bulk material this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than at this channel region along the surperficial meeting of semiconductor-on-insulator should to remain S/D district part low.
24. structure according to claim 23, wherein, the concentration of all dopants of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
25. structure according to claim 23, wherein, this appointment S/D compares in the district this residue S/D district and extends darker below the semiconductor-on-insulator surface.
26. according to claim 21 or 2 described structures, further comprise the expansion FET of the identical polar of this main FET, this expansion FET comprises:
The expansion channel region of this bulk material;
A pair of expansion S/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this expansion channel region, and be second conductivity-type, the expansion trap portion of this bulk material extends in the below in this expansion passage and S/D district, this expansion trap portion is limited by the expansion semiconductor well portion dopant of first conductivity-type basically, make this expansion trap portion compare the underclad portion of this bulk material and be to mix than severe, the concentration that this expansion trap portion dopant has reaches along the position below this expansion passage and S/D district and expands time top layer maximum, makes the concentration of all dopants of second conductivity-type of this bulk material move to each up from this expansions time peaked position, top layer and expands in the S/D district variation less than 10 times;
Expand gate dielectric, it is overlying on this expansion channel region; And
Expand gate electrode, it is overlying on the expansion gate dielectric of this expansion channel region top.
27. a structure comprises main field-effect transistor (FET), it comprises:
Have the main thoroughfare district that is made up of the main bulk material of the semiconductor body on semiconductor-on-insulator surface, this bulk material fully mixes the semiconductor dopant of first conductivity-type to become first conductivity-type;
Main source/drain (S/D) is distinguished, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this channel region, and be second conductivity-type relative with first conductivity-type, this bulk material comprises (a) main top layer bulk material part, it places under this passage and the S/D district, and it is the darkest for being no more than 10 times in this S/D district below this semiconductor-on-insulator surface near this S/D district part at it, and it is (b) main surperficial in abutting connection with the bulk material part, it extends to this semiconductor-on-insulator surface, it contains this channel region, and its covering and meeting are should inferior top layer bulk material part, the concentration that the dopant of first conductivity-type of this bulk material has reduces from the step level that this time top layer bulk material part strides across to this surface in abutting connection with bulk material 10 times of most of experience in the part up at least, and further sees through this surface and move to up to keep in this appointments S/D district than this time top layer bulk material in abutting connection with the bulk material part and partly hang down at least 10 times;
Main gate dielectric, it is overlying on this channel region; And
Main gate electrode, it is overlying on the gate dielectric of this channel region top.
28. structure according to claim 27, wherein, bulk material part in this time top layer is the darkest for being no more than 5 times in this S/D district below this semiconductor-on-insulator surface near this S/D district part at it.
29. according to claim 27 or 28 described structures, wherein, the concentration of the dopant of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should to specify S/D district part lower than remaining this S/D district part at this channel region along the junction of semiconductor-on-insulator surface.
30. structure according to claim 29, wherein, the concentration of the dopant of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
31. according to claim 27 or 28 described structures, wherein, it is fixing basically that the concentration of the dopant of first conductivity-type runs through this time top layer bulk material part.
32. according to claim 27 or 28 described structures, further comprise the additional FET of the opposite polarity of this main FET, this additional FET comprises:
The additional channel district that the additional bulk material of this semiconductor body is formed, this additional materials fully mixes the semiconductor dopant of second conductivity-type to become second conductivity-type;
A pair of additional S/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this additional channel district, and be first conductivity-type, should comprise (a) additional top layer bulk material part by additional bulk material, it places under this additional channel and the S/D district, and its most approaching this additional S/D district part extends not more than this 10 times in additional S/D district below this semiconductor-on-insulator surface dark, and (b) additional surface in abutting connection with the bulk material part, it extends to this semiconductor-on-insulator surface, it contains this additional channel district, and its covering and meeting are should additional top layer bulk material part, the concentration that the dopant of second conductivity-type that should additional bulk material has from should additional time the top layer bulk material part step level that strides across to this additional surface in abutting connection with bulk material at least 10 times of most of experience in the part up reduce, and further move to up in abutting connection with the bulk material part to keep in the additional S/D district of this appointments and partly hang down 10 times at least than this additional top layer bulk material from this additional surface;
The additional gate dielectric layer, it is overlying in this additional channel district; And
The additional gate electrode, it is overlying on this additional gate dielectric layer of this top, additional channel district.
33. structure according to claim 32, wherein:
The concentration of the dopant of first conductivity-type of this main bulk material in this main thoroughfare district along meeting of semiconductor-on-insulator surface should specify main S/D district part to compare in this main thoroughfare district should to remain main S/D district part low along the surperficial meeting of semiconductor-on-insulator; And
The concentration of the dopant of second conductivity-type that should additional bulk material in this additional channel district along semiconductor-on-insulator surface meeting should specify additional S/D district part than in this additional channel district along semiconductor-on-insulator surface meeting should remain that to add S/D district part low.
34. structure according to claim 32, wherein:
It is fixing basically that the concentration of the dopant of first conductivity-type runs through this main top layer bulk material part; And
It is fixing basically that the concentration of the dopant of second conductivity-type runs through this additional top layer bulk material part.
35. a method comprises:
First semiconductor dopant of introducing first conductivity-type is directed to the main trap portion of first conductivity-type of main field-effect transistor (FET) with qualification to semiconductor body;
Provide main gate electrode become the section of this semiconductor body of main channel region of first conductivity-type in intention above, and separate with this section is vertical by main grid dielectric material;
First semiconductor dopant of introducing second conductivity-type opposite with first conductivity-type is to this semiconductor body, to form a pair of main source/drain (S/D) district by oss-divided second conductivity-type of this channel region; And
Carry out additional treatments to finish the manufacturing of this FET, make (a) this semiconductor body have the semiconductor-on-insulator surface, (b) this channel region and trap portion are the part person of the main bulk material of first conductivity-type and the below that extends laterally at this S/D district, and (c) first dopant of first conductivity-type has concentration, it moves to the des in this S/D district up and is reduced at least 10 times from main lower floor time bulk material position, top layer, and bulk material position, this time top layer is that to be no more than 10 times of this appointment S/D district dark below this semiconductor-on-insulator surface.
36. method according to claim 35, wherein, introduce first dopant of first conductivity-type and carry out additional treatments, this processing is carried out under the following conditions: it makes the concentration of first dopant of first conductivity-type be moved upward in this appointment S/D district from bulk material position, this time top layer to reduce at least 10 times.
37. according to claim 35 or 36 described methods, wherein, bulk material position, this time top layer is dark for being no more than 5 times in this appointment S/D district below this semiconductor-on-insulator surface.
38. according to claim 35 or 36 described methods, wherein, the concentration of first dopant of first conductivity-type moves to up in this appointment S/D district from bulk material position, this time top layer and reduces at least 20 times.
39., further comprise according to claim 35 or 36 described methods:
Second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, extend upwardly to the upper surface that it has existed bag portion is defined as along this residue S/D district, make after the action of carrying out additional treatments, (a) this bag portion constitutes the part of this bulk material, and the adjacent part of comparing this bulk material is for mixing than severe, and (b) first conductivity-type of this bulk material all dopants this channel region along semiconductor-on-insulator surface meeting should specify S/D district part have than at this channel region along the surperficial meeting of semiconductor-on-insulator should remain the low concentration of S/D district's part.
40. according to the described method of claim 39, wherein, after the action of carrying out additional treatments, the concentration of all dopants of first conductivity-type of this bulk material at this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
41. method according to claim 35, further comprise: second semiconductor dopant of introducing first conductivity-type is to this main bulk material, to limit the forerunner top bulk material part of first conductivity-type, this forerunner's bulk material partly is overlying in this trap portion.
42. according to claim 35 or 36 described methods, wherein:
The part of this semiconductor body (a) because directly follow after the action of first semiconductor dopant of introducing first conductivity-type is overlying in this trap portion, so and (b) be second conductivity-type; And
The part of first dopant of first conductivity-type diffuses to the aforementioned part of this semiconductor body up during carrying out additional treatments so that in fact all above-mentioned semiconductor bodies parts after the action of first dopant of introducing first conductivity-type, can significantly not be subjected to first or second conductivity-type other doping influence and be converted to first conductivity-type.
43. according to claim 35 or 36 described methods, wherein, the action of introducing first semiconductor dopant of second conductivity-type comprises:
The horizontal expansion part semiconductor dopant of introducing second conductivity-type sees through opening in the horizontal expansion partly shielding effect, see through the upper surface that this semiconductor body exists at that time, a pair of oss-divided major part that enters this semiconductor body, uses this horizontal expansion partly shielding effect, this gate electrode and shields as dopant blocking along any material of this gate electrode;
The cross side of spacer material to this gate electrode is provided; And
The major part semiconductor dopant of introducing second conductivity-type sees through opening in the major part shielding, see through the upper surface that this semiconductor body exists at that time, a pair of oss-divided expansion part that enters this semiconductor body, uses this major part shielding, this gate electrode and this spacer material to shield as dopant blocking.
44. according to claim 35 or 36 described methods, wherein, the action of introducing first semiconductor dopant of second conductivity-type comprises:
Carry out that following person (a) is introduced into this semiconductor body with major part dosage with the major part semiconductor dopant of second conductivity-type and to the major part mean depth of the below of the upper surface that exists at that time of this semiconductor body, and (b) the below part semiconductor dopant of second conductivity-type is introduced into this semiconductor body and to the below part mean depth of the below of the upper surface that exists at that time of this semiconductor body in below part dosage, this major part dosage is greater than below part dosage, and this below part mean depth is greater than the major part mean depth; And
Carry out another and introduce this major part and below part dopant, make this major part dopant limit a pair of oss-divided main S/D part that is respectively this S/D district, make this below part dopant limit a pair of oss-divided below S/D part that is respectively this S/D district, make this below S/D partly compare this main S/D partly place for more slightly mixing, being respectively this main S/D partly under and be respectively vertical continuous in this main S/D part.
45. according to claim 35 or 36 described methods, wherein:
The action of introducing first dopant of first conductivity-type comprises: additional first semiconductor dopant of introducing first conductivity-type is to this semiconductor body, to limit the expansion trap portion with first conductivity-type identical polar of this main FET, that be used to expand FET;
Gate electrode provides action to comprise: the expansion gate electrode is provided, and it becomes in intention above the section of this semiconductor body of expansion channel region of first conductivity-type and by expanding grid dielectric material it is vertically separated;
The action of introducing first dopant of second conductivity-type comprises: expansion first semiconductor dopant of introducing second conductivity-type is to this semiconductor body, with form by this expand channel region a pair of expansion S/D district of oss-divided second conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of this expansion FET, making this expansion channel region is the part of this bulk material with expanding trap portion, this bulk material extends in the below in this expansion S/D district, and the concentration that expansion first dopant that makes first conductivity-type has moves to each up and expands in the S/D district basic fixed or change less than 10 times from expanding down bulk material position, level top layer, this expand down bulk material position, level top layer below this semiconductor-on-insulator surface with above-mentioned should the about identical degree of depth in main time bulk material position, top layer.
46. according to claim 35 or 36 described methods, wherein:
This kind method comprises: second semiconductor dopant of introducing second conductivity-type to semiconductor body to limit the additional trap portion with second conductivity-type opposite polarity of this main FET, that be used for adding FET;
Gate electrode provides action to comprise: the additional gate electrode is provided, and it becomes above the section of this semiconductor body in additional channel district of second conductivity-type and by the additional gate dielectric material with it vertically separately in intention;
This kind method further comprises: second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, with form by this additional channel district a pair of additional S/D district of oss-divided second conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of this additional FET, making this additional channel district and additional trap portion is the part of additional bulk material, should additional bulk material be second conductivity-type and the below that extends in this additional S/D district, and the concentration that second dopant that makes second conductivity-type has moves to up from additional bulk material position, level top layer down in the additional S/D district of this appointment and reduces at least 10 times, and this additional bulk material position, level top layer down is that to be no more than 10 times in the additional S/D district of this appointment dark below this semiconductor-on-insulator surface.
47. according to the described method of claim 46, wherein:
The action of introducing first dopant of first conductivity-type comprises: expansion first semiconductor dopant of introducing first conductivity-type is to this semiconductor body, with limit with in the triple-well portion of first conductivity-type identical polar, that be used for the 3rd FET of this main FET;
Gate electrode provides action to comprise: the 3rd gate electrode is provided, and it becomes above the section of this semiconductor body of the 3rd channel region of first conductivity-type and by the 3rd grid dielectric material with it vertically separately in intention;
The action of introducing first dopant of second conductivity-type comprises: expansion first semiconductor dopant of introducing second conductivity-type is to this semiconductor body, with form by the third channel district a pair of the Three S's/D district of oss-divided second conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of the 3rd FET, making the 3rd channel region and triple-well portion is the part of this main bulk material, this main bulk material extends in the below in this Three S's/D district, and the concentration that expansion first dopant that makes first conductivity-type has moves in each the Three S's/D district basic fixed up or changes less than 10 times from bulk material position, the 3rd time level top layer, bulk material position, the 3rd time level top layer below this semiconductor-on-insulator surface with above-mentioned should main time bulk material position, top layer the about identical degree of depth.
48. according to the described method of claim 47, wherein:
The action of introducing second dopant of second conductivity-type comprises: expansion second semiconductor dopant of introducing second conductivity-type is to this semiconductor body, with the identical polar that limits and should additional FET and therefore with the 4th trap portion of second conductivity-type this main FET opposite polarity, that be used for the 4th FET;
The action that gate electrode provides comprises: the 4th gate electrode is provided, and it becomes above the section of this semiconductor body of the 4th channel region of second conductivity-type and by the 4th grid dielectric material with it vertically separately in intention;
The action of introducing second dopant of first conductivity-type comprises: expansion second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, with form by the four-way district a pair of the 4th S/D district of oss-divided first conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of the 4th FET, making the 4th channel region and the 4th trap portion is the part of this additional bulk material, should add the below that bulk material extends in the 4th S/D district, and the concentration that expansion second dopant that makes second conductivity-type has moves in each the 4th S/D district basic fixed up or changes less than 10 times from bulk material position, the 4th time level top layer, bulk material position, the 4th time level top layer below this semiconductor-on-insulator surface with the about identical degree of depth in above-mentioned additional time bulk material position, top layer.
49. a method comprises:
First semiconductor dopant of introducing first conductivity-type is directed to the trap portion of first conductivity-type of field-effect transistor (FET) with qualification to semiconductor body, the part (a) of this semiconductor body is directly followed after the action of first dopant of introducing first conductivity-type be overlying in this trap portion, so and (b) be second conductivity-type opposite with first conductivity-type;
Gate electrode is provided, and it becomes above the section of this semiconductor body of channel region of first conductivity-type and by grid dielectric material with it vertically separately in intention;
First semiconductor dopant of introducing second conductivity-type is to this semiconductor body, distinguishes to form by a pair of source/drain (S/D) of oss-divided second conductivity-type of this channel region institute; And
Carry out additional treatments to finish the manufacturing of this FET, make the part of first dopant of first conductivity-type during the action of carrying out additional treatments, diffuse to the aforementioned part of this semiconductor body up so that in fact all above-mentioned semiconductor bodies parts after the action of first dopant of introducing first conductivity-type, can significantly not be subjected to first or second conductivity-type other doping influence and be converted to first conductivity-type.
50. according to the described method of claim 49, wherein, the action of introducing first dopant of first conductivity-type comprises: ion is implanted first dopant of first conductivity-type.
51. according to claim 49 or 50 described methods, wherein, diffusion up during at least one part of this additional treatments that the aforementioned part of first dopant of first conductivity-type is at high temperature carried out.
52., further comprise according to claim 49 or 50 described methods:
Second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, to limit bag portion for extend upwardly to the upper surface that it exists at that time along remaining this S/D district, make after the action of carrying out additional treatments, (a) this semiconductor body has the semiconductor-on-insulator surface, (b) this channel region and trap portion are the bulk material part of first conductivity-type and the below that extends laterally at this S/D district, (c) this bag portion constitutes the part of this bulk material and compares the adjacent part of this bulk material and be to mix than severe, and (d) all dopants of first conductivity-type of this bulk material have this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than at this channel region along the surperficial meeting of semiconductor-on-insulator should remain the low concentration of S/D district's part.
53. according to the described method of claim 52, wherein, after the action of carrying out additional treatments, the concentration of all dopants of first conductivity-type of this bulk material at this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
54. according to claim 49 or 50 described methods, wherein, the action of introducing first semiconductor dopant of second conductivity-type comprises:
The horizontal expansion part semiconductor dopant of introducing second conductivity-type uses this horizontal expansion partly shielding effect, this gate electrode to reach along any material of this gate electrode and shield as dopant blocking through the opening in the horizontal expansion partly shielding effect, through the upper surface that exists at that time of this semiconductor body and a pair of oss-divided major part that enters this semiconductor body;
The cross side of spacer material to this gate electrode is provided; And
The major part semiconductor dopant of introducing second conductivity-type sees through opening in the major part shielding, see through the upper surface that exists at that time of this semiconductor body and to a pair of oss-divided expansion part of this semiconductor body, use this major part shielding, this gate electrode and this spacer material to shield as dopant blocking.
55. a method comprises:
Initial construction is provided, wherein, (a) the inferior top layer semiconductor regions of first conductivity-type in abutting connection with and be overlying on time top layer electric insulation layer, (b) the slight surperficial adjacent semiconductor zone of mixing of first conductivity-type in abutting connection with and be overlying on the semiconductor regions of this time top layer, (c) this semiconductor regions dopant of first conductivity-type that mixes, the dopant of first conductivity-type is had from this time top layer semiconductor regions strides across to this adjacent semiconductor zone, surface the concentration that the step level of at least 10 times of experience basically reduces up, and (d) lower semiconductor layer in abutting connection with and place insulating barrier below, this time top layer;
Form chamber portion and see through this semiconductor regions and this time top layer insulating barrier court down to this lower semiconductor layer, (a) remainder of this time top layer semiconductor regions constitutes main top layer bulk material part of first conductivity-type, and (b) remainder in this adjacent semiconductor zone, surface constitutes the main surface of the slight forerunner who mixes of first conductivity-type in abutting connection with the bulk material part;
The semi-conducting material of introducing second conductivity-type opposite with first conductivity-type is to this chamber portion, to produce additional the top layer bulk material part of (a) second conductivity-type, it extends down to this lower semiconductor layer to form PN junction, the forerunner's additional surface that reaches (b) the slight doping of second conductivity-type is in abutting connection with the bulk material part, the dopant of second conductivity-type of should additional semiconductor portions mixing, make the dopant of second conductivity-type have from should additional time top layer bulk material part stride across to this additional surface in abutting connection with bulk material in the part concentration that the step level of at least 10 times of experience basically reduces up; And
Provide a pair of main source/drain (S/D) of (a) second conductivity-type to distinguish in the main surface of this forerunner in the bulk material part and along its upper surface, make this main surface laterally separate this main S/D district in abutting connection with the main thoroughfare district of bulk material part, (b) a pair of additional S/D district of first conductivity-type in this forerunner's additional surface in abutting connection with bulk material the part in and along its upper surface, make the additional channel district of this additional bulk material part laterally separately should add the S/D district, (c) the main and additional gate dielectric layer above this main and additional channel district respectively, and (d) respectively above this main and additional channel district be somebody's turn to do mainly and above the additional gate dielectric layer mainly and the additional gate electrode.
56. according to the described method of claim 55, wherein:
It is approximately fixing that the concentration of the dopant of first conductivity-type runs through this main top layer bulk material part; And
It is approximately fixing that the concentration of the dopant of second conductivity-type runs through this additional top layer bulk material part.
57., further comprise according to the described method of claim 56:
The main semiconductor bag portion dopant that selectivity is introduced first conductivity-type to the main surface of this forerunner in abutting connection with the bulk material part, limiting the main bag portion that remains along this that main S/D district extends, this mainly bag portion compare this main bulk material partly adjacent material and be doped in first conductivity-type than severe; And
The additional semiconductor bag portion dopant that selectivity is introduced second conductivity-type to this forerunner's additional surface in abutting connection with the bulk material part, to limit additional bag portion along the additional S/D district extension of this residue, by this, this additional bag portion compare additional surface in abutting connection with bulk material partly adjacent material and be doped in second conductivity-type than severe.
58. according to each described method of claim 55 to 57, wherein:
Along should partly extending to the position that this specifies main S/D district by main top layer bulk material certainly, also low 10 times of this main top layer bulk material parts are compared in abutting connection with the concentration of the dopant of first conductivity-type of bulk material part in this main surface; And
Along should partly extending to the position that this appointment adds the S/D district by additional top layer bulk material certainly, this additional surface is compared this additional top layer bulk material part in abutting connection with the concentration of the dopant of second conductivity-type of bulk material part and is hanged down 10 times at least.
59. a method comprises:
Introduce the initial semi-conducting material part of the main dopant of first conductivity-type to second conductivity-type opposite with first conductivity-type, become the surface of first conductivity-type in abutting connection with main bulk material to change this parent material part person, this main dopant is had through the suitable uniform concentration of this main bulk material, and the remainder of this parent material constitutes the surface of second conductivity-type in abutting connection with additional bulk material;
The main trap portion dopant of introducing first conductivity-type to this main bulk material forming main trap portion, its position, inferior top layer at this main bulk material arrives the Cmax of this main trap portion;
The additional trap portion dopant of introducing second conductivity-type to should additional bulk material forming additional trap portion, its position, inferior top layer at this additional bulk material arrives the Cmax of this additional trap portion; And
Provide a pair of surface of (a) second conductivity-type to distinguish in this main bulk material part in abutting connection with main source/drain (S/D), make the main thoroughfare district of this main bulk material laterally separate this main S/D district, and all dopants that make first conductivity-type of this main bulk material have and are moved upward to this from the position of the Cmax of this main trap portion dopant and specify in the main S/D district and reduce at least 10 times concentration, (b) a pair of additional S/D district of first conductivity-type is in this additional bulk material, make the additional channel district of this additional bulk material laterally separately should add the S/D district, and all dopants that make second conductivity-type of this additional bulk material have and are moved upward to this appointments from the position of the Cmax of additional trap portion dopant that should additional bulk material and add in the S/D district and reduce at least 10 times concentration, (c) the main and additional gate dielectric layer above this main and additional channel district respectively, and (d) respectively above this main and additional channel district be somebody's turn to do mainly and above the additional gate dielectric layer mainly and the additional gate electrode.
60. according to the described method of claim 59, wherein:
This first and second conductivity-type is respectively p type and n type; And
The main dopant of this first conductivity comprises aluminium.
61. a semiconductor structure comprises:
There is the semiconductor dopant of first conductivity-type in the first and second bulk material zones with semiconductor body of upper surface, this bulk material region doping so that become this first conductivity-type; And
First and second districts of second conductivity-type opposite with this first conductivity-type are arranged in this semiconductor body, along its upper surface, thereby this first and second bulk materials zone respectively extend under this first and second district and respectively with their can and so that form respectively with this first and second districts formation, first and second PN junctions (a) each PN junction reach depth capacity below the upper surface at this body, (b) in two districts, exist the dopant of this first conductivity-type and the part, bulk material position, first and second top layers separately that concentration is laying respectively in this first and second bulk materials zone to reach the top layer Cmax first and second times, and horizontal expansion below this first and second district respectively, (c) this bulk material position, first and second top layers appears at the upper surface below of this body, be not more than 10 times of degree of depth of the depth capacity of this first and second PN junction respectively, and (d) this first conductivity-type this concentration of dopant (i) from this first time top layer bulk material position pass along selected first vertical line the upper surface that this first district arrives this body and be reduced by at least 10 times, (ii) from this for the first time bulk material position, top layer along this first vertical line to this first PN junction basic dull the minimizing, and (iii) from this second time top layer bulk material position pass this second district along selected second vertical line and upwards arrive at least one to the upper surface of this body and add inferior top layer Cmax.
62. according to the described structure of claim 61, wherein the concentration of this dopant of this first conductivity-type from this first time top layer bulk material position pass this first district to the upper surface of this body along this first vertical line and be reduced by at least 20 times.
63. according to the described structure of claim 61, wherein the concentration of this dopant of this first conductivity-type from this first time top layer bulk material position pass this first district along this first vertical line and to the upper surface of this body, be reduced by at least 40 times.
64. according to each described structure of claim 61-63, wherein the concentration of this dopant of this first conductivity-type from this second time top layer bulk material position pass this second district along this second vertical line and upwards reduce to the upper surface of this body and be less than 10 times.
65. according to the described structure of claim 64, wherein the concentration of this dopant of this first conductivity-type is passed the most of monotone variation in degree of depth place of this first district each additional top layer Cmax in second district along this first vertical line.
66. according to each described structure of claim 61-63, wherein this first time the top layer Cmax be basically from this first time top layer bulk material position along this first vertical line down to the local time unique top layer maximum in the concentration of this dopant of this first conductivity-type 10 times of degree of depth of the depth capacity of this first PN junction.
67. structure, comprise similar polarity, along first and second field-effect transistors (FET) that the semiconductor dopant that is doped with first conductivity-type provides with the upper surface of the semiconductor body of the bulk material that becomes first conductivity-type, each FET comprises:
The channel region that this bulk material forms;
First and second source/drains (S/D) district, be arranged in this semiconductor body, along its upper surface, laterally separated by this channel region, and be second conductivity-type relative so that form separately PN junction with this bulk material with this first conductivity-type, thereby (a) each PN junction reaches depth capacity below the upper surface of this body, (b) this bulk material horizontal expansion below two S/D districts, (c) dopant of this first conductivity-type be present in two S/D districts and concentration major part all respectively below this passage and the S/D district the main time part, bulk material position, top layer of horizontal expansion reach main time top layer Cmax and (d) this main time bulk material position, top layer appear at the upper surface below of this body, be not more than 10 times of degree of depth of depth capacity of the PN junction in each S/D district;
Gate dielectric, it is overlying on this channel region; And
Gate electrode, it is overlying on the gate dielectric of this channel region top, wherein the concentration of this dopant of this first conductivity-type (i) is reduced by at least 10 times in this S/D district passing the appointment of a FET from the mainly time bulk material position, top layer of a FET along selected first vertical line to the upper surface of this body, (ii) reduce from the PN junction that is somebody's turn to do the main time S/D district of bulk material position, top layer along this first vertical line to the appointment of a FET of a FET is dull basically, thereby (iii) each additional top layer Cmax that should main time reach at least one additional time top layer Cmax the 2nd FET between the bulk material position, top layer of the upper surface of this body and the 2nd FET appears at the additional time bulk material position, top layer of horizontal expansion below all material of most of gate electrode at the 2nd FET, covers each at least a portion of its channel region and its S/D district.
68. according to the described structure of claim 67, wherein the concentration of this dopant of this first conductivity-type from a FET should main time the S/D district of passing the appointment of a FET along this first vertical line, bulk material position, top layer to the upper surface of this body, be reduced by at least 20 times.
69. according to the described structure of claim 67, wherein the concentration of this dopant of this first conductivity-type from a FET should main time bulk material position, top layer S/D district to upper surface of this body of passing the appointment of a FET along this first vertical line be reduced by at least 40 times.
70. according to each described structure of claim 67-69, wherein the concentration of this dopant of this first conductivity-type from the 2nd FET should main time the reduction to the upper surface of this body of arbitrary S/D district of passing the 2nd FET along selected second vertical line, bulk material position, top layer be less than 10 times.
71. according to the described structure of claim 70, wherein the concentration of this dopant of this first conductivity-type is along this first vertical line, in the most of monotone variation of the degree of depth of each additional top layer Cmax of the 2nd FET.
72. according to each described structure of claim 67-69, wherein main the top layer Cmax of a FET be basically from a FET should main time bulk material position, top layer along the unique local inferior top layer maximum 10 times the degree of depth of this first vertical line down to the depth capacity of the PN junction in the S/D district of the appointment of a FET, in the concentration of this dopant of first conductivity-type.
73. according to each described structure of claim 67-69, wherein each S/D district of each FET comprise major part and with this major part laterally continuous and below the gate electrode of this FET horizontal expansion, slight horizontal expansion portion of mixing, thereby its channel region is stopped by its horizontal expansion portion along the upper surface of this body.
74. according to each described structure of claim 67-69, wherein the bag portion of this bulk material of each FET extends into its channel region along its S/D district, and than the horizontal adjacent material of this bulk material than heavy doping.
75. according to the described structure of claim 74, wherein the bag portion of a FET makes that relative its S/D district of its channel region is asymmetric.
76. according to the described structure of claim 74, wherein another of this bulk material bag portion extends into its channel region along the 2nd S/D district of the 2nd FET, and than the horizontal adjacent material of this bulk material than heavy doping.
77. a method of making semiconductor structure, this method comprises:
The semiconductor dopant of first conductivity-type is introduced semiconductor body forming the first and second bulk material zones, thereby each bulk material zone is this first conductivity-type; And
The second conductivity-type semiconductor dopant that will be opposite with this first conductivity-type is introduced this semiconductor body to form first and second districts of this second conductivity-type respectively, thereby after the manufacturing of finishing this structure, (a) this first and second bulk materials zone forms first and second PN junctions and extension below this first and second district of wind with this first and second district respectively, (b) each PN junction extends to the depth capacity of this semiconductor body upper surface below, (c) semiconductor dopant of this first conductivity-type is present in two districts, (d) concentration that all these first conductivity-type semiconductor dopants have in this semiconductor body lay respectively at the neutralization of this first and second bulk material zone respectively below this first and second district the part, bulk material position, first and second top layers separately of horizontal expansion reach the top layer Cmax first and second times, (e) this bulk material position, first and second top layers appears at the upper surface below of this body, be not more than 10 times of degree of depth of the depth capacity of this first and second PN junction respectively, (f) concentration (i) of all these first conductivity-type dopants from this first time top layer bulk material position pass this first district to the upper surface of this body along selected first vertical line and be reduced by at least 10 times, (ii) from this for the first time bulk material position, top layer along this first vertical line to this first PN junction dull basically reduce and (iii) from this second time top layer bulk material position pass this second district along selected second vertical line and reach at least one to the upper surface of this body and add inferior top layer Cmax.
78. according to the described method of claim 77, wherein, after the manufacturing of finishing this mechanism, the concentration of the dopant of all these first conductivity-type from this second time top layer bulk material position upwards reduce along this second vertical line and be less than 10 times to the upper surface of this body.
79. according to claim 77 or 78 described methods, wherein, after the manufacturing of finishing this mechanism, the concentration of the dopant of all these first conductivity-type is along the most of monotone variation of the degree of depth that this first vertical line passes this first district, each adds inferior top layer Cmax in this second district.
80. according to claim 77 or 78 described structures, wherein, after the manufacturing of finishing this mechanism, this first time the top layer Cmax be basically from this first time top layer bulk material position along local time unique top layer maximum 10 times of degree of depth of this first vertical line down to the depth capacity of this first PN junction, in the concentration of this dopant of this first conductivity-type.
81. a manufacturing comprises the method for the structure of the first and second similar polarity field-effect transistors (FET), this method comprises:
Thereby the semiconductor dopant of first conductivity-type is introduced semiconductor body to form first and second bulk materials zone of this first and second FET respectively, and after the manufacturing of finishing this mechanism, each bulk material zone is this first conductivity-type;
Be respectively this FET and form a pair of gate electrode, thereby the gate electrode of the FET of each numbering is positioned at corresponding dielectric layer top and is separated by this dielectric layer, this dielectric layer comes the intention in the bulk material zone of self similarity numbering to become the part of the channel region of that FET; And
The semiconductor dopant of second conductivity-type relative with this first conductivity-type is introduced this semiconductor body and is thought that each FET forms the source/drain of a pair of second conductivity-type (S/D) district, it by the channel region of FET separately, thereby, after the manufacturing of finishing this mechanism, (a) bulk material zone of each numbering forms a pair of PN junction and each PN junction of horizontal expansion below this district (b) with the S/D district of the FET of similar numbering respectively and extends to depth capacity below this semiconductor body upper surface, (c) semiconductor dopant of first conductivity-type is present in each S/D district, (d) concentration that the semiconductor dopant of all first conductivity-type has in this semiconductor body, for a FET below the upper surface of this body, first main time bulk material position, top layer reaches the top layer Cmax first main time, for the 2nd FET, below the upper surface of this body, second main bulk material position, top layer reach the top layer Cmax second main time, (e) horizontal expansion and appearing at below the upper surface of this body below respectively this passage of the FET of main bulk material position, top layer major part this similar numbering of each numbering and the S/D district at all, be no more than 10 times of degree of depth of depth capacity of PN junction in each S/D district of that FET, (f) concentration of the dopant of all these first conductivity-type (i) S/D district passing the appointment of a FET along selected first vertical line from this first main bulk material position, top layer is reduced by at least 10 times to the upper surface of this body, (ii) dull basically reduction from this PN junction in that first main the S/D district of bulk material position, top layer along this first vertical line to the appointment of a FET, thereby (iii) between the upper surface of this body and this second main bulk material position, top layer, reach the additional time bulk material position, top layer that each additional top layer Cmax of at least one additional top layer Cmax appears at the horizontal expansion below the gate electrode of the 2nd FET of corresponding major part, cover at least a portion in its channel region and Qi Ge S/D district.
82. 1 described method according to Claim 8, wherein, after the manufacturing of finishing this mechanism, the reduction to the upper surface of this body of the concentration of the dopant of all these first conductivity-type is passed the 2nd FET from this second main bulk material position, top layer along selected second vertical line any S/D district is less than 10 times.
83. 1 described method or 82 according to Claim 8, wherein, after the manufacturing of finishing this mechanism, the concentration of the dopant of all these first conductivity-type is along this first vertical line, in the most of monotone variation of the degree of depth of each additional top layer Cmax of the 2nd FET.
84. 1 described method or 82 according to Claim 8, wherein this first main top layer Cmax be basically from this first main bulk material position, top layer along this first vertical line down to 10 times of degree of depth of the depth capacity of this PN junction in the S/D district of the appointment of a FET, the concentration of this dopant of this first conductivity-type unique local inferior top layer maximum.
85. 1 described method or 82 according to Claim 8, wherein the action major part of this this gate electrode of formation is carried out after the action of the dopant of introducing this first conductivity-type.
86. 1 described method or 82 is wherein introduced the action major part of the dopant of second conductivity-type and is carried out after the action that forms this gate electrode according to Claim 8.
87. 1 described method or 82 according to Claim 8, the action of wherein introducing the dopant of second conductivity-type makes each S/D district that must form each FET to comprise the horizontal expansion portion of the slight doping that major part and this major part are laterally continuous, and horizontal expansion below the gate electrode of that FET, thereby after the manufacturing of finishing this mechanism, this channel region of each FET is stopped by its horizontal expansion portion along the upper surface of this body.
88. 1 described method or 82 according to Claim 8, further comprise the additional dopant of first conductivity-type is introduced this semiconductor body, with so that the S/D district of the FET of this similar numbering of bag portion edge in the bulk material zone of each numbering extends into its channel region, and than the horizontal adjacent material in bulk material zone than heavy doping.
89. 8 described methods according to Claim 8, wherein the bag portion of a FET makes its channel region asymmetric about its S/D district.
90. 8 described methods according to Claim 8, wherein the action of the additional dopant of this first conductivity-type of this introducing makes another bag portion in this second bulk material zone extend into its channel region along the 2nd S/D district of the 2nd FET, and than the horizontal adjacent material in this second bulk material zone than heavy doping.
Claims (59)
1. a structure comprises main field-effect transistor (FET), and it comprises:
The main thoroughfare district of main bulk material with the semiconductor body on semiconductor-on-insulator surface, this bulk material fully mixes the semiconductor dopant of first conductivity-type so that become first conductivity-type;
A pair of main source/drain (S/D) district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this channel region, and be second conductivity-type relative with first conductivity-type, the horizontal expansion below this S/D district of this bulk material, the concentration of the dopant of first conductivity-type in this bulk material reduces at least 10 times from main level top layer bulk material down moves to one of the appointment in this S/D district up, bulk material position, this time top layer is that to be no more than 10 times of this appointment S/D district dark below this semiconductor-on-insulator surface;
Main gate dielectric, it overlays on this channel region; And
Main gate electrode, it overlays on the gate dielectric of this channel region top.
2. structure according to claim 1, wherein, bulk material position, this time top layer is dark for being no more than 5 times of this appointment S/D district below this semiconductor-on-insulator surface.
3. structure according to claim 1 and 2, wherein, bulk material position, this time top layer major part is positioned at all respectively belows in this channel and S/D district.
4. structure according to claim 1 and 2, wherein, the concentration of the dopant of first conductivity-type of this bulk material moves to up this appointment S/D district from bulk material position, this time top layer and reduces at least 20 times.
5. structure according to claim 1 and 2, wherein, the concentration of the dopant of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should specify place, S/D district to locate low than the residue S/D district that joins along the semiconductor-on-insulator surface at this channel region.
6. structure according to claim 5, wherein, the concentration of the dopant of first conductivity-type of this bulk material is at least hanged down 10 times along semiconductor-on-insulator surface meeting should remain place, S/D district at this channel region should specify the S/D district to locate ratio along the surperficial meeting of semiconductor-on-insulator at this channel region.
7. structure according to claim 5, wherein, the concentration of the dopant of first conductivity-type of this bulk material is at least hanged down 20 times along semiconductor-on-insulator surface meeting should remain place, S/D district at this channel region should specify the S/D district to locate ratio along the surperficial meeting of semiconductor-on-insulator at this channel region.
8. structure according to claim 5, wherein, this specifies the S/D district to extend darker below this semiconductor-on-insulator surface than this residue S/D district.
9. structure according to claim 1 and 2, wherein, the concentration of the dopant of first conductivity-type of this bulk material moves to up from bulk material position, this time top layer and experiences stepping basically this appointment S/D district and reduce.
10. structure according to claim 1 and 2, wherein, each S/D district comprise main S/D part and with the slight horizontal expansion part of mixing of this main S/D partial continuous, this channel region is stopped by this horizontal expansion part along the semiconductor-on-insulator surface.
11. structure according to claim 1 and 2, wherein, this remaining S/D district comprise main S/D part and with the slight horizontal expansion part of mixing of this main S/D partial continuous, this channel region is partly stopped by this horizontal expansion of specifying S/D district and this to remain the S/D district along the semiconductor-on-insulator surface.
12. structure according to claim 11, wherein, each S/D area definition is that its semiconductor dopant along the semiconductor-on-insulator surface arrives maximum net concentration, and it specifies the S/D district than low in this residue S/D district at this.
13. structure according to claim 12, wherein, the maximum net concentration ratio of the dopant in this S/D district should hang down 20% in residue S/D district at least.
14. structure according to claim 1 and 2, wherein, each S/D district comprises main S/D part and slight below part of mixing, its be positioned at this main S/D part the below and with this main S/D partial continuous.
15. structure according to claim 1 and 2 further comprises the expansion FET of the identical polar of this main FET, this expansion FET comprises:
The expansion channel region that this bulk material is formed;
A pair of expansion S/D district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this expansion channel region, and form by second conductivity-type, the concentration of the dopant of first conductivity-type of this bulk material moves to each up and expands the S/D district basic fixed or change less than 10 times from expanding down bulk material position, level top layer, this expand down bulk material position, level top layer below this semiconductor-on-insulator surface with above-mentioned should main time bulk material position, top layer approximately equally deeply;
Expand gate dielectric, it is overlying on this expansion channel region; And
Expand control electrode, it is overlying on the expansion gate dielectric of this expansion channel region top.
16. structure according to claim 15, wherein:
The concentration of the dopant of first conductivity-type of this bulk material in this main thoroughfare district along meeting of semiconductor-on-insulator surface should specify place, main S/D district to locate low than the remaining main S/D district that joins along the semiconductor-on-insulator surface in this main thoroughfare district; And
The concentration of the dopant of first conductivity-type of this bulk material in this expansion channel region meeting should expand place, S/D district and locate approximately identical with another this expansion S/D district that joins at this expansion channel region.
17. structure according to claim 1 and 2 further comprises the additional FET of the opposite polarity of this main FET, this additional FET comprises:
The additional channel district that the additional bulk material of this semiconductor body is formed, this additional bulk material fully mixes the semiconductor dopant of second conductivity-type to become second conductivity-type;
A pair of additional S/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, by this additional channel district institute laterally separately, and be first conductivity-type, what the concentration that the dopant of second conductivity-type that should additional bulk material has moved to appointment up from additional bulk material position, level top layer down should reduce at least 10 times the additional S/D district, and it is dark that bulk material position, level top layer was no more than 10 times of additional S/D district of this appointment under this was additional below this semiconductor-on-insulator surface;
The additional gate dielectric layer, it is overlying in this additional channel district; And
The additional gate electrode, it is overlying on the additional gate dielectric layer of this top, additional channel district.
18. structure according to claim 17, wherein:
The concentration of the dopant of first conductivity-type of this main bulk material in this main thoroughfare district along meeting of semiconductor-on-insulator surface should specify place, main S/D district than in this main thoroughfare district along semiconductor-on-insulator surface meeting should remain main S/D district and locate low; And
The concentration of the dopant of second conductivity-type that should additional bulk material in this additional channel district along semiconductor-on-insulator surface meeting should specify place, additional S/D district than in this additional channel district along semiconductor-on-insulator surface meeting should residue is added the S/D district locates low.
19. structure according to claim 17 further comprises the 3rd FET of the identical polar of this main FET, the 3rd FET comprises:
The third channel district that this main bulk material is formed;
A pair of the Three S's/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, the district laterally separates by third channel, and be second conductivity-type, the concentration of the dopant of first conductivity-type of this main bulk material moves to each the Three S's/D district basic fixed up or changes less than 10 times from bulk material position, the 3rd time level top layer, bulk material position, the 3rd time level top layer below this semiconductor-on-insulator surface with above-mentioned should main time bulk material position, top layer approximately same dark;
The 3rd gate dielectric, it is overlying in the third channel district; And
The 3rd control electrode, it is overlying on the 3rd gate dielectric of top, third channel district.
Therefore 20. structure according to claim 19 further is included as the identical polar of this additional FET and is the 4th FET of the opposite polarity of this main FET, the 4th FET comprises:
Should add the four-way district of bulk material;
A pair of the 4th S/D district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, by four-way district institute laterally separately, and be first conductivity-type, the concentration of the dopant of second conductivity-type that should additional bulk material moves in each the 4th S/D district basic fixed up or changes less than 10 times from the 4th lower floor bulk material position, the 4th lower floor bulk material position below this semiconductor-on-insulator surface with above-mentioned should additional time bulk material position, top layer approximately equally deeply;
The 4th gate dielectric, it is overlying in the four-way district; And
The 4th gate electrode, it is overlying on the 4th gate dielectric of top, four-way district.
21. a structure comprises main field-effect transistor (FET), it comprises:
Have the main thoroughfare district that the main bulk material of the semiconductor body on semiconductor-on-insulator surface is formed, this bulk material is first conductivity-type;
A pair of main source/drain (S/D) district, it is arranged in this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this channel region, and be second conductivity-type relative with first conductivity-type, the main trap portion of this bulk material extends below this passage and S/D district, this trap portion is limited by the main semiconductor well portion dopant of first conductivity-type, make this trap portion compare this bulk material upper strata and underclad portion for to mix than severe, the concentration that this trap portion dopant has reaches the top layer maximum main time along be no more than 10 times of dark positions below the des in this S/D district, thereby the concentration of all dopants of first conductivity-type of this bulk material moves to up in the appointment S/D district from the peaked position, inferior top layer of the concentration of this trap portion dopant and reduces at least 10 times;
Main gate dielectric, it is overlying on this channel region; And
Main gate electrode, it is overlying on the gate dielectric of this channel region top.
22. structure according to claim 21, wherein, the peaked position, inferior top layer of the concentration of this trap portion dopant is no more than 5 times of this appointment S/D district below this semiconductor-on-insulator surface dark.
23. according to claim 21 or 2 described structures, wherein, the bag portion of this bulk material extends along this S/D district of residue, make progress to the channel region on this semiconductor-on-insulator surface to comprise part, this bag portion is limited by the semiconductor bag portion dopant of first conductivity-type, make adjacent part that this bag portion compares this bulk material for mixing than severe, the concentration of all dopants of first conductivity-type of this bulk material this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than at this channel region along the surperficial meeting of semiconductor-on-insulator should to remain S/D district part low.
24. structure according to claim 23, wherein, the concentration of all dopants of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
25. structure according to claim 23, wherein, this appointment S/D compares in the district this residue S/D district and extends darker below the semiconductor-on-insulator surface.
26. according to claim 21 or 2 described structures, further comprise the expansion FET of the identical polar of this main FET, this expansion FET comprises:
The expansion channel region of this bulk material;
A pair of expansion S/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this expansion channel region, and be second conductivity-type, the expansion trap portion of this bulk material extends in the below in this expansion passage and S/D district, this expansion trap portion is limited by the expansion semiconductor well portion dopant of first conductivity-type basically, make this expansion trap portion compare the underclad portion of this bulk material and be to mix than severe, the concentration that this expansion trap portion dopant has reaches along the position below this expansion passage and S/D district and expands time top layer maximum, makes the concentration of all dopants of second conductivity-type of this bulk material move to each up from this expansions time peaked position, top layer and expands in the S/D district variation less than 10 times;
Expand gate dielectric, it is overlying on this expansion channel region; And
Expand gate electrode, it is overlying on the expansion gate dielectric of this expansion channel region top.
27.. a structure comprises main field-effect transistor (FET), it comprises:
Have the main thoroughfare district that is made up of the main bulk material of the semiconductor body on semiconductor-on-insulator surface, this bulk material fully mixes the semiconductor dopant of first conductivity-type to become first conductivity-type;
Main source/drain (S/D) is distinguished, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this channel region, and be second conductivity-type relative with first conductivity-type, this bulk material comprises (a) main top layer bulk material part, it places under this passage and the S/D district, and it is the darkest for being no more than 10 times in this S/D district below this semiconductor-on-insulator surface near this S/D district part at it, and it is (b) main surperficial in abutting connection with the bulk material part, it extends to this semiconductor-on-insulator surface, it contains this channel region, and its covering and meeting are should inferior top layer bulk material part, the concentration that the dopant of first conductivity-type of this bulk material has reduces from the step level that this time top layer bulk material part strides across to this surface in abutting connection with bulk material 10 times of most of experience in the part up at least, and further sees through this surface and move to up to keep in this appointments S/D district than this time top layer bulk material in abutting connection with the bulk material part and partly hang down at least 10 times;
Main gate dielectric, it is overlying on this channel region; And
Main gate electrode, it is overlying on the gate dielectric of this channel region top.
28. structure according to claim 27, wherein, bulk material part in this time top layer is the darkest for being no more than 5 times in this S/D district below this semiconductor-on-insulator surface near this S/D district part at it.
29. according to claim 27 or 28 described structures, wherein, the concentration of the dopant of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should to specify S/D district part lower than remaining this S/D district part at this channel region along the junction of semiconductor-on-insulator surface.
30. structure according to claim 29, wherein, the concentration of the dopant of first conductivity-type of this bulk material at this channel region along meeting of semiconductor-on-insulator surface should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
31. according to claim 27 or 28 described structures, wherein, it is fixing basically that the concentration of the dopant of first conductivity-type runs through this time top layer bulk material part.
32. according to claim 27 or 28 described structures, further comprise the additional FET of the opposite polarity of this main FET, this additional FET comprises:
The additional channel district that the additional bulk material of this semiconductor body is formed, this additional materials fully mixes the semiconductor dopant of second conductivity-type to become second conductivity-type;
A pair of additional S/D district, it is positioned at this semiconductor body along this semiconductor-on-insulator surface, laterally separate by this additional channel district, and be first conductivity-type, should comprise (a) additional top layer bulk material part by additional bulk material, it places under this additional channel and the S/D district, and its most approaching this additional S/D district part extends not more than this 10 times in additional S/D district below this semiconductor-on-insulator surface dark, and (b) additional surface in abutting connection with the bulk material part, it extends to this semiconductor-on-insulator surface, it contains this additional channel district, and its covering and meeting are should additional top layer bulk material part, the concentration that the dopant of second conductivity-type that should additional bulk material has from should additional time the top layer bulk material part step level that strides across to this additional surface in abutting connection with bulk material at least 10 times of most of experience in the part up reduce, and further move to up in abutting connection with the bulk material part to keep in the additional S/D district of this appointments and partly hang down 10 times at least than this additional top layer bulk material from this additional surface;
The additional gate dielectric layer, it is overlying in this additional channel district; And
The additional gate electrode, it is overlying on this additional gate dielectric layer of this top, additional channel district.
33. structure according to claim 32, wherein:
The concentration of the dopant of first conductivity-type of this main bulk material in this main thoroughfare district along meeting of semiconductor-on-insulator surface should specify main S/D district part to compare in this main thoroughfare district should to remain main S/D district part low along the surperficial meeting of semiconductor-on-insulator; And
The concentration of the dopant of second conductivity-type that should additional bulk material in this additional channel district along semiconductor-on-insulator surface meeting should specify additional S/D district part than in this additional channel district along semiconductor-on-insulator surface meeting should remain that to add S/D district part low.
34. structure according to claim 32, wherein:
It is fixing basically that the concentration of the dopant of first conductivity-type runs through this main top layer bulk material part; And
It is fixing basically that the concentration of the dopant of second conductivity-type runs through this additional top layer bulk material part.
35. a method comprises:
First semiconductor dopant of introducing first conductivity-type is directed to the main trap portion of first conductivity-type of main field-effect transistor (FET) with qualification to semiconductor body;
Provide main gate electrode become the section of this semiconductor body of main channel region of first conductivity-type in intention above, and separate with this section is vertical by main grid dielectric material;
First semiconductor dopant of introducing second conductivity-type opposite with first conductivity-type is to this semiconductor body, to form a pair of main source/drain (S/D) district by oss-divided second conductivity-type of this channel region; And
Carry out additional treatments to finish the manufacturing of this FET, make (a) this semiconductor body have the semiconductor-on-insulator surface, (b) this channel region and trap portion are the part person of the main bulk material of first conductivity-type and the below that extends laterally at this S/D district, and (c) first dopant of first conductivity-type has concentration, it moves to the des in this S/D district up and is reduced at least 10 times from main lower floor time bulk material position, top layer, and bulk material position, this time top layer is that to be no more than 10 times of this appointment S/D district dark below this semiconductor-on-insulator surface.
36. method according to claim 35, wherein, introduce first dopant of first conductivity-type and carry out additional treatments, this processing is carried out under the following conditions: it makes the concentration of first dopant of first conductivity-type be moved upward in this appointment S/D district from bulk material position, this time top layer to reduce at least 10 times.
37. according to claim 35 or 36 described methods, wherein, bulk material position, this time top layer is dark for being no more than 5 times in this appointment S/D district below this semiconductor-on-insulator surface.
38. according to claim 35 or 36 described methods, wherein, the concentration of first dopant of first conductivity-type moves to up in this appointment S/D district from bulk material position, this time top layer and reduces at least 20 times.
39., further comprise according to claim 35 or 36 described methods:
Second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, extend upwardly to the upper surface that it has existed bag portion is defined as along this residue S/D district, make after the action of carrying out additional treatments, (a) this bag portion constitutes the part of this bulk material, and the adjacent part of comparing this bulk material is for mixing than severe, and (b) first conductivity-type of this bulk material all dopants this channel region along semiconductor-on-insulator surface meeting should specify S/D district part have than at this channel region along the surperficial meeting of semiconductor-on-insulator should remain the low concentration of S/D district's part.
40. according to the described method of claim 39, wherein, after the action of carrying out additional treatments, the concentration of all dopants of first conductivity-type of this bulk material at this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
41. method according to claim 35, further comprise: second semiconductor dopant of introducing first conductivity-type is to this main bulk material, to limit the forerunner top bulk material part of first conductivity-type, this forerunner's bulk material partly is overlying in this trap portion.
42. according to claim 35 or 36 described methods, wherein:
The part of this semiconductor body (a) because directly follow after the action of first semiconductor dopant of introducing first conductivity-type is overlying in this trap portion, so and (b) be second conductivity-type; And
The part of first dopant of first conductivity-type diffuses to the aforementioned part of this semiconductor body up during carrying out additional treatments so that in fact all above-mentioned semiconductor bodies parts after the action of first dopant of introducing first conductivity-type, can significantly not be subjected to first or second conductivity-type other doping influence and be converted to first conductivity-type.
43. according to claim 35 or 36 described methods, wherein, the action of introducing first semiconductor dopant of second conductivity-type comprises:
The horizontal expansion part semiconductor dopant of introducing second conductivity-type sees through opening in the horizontal expansion partly shielding effect, see through the upper surface that this semiconductor body exists at that time, a pair of oss-divided major part that enters this semiconductor body, uses this horizontal expansion partly shielding effect, this gate electrode and shields as dopant blocking along any material of this gate electrode;
The cross side of spacer material to this gate electrode is provided; And
The major part semiconductor dopant of introducing second conductivity-type sees through opening in the major part shielding, see through the upper surface that this semiconductor body exists at that time, a pair of oss-divided expansion part that enters this semiconductor body, uses this major part shielding, this gate electrode and this spacer material to shield as dopant blocking.
44. according to claim 35 or 36 described methods, wherein, the action of introducing first semiconductor dopant of second conductivity-type comprises:
Carry out that following person (a) is introduced into this semiconductor body with major part dosage with the major part semiconductor dopant of second conductivity-type and to the major part mean depth of the below of the upper surface that exists at that time of this semiconductor body, and (b) the below part semiconductor dopant of second conductivity-type is introduced into this semiconductor body and to the below part mean depth of the below of the upper surface that exists at that time of this semiconductor body in below part dosage, this major part dosage is greater than below part dosage, and this below part mean depth is greater than the major part mean depth; And
Carry out another and introduce this major part and below part dopant, make this major part dopant limit a pair of oss-divided main S/D part that is respectively this S/D district, make this below part dopant limit a pair of oss-divided below S/D part that is respectively this S/D district, make this below S/D partly compare this main S/D partly place for more slightly mixing, being respectively this main S/D partly under and be respectively vertical continuous in this main S/D part.
45. according to claim 35 or 36 described methods, wherein:
The action of introducing first dopant of first conductivity-type comprises: additional first semiconductor dopant of introducing first conductivity-type is to this semiconductor body, to limit the expansion trap portion with first conductivity-type identical polar of this main FET, that be used to expand FET;
Gate electrode provides action to comprise: the expansion gate electrode is provided, and it becomes in intention above the section of this semiconductor body of expansion channel region of first conductivity-type and by expanding grid dielectric material it is vertically separated;
The action of introducing first dopant of second conductivity-type comprises: expansion first semiconductor dopant of introducing second conductivity-type is to this semiconductor body, with form by this expand channel region a pair of expansion S/D district of oss-divided second conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of this expansion FET, making this expansion channel region is the part of this bulk material with expanding trap portion, this bulk material extends in the below in this expansion S/D district, and the concentration that expansion first dopant that makes first conductivity-type has moves to each up and expands in the S/D district basic fixed or change less than 10 times from expanding down bulk material position, level top layer, this expand down bulk material position, level top layer below this semiconductor-on-insulator surface with above-mentioned should the about identical degree of depth in main time bulk material position, top layer.
46. according to claim 35 or 36 described methods, wherein:
This kind method comprises: second semiconductor dopant of introducing second conductivity-type to semiconductor body to limit the additional trap portion with second conductivity-type opposite polarity of this main FET, that be used for adding FET;
Gate electrode provides action to comprise: the additional gate electrode is provided, and it becomes above the section of this semiconductor body in additional channel district of second conductivity-type and by the additional gate dielectric material with it vertically separately in intention;
This kind method further comprises: second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, with form by this additional channel district a pair of additional S/D district of oss-divided second conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of this additional FET, making this additional channel district and additional trap portion is the part of additional bulk material, should additional bulk material be second conductivity-type and the below that extends in this additional S/D district, and the concentration that second dopant that makes second conductivity-type has moves to up from additional bulk material position, level top layer down in the additional S/D district of this appointment and reduces at least 10 times, and this additional bulk material position, level top layer down is that to be no more than 10 times in the additional S/D district of this appointment dark below this semiconductor-on-insulator surface.
47. according to the described method of claim 46, wherein:
The action of introducing first dopant of first conductivity-type comprises: expansion first semiconductor dopant of introducing first conductivity-type is to this semiconductor body, with limit with in the triple-well portion of first conductivity-type identical polar, that be used for the 3rd FET of this main FET;
Gate electrode provides action to comprise: the 3rd gate electrode is provided, and it becomes above the section of this semiconductor body of the 3rd channel region of first conductivity-type and by the 3rd grid dielectric material with it vertically separately in intention;
The action of introducing first dopant of second conductivity-type comprises: expansion first semiconductor dopant of introducing second conductivity-type is to this semiconductor body, with form by the third channel district a pair of the Three S's/D district of oss-divided second conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of the 3rd FET, making the 3rd channel region and triple-well portion is the part of this main bulk material, this main bulk material extends in the below in this Three S's/D district, and the concentration that expansion first dopant that makes first conductivity-type has moves in each the Three S's/D district basic fixed up or changes less than 10 times from bulk material position, the 3rd time level top layer, bulk material position, the 3rd time level top layer below this semiconductor-on-insulator surface with above-mentioned should main time bulk material position, top layer the about identical degree of depth.
48. according to the described method of claim 47, wherein:
The action of introducing second dopant of second conductivity-type comprises: expansion second semiconductor dopant of introducing second conductivity-type is to this semiconductor body, with the identical polar that limits and should additional FET and therefore with the 4th trap portion of second conductivity-type this main FET opposite polarity, that be used for the 4th FET;
The action that gate electrode provides comprises: the 4th gate electrode is provided, and it becomes above the section of this semiconductor body of the 4th channel region of second conductivity-type and by the 4th grid dielectric material with it vertically separately in intention;
The action of introducing second dopant of first conductivity-type comprises: expansion second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, with form by the four-way district a pair of the 4th S/D district of oss-divided first conductivity-type; And
The action of carrying out additional treatments comprises: finish the manufacturing of the 4th FET, making the 4th channel region and the 4th trap portion is the part of this additional bulk material, should add the below that bulk material extends in the 4th S/D district, and the concentration that expansion second dopant that makes second conductivity-type has moves in each the 4th S/D district basic fixed up or changes less than 10 times from bulk material position, the 4th time level top layer, bulk material position, the 4th time level top layer below this semiconductor-on-insulator surface with the about identical degree of depth in above-mentioned additional time bulk material position, top layer.
49. a method comprises:
First semiconductor dopant of introducing first conductivity-type is directed to the trap portion of first conductivity-type of field-effect transistor (FET) with qualification to semiconductor body, the part (a) of this semiconductor body is directly followed after the action of first dopant of introducing first conductivity-type be overlying in this trap portion, so and (b) be second conductivity-type opposite with first conductivity-type;
Gate electrode is provided, and it becomes above the section of this semiconductor body of channel region of first conductivity-type and by grid dielectric material with it vertically separately in intention; First semiconductor dopant of introducing second conductivity-type is to this semiconductor body, distinguishes to form by a pair of source/drain (S/D) of oss-divided second conductivity-type of this channel region institute; And
Carry out additional treatments to finish the manufacturing of this FET, make the part of first dopant of first conductivity-type during the action of carrying out additional treatments, diffuse to the aforementioned part of this semiconductor body up so that in fact all above-mentioned semiconductor bodies parts after the action of first dopant of introducing first conductivity-type, can significantly not be subjected to first or second conductivity-type other doping influence and be converted to first conductivity-type.
50. according to the described method of claim 49, wherein, the action of introducing first dopant of first conductivity-type comprises: ion is implanted first dopant of first conductivity-type.
51. according to claim 49 or 50 described methods, wherein, diffusion up during at least one part of this additional treatments that the aforementioned part of first dopant of first conductivity-type is at high temperature carried out.
52., further comprise according to claim 49 or 50 described methods:
Second semiconductor dopant of introducing first conductivity-type is to this semiconductor body, to limit bag portion for extend upwardly to the upper surface that it exists at that time along remaining this S/D district, make after the action of carrying out additional treatments, (a) this semiconductor body has the semiconductor-on-insulator surface, (b) this channel region and trap portion are the bulk material part of first conductivity-type and the below that extends laterally at this S/D district, (c) this bag portion constitutes the part of this bulk material and compares the adjacent part of this bulk material and be to mix than severe, and (d) all dopants of first conductivity-type of this bulk material have this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than at this channel region along the surperficial meeting of semiconductor-on-insulator should remain the low concentration of S/D district's part.
53. according to the described method of claim 52, wherein, after the action of carrying out additional treatments, the concentration of all dopants of first conductivity-type of this bulk material at this channel region along semiconductor-on-insulator surface meeting should specify S/D district part than hanging down 10 times along semiconductor-on-insulator surface meeting at least should remain S/D district part at this channel region.
54. according to claim 49 or 50 described methods, wherein, the action of introducing first semiconductor dopant of second conductivity-type comprises:
The horizontal expansion part semiconductor dopant of introducing second conductivity-type uses this horizontal expansion partly shielding effect, this gate electrode to reach along any material of this gate electrode and shield as dopant blocking through the opening in the horizontal expansion partly shielding effect, through the upper surface that exists at that time of this semiconductor body and a pair of oss-divided major part that enters this semiconductor body;
The cross side of spacer material to this gate electrode is provided; And
The major part semiconductor dopant of introducing second conductivity-type sees through opening in the major part shielding, see through the upper surface that exists at that time of this semiconductor body and to a pair of oss-divided expansion part of this semiconductor body, use this major part shielding, this gate electrode and this spacer material to shield as dopant blocking.
55. a method comprises:
Initial construction is provided, wherein, (a) the inferior top layer semiconductor regions of first conductivity-type in abutting connection with and be overlying on time top layer electric insulation layer, (b) the slight surperficial adjacent semiconductor zone of mixing of first conductivity-type in abutting connection with and be overlying on the semiconductor regions of this time top layer, (c) this semiconductor regions dopant of first conductivity-type that mixes, the dopant of first conductivity-type is had from this time top layer semiconductor regions strides across to this adjacent semiconductor zone, surface the concentration that the step level of at least 10 times of experience basically reduces up, and (d) lower semiconductor layer in abutting connection with and place insulating barrier below, this time top layer;
Form chamber portion and see through this semiconductor regions and this time top layer insulating barrier court down to this lower semiconductor layer, (a) remainder of this time top layer semiconductor regions constitutes main top layer bulk material part of first conductivity-type, and (b) remainder in this adjacent semiconductor zone, surface constitutes the main surface of the slight forerunner who mixes of first conductivity-type in abutting connection with the bulk material part;
The semi-conducting material of introducing second conductivity-type opposite with first conductivity-type is to this chamber portion, to produce additional the top layer bulk material part of (a) second conductivity-type, it extends down to this lower semiconductor layer to form PN junction, the forerunner's additional surface that reaches (b) the slight doping of second conductivity-type is in abutting connection with the bulk material part, the dopant of second conductivity-type of should additional semiconductor portions mixing, make the dopant of second conductivity-type have from should additional time top layer bulk material part stride across to this additional surface in abutting connection with bulk material in the part concentration that the step level of at least 10 times of experience basically reduces up; And
Provide a pair of main source/drain (S/D) of (a) second conductivity-type to distinguish in the main surface of this forerunner in the bulk material part and along its upper surface, make this main surface laterally separate this main S/D district in abutting connection with the main thoroughfare district of bulk material part, (b) a pair of additional S/D district of first conductivity-type in this forerunner's additional surface in abutting connection with bulk material the part in and along its upper surface, make the additional channel district of this additional bulk material part laterally separately should add the S/D district, (c) the main and additional gate dielectric layer above this main and additional channel district respectively, and (d) respectively above this main and additional channel district be somebody's turn to do mainly and above the additional gate dielectric layer mainly and the additional gate electrode.
56. according to the described method of claim 55, wherein:
It is approximately fixing that the concentration of the dopant of first conductivity-type runs through this main top layer bulk material part; And
It is approximately fixing that the concentration of the dopant of second conductivity-type runs through this additional top layer bulk material part.
57., further comprise according to the described method of claim 56:
The main semiconductor bag portion dopant that selectivity is introduced first conductivity-type to the main surface of this forerunner in abutting connection with the bulk material part, limiting the main bag portion that remains along this that main S/D district extends, this mainly bag portion compare this main bulk material partly adjacent material and be doped in first conductivity-type than severe; And
The additional semiconductor bag portion dopant that selectivity is introduced second conductivity-type to this forerunner's additional surface in abutting connection with the bulk material part, to limit additional bag portion along the additional S/D district extension of this residue, by this, this additional bag portion compare additional surface in abutting connection with bulk material partly adjacent material and be doped in second conductivity-type than severe.
58. according to each described method of claim 55 to 57, wherein:
Along should partly extending to the position that this specifies main S/D district by main top layer bulk material certainly, also low 10 times of this main top layer bulk material parts are compared in abutting connection with the concentration of the dopant of first conductivity-type of bulk material part in this main surface; And
Along should partly extending to the position that this appointment adds the S/D district by additional top layer bulk material certainly, this additional surface is compared this additional top layer bulk material part in abutting connection with the concentration of the dopant of second conductivity-type of bulk material part and is hanged down 10 times at least.
59. a method comprises:
Introduce the initial semi-conducting material part of the main dopant of first conductivity-type to second conductivity-type opposite with first conductivity-type, become the surface of first conductivity-type in abutting connection with main bulk material to change this parent material part person, this main dopant is had through the suitable uniform concentration of this main bulk material, and the remainder of this parent material constitutes the surface of second conductivity-type in abutting connection with additional bulk material;
The main trap portion dopant of introducing first conductivity-type to this main bulk material forming main trap portion, its position, inferior top layer at this main bulk material arrives the Cmax of this main trap portion;
The additional trap portion dopant of introducing second conductivity-type to should additional bulk material forming additional trap portion, its position, inferior top layer at this additional bulk material arrives the Cmax of this additional trap portion; And
Provide a pair of surface of (a) second conductivity-type to distinguish in this main bulk material part in abutting connection with main source/drain (S/D), the main thoroughfare district that makes this main bulk material is this main S/D district laterally separately, and makes the position of the Cmax of the main trap of concentration that all dopants of first conductivity-type of this main bulk material have oneself this portion reduce at least 10 times.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/981,481 | 2007-10-31 | ||
| US11/981,481 US7642574B2 (en) | 2005-08-29 | 2007-10-31 | Semiconductor architecture having field-effect transistors especially suitable for analog applications |
| US11/981,355 | 2007-10-31 | ||
| US11/981,355 US7838369B2 (en) | 2005-08-29 | 2007-10-31 | Fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications |
| PCT/US2008/011463 WO2009058187A1 (en) | 2007-10-31 | 2008-10-02 | Structure and fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications. |
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| CN101971347A true CN101971347A (en) | 2011-02-09 |
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| CN2008801146253A Pending CN101971347A (en) | 2007-10-31 | 2008-10-02 | Structure and fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications |
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| JP (1) | JP2011519469A (en) |
| KR (1) | KR20100084642A (en) |
| CN (1) | CN101971347A (en) |
| DE (1) | DE112008002924B4 (en) |
| TW (1) | TWI426564B (en) |
| WO (1) | WO2009058187A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108615675A (en) * | 2018-05-04 | 2018-10-02 | 长江存储科技有限责任公司 | Substrate doped structure and forming method thereof |
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| US8084827B2 (en) * | 2009-03-27 | 2011-12-27 | National Semiconductor Corporation | Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses |
| JP5423269B2 (en) | 2009-09-15 | 2014-02-19 | 富士通セミコンダクター株式会社 | Semiconductor device and manufacturing method thereof |
| JP5560812B2 (en) * | 2010-03-23 | 2014-07-30 | 富士通セミコンダクター株式会社 | Semiconductor device and manufacturing method thereof |
| KR102180554B1 (en) | 2013-12-04 | 2020-11-19 | 삼성디스플레이 주식회사 | Thin film transistor and method for fabricating the same |
| US10424581B2 (en) * | 2016-04-18 | 2019-09-24 | Samsung Electronics Co., Ltd. | Sub 59 MV/decade SI CMOS compatible tunnel FET as footer transistor for power gating |
| US11251095B2 (en) | 2016-06-13 | 2022-02-15 | Globalfoundries Singapore Pte. Ltd. | High gain transistor for analog applications |
| US11288430B2 (en) | 2017-11-27 | 2022-03-29 | Globalfoundries U.S. Inc. | Producing models for dynamically depleted transistors using systems having simulation circuits |
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| US5744372A (en) | 1995-04-12 | 1998-04-28 | National Semiconductor Corporation | Fabrication of complementary field-effect transistors each having multi-part channel |
| US6127700A (en) | 1995-09-12 | 2000-10-03 | National Semiconductor Corporation | Field-effect transistor having local threshold-adjust doping |
| JP3529549B2 (en) * | 1996-05-23 | 2004-05-24 | 東芝マイクロエレクトロニクス株式会社 | Method for manufacturing semiconductor device |
| US6548642B1 (en) | 1997-07-21 | 2003-04-15 | Ohio University | Synthetic genes for plant gums |
| US7145191B1 (en) * | 2000-03-31 | 2006-12-05 | National Semiconductor Corporation | P-channel field-effect transistor with reduced junction capacitance |
| US6548842B1 (en) | 2000-03-31 | 2003-04-15 | National Semiconductor Corporation | Field-effect transistor for alleviating short-channel effects |
| US6566204B1 (en) * | 2000-03-31 | 2003-05-20 | National Semiconductor Corporation | Use of mask shadowing and angled implantation in fabricating asymmetrical field-effect transistors |
| KR100580796B1 (en) * | 2003-12-10 | 2006-05-17 | 동부일렉트로닉스 주식회사 | Method For Manufacturing Semiconductor Devices |
| US7176530B1 (en) * | 2004-03-17 | 2007-02-13 | National Semiconductor Corporation | Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor |
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2008
- 2008-09-11 TW TW097134813A patent/TWI426564B/en active
- 2008-10-02 CN CN2008801146253A patent/CN101971347A/en active Pending
- 2008-10-02 JP JP2010532009A patent/JP2011519469A/en active Pending
- 2008-10-02 DE DE112008002924.5T patent/DE112008002924B4/en active Active
- 2008-10-02 WO PCT/US2008/011463 patent/WO2009058187A1/en active Application Filing
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| CN108615675A (en) * | 2018-05-04 | 2018-10-02 | 长江存储科技有限责任公司 | Substrate doped structure and forming method thereof |
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| DE112008002924T5 (en) | 2010-12-02 |
| JP2011519469A (en) | 2011-07-07 |
| KR20100084642A (en) | 2010-07-27 |
| TW200924075A (en) | 2009-06-01 |
| DE112008002924B4 (en) | 2019-03-28 |
| WO2009058187A1 (en) | 2009-05-07 |
| TWI426564B (en) | 2014-02-11 |
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