CN101958310A - Semiconductor device and formation method thereof - Google Patents
Semiconductor device and formation method thereof Download PDFInfo
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- CN101958310A CN101958310A CN2009100549605A CN200910054960A CN101958310A CN 101958310 A CN101958310 A CN 101958310A CN 2009100549605 A CN2009100549605 A CN 2009100549605A CN 200910054960 A CN200910054960 A CN 200910054960A CN 101958310 A CN101958310 A CN 101958310A
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Abstract
The invention relates to a semiconductor device and a formation method thereof, wherein the formation method of the semiconductor device comprises the following steps of: providing a substrate, wherein a metal layer is formed on the surface of the substrate; forming a first dielectric layer covering the metal layer on the surface of the substrate; forming a second dielectric layer on the surface of the first dielectric layer, wherein the dielectric constant of the second dielectric layer is less than that of the first dielectric layer; and forming a third dielectric layer on the surface of the second dielectric layer. The formed device has the advantages of low dielectric constant and low transmission delay.
Description
Technical field
The present invention relates to field of semiconductor manufacture, the formation method of particularly a kind of semiconductor device and semiconductor device.
Background technology
In very lagre scale integrated circuit (VLSIC) technology, the silicon dioxide that thermal stability, moisture resistance are arranged is the main insulating material that metal interconnected circuit chien shih is used always, and metallic aluminium then is the main material of circuit interconnection lead in the chip.Yet, with respect to the microminiaturization of element and the increase of integrated level, conductor line number constantly increases in the circuit, make the ghost effect that resistance (R) in the conductor line framework and electric capacity (C) are produced, caused serious transmission delay (RC Delay), reaching in the more advanced technology in 130 nanometers becomes the limited principal element of signal transmission speed in the circuit.
Therefore, aspect the reduction conductor resistance,, be widely used in and come the material of substituted metal aluminium in the line framework as the conductor line because metallic copper has the ability of high-melting-point, low-resistance coefficient and high anti-electron transfer.
On the other hand, reducing aspect the parasitic capacitance, because on the technology and the restriction of conductor resistance, making us can't consider to reduce parasitic capacitance value by the change on how much.Therefore, the material with low-k (low k) is just constantly developed.In the U.S. patent documents of US20080061438, we can find more relevant information about advanced low-k materials, advanced low-k materials comprises the silica (Black Diamond) of fluorine silex glass (FSG), carbon doping and the carborundum (BLOK) of nitrogen doping etc., is generally used for the insulating barrier of metal interconnected circuit.In existing technology, insulation layer structure can be with reference to figure 1, substrate 10; Be formed on the copper metal layer 11 on the substrate 10; Be formed on described substrate 10 surfaces and cover the silicon carbide layer 20 of the nitrogen doping of described copper metal layer 11; Be formed on the silicon oxide layer 30 that the carbon on silicon carbide layer 20 surfaces that nitrogen mixes mixes.
Along with integrated circuit technology enters 65 nanometers and following process node, need further to reduce the transmission delay of integrated circuit, existing insulation layer structure can't meet the demands.
Summary of the invention
The problem that the present invention solves is the transmission delay that has reduced device.
For addressing the above problem, the invention provides a kind of semiconductor device, comprising: substrate; Be formed on the metal level on the described substrate surface; Be formed on described substrate surface and cover first dielectric layer of described metal level; Be formed on second dielectric layer on the described first dielectric layer surface, the described second dielectric layer dielectric constant is less than described first dielectric layer; Be formed on the 3rd dielectric layer on the described second dielectric layer surface.
The present invention also provides a kind of formation method of semiconductor device, comprising: substrate is provided, and described substrate surface is formed with metal level; Form first dielectric layer that covers metal level at described substrate surface; Form second dielectric layer on described first dielectric layer surface, the described second dielectric layer dielectric constant is less than described first dielectric layer; Form the 3rd dielectric layer on described second dielectric layer surface.
Compared with prior art, the present invention has the following advantages: the present invention is by introducing second dielectric layer between first dielectric layer and the 3rd dielectric layer, second thickness of dielectric layers is 200 dust to 300 dust thickness, the second dielectric layer material is selected from the carborundum that nitrogen mixes, the described second dielectric layer dielectric constant is less than described first dielectric layer, the device dielectric constant that the present invention forms is lower than existing device, adopt the device of device of the present invention, transmission delay is lower than existing device, and has: second dielectric layer and the first dielectric layer lattice match are good; The selective etching of the silica medium layer that the carbon of second dielectric layer and follow-up formation mixes is bigger than difference, and second dielectric layer can be used as the etching barrier layer of follow-up contact hole etching technology, makes advantages such as can not causing damage in the contact hole etching technology to metal level.
Description of drawings
Fig. 1 is existing insulating barrier device schematic diagram;
Fig. 2 is the formation method flow schematic diagram of semiconductor device provided by the invention;
Fig. 3 to Fig. 6 is the formation procedure schematic diagram of semiconductor device provided by the invention.
Embodiment
The invention provides a kind of formation method of semiconductor device, Fig. 2 is the schematic flow sheet of the formation method of semiconductor device of the present invention, specifically comprises the steps:
Step S101 provides substrate, and described substrate surface is formed with metal level;
Step S102 forms first dielectric layer that covers metal level at described substrate surface;
Step S103 forms second dielectric layer on described first dielectric layer surface, and the described second dielectric layer dielectric constant is less than described first dielectric layer;
Step S104 forms the 3rd dielectric layer on described second dielectric layer surface.
Below in conjunction with accompanying drawing, the formation method of semiconductor device of the present invention is elaborated.
With reference to figure 3, substrate 100 is provided, described substrate surface is formed with metal level 110.
Described substrate 100 can be substrate (part that comprises integrated circuit and other elements), the patterning of multi layer substrate (silicon substrate that for example, has covering dielectric and metal film), classification substrate, silicon-on-insulator substrate (SOI), epitaxial silicon substrate, section processes or the substrate that is not patterned.
Described metal level 110 materials are selected from aluminium, silver, chromium, molybdenum, nickel, palladium, platinum, titanium, tantalum or copper, perhaps are selected from the alloy of aluminium, silver, chromium, molybdenum, nickel, palladium, platinum, titanium, tantalum or copper, and described metal level 110 thickness are 2000 dust to 3000 dusts.
In the present embodiment; because metallic copper has the ability of high-melting-point, low-resistance coefficient and high anti-electron transfer; preferably do exemplary illustrated with copper; but of particular note; the metal level 110 of selecting for use other conductive materials to form is higher than in 130 nanometer technologies at process node still can work; just transmission delay is bigger, specially illustrates at this, should too not limit protection scope of the present invention.
The formation technology of described metal level 110 can be selected known physical gas-phase deposition or electroplating technology for use, what need particularly point out is, the material difference that the formation technology of above-mentioned metal level 110 needs to select for use according to metal level 110 adopts different technology, adjust different technological parameters, do not give unnecessary details at this.
With reference to figure 4, as described in step S102, form first dielectric layer 200 that covers metal level 110 on described substrate 100 surfaces.
The insulation that described first dielectric layer 200 is used between the metal interconnected circuit is isolated, and described first dielectric layer 200 is generally selected the dielectric material of low-k for use at 130 nanometers and following process node, and described first dielectric layer, 200 thickness are 150 dust to 300 dusts.
And, usually be selected from metallic copper by described as can be known metal level 110 materials of step S101, the present inventor is through a large amount of experiments, find that the described metal level that is selected from metallic copper 110 stability are poor, and described first dielectric layer 200 can directly contact with the metal level 110 on substrate 100 surfaces, for this reason, the present inventor has taken all factors into consideration the stability of safeguarding metal level 110, the water absorption of first dielectric layer 200, the low-k character of first dielectric layer 200, the each side demand of the matching of the film that forms with subsequent technique, through a large amount of creative experiments, the carborundum of having chosen the nitrogen doping is as described first dielectric layer, 200 materials, wherein Si element mass percent is 50% to 60% in the carborundum of nitrogen doping, and C element mass percent is 10% to 20%, and N element mass percent is 25% to 30%.
The technology that forms first dielectric layer 200 can be chemical vapor deposition method (Chemical Vapor Deposition, CVD), the present inventor considers after the technology that forms first dielectric layer 200 also can continue to carry out other cvd dielectric layer technology, continuity for service procedure, reduce the unnecessary process time, the technology that is preferably formed first dielectric layer 200 be the medium chemical vapour deposition technique (Dielectric Chemical Vapor Deposition, DCVD).
Concrete technological parameter is: the formation of first dielectric layer 200 can be carried out in the medium chemical vapor depsotition equipment, reaction temperature is 300 degrees centigrade to 400 degrees centigrade, chamber pressure is that 3.7 holders are to 4.2 holders, interresponse time is 5 millimeters to 8 millimeters, power is 200 watts to 240 watts, the tetraethoxysilane flow is that per minute 300 standard cubic centimeters are to per minute 400 standard cubic centimeters, ammonia flow is that per minute 650 standard cubic centimeters are to per minute 750 standard cubic centimeters, until first dielectric layer 200 that forms 150 dust to 300 dust thickness.
In existing technology, silica (Black Diamond) dielectric layer that first dielectric layer, 200 backs directly form the carbon doping can formed, the present inventor is through a large amount of experiments, find that existing device has following shortcoming: in order to safeguard the stability of metal level 110, the nitrogen content of the silicon carbide layer that nitrogen mixes is generally than higher, make the dielectric constant of the silicon carbide layer that nitrogen mixes also than higher, make existing device transmission delay still than higher, on the other hand, follow-up processing step can form contact hole in the silicon carbide layer that nitrogen mixes, in the etch step that forms contact hole, the silicon carbide layer that meeting etching nitrogen mixes is until exposing metal level 110, and above-mentioned etch step can form etching injuries to metal level 110.
For this reason, the present inventor with reference to figure 5, forms second dielectric layer 300 on described first dielectric layer 200 surfaces through a large amount of creative works, described second dielectric layer, 300 thickness are 200 dust to 300 dusts, and described second dielectric layer, 300 dielectric constants are less than described first dielectric layer 200.
A bit that it may be noted that especially, second dielectric layer, 300 materials that the present invention forms can be selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 40% to 50%, and C element mass percent is 40% to 50%, and N element mass percent is 5% to 15%., introduce one deck second dielectric layer 300 and have the following advantages between the silica medium layer of first dielectric layer 200 and carbon doping: second dielectric layer, 300 materials are selected from the carborundum that nitrogen mixes, and second dielectric layer 300 and first dielectric layer, 200 lattice match are good; The N element mass percent of second dielectric layer 300 is lower than first dielectric layer, makes that the dielectric constant of second dielectric layer 300 is low, and the device transmission delay of formation is lower than existing device; And the selective etching of the silica medium layer that second carbon dielectric layer 300 and follow-up formation mixes is bigger than difference, second dielectric layer 300 can be used as the etching barrier layer of follow-up contact hole etching technology, makes can not cause damage to metal level 110 in the contact hole etching technology.
The technology that forms second dielectric layer 300 can be chemical vapor deposition method, in the present embodiment, for the technology with first dielectric layer 200 combines, the continuity of service procedure, reduce the unnecessary process time, the technology that is preferably formed first dielectric layer 200 is the medium chemical vapour deposition technique, but of particular note, select for use second dielectric layer 300 that other thin film deposition processes form still can operate as normal, specially illustrate at this.
Concrete technological parameter is: the formation of second dielectric layer 300 can be carried out in the medium chemical vapor depsotition equipment, reaction temperature is 300 degrees centigrade to 400 degrees centigrade, chamber pressure is that 5 holders are to 6 holders, interresponse time is 7 to 9 millimeters, power is 222 watts to 333 watts, the tetraethoxysilane flow is that per minute 200 standard cubic centimeters are to per minute 350 standard cubic centimeters, ammonia flow is that per minute 650 standard cubic centimeters are to per minute 750 standard cubic centimeters, helium gas flow is that per minute 1100 standard cubic centimeters are to per minute 1300 standard cubic centimeters, CH
4Flow is that per minute 550 standard cubic centimeters are to per minute 650 standard cubic centimeters, until second dielectric layer 300 that forms 200 dust to 300 dust thickness.
Need particularly point out, the present inventor is through a large amount of experiments, matching from first dielectric layer 200 and second dielectric layer 300, the required dielectric constant of first dielectric layer 200 and second dielectric layer 300, mechanical strength, each side such as anti-insulation property and water absorption are considered, having obtained first dielectric layer, 200 preferred proportionings is that Si element mass percent is 55%, C element mass percent is 15%, N element mass percent is 30%, the preferred proportioning of second dielectric layer 200 is that Si element mass percent is 45%, C element mass percent is 45%, and N element mass percent is 10%.
With reference to figure 6, as described in step S104, form the 3rd dielectric layer 400 on described second dielectric layer 300 surfaces.
Described the 3rd dielectric layer 400 materials are selected from advanced low-k materials, described the 3rd dielectric layer 400 thickness are 3000 dust to 5000 dusts, the present inventor takes all factors into consideration the water absorption of the 3rd dielectric layer 400, the low-k character of the 3rd dielectric layer 400, with the matching of second dielectric layer 200 and with the each side demand of second dielectric layer, 300 etching selection ratio differences, the 3rd dielectric layer 400 materials are preferably the silica that carbon mixes.
Described the 3rd dielectric layer 400 forms technology and can be chemical vapor deposition method, in the present embodiment, the present inventor is equally based in order to combine with the formation technology of first dielectric layer 200, the formation technology of second dielectric layer 300, the continuity of service procedure, reduce the unnecessary process time, the technology that is preferably formed the 3rd dielectric layer 400 is the medium chemical vapour deposition technique, but of particular note, select for use the 3rd dielectric layer 400 that other thin film deposition processes form still can operate as normal, specially illustrate at this.
Concrete technological parameter is: the formation of the 3rd dielectric layer 400 can be carried out in the medium chemical vapor depsotition equipment, reaction temperature is 300 degrees centigrade to 400 degrees centigrade, chamber pressure is that 4 holders are to 6 holders, interresponse time is 5 millimeters to 9 millimeters, power is 400 watts to 600 watts, oxygen flow is that per minute 100 standard cubic centimeters are to per minute 300 standard cubic centimeters, helium gas flow be per minute 800 standard cubic centimeters to per minute 1200 standard cubic centimeters, prestox cyclisation tetrasiloxane flow be per minute 2000 standard cubic centimeters to per minute 4000 standard cubic centimeters until the 3rd dielectric layer 400 that forms 3000 dust to 5000 dust thickness.
Semiconductor device according to the formation method of above-mentioned semiconductor device forms comprises: substrate 100; Be formed on the metal level 110 on the described substrate surface; Be formed on described substrate 100 surfaces and cover first dielectric layer 200 of described metal level 110; Be formed on second dielectric layer 300 on described first dielectric layer 200 surfaces, be formed on the 3rd dielectric layer 400 on described second dielectric layer 300 surfaces.
The present invention is by introducing one deck second dielectric layer 300 between first dielectric layer 200 and the 3rd dielectric layer 400, second dielectric layer, 300 thickness are 200 dust to 300 dust thickness, second dielectric layer, 300 materials are selected from the carborundum that nitrogen mixes, the described second dielectric layer dielectric constant is less than described first dielectric layer, the device dielectric constant that the present invention forms is lower than existing device, adopt the device of device of the present invention, transmission delay is lower than existing device, and has: second dielectric layer 300 and first dielectric layer, 200 lattice match are good; Second dielectric layer 300 is bigger than difference with the selective etching of silica (Black Diamond) dielectric layer of the carbon doping of follow-up formation, second dielectric layer 300 can be used as the etching barrier layer of follow-up contact hole etching technology, makes can not cause advantages such as damage to metal level 110 in the contact hole etching technology.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (20)
1. a semiconductor device is characterized in that, comprising:
Substrate;
Be formed on the metal level on the described substrate surface;
Be formed on described substrate surface and cover first dielectric layer of described metal level;
Be formed on second dielectric layer on the described first dielectric layer surface, the described second dielectric layer dielectric constant is less than described first dielectric layer;
Be formed on the 3rd dielectric layer on the described second dielectric layer surface.
2. semiconductor device as claimed in claim 1 is characterized in that described metal layer material is selected from copper.
3. semiconductor device as claimed in claim 1 is characterized in that, described first dielectric layer is identical with the material of second dielectric layer, and described first dielectric layer is different with the material mixture ratio of second dielectric layer.
4. semiconductor device as claimed in claim 1, it is characterized in that the described first dielectric layer material is selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 50% to 60%, C element mass percent is 10% to 20%, and N element mass percent is 25% to 30%.
5. semiconductor device as claimed in claim 4 is characterized in that, the described first dielectric layer material is selected from the carborundum that nitrogen mixes, and wherein Si element mass percent is 55%, and C element mass percent is 15%, and N element mass percent is 30%.
6. semiconductor device as claimed in claim 1, it is characterized in that the described second dielectric layer material is selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 40% to 50%, C element mass percent is 40% to 50%, and N element mass percent is 5% to 15%.
7. semiconductor device as claimed in claim 6 is characterized in that, the described second dielectric layer material is selected from the carborundum that nitrogen mixes, and wherein Si element mass percent is 45%, and C element mass percent is 45%, and N element mass percent is 10%.
8. semiconductor device as claimed in claim 1 is characterized in that, described the 3rd dielectric layer material is the silica that carbon mixes.
9. semiconductor device as claimed in claim 1 is characterized in that, the formation method of described first dielectric layer and second dielectric layer is the medium chemical vapour deposition technique.
10. the formation method of a semiconductor device comprises:
Substrate is provided, and described substrate surface is formed with metal level;
Form first dielectric layer that covers metal level at described substrate surface;
Form second dielectric layer on described first dielectric layer surface, the described second dielectric layer dielectric constant is less than described first dielectric layer;
Form the 3rd dielectric layer on described second dielectric layer surface.
11. the formation method of semiconductor device as claimed in claim 10 is characterized in that, described first dielectric layer is identical with the material of second dielectric layer, and described first dielectric layer is different with the material mixture ratio of second dielectric layer.
12. the formation method of semiconductor device as claimed in claim 10, it is characterized in that, the described first dielectric layer material is selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 50% to 60%, C element mass percent is 10% to 20%, and N element mass percent is 25% to 30%.
13. the formation method of semiconductor device as claimed in claim 12, it is characterized in that the described first dielectric layer material is selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 55%, C element mass percent is 15%, and N element mass percent is 30%.
14. the formation method of semiconductor device as claimed in claim 10 is characterized in that, the formation technology of described first dielectric layer is the medium chemical vapour deposition technique.
15. the formation method of semiconductor device as claimed in claim 14, it is characterized in that, the technological parameter of described formation first dielectric layer is: reaction temperature is 300 degrees centigrade to 400 degrees centigrade, chamber pressure is that 3.7 holders are to 4.2 holders, interresponse time is 5 millimeters to 8 millimeters, power is 200 watts to 240 watts, the tetraethoxysilane flow be per minute 300 standard cubic centimeters to per minute 400 standard cubic centimeters, ammonia flow is that per minute 650 standard cubic centimeters are to per minute 750 standard cubic centimeters.
16. the formation method of semiconductor device as claimed in claim 10, it is characterized in that the described second dielectric layer material is selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 40% to 50%, C element mass percent is 40% to 50%, and N element mass percent is 5% to 15%.
17. the formation method of semiconductor device as claimed in claim 16, it is characterized in that the described second dielectric layer material is selected from the carborundum that nitrogen mixes, wherein Si element mass percent is 45%, C element mass percent is 45%, and N element mass percent is 10%.
18. the formation method of semiconductor device as claimed in claim 10 is characterized in that, the formation technology of described second dielectric layer is the medium chemical vapour deposition technique.
19. the formation method of semiconductor device as claimed in claim 18, it is characterized in that, the technological parameter of described formation second dielectric layer is: reaction temperature is 300 degrees centigrade to 400 degrees centigrade, chamber pressure is that 5 holders are to 6 holders, interresponse time is 7 to 9 millimeters, power is 222 watts to 333 watts, the tetraethoxysilane flow is that per minute 200 standard cubic centimeters are to per minute 350 standard cubic centimeters, ammonia flow is that per minute 650 standard cubic centimeters are to per minute 750 standard cubic centimeters, helium gas flow is that per minute 1100 standard cubic centimeters are to per minute 1300 standard cubic centimeters, CH
4Flow is that per minute 550 standard cubic centimeters are to per minute 650 standard cubic centimeters.
20. the formation method of semiconductor device as claimed in claim 10 is characterized in that, described the 3rd dielectric layer material is the silica that carbon mixes.
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| CN2009100549605A CN101958310B (en) | 2009-07-16 | 2009-07-16 | Semiconductor device and formation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105448655A (en) * | 2014-09-02 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Porous low dielectric thin film, manufacturing method thereof, and interlayer dielectric layer comprising same |
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| JP3177968B2 (en) * | 1998-12-04 | 2001-06-18 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
| KR100430472B1 (en) * | 2001-07-12 | 2004-05-10 | 삼성전자주식회사 | Method for forming wiring using dual damacine process |
| TWI300971B (en) * | 2002-04-12 | 2008-09-11 | Hitachi Ltd | Semiconductor device |
| CN101447431A (en) * | 2007-11-27 | 2009-06-03 | 上海华虹Nec电子有限公司 | Method for manufacturing semiconductor devices |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105448655A (en) * | 2014-09-02 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Porous low dielectric thin film, manufacturing method thereof, and interlayer dielectric layer comprising same |
| CN105448655B (en) * | 2014-09-02 | 2019-01-08 | 中芯国际集成电路制造(上海)有限公司 | Porous low dielectric film, its production method and the interlayer dielectric layer including it |
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