CN101946232B - 基于地址的条件调试指令的认定 - Google Patents

基于地址的条件调试指令的认定 Download PDF

Info

Publication number
CN101946232B
CN101946232B CN200980106158.4A CN200980106158A CN101946232B CN 101946232 B CN101946232 B CN 101946232B CN 200980106158 A CN200980106158 A CN 200980106158A CN 101946232 B CN101946232 B CN 101946232B
Authority
CN
China
Prior art keywords
debug
debug command
instruction
address
debugging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN200980106158.4A
Other languages
English (en)
Chinese (zh)
Other versions
CN101946232A (zh
Inventor
W·C··莫耶
M·D·斯尼德尔
G·L·维森亨特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of CN101946232A publication Critical patent/CN101946232A/zh
Application granted granted Critical
Publication of CN101946232B publication Critical patent/CN101946232B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30189Instruction operation extension or modification according to execution mode, e.g. mode flag

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
CN200980106158.4A 2008-03-17 2009-02-02 基于地址的条件调试指令的认定 Active CN101946232B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/049,984 2008-03-17
US12/049,984 US8261047B2 (en) 2008-03-17 2008-03-17 Qualification of conditional debug instructions based on address
PCT/US2009/032793 WO2009117178A1 (en) 2008-03-17 2009-02-02 Qualification of conditional debug instructions based on address

Publications (2)

Publication Number Publication Date
CN101946232A CN101946232A (zh) 2011-01-12
CN101946232B true CN101946232B (zh) 2014-11-26

Family

ID=41064277

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200980106158.4A Active CN101946232B (zh) 2008-03-17 2009-02-02 基于地址的条件调试指令的认定

Country Status (5)

Country Link
US (1) US8261047B2 (enExample)
JP (1) JP5335887B2 (enExample)
CN (1) CN101946232B (enExample)
TW (1) TWI464576B (enExample)
WO (1) WO2009117178A1 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6858615B2 (en) 2002-02-19 2005-02-22 Parion Sciences, Inc. Phenyl guanidine sodium channel blockers
AR086745A1 (es) 2011-06-27 2014-01-22 Parion Sciences Inc 3,5-diamino-6-cloro-n-(n-(4-(4-(2-(hexil(2,3,4,5,6-pentahidroxihexil)amino)etoxi)fenil)butil)carbamimidoil)pirazina-2-carboxamida
US8700955B2 (en) * 2011-09-22 2014-04-15 Freescale Semiconductor, Inc. Multi-processor data processing system having synchronized exit from debug mode and method therefor
US9029382B2 (en) 2012-12-17 2015-05-12 Parion Sciences, Inc. 3,5-diamino-6-chloro-N-(N-(4-phenylbutyl)carbamimidoyl) pyrazine-2-carboxamide compounds
BR112015014349A2 (pt) 2012-12-17 2017-07-11 Parion Sciences Inc derivados de cloro-pirazina carboxamida úteis para o tratamento de doenças favorecidas por hidratação mucosa insuficiente
US9330011B2 (en) * 2013-09-20 2016-05-03 Via Alliance Semiconductor Co., Ltd. Microprocessor with integrated NOP slide detector
US9411745B2 (en) * 2013-10-04 2016-08-09 Qualcomm Incorporated Multi-core heterogeneous system translation lookaside buffer coherency
US9102633B2 (en) 2013-12-13 2015-08-11 Parion Sciences, Inc. Arylalkyl- and aryloxyalkyl-substituted epithelial sodium channel blocking compounds
US9600505B2 (en) * 2014-09-23 2017-03-21 Sap Se Code optimization based on customer logs
TWI566090B (zh) * 2014-10-17 2017-01-11 Insyde Software Corp Debugging firmware / software to produce tracking systems and methods, recording media and computer program products
US10496410B2 (en) * 2014-12-23 2019-12-03 Intel Corporation Instruction and logic for suppression of hardware prefetchers
US9886194B2 (en) * 2015-07-13 2018-02-06 Samsung Electronics Co., Ltd. NVDIMM adaptive access mode and smart partition mechanism
GB2540942B (en) * 2015-07-31 2019-01-23 Advanced Risc Mach Ltd Contingent load suppression
US11074988B2 (en) * 2016-03-22 2021-07-27 Micron Technology, Inc. Apparatus and methods for debugging on a host and memory device
US10628288B2 (en) 2016-07-22 2020-04-21 International Business Machines Corporation Debugger that correlates differing values to system environments in a distributed system
US10191836B2 (en) 2016-12-28 2019-01-29 Nxp Usa, Inc. Software watchpoints apparatus for variables stored in registers
US10599555B2 (en) * 2017-09-20 2020-03-24 Texas Instruments Incorporated Context-sensitive debug requests for memory access
TWI659361B (zh) * 2018-01-09 2019-05-11 國立中央大學 支援多執行緒/並行程式除錯之方法、電腦可讀取之記錄媒體及電腦程式產品
US11010280B1 (en) * 2019-03-13 2021-05-18 Parallels International Gmbh System and method for virtualization-assisted debugging
CN111984325B (zh) * 2019-05-23 2024-12-24 三星电子株式会社 提高分支预测吞吐量的装置及系统
CN111898120B (zh) * 2020-06-29 2023-10-10 中国科学院信息工程研究所 控制流完整性保护方法及装置
TWI790506B (zh) * 2020-11-25 2023-01-21 凌通科技股份有限公司 開發介面系統與在開發介面進行大量資料傳輸方法
TWI764581B (zh) * 2021-02-22 2022-05-11 群聯電子股份有限公司 記憶體檢查方法、記憶體檢查裝置及記憶體檢查系統
CN112820341B (zh) * 2021-03-03 2024-05-07 群联电子股份有限公司 存储器检查方法、存储器检查装置及存储器检查系统
GB2605796B (en) * 2021-04-13 2023-06-28 Advanced Risc Mach Ltd Apparatus and method for generating debug information

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030154463A1 (en) * 2002-02-08 2003-08-14 Betker Michael Richard Multiprocessor system with cache-based software breakpoints
US20050240820A1 (en) * 2004-03-31 2005-10-27 Vannerson Eric F Method and apparatus for multiprocessor debug support
CN1869952A (zh) * 2005-05-27 2006-11-29 松下电器产业株式会社 指令执行设备、调试方法、调试设备以及调试程序
CA2549640A1 (en) * 2005-06-15 2006-12-15 Research In Motion Limited Controlling collection of debugging data

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2211638A (en) * 1987-10-27 1989-07-05 Ibm Simd array processor
JPS6476233A (en) * 1987-09-18 1989-03-22 Fujitsu Ltd Tracing device
JPH02214949A (ja) * 1989-02-16 1990-08-27 Nec Corp システム資源の使用状態表示装置
US5491793A (en) * 1992-07-31 1996-02-13 Fujitsu Limited Debug support in a processor chip
JPH1011320A (ja) * 1996-06-19 1998-01-16 Matsushita Electric Ind Co Ltd 計算機等の処理装置におけるromプログラムモニタ装置
US6289300B1 (en) * 1998-02-06 2001-09-11 Analog Devices, Inc. Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit
JP2000235510A (ja) * 1999-02-15 2000-08-29 Hitachi Ltd プロセッサおよびそのためのコンパイルプログラム記録媒体
US6587967B1 (en) * 1999-02-22 2003-07-01 International Business Machines Corporation Debugger thread monitor
US6834338B1 (en) * 2000-02-18 2004-12-21 Texas Instruments Incorporated Microprocessor with branch-decrement instruction that provides a target and conditionally modifies a test register if the register meets a condition
US6865663B2 (en) * 2000-02-24 2005-03-08 Pts Corporation Control processor dynamically loading shadow instruction register associated with memory entry of coprocessor in flexible coupling mode
JP2002189613A (ja) * 2000-12-21 2002-07-05 Toshiba Corp ソフトウェア開発支援装置、ソフトウェア開発支援方法及びソフトウェア開発支援プログラムを記録したコンピュータ読み取り可能な記録媒体
GB0125628D0 (en) * 2001-10-25 2001-12-19 Ibm Computer system with watchpoint support
US20050289396A1 (en) * 2004-06-25 2005-12-29 Hooper Donald F Conditional breakpoint using breakpoint function and breakpoint command
US7237149B2 (en) * 2005-02-25 2007-06-26 Freescale Semiconductor, Inc. Method and apparatus for qualifying debug operation using source information
JP2007058731A (ja) * 2005-08-26 2007-03-08 Matsushita Electric Ind Co Ltd プロセッサ、及び並列命令実行対応デバッグ装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030154463A1 (en) * 2002-02-08 2003-08-14 Betker Michael Richard Multiprocessor system with cache-based software breakpoints
US20050240820A1 (en) * 2004-03-31 2005-10-27 Vannerson Eric F Method and apparatus for multiprocessor debug support
CN1869952A (zh) * 2005-05-27 2006-11-29 松下电器产业株式会社 指令执行设备、调试方法、调试设备以及调试程序
CA2549640A1 (en) * 2005-06-15 2006-12-15 Research In Motion Limited Controlling collection of debugging data

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Co-development of Media-processor and Source-level Debugger using Hardware Emulation-based Validation;Yeon-Ho Im等;《6th International Conference on VLSI and CAD, IEEE》;19991027;95-98 *

Also Published As

Publication number Publication date
JP2011514606A (ja) 2011-05-06
CN101946232A (zh) 2011-01-12
TW200945022A (en) 2009-11-01
TWI464576B (zh) 2014-12-11
JP5335887B2 (ja) 2013-11-06
US8261047B2 (en) 2012-09-04
US20090235059A1 (en) 2009-09-17
WO2009117178A1 (en) 2009-09-24

Similar Documents

Publication Publication Date Title
CN101946232B (zh) 基于地址的条件调试指令的认定
US7962729B2 (en) Dynamic runtime range checking of different types on a register using upper and lower bound value registers for the register
JP6006248B2 (ja) 命令エミュレーションプロセッサ、方法、およびシステム
US7334161B2 (en) Breakpoint logic unit, debug logic and breakpoint method for a data processing apparatus
JP5419103B2 (ja) デバッグイベントを監視するためのシステム及び方法
JP4094724B2 (ja) ソフトウェアをデバッグする際に例外を識別するための装置および方法
US9003376B2 (en) Software breakpoints with tailoring for multiple processor shared memory or multiple thread systems
US9575816B2 (en) Deadlock/livelock resolution using service processor
US7689815B2 (en) Debug instruction for use in a data processing system
TWI733717B (zh) 從亂序處理器中的不良儲存-至-負載轉發復原的方法與設備
KR101547163B1 (ko) 멀티-스레드형 데이터 프로세싱 시스템에서 사용하기 위한 디버그 명령
US7870430B2 (en) Method and apparatus for sharing debug resources
JP5841199B2 (ja) 安全保護方法およびプロセッサ
KR20170031728A (ko) 제어 전송 인스트럭션으로의 리턴
US11789848B2 (en) Context-sensitive debug requests for memory access
US7870434B2 (en) Method and apparatus for masking debug resources
TW202403562A (zh) 用於記憶體位址空間之頁面的「讀值只有x」性質
US20150186299A1 (en) Load instruction for code conversion
JPH0675858A (ja) キャッシュ内蔵マイクロプロセッサ及びそのトレースシステム

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: Texas in the United States

Patentee after: NXP America Co Ltd

Address before: Texas in the United States

Patentee before: Fisical Semiconductor Inc.

CP01 Change in the name or title of a patent holder