CN101945204B - Image sensing device and image formation system - Google Patents
Image sensing device and image formation system Download PDFInfo
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- CN101945204B CN101945204B CN 201010291848 CN201010291848A CN101945204B CN 101945204 B CN101945204 B CN 101945204B CN 201010291848 CN201010291848 CN 201010291848 CN 201010291848 A CN201010291848 A CN 201010291848A CN 101945204 B CN101945204 B CN 101945204B
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Abstract
The invention provides an image sensing device and an image formation system. The image sensing device comprises a pixel including a column signal line, a readout circuit, an output line, and an output unit. The readout circuit includes a first accumulation unit, a first opening/closing unit, a second accumulation unit, a transmission unit, and a second opening/closing unit. A capacitance of the first accumulation unit is smaller than a capacitance of the second accumulation unit, and the signal held by the second accumulation unit is read out to the output unit based on the capacitance of the second accumulation unit and the capacitance of the output line.
Description
The application be that September 12, application number in 2008 are 200810149109.6 the applying date, denomination of invention divides an application for the patent application of " image sensing apparatus and imaging system ".
Technical field
The present invention relates to image sensing apparatus and imaging system.
Background technology
According to disclosed technology among the Japanese Patent Laid-Open No.2001-45378, in the pel array that comprises a plurality of pixels that line direction and column direction are arranged, to drive signal via upper a plurality of row control lines that extend in the row direction and supply to pixel, and via a plurality of column signal lines that extend at column direction from the pixel read output signal.Build up each end that the unit is connected to column signal line.When just from two read output signals of building up the unit, the signal of exporting from pixel accumulates in another accumulation unit.This has shortened the blank period (period that does not have transducer output) and be used for signal read into from pel array and build up the whole of unit and read the period.
In the technology of Japanese Patent Laid-Open No.11-150255, build up unit and two amplifiers for two and alternately be connected in a plurality of column signal lines each.The signal of building up in described two of building up in the unit is amplified and output by one in described two amplifiers, is then accumulated in another and builds up in the unit.Build up the signal of building up in the unit at another and amplified by another amplifier, then be read out to the output line of following stages.
In the technology of Japanese Patent Laid-Open No.2001-45378, accumulated in one from the signal of the pixel of the first row of pel array and built up in the unit, built up in unit and accumulate in another from the signal of the pixel of the second row.Build up unit from each and be transferred to the signal times of output line of following stages with the gain based on the determined electric capacity splitting ratio of capacitance of the capacitance of being built up the unit by each and output line.For example, have capacitance C1 when building up the unit, and output line is when having capacitance C2, gain is provided by C1/ (C1+C2).The capacitance that the capacitance of output line comprises its parasitic capacitance and generated by the capacity cell that provides on output line.In the sensing technique of the Japanese Patent Laid-Open No.2001-45378 that uses this electric capacity to cut apart, build up the absolute value hour that unit and another are built up the electric capacity of each in the unit when one, the gain of building up the electric capacity splitting ratio between the electric capacity of unit based on the output line of following stages and each diminishes, and signal to noise ratio reduces.Conversely, build up unit and another and build up each the absolute value of electric capacity in the unit when large when one, the gain of building up the electric capacity splitting ratio between the electric capacity of unit based on output line and each of following stages becomes large, and the signal to noise ratio rising.Yet this has increased by one builds up unit and another and builds up each electrode area in unit, has caused the chip area increase.
According to the technology of Japanese Patent Laid-Open No.11-150255, build up the signal of building up in the unit at another and amplified by another amplifier, and be read out to following stages, as mentioned above.Therefore, this signal might be read into the output line of following stages, and not consider the gain based on the electric capacity splitting ratio.Yet because for a signal, two amplifiers are connected to each in a plurality of column signal lines, so the chip area of image sensing apparatus may increase.In addition, owing to two amplifiers operate in order to read a signal, therefore in image sensing apparatus, may increase in whole overall power of reading in the period.
Summary of the invention
The invention provides image sensing apparatus and imaging system, itself in addition when at full speed reading picture element signal, also can reduce chip area, and suppress power consumption and increase.
According to first aspect present invention, a kind of image sensing apparatus is provided, comprising: pixel, it comprises photoelectric conversion unit; Column signal line, it is connected to described pixel; Reading circuit, its via described column signal line from described pixel read output signal; Output line, it is connected to described reading circuit, and has electric capacity; And output unit, it is via described output line, and according to from the signal of described reading circuit and output image signal, wherein, described reading circuit comprises: first builds up the unit, and its maintenance reads into the signal of described column signal line; The first cut-off/close unit, the described column signal line of its cut-off/close is built up being connected between the unit with described first; Second builds up the unit; Delivery unit, it will be sent to described second by the signal that described the first accumulation unit keeps and build up the unit; And the second cut-off/close unit, the described delivery unit of its cut-off/close is built up being connected between the unit with described second, the described first electric capacity of building up the unit is less than the described second electric capacity of building up the unit, builds up signal that the unit keeps by described second and built up the electric capacity of the electric capacity of unit and described output line and read into described output unit based on described second.
According to second aspect present invention, a kind of image sensing apparatus is provided, comprising: the first pixel; The second pixel; Column signal line, it is connected to described the first pixel and described the second pixel; Reading circuit, its via described column signal line from described the first pixel and described the second pixel read output signal; Driver element, it drives described the first pixel, described the second pixel and described reading circuit; Output line, it is connected to described reading circuit, and has electric capacity; And output unit, it is via described output line, and according to from the signal of described reading circuit and output image signal, wherein, described reading circuit comprises: first builds up the unit, and its maintenance reads into the signal of described column signal line; The first cut-off/close unit, the described column signal line of its cut-off/close is built up being connected between the unit with described first; Second builds up the unit; Delivery unit, it will be built up signal that the unit keeps by described first and be sent to described second and build up the unit, and its input terminal and lead-out terminal be connected to described first and build up the unit, and its lead-out terminal is connected to described second and builds up the unit; And the second cut-off/close unit, its cut-off/close described first builds up the unit and described delivery unit is built up being connected between the unit with described second, described first builds up the electric capacity of unit less than the electric capacity of described the second accumulation unit, building up signal that the unit keeps by described second is built up the electric capacity of the electric capacity of unit and described output line and is read into described output unit based on described second, and described the first pixel of described drive unit drives, described the second pixel and described reading circuit, with during the first period, build up the unit from described first and read the signal of described the first pixel, and communicate the signals to described second via described delivery unit and build up the unit, and during the second period after described the first period, make described first to build up the unit signal of described the second pixel of outputing to described column signal line is built up, and build up the unit from described second and read the signal of described the first pixel, and communicate the signals to described output unit.
According to third aspect present invention and fourth aspect, a kind of imaging system is provided, it comprises: according to the image sensing apparatus of corresponding first aspect of the present invention and second aspect; Optical system, its image planes at described image sensing apparatus form image; Signal processing unit, it processes the signal of exporting from described image sensing apparatus, with image data generating.
According to the present invention, even at full speed reading in the picture element signal, also might reduce chip area and suppress power consumption increases.
According to below in conjunction with the description of accompanying drawing to exemplary embodiment, further feature of the present invention will become apparent.
Description of drawings
Fig. 1 is the view that illustrates according to the layout of the image sensing apparatus of first embodiment of the invention;
Fig. 2 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown;
Fig. 3 is the sequential chart that the operation of reading circuit is shown;
Fig. 4 is the circuit diagram that the circuit arrangement of delivery unit is shown;
Fig. 5 illustrates use according to the block diagram of the layout of the imaging system of the image sensing apparatus of the first embodiment;
Fig. 6 is the view that illustrates according to the layout of the image sensing apparatus 300 of second embodiment of the invention;
Fig. 7 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown;
Fig. 8 is the view that illustrates according to the layout of the image sensing apparatus 600 of third embodiment of the invention;
Fig. 9 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown;
Figure 10 is the sequential chart that the operation of reading circuit is shown;
Figure 11 is for the view of explaining reset potential;
Figure 12 is the circuit diagram (modified example) that the circuit arrangement of the row of one in the reading circuit is shown;
Figure 13 is the view that illustrates according to the layout of the image sensing apparatus 800 of fourth embodiment of the invention;
Figure 14 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown;
Figure 15 is the sequential chart that the operation of reading circuit is shown;
Figure 16 is the circuit diagram that the layout of output unit is shown;
Figure 17 is the view that illustrates according to the layout of the image sensing apparatus 900 of fifth embodiment of the invention;
Figure 18 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown;
Figure 19 is the sequential chart that the operation of reading circuit is shown;
Figure 20 is the sequential chart that the operation of reading circuit is shown;
Figure 21 is the view that illustrates according to the layout of the image sensing apparatus 1000 of sixth embodiment of the invention;
Figure 22 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown;
Figure 23 is the sequential chart that the operation of reading circuit is shown;
Figure 24 is the sequential chart that the operation of reading circuit is shown.
Embodiment
The present invention particularly at video camera, digital still video camera, be used for the widely used image sensing apparatus of image input device etc. of image reading apparatus.
With reference to the image sensing apparatus 100 of Fig. 1 description according to first embodiment of the invention.Fig. 1 is the view that illustrates according to the layout of the image sensing apparatus 100 of first embodiment of the invention.
Pel array PA comprises a plurality of pixel A 11 to B24, and it is pressed two-dimensional approach (with matrix form) and arranges.For convenience of description, will be at this take the array of 4 * 4 pixels as example.
In the pixel A 11 to B24 each comprises photoelectric conversion unit PD.Photoelectric conversion unit PD is photodiode for example.
Vertical scanning circuit (VSR) 101 will drive signal via row control line CL1 to CL4 and supply to pixel A 11 to B24.For example, vertical scanning circuit (VSR) 101 is so that the pixel of the every delegation among the pel array PA outputs to one of correspondence among the column signal line RL1 to RL4 with signal.
The first cut-off/close unit group 103 is included as a plurality of the first cut-off/close unit that each row provide.
First builds up unit group 104 is included as a plurality of the first accumulation unit that each row provide.First builds up the signal that the unit keeps outputing to column signal line RL1 to RL4.
The second cut-off/close unit group 106 is included as a plurality of the second cut-off/close unit that each row provide.Second builds up unit group 107 is included as a plurality of the second accumulation unit that each row provide.
The 3rd cut-off/close unit group 108 is included as a plurality of the 3rd cut-off/close unit that each row provide.The 3rd cut-off/close unit cut-off/close second is built up being connected between unit and the first horizontal output line 121 or the second horizontal output line 122.For example, the 3rd cut-off/close unit is built up unit and the first horizontal output line 121 or the second horizontal output line 122 with second and is set to closure state, builds up the unit with second thus and is electrically connected to the first horizontal output line 121 or the second horizontal output line 122.
Horizontal scanning circuit (HSR) 102 is successively so that will to supply to the horizontal time-base (HSR) of the layout of each row in the reading circuit effective, thus the 3rd cut-off/close unit of closed each row successively.By this operation, horizontal scanning circuit (HSR) 102 is so that the 3rd cut-off/close unit group 108 from each row (second build up unit) read output signal of reading circuit 110, and outputs to output unit 120 via the first horizontal output line 121 and the second horizontal output line 122 with described signal.
In the first horizontal output line 121 and the second horizontal output line 122 each is connected to output unit 120 with reading circuit 110 (second build up unit).
Next the layout of reading circuit 110 is described with reference to Fig. 2.Fig. 2 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit 110 is shown.To the circuit that be connected to column signal line RL1 be described mainly.This situation also is applied to be connected to the circuit of all the other column signal line RL2 to RL4.
For example, the first pixel A 11 and the second pixel B 11 (Fig. 1) are connected to the upstream side of column signal line RL1.The downstream that unit 203, delivery unit 204, the second cut-off/close unit 205, the second accumulation unit 206 and the 3rd cut-off/close unit 220 are connected to column signal line RL1 is successively built up in the first cut-off/close unit 210, first.The first horizontal output line 121 and the second horizontal output line 122 (Fig. 1) are connected to the following stages of the 3rd cut-off/close unit 220.
The first cut-off/close unit 210 comprises optical signalling switch 201 and noise signal switch 202.First builds up unit 203 comprises that optical signalling is built up unit (that is, be used for first of optical signalling and build up the unit) Cts1 and noise signal is built up unit (that is, be used for first of noise signal and build up the unit) Ctn1.Delivery unit 204 comprises optical signalling buffer amplifier AMS and noise signal buffer amplifier AMN, and they are impedance transformers.The second cut-off/close unit 205 comprises optical signalling switch 231 and noise signal switch 232.Second builds up unit 206 comprises that optical signalling is built up unit (that is, be used for second of optical signalling and build up the unit) Cts2 and noise signal is built up unit (that is, be used for second of noise signal and build up the unit) Ctn2.The 3rd cut-off/close unit 220 comprises optical signalling switch 207 and noise signal switch 208.
In the circuit arrangement of row shown in Figure 2, each switch 201 etc. can or comprise nmos pass transistor, or comprises the PMOS transistor.
Next the operation of reading circuit 110 will be described.Fig. 3 is the sequential chart that the operation of reading circuit 110 is shown.All signals described in Fig. 3 all are effective at high level.It should be noted that to provide the situation of signal at Low level effective by all signal logic level that reverse.In Fig. 3, signal psi TS1, φ TN1 and φ TSN2 are supplied to reading circuit 110 from vertical scanning circuit (VSR) 101.Signal HSR is supplied to reading circuit 110 from horizontal scanning circuit (HSR) 102.
During the BLKa period (that is, the second period), so that the effective while of φ TN1, turn on-switch 202, thus noise signal is built up unit Ctn1 and is built up the noise signal that outputs to column signal line RL1 from the first pixel A 11.So that the effective while of φ TS1, turn on-switch 201, thus optical signalling is built up unit Cts1 and is built up the optical signalling that outputs to column signal line RL1 from the first pixel A 11.That is to say that first builds up unit 203 builds up the signal that outputs to column signal line RL1 from the first pixel A 11.
During the BLKc period (that is, the first period), so that the effective while of φ TSN2, turn on-switch 231 and 232.Optical signalling buffer amplifier AMS builds up unit Cts1 from optical signalling and reads the optical signalling of the first pixel A 11, and sends it to optical signalling accumulation unit Cts2.Noise signal buffer amplifier AMN builds up unit Ctn1 from noise signal and reads the noise signal of the first pixel A 11, and sends it to noise signal accumulation unit Ctn2.That is to say that delivery unit 204 is built up unit 203 from first and read the signal of the first pixel A 11, and send it to the second accumulation unit 206.
At period BLKc (namely, the first period) during afterwards BLKb period (that is, the second period), so that the effective while of φ TN1, turn on-switch 202, thus noise signal is built up Ctn1 accumulation in unit outputs to column signal line RL1 from the second pixel B 11 noise signal.So that the effective while of φ TS1, turn on-switch 201, thus optical signalling is built up unit Cts1 and is built up the optical signalling that outputs to column signal line RL1 from the second pixel B 11.That is to say that first builds up unit 203 builds up the signal that outputs to column signal line RL1 from the second pixel B 11.
During period BLKb (that is, the second period), so that be used for the effective while of signal HSR1 of the column signal line RL1 of horizontal time-base HSR, turn on-switch 207 and 208 is read the signal of the first pixel A 11 to build up unit 206 from second.More particularly, the electric capacity of building up unit Cts2 by optical signalling is cut apart with the electric capacity between the electric capacity of the first horizontal output line 121, and the optical signalling of the first pixel A 11 is read into the first horizontal output line 121 from optical signalling accumulation unit Cts2.Therefore, via the first horizontal output line 121 optical signalling of the first pixel A 11 is sent to output unit 120.The electric capacity of building up unit Ctn2 by noise signal is cut apart with the electric capacity between the electric capacity of the second horizontal output line 122, and the noise signal of the first pixel A 11 is read into the second horizontal output line 122 from noise signal accumulation unit Ctn2.Therefore, via the second horizontal output line 122 noise signal of the first pixel A 11 is sent to output unit 120.Output unit 120 calculates the difference between the optical signalling that transmits via the first horizontal output line 121 and the noise signal that transmits via the second horizontal output line 122, and the differential wave between them is arrived following stages as image signal output.
Repeat operation described above.
Although it should be noted that the operation of except horizontal time-base HSR, having described reading circuit 110 about column signal line RL1, identical with Fig. 3 about the operation of the reading circuit 110 of all the other column signal line RL2 to RL4.In horizontal time-base HSR, after the effectual time of the signal HSR1 that is used for column signal line RL1, successively so that effective for the signal HSR2 to HSR4 of all the other column signal line RL2 to RL4 (Fig. 1).
To be sent to the second period BLKc that builds up unit 206 by the signal that the first accumulation unit 203 keeps and be shorter than the period BLKa that the signal of the first pixel A 11 is read into the first accumulation unit 203.To be sent to the second period BLKc that builds up unit 206 by the signal that the first accumulation unit 203 keeps and be shorter than the period BLKb that the signal of the second pixel B 11 is read into the first accumulation unit 203.This be because the area of reading circuit 110 less than the area (for example, having several millimeters to the area on the limit of tens millimeters long) of pel array PA.That is to say that the required time of area of signal being transmitted reading circuit 110 is shorter than the required time of area of signal being transmitted pel array PA.
The first electric capacity (electrode area) of building up unit 203 can be less than the electric capacity of the second accumulation unit 206.Reason is as follows.
In Japanese Patent Laid-Open No.2001-45378 in the disclosed technology, being connected to each two of building up in the unit in a plurality of column signal lines must have with another and build up the identical electric capacity (electrode area) in unit, thereby so that for the gain balance of reading, as mentioned above.When each from described two accumulation unit of signal are read into the horizontal output line, determine to read gain according to the electric capacity splitting ratio between the electric capacity of the electric capacity of building up the unit and horizontal output line.Too low in order to prevent reading gain, described two accumulation unit both must have large electric capacity (electrode area).As a result, chip area increases, and the chip production rate must reduce.
Yet, in this embodiment, between the first accumulation unit 203 and the second accumulation unit 206, providing delivery unit 204, it comprises optical signalling buffer amplifier AMS and noise signal buffer amplifier AMN.Delivery unit 204 supplies to the second accumulation unit 206 with the signal corresponding with the electric charge that is kept by the first accumulation unit 203, rather than will directly be supplied to by the electric charge self that the first accumulation unit 203 keeps the second accumulation unit 206.Signal is read in the output unit 120 cutting apart by electric capacity, this electric capacity that prevents that the first capacitive effect second of building up unit 203 from building up between the electric capacity of the electric capacity of unit 206 and the first horizontal output line 121 or the second horizontal output line 122 is cut apart.This be because even build up unit 203 and have when building up the less electric capacity in unit 206 than second when first, signal is built up the executable operations that unit 203 reads into the second accumulation unit 206 from first does not also use electric capacity to cut apart.Therefore, might when improving gain and signal to noise ratio, at full speed read the high quality graphic data, and not increase chip area, and not reduce the chip production rate.That is to say, according to this embodiment, even at full speed reading in the picture element signal, also might reduce deterioration in image quality, and reduce chip area.
In the technology of Japanese Patent Laid-Open No.11-150255, build up unit and two amplifiers for two and alternately be connected in a plurality of column signal lines each according to the mode corresponding with signal.Then the signal of building up in described two of building up in the unit is built up in the unit at another and is built up by an amplification in described two amplifiers.Build up the signal of building up in the unit at another and amplified by another amplifier, and be read out to the output line of following stages, as mentioned above.In the case, do not use electric capacity to cut apart from described two executable operations of building up the unit read output signal.Therefore, might be independent of two electric capacity of building up the unit and come read output signal, and not reduce gain.Yet because two amplifiers are connected in a plurality of column signal lines each, so the chip area of image sensing apparatus may increase.In addition, owing to two amplifiers operate for reading a signal, therefore in image sensing apparatus, may increase in whole overall power of reading in the period.
Yet in this embodiment, for a signal, only amplifier is connected to each in a plurality of column signal lines.Therefore, can reduce the chip area of image sensing apparatus.In addition, only an amplifier operates for reading a signal (that is, optical signalling or noise signal).Therefore, compare with the technology of Japanese Patent Laid-Open No.11-150255, can suppress the power consumption in the image sensing apparatus.That is to say, might even also reduce chip area in the picture element signal and suppress power consumption to increase at full speed reading.
The buffer amplifier AMS of delivery unit 204 and AMN can be designed as and apply gain.Perhaps, can be that 1 buffer only is used for avoiding any minimizing of building up the gain that the electric capacity splitting ratio between unit 203 and the second accumulation unit 206 causes because of first simply with gain.Fig. 4 illustrates and serving as the example that gain is the buffer amplifier of 1 voltage follower.
Fig. 5 illustrates the example of the imaging system of using image sensing apparatus 100 of the present invention.
92 pairs of incident lights of lens reflect, and form object images in the image planes (pel array PA) of image sensing apparatus 100.
The object images that image sensing apparatus 100 will be formed on the image planes (pel array PA) is converted to picture signal.Image sensing apparatus 100 is read picture signal from pel array PA, and exports this picture signal.
Sensing signal treatment circuit 95 is connected to image sensing apparatus 100, to process the picture signal of being exported from image sensing apparatus 100.
A/D converter 96 is connected to sensing signal treatment circuit 95, is converted to picture signal (digital signal) with the picture signal (analog signal) of the processing that will be exported from sensing signal treatment circuit 95.
Image signal processing unit 97 is connected to A/D converter 96, to carry out arithmetic processing (for example, for the various corrections of the picture signal (digital signal) of exporting from A/D converter 96), thus image data generating.View data is fed into memory cell 87, exterior I/F unit 89, overall situation control/arithmetical unit 99 and recording medium control I/F unit 94.
Exterior I/F unit 89 is connected to image signal processing unit 97, thereby is transferred to external equipment (for example personal computer) from the view data that image signal processing unit 97 is exported via exterior I/F unit 89.
Overall situation control/arithmetical unit 99 is connected to sequential generation unit 98, image signal processing unit 97 and recording medium is controlled I/F unit 94, with comprehensive control they.
Recording medium 88 is connected to recording medium control I/F unit 94 removably.Be recorded on the recording medium 88 via recording medium control I/F unit 94 from the view data of image signal processing unit 97 outputs.
By above-mentioned layout, when image sensing apparatus 100 can obtain good picture signal, can obtain good image (view data).
Next with reference to Fig. 6 and Fig. 7 image sensing apparatus 300 according to second embodiment of the invention is described.Fig. 6 is the view that illustrates according to the layout of the image sensing apparatus 300 of second embodiment of the invention.Fig. 7 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown.Below the part that is different from the first embodiment will be described mainly, with the description of omitting for same section.
Except reading circuit 310, image sensing apparatus 300 has the basic layout identical with the first embodiment.The difference of reading circuit 310 and the first embodiment is that it comprises delivery unit group 305.
As shown in Figure 7, the delivery unit 504 that is included in each row in the delivery unit group 305 comprises optical signalling source electrode follower SFs and noise signal source electrode follower SFn.Optical signalling source electrode follower SFs comprises nmos pass transistor MS and constant current source Is.Noise signal source electrode follower SFn comprises nmos pass transistor MN and constant current source In.
MOS transistor MS receives by the first optical signalling of building up unit 203 via grid and builds up the signal that unit Cts1 keeps, and will the signal corresponding with the signal that is input to grid outputs to the second optical signalling of building up unit 206 via source electrode and build up unit Cts2.
MOS transistor MN receives by the first noise signal of building up unit 203 via grid and builds up the signal that unit Ctn1 keeps, and will the signal corresponding with the signal that is input to grid outputs to the second noise signal of building up unit 206 via source electrode and build up unit Ctn2.
The delivery unit 504 that comprises optical signalling source electrode follower SFs and noise signal source electrode follower SFn can be by the raise input impedance and reduce output impedance of simple layout.Delivery unit 504 supplies to the second accumulation unit 206 with the signal corresponding with the electric charge that is kept by the first accumulation unit 203, rather than will directly be supplied to by the electric charge self that the first accumulation unit 203 keeps the second accumulation unit 206, as among the first embodiment.
Among the optical signalling source electrode follower SFs of delivery unit 504 and the noise signal source electrode follower SFn each can comprise that the PMOS transistor substitutes nmos pass transistor (MOS transistor MS or MN).
Next with reference to the image sensing apparatus 600 of Fig. 8 to Figure 11 description according to third embodiment of the invention.Fig. 8 is the view that illustrates according to the layout of the image sensing apparatus 600 of third embodiment of the invention.Fig. 9 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown.Figure 10 is the sequential chart that the operation of reading circuit is shown.Figure 11 is for the view of explaining reset potential.Below the part that is different from the first embodiment and the second embodiment will be described mainly, with the description of omitting for same section.
Except reading circuit 610, image sensing apparatus 600 has the basic layout identical with the second embodiment with the first embodiment.Be that it is built up between unit group 107 and the 3rd cut-off/close unit group 108 second and comprises the first reset unit group 609 outside reading circuit 610 and the first embodiment and the second embodiment different.
Build up the first reset unit 709 that each row that is included in the first reset unit group 609 are provided between unit 206 and the 3rd cut-off/close unit 220 second, as shown in Figure 9.The first reset unit 709 comprises optical signalling reset transistor MRS and noise signal reset transistor MRN.The current potential V2 that optical signalling reset transistor MRS builds up unit Cts2 to optical signalling resets.The current potential V2 that noise signal reset transistor MRN builds up unit Ctn2 to noise signal resets.That is to say that 709 couples second current potential V2 that build up unit 206 of the first reset unit reset.
If the first reset unit 709 can reset to the second current potential V2 that builds up unit 206, then it can be provided at except the second position of building up between unit 206 and the 3rd cut-off/close unit 220 Anywhere.
Be outside the operation of reading circuit and the first embodiment and the second embodiment different following some, as shown in figure 10.
During period BLKc (that is, the first period), so that the effective while of φ CTR, connect optical signalling reset transistor MRS and the noise signal reset transistor MRN of the first reset unit 709.At this moment, the second cut-off/close unit 205 is in " cut-out ".Therefore, 709 couples of the second current potential V2 that build up unit 206 that are electrically connected from delivery unit 504 disconnections of the first reset unit reset.More particularly, establishing V1 is the current potential of the first accumulation unit 203, and Vthn is the threshold voltage of nmos pass transistor MS and MN, and V2 is the current potential of the second accumulation unit 206.At this moment, 709 couples second current potential V2 that build up unit 206 of the first reset unit reset, to satisfy following formula:
V2≤V1-Vthn ...(1)
So that the effective while of φ TSN2, turn on- switch 231 and 232 is electrically connected to second with the nmos pass transistor MN with the nmos pass transistor MS of optical signalling source electrode follower SFs and noise signal source electrode follower SFn and builds up unit 206.At this moment, the nmos pass transistor MS current potential V2 that optical signalling built up unit Cts2 is elevated to the current potential corresponding with built up signal that unit Cts1 keeps by optical signalling from the current potential (formula (1)) that is resetted by the first reset unit 709.The current potential V2 that nmos pass transistor MN builds up noise signal unit Ctn2 is elevated to the current potential corresponding with the signal that is kept by noise signal accumulation unit Ctn1 from the current potential (formula (1)) that is resetted by the first reset unit 709.That is to say, when being electrically connected to second when building up unit 206, nmos pass transistor MS and MN with the second current potential V2 that builds up unit 206 from the potential rise that resetted by the first reset unit 709 to build up current potential corresponding to signal that unit 203 keeps by first.
Explain that with reference to Figure 11 the first reset unit 709 should reset to the second current potential V2 that builds up unit 206 reason by the represented current potential of formula (1).Consideration is connected to the formed circuit of capacitive load CL by the source follower SF that will comprise nmos pass transistor NM and constant current source Ic via interrupteur SW.If Vg is grid potential, Vd is drain potential, and Vs is source potential, and Vth is threshold voltage, and Id is the drain current of nmos pass transistor NM.If Ib is the predetermined current value Ib that supplies with from constant current source Ic, VCL is the current potential of capacitive load CL.
So that before being used for the effective sequential Ton of signal psi TSN2 of turn on-switch SW, operation changes according to the initial value of the current potential VCL of capacitive load CL.The current potential V2 that the current potential VCL of capacitive load CL and second builds up unit 206 is corresponding.The current potential V1 that current potential Vg and first builds up unit 203 is corresponding.Determined the current potential VCL of capacitive load CL by the difference between the drain current Id of the current value I b of constant current source Ic and nmos pass transistor NM.If before being used for the sequential Ton of turn on-switch SW,
VCL≤Vg-Vth ...(2)
Then at sequential Ton, connect the nmos pass transistor NM of source follower SF, thereby drain current Id flows between the drain electrode of nmos pass transistor and source electrode.If circuit operation shown in Figure 11 is in pentode (pentode), then
Id∝(Vg-Vth)
2 ...(3)
Therefore, nmos pass transistor NM is to the instantaneous charging of capacitive load CL, and rising current potential VCL.Nmos pass transistor NM with source potential Vs (=VCL) to change into almost be (Vg-Vth).After sequential Ton passes time Δ T1, electric current I d=Ib flows, and obtains stable state.
On the other hand, if before being used for the sequential Ton of turn on-switch SW,
VCL＞Vg-Vth ...(4)
Then interrupteur SW is in " cut-out " at sequential Ton.Therefore, drain current Id does not flow between drain electrode and source electrode.Constant current source Ic removes electric charge according to current value I b from capacitive load CL, and reduces the current potential VCL of capacitive load CL with the time per unit estimated rate.Constant current source Ic with the source potential Vs of nmos pass transistor NM (=VCL) to change into almost be (Vg-Vth).After sequential Ton passes time Δ T2, electric current I d=Ib flows, and obtains stable state.In the case, can shorten by the current value I b that increases constant current source Ic time for reducing the current potential VCL of capacitive load CL.Yet, because current value I b is always mobile, and the current drain increase, so the quality of image sensing apparatus is poor.In order to suppress current drain, the current value I b of constant current source Ic must be little.This has produced following trend:
ΔT1＜ΔT2 ...(5)
As shown in figure 11.
Therefore, in this embodiment, when the second accumulation unit 206 disconnected electrical connection from delivery unit 504, the first reset unit 709 was reset to the second current potential V2 that builds up unit 206 by the represented current potential of formula (1).This has shortened period BLKc, and has reduced the current drain of image sensing apparatus 600.
As shown in figure 12, delivery unit 704a can comprise optical signalling source electrode follower SFsa and noise signal source electrode follower SFna.Optical signalling source electrode follower SFsa comprises PMOS transistor MSa and constant current source Isa.Noise signal source electrode follower SFna comprises PMOS transistor MNa and constant current source Ina.The first reset unit 709a resets to disconnect the second current potential V2 that builds up unit 206 that is electrically connected from delivery unit 704a.More particularly, establishing V1 is the current potential of the first accumulation unit 203, and Vthp is the transistorized threshold voltage of PMOS, and V2 is the current potential of the second accumulation unit 206.At this moment, the first reset unit 709a resets to the second current potential V2 that builds up unit 206, to satisfy following formula:
V2≥V1+Vthp ...(6)
When being electrically connected to the second accumulation unit 206, PMOS transistor MSa and MNa are reduced to the current potential corresponding with the signal that is kept by the first accumulation unit 203 with the second current potential V2 that builds up unit 206 from the current potential that is resetted by the first reset unit 709a.
Next with reference to the image sensing apparatus 800 of Figure 13 to Figure 16 description according to fourth embodiment of the invention.Figure 13 is the view that illustrates according to the layout of the image sensing apparatus 800 of fourth embodiment of the invention.Figure 14 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown.Figure 15 is the sequential chart that the operation of reading circuit is shown.Below the part that is different from the first embodiment to the three embodiment will be mainly described, and the description for same section will be omitted.
Except reading circuit 810, image sensing apparatus 800 has the basic layout identical with the first embodiment to the three embodiment.The difference of reading circuit 810 and the first embodiment to the three embodiment is that it comprises " the first cut-off/close unit group, first is built up unit group and delivery unit group " 803 and second cut-off/close unit group 806.
The the first cut-off/close unit 1110, the first accumulation unit 1103 and the delivery unit 1104 that are included in each row in " the first cut-off/close unit group, first is built up unit group and delivery unit group " 803 have circuit arrangement shown in Figure 14.
More particularly, first build up counter-rotating input terminal and the lead-out terminal that unit 1103 is connected to delivery unit 1104.The second cut-off/close unit 1105 also is connected to the lead-out terminal of delivery unit 1104.The connecting terminals that is used for supply reference potential Vref is received the counter-rotating input terminal of delivery unit 1104.Arrange by this, delivery unit 1104 calculate reference signal Vref with based on the difference between the signal of the signal that feeds back via the first accumulation unit 1103 from lead-out terminal and the signal that outputs to column signal line RL1, and export this differential wave.Therefore delivery unit 1104 will be sent to second by the signal that the first accumulation unit 1103 keeps via the second cut-off/close unit 1105 and build up unit 206.Delivery unit 1104 supplies to the second accumulation unit 206 with the signal corresponding with the electric charge that is kept by the first accumulation unit 1103.The lead-out terminal of the second cut-off/close unit 1105 cut-off/close delivery units 1104 is built up being connected between the unit 206 (Cts2, Ctn2) with second.
With reference to Figure 14, short circuit or open circuit are carried out in the path between the 1101 couples of column signal line RL1 in cut-off/close unit and the capacitor C 0.The feedback path of the 1102 pairs of delivery units 1104 in cut-off/close unit carries out short circuit or open circuit.
The layout of reading circuit 810 is commonly called the column amplifier system, and it can multiply by the gain corresponding with ratio C0/Cf.The first capacitor C f (Cf1, Cf2, Cf3) that builds up unit 1103 can change according to the open/close state (being in the quantity of " connection " state of switch) of the first cut-off/close unit 1110.Therefore, might gain be set according to application purpose.Figure 14 illustrates the example of having selected Cf1.
Be outside the operation of reading circuit 810 and the first embodiment to the three embodiment different following some, as shown in figure 15.
During period BLKa (that is, the second period), so that signal psi VL is effective, will be input to C0 from the noise signal (VN) that the first pixel A 11 is exported via column signal line RL1 and cut-off/close unit 1101.So that the effective while of signal psi PC0R, cut-off/close unit 1102 is connected.First two terminals building up the capacitor C f (Cf1, Cf2, Cf3) of unit 1103 are reset to Vref, thus with the charge discharge that keeps to power supply or GND, and acquisition reset mode.When so that signal psi PC0R when invalid, cut-off/close unit 1102 is cut off, will be input to C0 from the optical signalling (VS+VN) that the first pixel A 11 is exported via column signal line RL1 and cut-off/close unit 1101.At this moment, by following formula:
Vout1＝(VS+VN-VN)＊Co/Cf+Vref+Voffset
...(7)
Represented signal appears at the lead-out terminal place of delivery unit 1104.That is to say, appear as Vout1 based on the output of Vref, it is by eliminating noise component(s) from the optical signalling of the first pixel A 11 and resulting signal times being obtained with gain C0/Cf.Voffset is the migration noise of delivery unit 1104.Therefore, first builds up the signal that the first pixel A 11 is built up in unit 1103, and this signal is provided by following formula:
Vcf＝Vout1-Vref
＝(VS+VN-VN)＊Co/Cf+Voffset ...(8)
At period BLKc (namely, the first period) during, so that the effective while of signal psi TS, will build up unit 1103 from first by the represented signal Vout1 of formula (7) via switch 1231 and be sent to the second optical signalling of building up unit 206 and build up unit Cts2.The second optical signalling of building up unit 206 is built up unit Cts2 inhibit signal Vout1.So that signal psi TS is invalid, and so that the effective while of signal psi PC0R build up unit 1103 to first and reset.By following formula
Vout2＝Voffset ...(9)
Represented signal appears at the lead-out terminal place of delivery unit 1104.After this, so that signal psi PC0R is invalid, and so that the effective while of signal psi TN will be sent to the second noise signal of building up unit 206 from the first accumulation unit 1103 by the represented signal Vout2 of formula (9) via switch 1232 and build up unit Ctn2.The second noise signal of building up unit 206 is built up unit Ctn2 inhibit signal Vout2.
Before signal being write the second accumulation unit 206, the first reset unit 709 can reset to the second current potential of building up unit 206 temporarily.
The BLKc period (namely, the first period) period BLKb (namely after, the second period) during, so that signal psi VL is effective, will be input to C0 from the noise signal (VN) that the second pixel B 11 is exported via column signal line RL1 and cut-off/close unit 1101.So that the effective while of signal psi PC0R, cut-off/close unit 1102 is connected.First two terminals building up the capacitor C f (Cf1, Cf2, Cf3) of unit 1103 are reset to Vref, thus with the charge discharge that keeps to power supply or GND, and acquisition reset mode.When so that signal psi PC0R when invalid, cut-off/close unit 1102 is cut off, will be input to C0 from the optical signalling (VS+VN) that the second pixel B 11 is exported via column signal line RL1 and cut-off/close unit 1101.At this moment, the signal identical with formula (7) appears at the lead-out terminal place of delivery unit 1104.That is to say, appear as Vout1 based on the output of Vref, it is by eliminating noise component(s) from the optical signalling of the second pixel B 11 and resulting signal times being obtained with gain C0/Cf.Voffset is the skew of delivery unit 1104.Therefore, first build up the unit 1103 accumulations signal identical with formula (8) as the signal of the second pixel B 11.
At period BLKb (namely, the second period) during, so that be used for the effective while of signal HSR1 of the column signal line RL1 of horizontal time-base HSR, switch 207 and 208 is in " connections ", to read the signal of the first pixel A 11 from the second accumulation unit 206.More particularly, the electric capacity of building up unit Cts2 by optical signalling is cut apart with the electric capacity between the electric capacity of the first horizontal output line 121, and the signal Vout1 of the first pixel A 11 is read into the first horizontal output line 121 from optical signalling accumulation unit Cts2.Therefore, via the first horizontal output line 121 the signal Vout1 of the first pixel A 11 is sent to output unit 120.The electric capacity of building up unit Ctn2 by noise signal is cut apart with the electric capacity between the electric capacity of the second horizontal output line 122, and the signal Vout2 of the first pixel A 11 is read into the second horizontal output line 122 from noise signal accumulation unit Ctn2.Therefore, via the second horizontal output line 122 the signal Vout2 of the first pixel A 11 is sent to output unit 120.Output unit 120 calculates
ΔV＝Vout1-Vout2
＝(VS+VN-VN)＊Co/Cf+Vref ...(10)
As the difference between the signal Vout1 that transmits via the first horizontal output line 121 (formula (7)) and the signal Vout2 (formula (9)) that transmits via the second horizontal output line 122, and with this differential wave Δ V as image signal output to following stages.This differential wave Δ V is the signal that obtains by the migration noise of eliminating delivery unit 1104.
More particularly, the delivery unit 1104 in the reading circuit 810 is carried out the operation that transmits noise signal and the operation that transmits optical signalling in identical column amplifier.Therefore, delivery unit 1104 can be sent to the second accumulation unit 206 with noise signal and the optical signalling that comprises the same offset noise.The output unit 120 calculating noise signals of following stages and the difference between the optical signalling, the picture signal of the migration noise of column amplifier has been eliminated in acquisition thus.Delivery unit 1104 supplies to the second accumulation unit 206 with the signal corresponding with the electric charge that is kept by the first accumulation unit 1103, rather than will directly be supplied to by the electric charge self that the first accumulation unit 1103 keeps the second accumulation unit 206, as among the first embodiment.
Can use the output unit 1220 of both-end type, as shown in figure 16.
For example, for each row, acquisition is called as the output of the pixel of OB pixel, and it is not subject to irradiation in image sensing apparatus 800.The OB pixel can make its photodiode conductively-closed.Perhaps, for each row, obtain dark signal.The signal of exporting from pixel is stored in memory cell 87 etc. as correction data as signal Vout2.In each the shooting, image signal processing unit 97 etc. is easily eliminated offset component thus from signal Vout1 subtraction signal Vout2.During assembling video camera or video camera, in each the shooting, to video camera or video camera power supply the time, perhaps according to the change of the behaviour in service of video camera or video camera, can preserve correction data.
When delivery unit 1104 transmits picture element signal during period BLKa or BLKb, that is to say that when waiting for period BLKc when keeping picture element signal in Cf when, certain noise may enter column signal line RL1.Can effectively avoid this situation by following operation: arrange by the φ VL among the indicated Figure 15 of solid line, thereby cut-off/close unit 1101 disconnects provisionally in the end of period BLKa or BLKb, picture element signal is sampled and hold it among the Cf.
Next with reference to the image sensing apparatus 900 of Figure 17 to Figure 19 description according to fifth embodiment of the invention.Figure 17 is the view that illustrates according to the layout of the image sensing apparatus 900 of fifth embodiment of the invention.Figure 18 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown.Figure 19 is the sequential chart that the operation of reading circuit is shown.Below the part that is different from the 3rd embodiment will be described mainly, with the description of omitting for same section.
Except reading circuit 910, image sensing apparatus 900 has the basic layout identical with the 3rd embodiment.Be that it comprises delivery unit group 905, the second reset unit group 915 and the 4th cut-off/close unit group 911 outside reading circuit 610 and the 3rd embodiment different.Each a plurality of delivery units 1304 of providing of row of pel array PA are provided delivery unit group 905.Each a plurality of second reset units 1315 of providing of row of pel array PA are provided the second reset unit group 915.Each a plurality of the 4th cut-off/close unit 1310 of providing of row of pel array PA are provided the 4th cut-off/close unit group 911.
In the 3rd embodiment, delivery unit 504 is sent to the second accumulation unit 206 via the source follower SFs that separates and SFn with noise signal and optical signalling.Therefore, the variation between source follower SFs and the SFn produces fixed pattern noise, and it is so that deterioration in image quality.That is to say that the noise signal that is kept by the second accumulation unit 206 comprises different source follower skews with optical signalling.More particularly, because the threshold voltage of the nmos pass transistor MS of source follower SFs is different from the threshold voltage of the nmos pass transistor MN of source follower SFn, therefore can not eliminate migration noise by the difference between calculating noise signal and the optical signalling, and still have fixed pattern noise.Fixed pattern noise changes between each row, and therefore generates vertical banded noise based on the picture signal that obtains in image.
Yet in the 5th embodiment, the first noise signal builds up unit Ctn1 or the first optical signalling is built up the input terminal that unit Cts1 is connected to delivery unit 1304 selectively.The second noise signal builds up unit Ctn2 or the second optical signalling accumulation unit Cts2 is connected to lead-out terminal selectively.More particularly, the first noise signal is built up unit Ctn1 and is connected to delivery unit 1304 via noise signal switch 1312, and the first optical signalling accumulation unit Cts1 connects via optical signalling switch 1311.The second noise signal is built up unit Ctn2 and is connected to delivery unit 1304 via noise signal switch 232, and the second optical signalling accumulation unit Cts2 connects via optical signalling switch 231.This allows delivery unit 1304 via public source follower SFsn noise signal or optical signalling to be sent to the second accumulation unit 206 selectively.Therefore, the noise signal that is kept by the second accumulation unit 206 can comprise identical fixed pattern noise with optical signalling.That is to say, can eliminate the fixed pattern noise that the variation by the threshold voltage of the nmos pass transistor MSN of source follower SFsn generates by the difference between calculating noise signal and the optical signalling.
The second reset unit 1315 comprises reset transistor MRA.Reset transistor MRA also is connected to the input terminal of delivery unit 1304.Reset transistor MRA resets to the current potential of the grid of the nmos pass transistor MSN of source follower SFsn.
More particularly, reading circuit 910 is driven, as shown in figure 19.Notice that φ CRT is with shown in Figure 10 identical.
During period BLKc (that is, the first period, seeing Figure 10), in the effective while of φ CTR, φ R is also effective.Reset transistor MRA is to the current potential of the grid of the nmos pass transistor MSN of source follower SFsn reset (for example, being reset to earth level).
In the effective while of φ TS2, φ TS3 is also effective.To be sent to the second optical signalling by the optical signalling that the first optical signalling accumulation unit Cts1 keeps via optical signalling switch 1311, delivery unit 1304 and optical signalling switch 231 and build up unit Cts2.
Then, again so that φ R is effective.Reset transistor MRA is again to the current potential of the grid of the nmos pass transistor MSN of source follower SFsn reset (for example, being reset to earth level).
In the effective while of φ TN2, φ TN3 is also effective.To be sent to the second noise signal by the noise signal that the first noise signal accumulation unit Ctn1 keeps via noise signal switch 1312, delivery unit 1304 and noise signal switch 232 and build up unit Ctn2.
Will be described in so that φ TN2 is effective before again so that thereby φ R effectively makes reset transistor MRA again carry out the reason that resets.Building up optical signalling that unit Cts1 keeps by the first optical signalling changes according to the amount of incident light.Therefore, the signal (residue signal) that remains among the parasitic capacitance Cp1 of input terminal (input node NX1) of delivery unit 1304 also greatly changes according to light.During the effectual time of φ TN2, delivery unit 1304 is from the lead-out terminal output signal corresponding with the signal that is kept by the first noise signal accumulation unit Ctn1 and the vicissitudinous residue signal of tool.If not again so that φ R is effective, then by given linear deteriorated of the amount of incident light.This may hinder and obtain satisfied signal.
If the effectual time of φ TN2 and φ TN3 is placed on before the effectual time of φ TS2 and φ TS3, as shown in figure 20, then need not so that φ R is again effective.Reason is as follows.
Building up noise signal that unit Ctn1 keeps by the first noise signal almost is to be independent of the amount of incident light and constant.Therefore, remain in that signal (that is, residue signal) in the parasitic capacitance of input terminal of delivery unit 1304 also almost is independent of light and constant.During the effectual time of φ TS2, delivery unit 1304 is from lead-out terminal output and the signal that is kept by the first noise signal accumulation unit Ctn1 and almost be constant signal corresponding to residue signal.Even without so that φ R is again effective, not deteriorated by the linearity that the amount of incident light is given yet, and gain only slightly reduces.The amount that gain reduces is corresponding to the ratio of the capacitance of the first optical signalling accumulation unit Cts1 with the parasitic capacitance of the input terminal of delivery unit 1304.
The parasitic capacitance of delivery unit 1304 is tens fF for example.The electric capacity that the first optical signalling is built up unit Cts1 is typically designed as several pF.In the case, the amount that reduces about the gain in driving method shown in Figure 19 is several percentage points, can not bring problem like this.Compare with the driving method of Figure 19, because not again so that φ R is effective, so the driving method of Figure 20 can shorten readout time.
Next with reference to the image sensing apparatus 1000 of Figure 21 to Figure 23 description according to sixth embodiment of the invention.Figure 21 is the view that illustrates according to the layout of the image sensing apparatus 1000 of sixth embodiment of the invention.Figure 22 is the circuit diagram that the circuit arrangement of the row of one in the reading circuit is shown.Figure 23 is the sequential chart that the operation of reading circuit is shown.Below the part that is different from the 5th embodiment will be described mainly, with the description of omitting for same section.
Except reading circuit 1010, image sensing apparatus 1000 has the basic layout identical with the 5th embodiment.The difference of reading circuit 1010 and the 5th embodiment is that it had not both had the first reset unit group 609, does not also have the second reset unit group 915, but comprises delivery unit group 1005.Delivery unit group 1005 is included as a plurality of delivery units 1404 that each row of pel array PA provide.
Buffer amplifier AMSN amplifies input signal and exports, and is similar to the source follower SFsn of the 5th embodiment.
In the 5th embodiment, reset transistor MRA (seeing Figure 18) is to the parasitic capacitance Cp1 of the input node NX1 of source follower SFsn reset (initialization).This has eliminated the residual charge from parasitic capacitance Cp1, and prevents by given linear deteriorated of the amount of incident light.
In the 6th embodiment, in the transistorized situation that the parasitic capacitance Cp2 that is not provided for the input node NX2 of buffer amplifier AMSN resets, by following operation, prevent the degradation by the given linearity of the amount of incident light.
Be outside the operation of reading circuit 1010 and the 5th embodiment different following some, as shown in figure 23.
At sequential t1, so that φ TN1 is effective, so that being transferred to noise signal from column signal line RL1, noise signal builds up unit Ctn1.Simultaneously so that φ TN2 is effective, with noise signal transmission to the input node NX2 of buffer amplifier AMSN, and the current potential of inputting node NX2 is set to reset level Vn.That is to say that the initial potential Vn of input node NX2 equals the current potential that noise signal is built up unit Ctn1.Owing to using from the noise signal of pixel output to come input node NX2 is resetted, therefore might in the transistorized situation that parasitic capacitance Cp2 is resetted it not resetted.
At sequential t2, so that φ TN2 is invalid, to disconnect the connection in the path from column signal line RL1 to node NX2.Finish thus resetting of parasitic capacitance Cp2.
At sequential t3, so that φ TN1 is invalid.Owing to cut off noise signal switch 202, so noise signal is built up unit Ctn1 maintenance noise signal.
At sequential t4, so that φ TS1 is effective.Turn on-switch 201 will be building up unit Cts1 to optical signalling via the optical signal transmission that column signal line RL1 is transmitted.
At sequential t5, so that φ TS1 is invalid.Cut off switch 201, and optical signalling is built up the optical signalling that Cts1 maintenance in unit is transmitted.If Vs is the signal voltage of this moment.Optical signalling is built up unit Cts1 and is preserved voltage (Vn+Vs).
At sequential t6, so that φ TN2 is effective, cut apart with the electric capacity between the capacitance of the capacitance of building up unit Ctn1 by noise signal and parasitic capacitance Cp2, will build up the noise signal that unit Ctn1 keeps by noise signal and read into node NX2.At this moment, owing to build up voltage that unit Ctn1 keeps and the voltage that kept by parasitic capacitance Cp2 Vn both by noise signal, so the voltage of node NX2 does not change.That is to say that the noise signal that reads into node NX2 is:
Vxn＝Vn ...(11)
In addition, so that φ TN3 is effective, is sent to noise signal with the noise signal that will read into node NX2 via buffer amplifier AMSN and builds up unit Ctn2.
At sequential t7, so that φ TN3 is invalid.Owing to cut off switch 232, so noise signal is built up the noise signal that Ctn2 maintenance in unit is transmitted.
At sequential t8, so that φ TN2 is invalid, to cut off switch 1312.
At sequential t9, so that φ TS2 is effective, cuts apart and will build up the optical signalling that unit Cts1 kept by optical signalling and read into node NX2 with the electric capacity between the capacitance of the capacitance of building up unit Cts1 by optical signalling and parasitic capacitance Cp2.
If C1 is the capacitance that optical signalling is built up unit Cts1.Build up the electrode pair of reference side (ground connection side) electrode of unit Cts1 is built up by the represented electric charge of following formula in the face of optical signalling:
Q1＝C1＊(Vs+Vn) ...(12)
If Cp is the capacitance of parasitic capacitance Cp2.Node NX2 is to being built up by the represented electric charge of following formula:
Qp＝Cp＊Vn ...(13)
The optical signalling that reads into node NX2 is provided by following formula:
Vxs＝(Q1+Qp)/(C1+Cp)
＝{C1/(C1+Cp)}＊Vs+Vn ...(14)
In addition, so that φ TS3 is effective, is sent to optical signalling with the optical signalling that will read into node NX2 via buffer amplifier AMSN and builds up unit Cts2.At sequential t10, so that φ TS3 is invalid.Owing to cut off switch 231, so optical signalling is built up the optical signalling that Cts2 maintenance in unit is transmitted.
At sequential t11, so that φ TS2 is invalid, to cut off switch 1311.
Then, output unit 120 (seeing Figure 21) calculate by the represented Vxn of formula (11) with by the difference between the represented Vxs of formula (14), with generation by the given picture signal of following formula:
ΔV＝Vxn-Vxs
＝{C1/(C1+Cp)}＊Vs ...(15)
Obtain from wherein having eliminated the picture signal Δ V of noise signal Vn, as indicated by formula (15).
As mentioned above, according to this embodiment, might be in the situation that the second reset unit (reset transistor MRA) is not provided the parasitic capacitance of the input node of delivery unit be resetted.This has prevented deteriorated by the given linearity of the amount of incident light.
In the 6th embodiment, NX2 resets to node, thereby noise signal is built up unit Ctn1 and node NX2 is equipotential.After this, the capacitance of building up unit Ctn1 by noise signal is cut apart with the electric capacity between the capacitance of the parasitic capacitance Cp2 of node NX2 and will be read into node NX2 by the noise signal that accumulation unit Ctn1 keeps.
Replace, can reset to node NX2, thereby optical signalling is built up unit Cts1 and node NX2 is equipotential.After this, can build up that electric capacity between the capacitance of parasitic capacitance Cp2 of the capacitance of unit Cts1 and node NX2 is cut apart and will read into node NX2 by building up the optical signalling that unit Cts1 keeps by optical signalling.
In the case, during the period from time t4i to t12i so that φ TS2 is effective, rather than during the period from time t1 to t2 so that φ TN2 effectively (seeing Figure 23), as shown in figure 24.
At sequential t12i, so that φ TS2 is invalid.Optical signalling is built up each the preservation voltage (Vn+Vs) among unit Cts1 and the node NX2.Owing to using from the optical signalling of pixel output to come input node NX2 is resetted, therefore might in the transistorized situation that parasitic capacitance Cp2 is resetted parasitic capacitance Cp2 not resetted.
At sequential t6, so that φ TN2 is effective, cuts apart and will build up the noise signal that unit Ctn1 kept by noise signal and read into node NX2 with the electric capacity between the capacitance of the capacitance of building up unit Ctn1 by noise signal and parasitic capacitance Cp2.
If C2 is the capacitance that noise signal is built up unit Ctn1.The electrode pair of reference side (ground connection side) electrode of face of noise signal pcl product unit Ctn1 is built up by the represented electric charge of following formula:
Q2＝C2＊Vn ...(16)
If Cp is the capacitance of parasitic capacitance Cp2.Node NX2 is to being built up by the represented electric charge of following formula:
Qp＝Cp＊(Vs+Vn) ...(17)
The noise signal that reads into node NX2 is provided by following formula:
Vxn＝(Q2+Qp)/(C2+Cp)
＝{Cp/(C2+Cp)}＊Vs+Vn ...(18)
At sequential t9, so that φ TS2 is effective, cuts apart and will build up the optical signalling that unit Cts1 kept by optical signalling and read into node NX2 with the electric capacity between the capacitance of the capacitance of building up unit Cts1 by optical signalling and parasitic capacitance Cp2.At this moment, the optical signalling that reads into node NX2 is provided by following formula:
Vxs＝Vs+Vn ...(19)
Then, output unit 120 (seeing Figure 21) calculate by the represented Vxn of formula (18) with by the difference between the represented Vxs of formula (19), with generation by the given picture signal of following formula:
ΔV＝Vxn-Vxs
＝{C2/(C2+Cp)}＊Vs ...(20)
Obtain from wherein having eliminated the picture signal Δ V of noise signal Vn, as indicated by formula (20).
As mentioned above, according to this modified example, might be in the situation that the second reset unit (Figure 18 is described to be resetted to transistor MRA) is not provided the parasitic capacitance of the input node of delivery unit be resetted.This has prevented deteriorated by the given linearity of incident light quantity.
Although described the present invention with reference to exemplary embodiment, should be understood that to the invention is not restricted to disclosed exemplary embodiment.The scope of claims is consistent with the most wide in range explanation, thereby comprises the modification that all are such and the 26S Proteasome Structure and Function that is equal to.
Claims (11)
1. image sensing apparatus comprises:
The first pixel and the second pixel respectively comprise photoelectric conversion unit;
Column signal line (RL1), described column signal line are connected to described the first pixel and the second pixel;
Reading circuit (110), described reading circuit via described column signal line from described the first pixel and the second pixel read output signal;
The first and second output lines (121,122), described the first and second output lines are connected to described reading circuit; And
Output unit, described output unit be according to the signal that is outputed to described the first and second output lines by described reading circuit, output image signal,
Wherein, described reading circuit comprises:
The first optical signalling is built up unit (cts1), and described the first optical signalling is built up the optical signalling that the unit keeps being output to described column signal line,
The first noise signal is built up unit (ctn1), and described the first noise signal is built up the noise signal that the unit keeps being output to described column signal line,
The first cut-off/close unit (201,202), the described column signal line of described the first cut-off/close unit cut-off/close and described the first optical signalling build up between the unit be connected and described column signal line and described the first noise signal accumulation unit between being connected,
The second optical signalling is built up unit (cts2),
The second noise signal is built up unit (ctn2),
Impedance transformer (204), described impedance transformer will be sent to described the second optical signalling by the signal that described the first optical signalling accumulation unit keeps and build up the unit, and will be sent to by the signal that described the first noise signal accumulation unit keeps described the second noise signal accumulation unit, and
The second cut-off/close unit (231,232), the described impedance transformer of described the second cut-off/close unit cut-off/close and described the second optical signalling build up between the unit be connected and described impedance transformer and described the second noise signal accumulation unit between being connected
Wherein, described the first optical signalling is built up the capacitance of unit less than the capacitance of described the second optical signalling accumulation unit,
Described the first noise signal is built up the capacitance of unit less than the capacitance of described the second noise signal accumulation unit,
Build up signal that the unit keeps by described the second optical signalling and built up the ratio between the capacitance of the capacitance of unit and the first output line based on described the second optical signalling and be sent to described output unit,
Build up signal that the unit keeps by described the second noise signal and built up the ratio between the capacitance of the capacitance of unit and the second output line based on described the second noise signal and be sent to described output unit,
During the first period, the optical signalling of described the first pixel and noise signal are built up the unit by described impedance transformer from described the first optical signalling respectively and are sent to described the second optical signalling accumulation unit and are sent to described the second noise signal accumulation unit from described the first noise signal accumulation unit, and
During the second period after described the first period, build up unit and described the first noise signal by described the first optical signalling respectively and build up the unit and keep being output to the operation of the optical signalling of described the second pixel of described column signal line and noise signal and optical signalling that will described the first pixel and noise signal and build up the operation that unit and the second noise signal accumulation unit be sent to described output unit from described the second optical signalling respectively and be executed in parallel.
2. according to claim 1 image sensing apparatus, wherein
Described reading circuit further comprises: the 3rd cut-off/close unit, described the second optical signalling of described the 3rd cut-off/close unit cut-off/close build up between unit and described the first output line be connected and described the second noise signal accumulation unit and described the second output line between be connected
Described the 3rd cut-off/close unit with described the second optical signalling build up between unit and described the first output line be connected and described the second noise signal accumulation unit and described the second output line between be connected and be arranged on closure state, be connected to described the first output line and described the second noise signal accumulation unit is connected to described the second output line respectively described the second optical signalling is built up the unit, and output builds up the unit by described the second optical signalling and described the second noise signal is built up the signal that the unit keeps.
3. according to claim 1 image sensing apparatus, wherein
Described impedance transformer is sent to described the second optical signalling accumulation unit with the signal corresponding with the electric charge that is kept by described the first optical signalling accumulation unit, and the signal corresponding with the electric charge that is kept by described the first noise signal accumulation unit is sent to described the second noise signal accumulation unit.
4. according to claim 3 image sensing apparatus, wherein
Described impedance transformer comprises the first and second MOS transistor (AMS, AMN),
The first MOS transistor receives by described the first optical signalling via its grid and builds up the signal that the unit keeps, and builds up the output signal corresponding with the signal that is imported into its grid in unit via its source electrode to described the second optical signalling, and
The second MOS transistor receives by described the first noise signal via its grid and builds up the signal that the unit keeps, and builds up the output signal corresponding with the signal that is imported into its grid in unit via its source electrode to described the second noise signal.
5. according to claim 1 image sensing apparatus, wherein
Described reading circuit further comprises: reset unit (709), and the current potential that described reset unit is built up unit and described the second noise signal accumulation unit to described the second optical signalling resets,
Described impedance transformer comprises the first and second nmos pass transistor (MS, MN), wherein, the first nmos pass transistor receives by described the first optical signalling via its grid and builds up the signal that the unit keeps, and via its source electrode output signal corresponding with the signal that is imported into its grid that is connected to described the second optical signalling accumulation unit by described the second cut-off/close unit, and second nmos pass transistor receive by described the first noise signal via its grid and build up the signal that the unit keeps, and via its source electrode output signal corresponding with the signal that is imported into its grid that is connected to described the second noise signal accumulation unit by described the second cut-off/close unit
If V1 is the current potential that described the first optical signalling accumulation unit and described the first noise signal are built up the unit, Vthn is the threshold voltage of described the first and second nmos pass transistors, and V2 is the current potential that described the second optical signalling is built up unit and described the second noise signal accumulation unit, the current potential V2 that described reset unit is built up unit and described the second noise signal accumulation unit to described the second optical signalling that disconnects from described impedance transformer resets, to satisfy:
V2≤V1-Vthn, and
When the source electrode of described the first nmos pass transistor and described the second nmos pass transistor was connected to described the second optical signalling and builds up unit and described the second noise signal and build up unit via described the second cut-off/close unit respectively, described the first nmos pass transistor and described the second nmos pass transistor will described the second optical signalling be built up current potential that unit and described the second noise signal build up unit from the potential rise that resetted by described reset unit to corresponding with built up optical signalling that unit and described the first noise signal accumulation unit keep and noise signal by described the first optical signalling respectively current potential.
6. according to claim 1 image sensing apparatus, wherein
Described reading circuit further comprises: reset unit (709a), and the current potential that described reset unit is built up unit and described the second noise signal accumulation unit to described the second optical signalling resets,
Described impedance transformer comprises the first and second PMOS transistor (MSa, MNa), wherein, the one PMOS transistor receives by described the first optical signalling via its grid and builds up the signal that the unit keeps, and via its source electrode output signal corresponding with the signal that is imported into its grid that is connected to described the second optical signalling accumulation unit by described the second cut-off/close unit, and the 2nd the PMOS transistor receive by described the first noise signal via its grid and build up the signal that the unit keeps, and via its source electrode output signal corresponding with the signal that is imported into its grid that is connected to described the second noise signal accumulation unit by described the second cut-off/close unit
If V1 is the current potential that described the first optical signalling accumulation unit and described the first noise signal are built up the unit, Vthp is the transistorized threshold voltages of described the first and second PMOS, and V2 is the current potential that described the second optical signalling is built up unit and described the second noise signal accumulation unit, the current potential V2 that described reset unit is built up unit and described the second noise signal accumulation unit to described the second optical signalling that disconnects from described impedance transformer resets, to satisfy:
V2 〉=V1-Vthp, and
When a described PMOS transistor and the transistorized source electrode of described the 2nd PMOS were connected to described the second optical signalling and build up unit and described the second noise signal and build up unit via described the second cut-off/close unit respectively, a described PMOS transistor and described the 2nd PMOS transistor will described the second optical signalling be built up current potential that unit and described the second noise signal build up unit and are reduced to respectively the current potential corresponding with built up optical signalling that unit and described the first noise signal accumulation unit keep and noise signal by described the first optical signalling from the current potential that is resetted by described reset unit.
7. according to claim 1 image sensing apparatus, wherein
Build up unit and be sent to described the second optical signalling and build up unit and described the second noise signal and build up the required time of unit and be shorter than and during described the second period, make described the first optical signalling build up unit and described the first noise signal to build up the required time of signal that unit keeps being output to described second pixel of described column signal line during described the first period, by described impedance transformer, the signal of described the first pixel being built up to unit and described the first noise signal from described the first optical signalling.
8. image sensing apparatus comprises:
The first and second pixels, each pixel comprises photoelectric conversion unit;
Column signal line, described column signal line are connected to described the first and second pixels;
Reading circuit, described reading circuit via described column signal line from described the first and second pixel read output signals;
Output line, described output line is connected to described reading circuit; And
Output unit, described output unit be according to the signal that is outputed to described output line by described reading circuit, output image signal,
Wherein, described reading circuit comprises:
First builds up the unit, and described first builds up the signal that the unit keeps being output to described column signal line,
The first cut-off/close unit, the described column signal line of described the first cut-off/close unit cut-off/close is built up being connected between the unit with described first,
Second builds up the unit,
Impedance transformer, described impedance transformer will be sent to described second by the signal that described the first accumulation unit keeps and build up the unit, and
The second cut-off/close unit, the described impedance transformer of described the second cut-off/close unit cut-off/close is built up being connected between the unit with described second,
Described first builds up the capacitance of unit less than the capacitance of described the second accumulation unit,
Build up signal that the unit keeps by described second and built up the ratio between the capacitance of the capacitance of unit and described output line and be sent to described output unit based on described second,
Described first builds up the unit comprises:
The first noise signal is built up the unit, and described the first noise signal is built up the noise signal that the unit keeps outputing to described column signal line, and
The first optical signalling is built up the unit, and described the first optical signalling is built up the optical signalling that the unit keeps outputing to described column signal line,
Described second builds up the unit comprises:
The second noise signal is built up the unit, and the signal that is kept by described the first noise signal accumulation unit is transferred into described the second noise signal accumulation unit, and
The second optical signalling is built up the unit, and the signal that is kept by described the first optical signalling accumulation unit is transferred into described the second optical signalling accumulation unit,
Described impedance transformer has: input terminal, described input terminal are connected respectively to described the first noise signal and build up unit and described the first optical signalling accumulation unit; And lead-out terminal, described lead-out terminal is connected respectively to described the second noise signal and builds up unit and described the second optical signalling accumulation unit, and
Described output unit is built up difference between the unit signal that keeps and the signal that is kept by described the second optical signalling accumulation unit by calculating by described the second noise signal, exports described picture signal, and
Wherein, during the first period, the signal of the first pixel is built up the unit by described impedance transformer from described first and is sent to described the second accumulation unit, and
During the second period after described the first period, build up by described first that the unit keeps being output to the operation of signal of described the second pixel of described column signal line and signal that will described the first pixel is executed in parallel from the operation that described the second accumulation unit is sent to described output unit.
9. image sensing apparatus comprises:
The first pixel;
The second pixel;
Column signal line, described column signal line are connected to described the first pixel and described the second pixel;
Reading circuit, described reading circuit via described column signal line from described the first pixel and described the second pixel read output signal;
Driver element, described the first pixel of described drive unit drives, described the second pixel and described reading circuit;
Output line (121,122), described output line is connected to described reading circuit; And
Output unit (120), described output unit be according to the signal that is outputed to described output line by described reading circuit, output image signal,
Wherein, described reading circuit comprises:
First builds up unit (1103), and described first builds up the unit keeps the optical signalling corresponding with the signal that is output to described column signal line,
Second builds up unit (206),
Impedance transformer (1104), described impedance transformer will be sent to described second by the described first noise signal of building up optical signalling that the unit keeps and described impedance transformer and build up the unit, described first builds up between the lead-out terminal that the unit is connected the input terminal of described impedance transformer and described impedance transformer, and
The first cut-off/close unit (1101), the path between the described input terminal of described the first described column signal line of cut-off/close unit cut-off/close and described impedance transformer,
The second cut-off/close unit, the described lead-out terminal of the described impedance transformer of described the second cut-off/close unit cut-off/close is built up being connected between the unit with described second,
Described first builds up the capacitance of unit less than the capacitance of described the second accumulation unit,
Build up signal that the unit keeps by described second and built up the ratio between the capacitance of the capacitance of unit and described output line and output to described output unit based on described second, and
Described the first pixel of described drive unit drives, described the second pixel and described reading circuit, so that during the first period, the optical signalling of described the first pixel and the noise signal of described impedance transformer are built up the unit via described impedance transformer from described first and are sent to described the second accumulation unit, and so that during the second period after described the first period, be executed in parallel from the operation that described the second accumulation unit is sent to described output unit by the operation of described the first accumulation unit maintenance optical signalling corresponding with the signal of described the second pixel that is output to described column signal line with the optical signalling of described the first pixel and the noise signal of described impedance transformer.
10. image sensing apparatus as claimed in claim 9, wherein
The output of described impedance transformer from described lead-out terminal via the described first signal of building up the unit feedback and difference signal based on the signal of the signal that is output to described column signal line.
11. an imaging system comprises:
Each image sensing apparatus in the claim 1 to 10;
Optical system, described optical system forms image at the imaging surface of described image sensing apparatus; And
Signal processing unit, described signal processing unit processes is from the signal of described image sensing apparatus output, with image data generating.
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| JP2007-240182 | 2007-09-14 | ||
| JP2007240182 | 2007-09-14 | ||
| JP2008217326A JP4673396B2 (en) | 2007-09-14 | 2008-08-26 | Imaging apparatus and imaging system |
| JP2008-217326 | 2008-08-26 |
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| FR2929055B1 (en) * | 2008-03-19 | 2010-05-28 | Commissariat Energie Atomique | SYSTEM FOR CONVERTING CHARGES IN VOLTAGE AND METHOD FOR CONTROLLING SUCH A SYSTEM |
| JP5161676B2 (en) * | 2008-07-07 | 2013-03-13 | キヤノン株式会社 | Imaging apparatus and imaging system |
| JP2012006257A (en) * | 2010-06-24 | 2012-01-12 | Canon Inc | Image processing apparatus and method |
| US8637800B2 (en) * | 2011-04-19 | 2014-01-28 | Altasens, Inc. | Image sensor with hybrid heterostructure |
| JP6223000B2 (en) | 2012-08-23 | 2017-11-01 | キヤノン株式会社 | Imaging device |
| JP2015142351A (en) | 2014-01-30 | 2015-08-03 | キヤノン株式会社 | Imaging apparatus and imaging system |
| JP6341688B2 (en) * | 2014-02-25 | 2018-06-13 | キヤノン株式会社 | Solid-state imaging device and imaging system |
| FR3091113B1 (en) * | 2018-12-21 | 2021-03-05 | Trixell | Matrix detector with controlled impedance line conductors |
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| CN1162888A (en) * | 1996-01-24 | 1997-10-22 | 佳能株式会社 | Photoelectric converting apparatus |
| CN1697494A (en) * | 2004-05-13 | 2005-11-16 | 佳能株式会社 | Solid-state image pickup device and camera using the same solid-state image pickup device |
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| JPH10233964A (en) * | 1997-02-20 | 1998-09-02 | Nikon Corp | Solid-state image pickup device for forming binary signal |
| US6377304B1 (en) * | 1998-02-05 | 2002-04-23 | Nikon Corporation | Solid-state image-pickup devices exhibiting faster video-frame processing rates, and associated methods |
| JP3667186B2 (en) * | 2000-02-29 | 2005-07-06 | キヤノン株式会社 | Signal transfer device and solid-state imaging device using the same |
| JP4144578B2 (en) * | 2003-10-15 | 2008-09-03 | ソニー株式会社 | Solid-state imaging device and pixel signal processing method |
| JP4290066B2 (en) * | 2004-05-20 | 2009-07-01 | キヤノン株式会社 | Solid-state imaging device and imaging system |
| JP4290071B2 (en) * | 2004-06-02 | 2009-07-01 | キヤノン株式会社 | Solid-state imaging device and imaging system |
| JP4510523B2 (en) * | 2004-06-02 | 2010-07-28 | キヤノン株式会社 | Solid-state imaging device and imaging system |
| JP2005354484A (en) * | 2004-06-11 | 2005-12-22 | Canon Inc | Amplification type memory device and solid state image pick-up device |
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2008
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- 2008-09-12 RU RU2008136807/09A patent/RU2390878C1/en not_active IP Right Cessation
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| CN1162888A (en) * | 1996-01-24 | 1997-10-22 | 佳能株式会社 | Photoelectric converting apparatus |
| CN1697494A (en) * | 2004-05-13 | 2005-11-16 | 佳能株式会社 | Solid-state image pickup device and camera using the same solid-state image pickup device |
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Also Published As
| Publication number | Publication date |
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| CN101415064A (en) | 2009-04-22 |
| JP2009089367A (en) | 2009-04-23 |
| RU2008136807A (en) | 2010-03-20 |
| RU2390878C1 (en) | 2010-05-27 |
| CN101415064B (en) | 2010-11-17 |
| JP4673396B2 (en) | 2011-04-20 |
| CN101945204A (en) | 2011-01-12 |
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