CN101930941A - Manufacturing method of shallow trench isolation structure - Google Patents
Manufacturing method of shallow trench isolation structure Download PDFInfo
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- CN101930941A CN101930941A CN2010102416155A CN201010241615A CN101930941A CN 101930941 A CN101930941 A CN 101930941A CN 2010102416155 A CN2010102416155 A CN 2010102416155A CN 201010241615 A CN201010241615 A CN 201010241615A CN 101930941 A CN101930941 A CN 101930941A
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- isolation structure
- fleet plough
- manufacture method
- silicon oxynitride
- oxynitride layer
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Abstract
The invention discloses a manufacturing method of a shallow trench isolation structure, comprising the following steps: providing a semiconductor substrate with a trench; forming a silicon oxynitride layer at the bottom and on the side wall of the trench; and filling an insulating medium in the trench. The silicon oxynitride layer has preferable corrosion resistance, so that the layer is not corroded in the event that hydrofluoric acid solution is employed in a subsequent wet etching process, thus avoiding the defect of a side ditch occurred on the border of the shallow trench isolation structure, preventing electric leakage at the edge of the shallow trench isolation structure, and improving performance of a semiconductor device.
Description
Technical field
The present invention relates to integrated circuit and make field, particularly a kind of manufacture method of fleet plough groove isolation structure.
Background technology
Along with the process node development of semiconductor fabrication process to little live width, isolation technology between semiconductor device is also by early stage selective oxidation (Local Oxidation of Silicon, LOCOS) technological development to shallow trench isolation from (Shallow Trench Isolation, STI) technology.Because shallow ditch groove separation process directly has influence on leakage current and other electric property between the semiconductor device on the Semiconductor substrate, thereby industry always improves the performance of fleet plough groove isolation structure by the whole bag of tricks.
Specifically please refer to Figure 1A to Fig. 1 F, it is the generalized section of each step corresponding construction of the manufacture method of existing fleet plough groove isolation structure.
Shown in Figure 1A, at first, provide Semiconductor substrate 100, and on described Semiconductor substrate 100, form hard mask layer 110 and graphical photoresist layer 120.
Shown in Figure 1B, then, the hard mask layer 110 of the described graphical photoresist layer of etching 120 bottoms, to form opening 111, described opening exposes the surface of described Semiconductor substrate 100.
Shown in Fig. 1 C, then, the Semiconductor substrate 100 that the described opening 111 of etching exposes is to form groove 112 in described Semiconductor substrate 100.
Shown in Fig. 1 D, subsequently, bottom and sidewall at described groove 112 form pad oxide 130, and the material of described pad oxide 130 is a silica, and the mode that described pad oxide 130 utilizes situ steam to generate technology (ISSG), rapid thermal oxidation process (RTO) or boiler tube thermal oxidation usually forms.
Shown in Fig. 1 E, thereafter, fill insulant 140 in described groove 112 and opening 111.
Shown in Fig. 1 F, last, utilize chemical mechanical milling tech to remove unnecessary insulating material, and remove hard mask layer 110 on the Semiconductor substrate 100, to form fleet plough groove isolation structure by the mode of wet-cleaned.
Yet; in actual production, find; in wet-cleaned and follow-up wet-etching technology; use hydrofluoric acid solution through regular meeting; owing to passed through the hydrofluoric acid treatment process of long period, the pad oxide of described fleet plough groove isolation structure sidewall 130 is corroded through regular meeting, causes described fleet plough groove isolation structure pattern to be affected; in the gutter defective (divot defect) of the drift angle place of described fleet plough groove isolation structure appearance shown in dotted line among Fig. 1 F, influence the electric property of semiconductor device.
Summary of the invention
The invention provides a kind of manufacture method of fleet plough groove isolation structure,, be prone to the problem of gutter defective at the fleet plough groove isolation structure edge to solve existing fleet plough groove isolation structure in carrying out wet corrosion technique.
For solving the problems of the technologies described above, the invention provides a kind of manufacture method of fleet plough groove isolation structure, comprising: the Semiconductor substrate with groove is provided; Bottom and sidewall at described groove form silicon oxynitride layer; In described groove, fill dielectric.
Optionally, in the manufacture method of described fleet plough groove isolation structure, in boiler tube, carry out in the bottom of described groove and the step of sidewall formation silicon oxynitride layer.
Optionally, in the manufacture method of described fleet plough groove isolation structure, form in the step of silicon oxynitride layer in the bottom of described groove and sidewall, employed reacting gas is nitrous oxide, dichlorosilane and ammonia.
Optionally, in the manufacture method of described fleet plough groove isolation structure, the flow of described nitrous oxide is 80～200sccm, and the flow of described dichlorosilane is 30～150sccm, and the flow of described ammonia is 50～300sccm.
Optionally, in the manufacture method of described fleet plough groove isolation structure, form in the step of silicon oxynitride layer in the bottom of described groove and sidewall, the temperature that is adopted is 600～1000 ℃.
Optionally, in the manufacture method of described fleet plough groove isolation structure, form in the step of silicon oxynitride layer in the bottom of described groove and sidewall, the pressure in the described boiler tube is 50～300mTorr.
Optionally, in the manufacture method of described fleet plough groove isolation structure, the thickness of described silicon oxynitride layer
Optionally, in the manufacture method of described fleet plough groove isolation structure, before the bottom of described groove and sidewall formed the step of silicon oxynitride layer, also comprise: bottom and sidewall at described groove formed silicon oxide layer.
Optionally, in the manufacture method of described fleet plough groove isolation structure, utilize high density plasma CVD technology in described groove, to fill dielectric.
Optionally, in the manufacture method of described fleet plough groove isolation structure, in described groove, fill after the step of dielectric, also comprise: the surface that utilizes the described Semiconductor substrate of chemical mechanical milling tech planarization.
Owing to adopted above technical scheme, compared with prior art, the present invention has the following advantages:
The manufacture method of described fleet plough groove isolation structure forms silicon oxynitride layer at the bottom and the sidewall of groove, the corrosion resistance of described silicon oxynitride layer is preferable, even in follow-up wet-etching technology, use hydrofluoric acid solution, described silicon oxynitride layer can not be corroded yet, thereby prevent from gutter to occur at the fringe region of fleet plough groove isolation structure, avoid the edge current leakage of described fleet plough groove isolation structure, improved the performance of semiconductor device.
Description of drawings
Figure 1A to Fig. 1 F is the generalized section of each step corresponding construction of the manufacture method of existing fleet plough groove isolation structure;
Fig. 2 is the flow chart of the manufacture method of the fleet plough groove isolation structure that the embodiment of the invention provided;
Fig. 3 A to Fig. 3 F is the generalized section of each step corresponding construction of the manufacture method of the fleet plough groove isolation structure that the embodiment of the invention provided.
Embodiment
Core concept of the present invention is, a kind of manufacture method of fleet plough groove isolation structure is provided, this method forms silicon oxynitride layer at the bottom and the sidewall of groove, the corrosion resistance of described silicon oxynitride layer is preferable, even use hydrofluoric acid solution in follow-up wet-etching technology, described silicon oxynitride layer can not be corroded yet, thereby avoids gutter occurring at the fringe region of fleet plough groove isolation structure, prevent the edge current leakage of described fleet plough groove isolation structure, improved the performance of semiconductor device.
Please refer to Fig. 2, it is the flow chart of the manufacture method of the fleet plough groove isolation structure that the embodiment of the invention provided, and in conjunction with this figure, this method may further comprise the steps:
Step S210 provides the Semiconductor substrate with groove;
Step S220 forms silicon oxynitride layer at the bottom and the sidewall of described groove;
Step S230 fills dielectric in described groove.
Be described in more detail below in conjunction with the manufacture method of generalized section fleet plough groove isolation structure of the present invention, the preferred embodiments of the present invention have wherein been represented, should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
With reference to Fig. 3 A, at first, provide Semiconductor substrate 300, the material of described Semiconductor substrate 300 can be monocrystalline silicon or polysilicon, this Semiconductor substrate 300 also can comprise insulating barrier silicon-on or silicon Germanium compound.Afterwards, on described Semiconductor substrate 300, form hard mask layer 310 and graphical photoresist layer 320.Described hard mask layer 310 can be used as the hard mask when forming groove 312, and the grinding that can be used as the chemical mechanical milling tech behind the filling groove stops layer.
Shown in Fig. 3 B, then, the hard mask layer 310 that the described graphical photoresist layer 320 of etching exposes, to form opening 311, described opening 311 exposes the surface of described Semiconductor substrate 300.
Shown in Fig. 3 C, then, the Semiconductor substrate 300 that the described opening 311 of etching exposes, to form groove 312 in Semiconductor substrate 300, preferable, the opening at the top of described groove 312 is bigger, can make follow-up fill process become simple.
Shown in Fig. 3 D, committed step of the present invention is, at the bottom and the sidewall formation silicon oxynitride layer 330 of described groove 312.The corrosion resistance of described silicon oxynitride layer 330 is preferable, even in follow-up wet-etching technology, use hydrofluoric acid solution, described silicon oxynitride layer 330 can not be corroded yet, thereby avoid gutter occurring at the fringe region of fleet plough groove isolation structure, prevent the edge current leakage of described fleet plough groove isolation structure, improved the performance of semiconductor device.
In the present embodiment, carry out in boiler tube in the bottom of described groove 312 and the step of sidewall formation silicon oxynitride layer 330, employed reacting gas is nitrous oxide (N
2O), dichlorosilane (SiH
2Cl
2) and ammonia (NH
3), the flow by adjusting described ammonia is the concentration of the nitrogen in the described silicon oxynitride layer of may command also, can make performance the best of described silicon oxynitride layer 330.
Preferable, the flow of described nitrous oxide is 80～200sccm, and the flow of described dichlorosilane is 30～150sccm, and the flow of described ammonia is 50～300sccm, and the temperature that is adopted is 600～1000 ℃, the pressure in the described boiler tube is 50～300mTorr.
In the present embodiment, the thickness of described silicon oxynitride layer 330
Certainly, those skilled in the art can do corresponding adjustment according to the device needs and the technological requirement of reality.
In the present embodiment, before the bottom of described groove 312 and sidewall form the step of silicon oxynitride layer 330, can also be earlier form silicon oxide layer 350 at the bottom and the sidewall of described groove 312.Described silicon oxide layer 350 can be the insulating material of follow-up filling and the silicon face of described groove 312 provides stable buffering interface, and helps to reduce the leakage current along described groove 312 edges.Described silicon oxide layer 350 also can form in boiler tube, can utilize same equipment original position to form silicon oxide layer 350 and silicon oxynitride layer 330, with the transmission number of times of minimizing Semiconductor substrate at different equipment rooms, thereby reduces it by the possibility of external contamination; Because the existence of silicon oxynitride layer 330, this silicon oxynitride layer 330 can cover described silicon oxide layer 350, thereby protection silicon oxide layer 350 is not subjected to the damage of hydrofluoric acid.
Shown in Fig. 3 E, thereafter, fill insulant 340 in described groove 312 and opening 311.Preferably, utilize high-density plasma (HDP) chemical vapor deposition method to fill dielectric in described groove, described high density plasma CVD technology can form comparatively fine and close rete.
Shown in Fig. 3 F, at last, can utilize the surface of the described Semiconductor substrate of chemical mechanical milling tech planarization, to remove unnecessary insulating material; And the mode by wet-cleaned, remove the hard mask layer 310 on the Semiconductor substrate 300, to form fleet plough groove isolation structure.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (10)
1. the manufacture method of a fleet plough groove isolation structure comprises:
Semiconductor substrate with groove is provided;
Bottom and sidewall at described groove form silicon oxynitride layer;
In described groove, fill dielectric.
2. the manufacture method of fleet plough groove isolation structure as claimed in claim 1 is characterized in that, carries out in boiler tube in the bottom of described groove and the step of sidewall formation silicon oxynitride layer.
3. the manufacture method of fleet plough groove isolation structure as claimed in claim 2 is characterized in that, forms in the step of silicon oxynitride layer in the bottom of described groove and sidewall, and employed reacting gas is nitrous oxide, dichlorosilane and ammonia.
4. the manufacture method of fleet plough groove isolation structure as claimed in claim 3 is characterized in that, the flow of described nitrous oxide is 80～200sccm, and the flow of described dichlorosilane is 30～150sccm, and the flow of described ammonia is 50～300sccm.
5. the manufacture method of fleet plough groove isolation structure as claimed in claim 2 is characterized in that, forms in the step of silicon oxynitride layer in the bottom of described groove and sidewall, and the temperature that is adopted is 600～1000 ℃.
6. the manufacture method of fleet plough groove isolation structure as claimed in claim 2 is characterized in that, forms in the step of silicon oxynitride layer in the bottom of described groove and sidewall, and the pressure in the described boiler tube is 50～300mTorr.
7. the manufacture method of fleet plough groove isolation structure as claimed in claim 2 is characterized in that, the thickness 100～250 of described silicon oxynitride layer
8. the manufacture method of fleet plough groove isolation structure as claimed in claim 1 is characterized in that, before the bottom of described groove and sidewall formed the step of silicon oxynitride layer, also comprise: bottom and sidewall at described groove formed silicon oxide layer.
9. the manufacture method of fleet plough groove isolation structure as claimed in claim 1 is characterized in that, utilizes high density plasma CVD technology to fill dielectric in described groove.
10. the manufacture method of fleet plough groove isolation structure as claimed in claim 1 is characterized in that, fills after the step of dielectric in described groove, also comprises: the surface that utilizes the described Semiconductor substrate of chemical mechanical milling tech planarization.
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| CN2010102416155A CN101930941A (en) | 2010-07-30 | 2010-07-30 | Manufacturing method of shallow trench isolation structure |
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| CN2010102416155A CN101930941A (en) | 2010-07-30 | 2010-07-30 | Manufacturing method of shallow trench isolation structure |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102693932A (en) * | 2011-03-23 | 2012-09-26 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of shallow trench isolation structure |
| CN103839868A (en) * | 2014-02-21 | 2014-06-04 | 上海华力微电子有限公司 | Manufacturing method for shallow-trench isolation structure |
| CN103855070A (en) * | 2012-11-29 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | Method for flattening shallow trench isolation of ultra-low-density active region |
| CN105047644A (en) * | 2015-06-30 | 2015-11-11 | 中国电子科技集团公司第五十八研究所 | Radiation-hardened ONO antifuse unit structure and manufacturing method thereof |
| CN105826236A (en) * | 2015-01-08 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
| CN107507802A (en) * | 2017-08-31 | 2017-12-22 | 长江存储科技有限责任公司 | A kind of method of shallow trench isolation active area |
| CN107706090A (en) * | 2017-09-22 | 2018-02-16 | 德淮半导体有限公司 | Fleet plough groove isolation structure, semiconductor structure and preparation method thereof |
| CN110120364A (en) * | 2018-02-07 | 2019-08-13 | 无锡华润上华科技有限公司 | The preparation method of fleet plough groove isolation structure |
| CN112838047A (en) * | 2021-01-05 | 2021-05-25 | 长鑫存储技术有限公司 | Preparation method of semiconductor structure and semiconductor structure |
| US11881428B2 (en) | 2021-01-05 | 2024-01-23 | Changxin Memory Technologies, Inc. | Semiconductor structure and manufacturing method thereof |
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| US6165854A (en) * | 1998-05-04 | 2000-12-26 | Texas Instruments - Acer Incorporated | Method to form shallow trench isolation with an oxynitride buffer layer |
| US6251748B1 (en) * | 1998-05-05 | 2001-06-26 | United Microelectronics Corp. | Method of manufacturing shallow trench isolation structure |
| CN1485889A (en) * | 2002-09-24 | 2004-03-31 | 茂德科技股份有限公司 | Manufacturing method of dielectric layer |
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Patent Citations (3)
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| US6165854A (en) * | 1998-05-04 | 2000-12-26 | Texas Instruments - Acer Incorporated | Method to form shallow trench isolation with an oxynitride buffer layer |
| US6251748B1 (en) * | 1998-05-05 | 2001-06-26 | United Microelectronics Corp. | Method of manufacturing shallow trench isolation structure |
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Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102693932B (en) * | 2011-03-23 | 2014-06-11 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of shallow trench isolation structure |
| CN102693932A (en) * | 2011-03-23 | 2012-09-26 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of shallow trench isolation structure |
| CN103855070A (en) * | 2012-11-29 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | Method for flattening shallow trench isolation of ultra-low-density active region |
| CN103839868A (en) * | 2014-02-21 | 2014-06-04 | 上海华力微电子有限公司 | Manufacturing method for shallow-trench isolation structure |
| CN105826236A (en) * | 2015-01-08 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
| CN105047644B (en) * | 2015-06-30 | 2018-03-02 | 中国电子科技集团公司第五十八研究所 | A kind of radioresistance ONO antifuse unit structure and preparation method thereof |
| CN105047644A (en) * | 2015-06-30 | 2015-11-11 | 中国电子科技集团公司第五十八研究所 | Radiation-hardened ONO antifuse unit structure and manufacturing method thereof |
| CN107507802A (en) * | 2017-08-31 | 2017-12-22 | 长江存储科技有限责任公司 | A kind of method of shallow trench isolation active area |
| CN107706090A (en) * | 2017-09-22 | 2018-02-16 | 德淮半导体有限公司 | Fleet plough groove isolation structure, semiconductor structure and preparation method thereof |
| CN110120364A (en) * | 2018-02-07 | 2019-08-13 | 无锡华润上华科技有限公司 | The preparation method of fleet plough groove isolation structure |
| CN110120364B (en) * | 2018-02-07 | 2021-10-15 | 无锡华润上华科技有限公司 | Preparation method of shallow trench isolation structure |
| CN112838047A (en) * | 2021-01-05 | 2021-05-25 | 长鑫存储技术有限公司 | Preparation method of semiconductor structure and semiconductor structure |
| CN112838047B (en) * | 2021-01-05 | 2023-11-28 | 长鑫存储技术有限公司 | Method for preparing semiconductor structure and semiconductor structure |
| US11881428B2 (en) | 2021-01-05 | 2024-01-23 | Changxin Memory Technologies, Inc. | Semiconductor structure and manufacturing method thereof |
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