CN101924119A - Vertical phase-change storage and preparation method thereof - Google Patents
Vertical phase-change storage and preparation method thereof Download PDFInfo
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- CN101924119A CN101924119A CN 201010256816 CN201010256816A CN101924119A CN 101924119 A CN101924119 A CN 101924119A CN 201010256816 CN201010256816 CN 201010256816 CN 201010256816 A CN201010256816 A CN 201010256816A CN 101924119 A CN101924119 A CN 101924119A
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Abstract
The invention relates to a vertical phase-change storage comprising a substrate, a bottom electrode, a lower electric-heating insulating material layer, a lower heat-conductivity material wrapping layer, an upper electric-heating insulating material layer, a phase-change material plug column and a top electrode, wherein the bottom electrode is manufactured on the substrate; the lower electric-heating insulating material layer is manufactured on the bottom electrode; the lower heat-conductivity material wrapping layer is manufactured on the lower electric-heating insulating material layer; the upper electric-heating insulating material layer is manufactured on the lower heat-conductivity material wrapping layer; a small hole is positioned in the middles of the lower electric-heating insulating material layer, the lower heat-conductivity material wrapping layer and the upper electric-heating insulating material layer; the phase-change material plug column is positioned in the small hole positioned in the middles of the lower electric-heating insulating material layer, the lower heat-conductivity material wrapping layer and the upper electric-heating insulating material layer; and the top electrode is manufactured on the upper electric-heating insulating material layer and covers the phase-change material plug column.
Description
Technical field
The present invention relates to memory area, particularly a kind of vertical phase-change memory and preparation method.It is the vertical phase-change memory that wraps up with the material of lower thermal conductivity in the part of phase-change material connector.This method has realized reducing the thermal diffusion of phase-change material layers part, improve the efficiency of heating surface of phase-change material connector part, and then the position of the effective coverage that undergoes phase transition in the modulation phase transformation material plug, this position changes along with the change of the position of low thermal conductivity material integument.Therefore, this method has an enormous advantage at tool aspect the heat regulation and control of phase transition storage.
Background technology
Phase transition storage (PRAM or OUM) is had tangible resistance difference and has storage effect during based on the chalcogenide compound thin film phase change in nineteen sixty-eight by S.R.Ovshinsky and puts forward.It has read at a high speed, high erasable number of times, non-volatile, low in energy consumption, advantages such as cost is low, can multistagely store, anti-strong motion and anti-irradiation, thought most possible to replace present Flash memory by international semiconductor TIA, and become the main product of following memory and become the device of commercial product at first.Phase transition storage has had a lot of people that it is studied since being born, for example Ovonyx, Intel, IBM, Samsung, STMicroelectronics, Hitachi etc. have made it possess good performance by changing phase-change material and device architecture etc.
Phase transition storage process of (chalcogenide compound amorphous state → crystalline state) from the high-impedance state to the low resistance state is called the set process, and phase transition storage process of (chalcogenide compound crystalline state → amorphous state) from the low resistance state to the high-impedance state is called the reset process.Realize the set process, as long as on phase transition storage, apply a wide and low electric pulse, the Joule heat that electric current produces makes the temperature of chalcogenide compound be higher than its crystallization temperature and is lower than its fusing point, guarantee that like this chalcogenide compound can form the conductive channel of crystallization in the process that pulse applies, thereby realize that device is by the transformation of high-impedance state to low resistance state.Realize the reset process, as long as on phase transition storage, apply the electric pulse of " tall and thin ", the Joule heat that electric current produced makes the temperature of phase-change material in the conductive channel be elevated to more than the fusing point at short notice, subsequently in moment that " tall and thin " electric pulse is removed fast, the phase-change material that has melted is owing to quench cooled returns to amorphous state, thus the transformation of realization low resistance state → high-impedance state.This shows that Joule heat plays an important role in phase transition process, effectively reduce the thermal diffusion raising efficiency of heating surface phase transition storage is had great importance.
At present, reduce thermal diffusion and improve efficiency of heating surface method, mainly contain: between electrode and phase-change material, increase thermoresistance layer, improve phase-change material crystalline resistance rate etc.But their effective phase change region all still concentrates near the electrode mostly.Because the thermal conductivity of electrode is usually all than higher, the heat of process electrode diffusion has accounted for 60-72%.In order better to realize the higher phase transition storage of the littler efficiency of heating surface of thermal diffusion.
Summary of the invention
Main purpose of the present invention is to provide a kind of vertical phase-change memory and preparation method, has the higher advantage of the littler efficiency of heating surface of thermal diffusion of realization.
For achieving the above object, the invention provides a kind of vertical phase-change memory, comprising:
One substrate;
One bottom electrode, this bottom electrode is produced on the substrate;
Electric insulating material layer once, this time electric insulating material layer is produced on the bottom electrode;
One low thermal conductivity material integument, this low thermal conductivity material integument is produced on down on the electric insulating material layer;
Electric insulating material layer on one, electric insulating material layer is produced on the low thermal conductivity material integument on this;
There is an aperture the wherein said centre of electric insulating material layer, low thermal conductivity material integument and last electric insulating material layer down;
One phase-change material plug column, this phase-change material plug column are positioned at the middle aperture of electric insulating material layer, low thermal conductivity material integument and last electric insulating material layer down;
One top electrodes, this top electrodes is produced on the electric insulating material layer, and covers the phase-change material plug column.
Wherein said electric insulating material layer down and last electric insulating material layer are commaterials, this time electric insulating material layer is a nitride, oxide, the mixture that sulfide or wherein two or more material are formed, the thickness of this time electric insulating material layer is 0-500nm, and thickness of electric insulating material layer is 0-500nm on this.
The heat conductivity value of wherein said low thermal conductivity material integument is lower than the heat conductivity value of electric insulating material layer down, and this low thermal conductivity material integument is silica, fullerene or air, and the thickness of described low thermal conductivity material integument is 0-500nm.
The thickness of wherein said electric insulating material layer down and last electric insulating material layer can not be 0nm simultaneously.
The diameter of the aperture of wherein said aperture or phase-change material plug column is 0-500nm.
The wherein said upper surface of going up the degree of depth of the middle aperture of electric insulating material layer to the bottom electrode exposes bottom electrode.
The present invention also provides a kind of preparation method of vertical phase-change memory, and this method comprises:
Step 1: insulating or preparing bottom electrode above the Semiconductor substrate;
Step 2: electric insulating material layer, low thermal conductivity material layer and last electric insulating material layer under the one deck of growing successively again;
Step 3: utilize the micro-nano process technology to prepare aperture in the centre of last electric insulating material layer;
Step 4: in aperture, utilize the method for chemical vapor deposition to fill the phase-change material plug column, and aperture is filled up;
Step 5: with chemico-mechanical polishing or anti-carve the method for erosion, the surperficial remaining phase-change material of last electric insulating material layer is removed;
Step 6: above last electric insulating material layer, prepare top electrodes, finish the preparation of phase transition storage.
Wherein said electric insulating material layer down and last electric insulating material layer are commaterials, this time electric insulating material layer is a nitride, oxide, the mixture that sulfide or wherein two or more material are formed, the thickness of this time electric insulating material layer is 0-500nm, and thickness of electric insulating material layer is 0-500nm on this.
The heat conductivity value of wherein said low thermal conductivity material integument is lower than the heat conductivity value of electric insulating material layer down, and this low thermal conductivity material integument is silica, fullerene or air, and the thickness of described low thermal conductivity material integument is 0-500nm.
The thickness of wherein said electric insulating material layer down and last electric insulating material layer can not be 0nm simultaneously.
The diameter of the aperture of wherein said aperture or phase-change material plug column is 0-500nm.
The wherein said upper surface of going up the degree of depth of the middle aperture of electric insulating material layer to the bottom electrode exposes bottom electrode.
From technique scheme as can be seen, the present invention has following beneficial effect:
1. the effect of low thermal conductivity material integument is the thermal diffusion that reduces phase-change material connector part, improve the efficiency of heating surface of phase-change material connector part, and then the position of the effective coverage that undergoes phase transition in the modulation phase transformation material plug, this position is along with the variation of the position of low thermal conductivity material integument and thickness and change, thereby realized the Modulatory character of effective phase change region position.
2. can make effective phase change region away from electrode, because the thermal conductivity of phase-change material very low (only about 0.25W/mK) own, make effective phase change region be in the environment of low thermal conductivity material around being limited in, thereby further reduced the thermal diffusion of effective phase change region, improved the efficiency of heating surface.
Description of drawings
For further specifying technical characterictic of the present invention, in conjunction with the following drawings, the present invention is done a detailed description, wherein:
Fig. 1 is the profile of vertical phase-change memory provided by the invention;
Fig. 2 is the preparation method's of a vertical phase-change memory provided by the invention process chart;
Embodiment
See also shown in Figure 1ly, a kind of vertical phase-change memory of the present invention comprises:
One substrate 100;
One bottom electrode 101, this bottom electrode 101 is produced on the substrate 100;
Once the electric insulating material layer 102, and this time electric insulating material layer 102 is produced on the bottom electrode 101, and the described thickness of electric insulating material layer 102 down is 0-500nm;
One low thermal conductivity material integument 103, this low thermal conductivity material integument 103 is produced on down on the electric insulating material layer 102, and the heat conductivity value of this low thermal conductivity material integument 103 is lower than the heat conductivity value of electric insulating material layer 102 down; This time electric insulating material layer 102 can be a nitride, oxide, the mixture that sulfide or wherein two or more material are formed, low thermal conductivity material integument 103 can be silica, fullerene or air, the thickness of described low thermal conductivity material integument 103 is 0-500nm;
Electric insulating material layer 102 ' on one, electric insulating material layer 102 ' is produced on the low thermal conductivity material integument 103 on this, and the described thickness of going up electric insulating material layer 102 ' is 0-500nm;
Wherein said electric insulating material layer 102 down and last electric insulating material layer 102 ' are commaterials, and the thickness of described electric insulating material layer 102 down and last electric insulating material layer 102 ' can not be 0nm simultaneously;
There is an aperture 104 the wherein said centre of electric insulating material layer 102, low thermal conductivity material integument 103 and last electric insulating material layer 102 ' down, the aperture of described aperture 104 is 0-500nm, the degree of depth of the aperture 104 in the middle of the described upward electric insulating material layer 102 ' is exposed bottom electrode 101 to the upper surface of bottom electrode 101;
One phase-change material plug column 104 ', aperture 104 under this phase-change material plug column 104 ' is positioned in the middle of electric insulating material layer 102, low thermal conductivity material integument 103 and the last electric insulating material layer 102 ', the diameter of this phase-change material plug column 104 ' is 0-500nm;
One top electrodes 105, this top electrodes 105 is produced on the electric insulating material layer 102 ', and covers phase-change material plug column 104 '.
See also Fig. 2 cooperate consult shown in Figure 1, the preparation method of a kind of vertical phase-change memory of the present invention, this method comprises:
Step 1: prepare bottom electrode 101 in insulation or above the Semiconductor substrate 100;
Step 2: electric insulating material layer 102, low thermal conductivity material layer 103 and last electric insulating material layer 102 ' under the one deck of growing successively again; Wherein said electric insulating material layer 102 down and last electric insulating material layer 102 ' are commaterials; The heat conductivity value of wherein said low thermal conductivity material integument 103 is lower than the heat conductivity value of electric insulating material layer 102 down; Wherein said electric insulating material layer 102 down can be a nitride, oxide, and the mixture that sulfide or wherein two or more material are formed, low thermal conductivity material integument 103 can be silica, fullerene or air; The wherein said thickness of electric insulating material layer 102 down is 0-500nm; The wherein said thickness of going up electric insulating material layer 102 ' is 0-500nm; The thickness of wherein said electric insulating material layer 102 down and last electric insulating material layer 102 ' can not be that the thickness of the wherein said low thermal conductivity material integument 103 of 0nm is 0-500nm simultaneously; The effect of wherein said low thermal conductivity material integument 103 is the thermal diffusions that reduce phase-change material plug column 104 ' part, improve the efficiency of heating surface of phase-change material plug column 104 ' part, and then the position of the effective coverage that undergoes phase transition in the modulation phase transformation material plug post 104 ', this position changes along with the change of the position of low thermal conductivity material integument 103;
Step 3: utilize the micro-nano process technology to prepare aperture 104 in the centre of last electric insulating material layer 102 '; The degree of depth of the aperture 104 in the middle of the wherein said upward electric insulating material layer 102 ' is exposed bottom electrode 101 to the upper surface of bottom electrode 101; The aperture of wherein said aperture 104 is 0-500nm;
Step 4: in aperture 104, utilize the method for chemical vapor deposition to fill phase-change material plug column 104 ', and aperture 104 is filled up; The diameter of wherein said phase-change material plug column 104 ' is 0-500nm;
Step 5: with chemico-mechanical polishing or anti-carve the method for erosion, will go up the surperficial remaining phase-change material of electric insulating material layer 102 ' and remove;
Step 6: prepare top electrodes 105 in the top of last electric insulating material layer 102 ', finish the preparation of phase transition storage.
Embodiment
Step 1: in insulation or prepare bottom electrode above the Semiconductor substrate;
Step 2: one deck silicon nitride, SiO more successively grow
2And silicon nitride, its thickness is 200nm;
Step 3: utilize the micro-nano process technology to prepare aperture in the centre of upper silicon nitride, its aperture is 200nm;
Step 4: in aperture, utilize the method for chemical vapor deposition to fill the phase-change material plug column, and aperture is filled up;
Step 5: with chemico-mechanical polishing or anti-carve the method for erosion, the remaining phase-change material in upper silicon nitride surface is removed;
Step 6: above upper silicon nitride, prepare top electrodes, finish the preparation of phase transition storage.
Embodiment 2
Step 1: insulating or preparing bottom electrode above the Semiconductor substrate;
Step 2: one deck SiO more successively grows
2, fullerene thin film and SiO
2
Step 3: utilize the micro-nano process technology to prepare aperture in the centre of upper silicon nitride;
Step 4: in aperture, utilize the method for chemical vapor deposition to fill the phase-change material plug column, and aperture is filled up;
Step 5: with chemico-mechanical polishing or anti-carve the method for erosion, with upper strata SiO
2The remaining phase-change material in surface is removed;
Step 6: at upper strata SiO
2The top prepare top electrodes, finish the preparation of phase transition storage.
The above; only be the embodiment among the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with the people of this technology in the disclosed technical scope of the present invention; the conversion that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.
Claims (12)
1. vertical phase-change memory comprises:
One substrate;
One bottom electrode, this bottom electrode is produced on the substrate;
Electric insulating material layer once, this time electric insulating material layer is produced on the bottom electrode;
One low thermal conductivity material integument, this low thermal conductivity material integument is produced on down on the electric insulating material layer;
Electric insulating material layer on one, electric insulating material layer is produced on the low thermal conductivity material integument on this;
There is an aperture the wherein said centre of electric insulating material layer, low thermal conductivity material integument and last electric insulating material layer down;
One phase-change material plug column, this phase-change material plug column are positioned at the middle aperture of electric insulating material layer, low thermal conductivity material integument and last electric insulating material layer down;
One top electrodes, this top electrodes is produced on the electric insulating material layer, and covers the phase-change material plug column.
2. vertical phase-change memory according to claim 1, wherein said electric insulating material layer down and last electric insulating material layer are commaterials, this time electric insulating material layer is a nitride, oxide, the mixture that sulfide or wherein two or more material are formed, the thickness of this time electric insulating material layer is 0-500nm, and thickness of electric insulating material layer is 0-500nm on this.
3. vertical phase-change memory according to claim 1, the heat conductivity value of wherein said low thermal conductivity material integument is lower than the heat conductivity value of electric insulating material layer down, this low thermal conductivity material integument is silica, fullerene or air, and the thickness of described low thermal conductivity material integument is 0-500nm.
4. vertical phase-change memory according to claim 2, the thickness of wherein said electric insulating material layer down and last electric insulating material layer can not be 0nm simultaneously.
5. vertical phase-change memory according to claim 1, the diameter of the aperture of wherein said aperture or phase-change material plug column is 0-500nm.
6. vertical phase-change memory according to claim 1, the wherein said upper surface of going up the degree of depth of the middle aperture of electric insulating material layer to the bottom electrode exposes bottom electrode.
7. the preparation method of a vertical phase-change memory, this method comprises:
Step 1: insulating or preparing bottom electrode above the Semiconductor substrate;
Step 2: electric insulating material layer, low thermal conductivity material layer and last electric insulating material layer under the one deck of growing successively again;
Step 3: utilize the micro-nano process technology to prepare aperture in the centre of last electric insulating material layer;
Step 4: in aperture, utilize the method for chemical vapor deposition to fill the phase-change material plug column, and aperture is filled up;
Step 5: with chemico-mechanical polishing or anti-carve the method for erosion, the surperficial remaining phase-change material of last electric insulating material layer is removed;
Step 6: above last electric insulating material layer, prepare top electrodes, finish the preparation of phase transition storage.
8. the preparation method of vertical phase-change memory according to claim 7, wherein said electric insulating material layer down and last electric insulating material layer are commaterials, this time electric insulating material layer is a nitride, oxide, the mixture that sulfide or wherein two or more material are formed, the thickness of this time electric insulating material layer is 0-500nm, and thickness of electric insulating material layer is 0-500nm on this.
9. the preparation method of vertical phase-change memory according to claim 7, the heat conductivity value of wherein said low thermal conductivity material integument is lower than the heat conductivity value of electric insulating material layer down, this low thermal conductivity material integument is silica, fullerene or air, and the thickness of described low thermal conductivity material integument is 0-500nm.
10. the preparation method of vertical phase-change memory according to claim 8, the thickness of wherein said electric insulating material layer down and last electric insulating material layer can not be 0nm simultaneously.
11. the preparation method of vertical phase-change memory according to claim 7, the diameter of the aperture of wherein said aperture or phase-change material plug column is 0-500nm.
12. the preparation method of vertical phase-change memory according to claim 7, the wherein said upper surface of going up the degree of depth of the middle aperture of electric insulating material layer to the bottom electrode exposes bottom electrode.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105428526A (en) * | 2015-11-20 | 2016-03-23 | 华中科技大学 | Three-dimensional memory and preparation method thereof |
| CN112909161A (en) * | 2021-01-05 | 2021-06-04 | 华中科技大学 | Low-power-consumption phase change memory unit with buffer layer and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101308903A (en) * | 2007-05-14 | 2008-11-19 | 财团法人工业技术研究院 | Phase-change memory element |
| US20100065805A1 (en) * | 2008-09-18 | 2010-03-18 | Park Nam Kyun | Phase change memory device having a bottleneck constriction and method of manufacturing the same |
-
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- 2010-08-18 CN CN 201010256816 patent/CN101924119A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101308903A (en) * | 2007-05-14 | 2008-11-19 | 财团法人工业技术研究院 | Phase-change memory element |
| US20100065805A1 (en) * | 2008-09-18 | 2010-03-18 | Park Nam Kyun | Phase change memory device having a bottleneck constriction and method of manufacturing the same |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105428526A (en) * | 2015-11-20 | 2016-03-23 | 华中科技大学 | Three-dimensional memory and preparation method thereof |
| CN105428526B (en) * | 2015-11-20 | 2018-08-17 | 华中科技大学 | A kind of three-dimensional storage and preparation method thereof |
| CN112909161A (en) * | 2021-01-05 | 2021-06-04 | 华中科技大学 | Low-power-consumption phase change memory unit with buffer layer and preparation method thereof |
| CN112909161B (en) * | 2021-01-05 | 2022-03-11 | 华中科技大学 | Low-power-consumption phase change memory unit with buffer layer and preparation method thereof |
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