CN101923831B - A kind of LED display control unit - Google Patents
A kind of LED display control unit Download PDFInfo
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- CN101923831B CN101923831B CN201010283415.6A CN201010283415A CN101923831B CN 101923831 B CN101923831 B CN 101923831B CN 201010283415 A CN201010283415 A CN 201010283415A CN 101923831 B CN101923831 B CN 101923831B
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- physical chip
- programmable gate
- gate array
- field programmable
- single gigabit
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Abstract
The invention discloses a kind of LED display control unit, comprise ethernet communication module, field programmable gate array module, storer and driver, ethernet communication module comprises interconnective Ethernet transformer, first single gigabit physical chip, second single gigabit physical chip and a crystal clock source; Described crystal clock source is connected with first single gigabit physical chip, for providing clock signal source for it; Described first single gigabit physical chip inside arranges the first oscillator, gives described second single gigabit physical chip by described first oscillator by described clock signal transmission; Described second single gigabit physical chip is connected with described field programmable gate array module, and its inside arranges the second oscillator, and described clock signal transmission is given described field programmable gate array module by described second oscillator.Cost of the present invention is lower, stable clock signal, the high communication quality, and, make each LED point display effect of control good.
Description
Technical field
The present invention relates to lighting device, particularly relate to a kind of LED display control unit.
Background technology
In the control device of various LED display, data must be coordinated normally could transmit data with clock signal, namely provide the data of display required for image must coordinate data could to be sent to any one with clock signal and show point, under any circumstance, when clock signal has abnormal, whole plate can be made to show disorderly and unsystematic data-signal.
Prior art, in LED display control unit, there is provided the crystal of clock source to provide clock to two single gigabit PHY (Physicallayer in parallel simultaneously, Physical layer) chip, and, also provide clock to the field programmable gate array module (FPGA be connected with ethernet module simultaneously, FieldProgrammableGateArray), because a clock source provides clock to two PHY and FPGA simultaneously, therefore, the clock source of two PHY and FPGA receptions is all very unstable, thus make signal of communication unstable, the bit error rate that data are occurred improves, and, affect display effect, if but increase crystal, namely each PHY and each FPGA all uses a crystal separately, three crystal are then needed to provide clock to two PHY and FPGA respectively, so, crystal cost will be increased, make raising of controlling cost, line construction also becomes complicated.
Therefore, prior art existing defects, needs to improve.
Summary of the invention
Technical matters to be solved by this invention is, provides that a kind of cost is lower, stable clock signal, the high communication quality, and, make the LED display control unit that each LED point display effect of control is good.
Technical scheme of the present invention is as follows: a kind of LED display control unit, comprises ethernet communication module, field programmable gate array module, storer and driver, wherein; Described ethernet communication module comprises interconnective Ethernet transformer, first single gigabit physical chip, second single gigabit physical chip and a crystal clock source; Described crystal clock source is connected with first single gigabit physical chip, for providing clock signal for described first single gigabit physical chip; Described first single gigabit physical chip inside arranges the first oscillator, gives described second single gigabit physical chip by described first oscillator by described clock signal transmission; Described second single gigabit physical chip is connected with described field programmable gate array module, and its inside arranges the second oscillator, and described clock signal transmission is given described field programmable gate array module by described second oscillator; Described field programmable gate array module is also connected with described storer, described driver respectively.
Be applied to such scheme, in described LED display control unit, a spread spectrum clock be also set, be connected with described field programmable gate array module, for expanding the frequency of clock signal described in described field programmable gate array inside modules.
Be applied to each scheme above-mentioned, in described LED display control unit, described spread spectrum clock also arranges an input end, for setting the extension frequency of described clock signal.
Be applied to each scheme above-mentioned, in described LED display control unit, described first single gigabit physical chip and described younger brother two single gigabit physical chip is integrated is set to a pair of gigabit physical chip.
Be applied to each scheme above-mentioned, in described LED display control unit, described pair of gigabit physical chip arranges two gigabit network interfaces, for inputting the identical control signal of two-way respectively.
Be applied to each scheme above-mentioned, in described LED control device, comprise at least two 74hc245 chips as described driver.
Be applied to each scheme above-mentioned, in described LED display control unit, described storer is SDRAM storer.
Be applied to each scheme above-mentioned, in described LED display control unit, an Intelligent Recognition submodule be also set, be connected with described ethernet communication module, for automatically identifying the displaying contents comprised in the control signal of input.
Be applied to each scheme above-mentioned, in described LED display control unit, one control signal cascaded-output port is also set, be connected with described Intelligent Recognition submodule, described Intelligent Recognition submodule also for generating cascade signal, and outputs to another LED display control unit by described control signal cascaded-output port.
Be applied to each scheme above-mentioned, in described LED display control unit, also comprise an indicating module, be used to indicate the duty of each parts.
Adopt such scheme, the present invention by a crystal clock source for described first single gigabit physical chip provides clock signal source, and give second single gigabit physical chip by the first oscillator of setting inner in first single gigabit physical chip by described clock signal transmission, described clock signal transmission is given described field programmable gate array module by the second oscillator arranged by the inside of second single gigabit physical chip again, so, by means of only a crystal, namely first single gigabit physical chip can be respectively, second single gigabit physical chip, described field programmable gate array module provides stable clock signal respectively, decrease the usage quantity of crystal, cost-saving, and clock signal transmission is stablized, the communication quality of described LED display control unit is improved, thus make each LED point display effect of control good.
Accompanying drawing explanation
Fig. 1 is a kind of schematic diagram of the embodiment of the present invention 1;
Fig. 2 is a kind of schematic diagram of the embodiment of the present invention 2;
Fig. 3 is a kind of schematic diagram of the embodiment of the present invention 3.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment 1
As shown in Figure 1, present embodiments provide a kind of LED display control unit, described LED display control unit is used for, according to the control signal of input, controlling various LED point, various LED point is shown as required, and each LED point can form various LED display.
Described LED display control unit comprises ethernet communication module, field programmable gate array module (PGFA), storer and driver.
Described ethernet communication module is for inputting the control signal for outside each LED point display, such as, described control signal can be sent by PC, and after logical master control set carries out data processing, described LED display control unit is sent to again by netting twine, or, by the described control signal after the direct transmission processing of PC to described LED display control unit.
Described ethernet communication module comprises interconnective Ethernet transformer, first single gigabit physical chip (PHY), the second single gigabit physical chip (PHY) and crystal, wherein, first single gigabit PHY and second single gigabit PHY is gigabit PHY, PHY is the physical chip for described ethernet communication module, which define data to transmit and the electricity required for reception and light signal, line status, clock reference, data encoding and circuit etc., and provide standard interface to data link layer device.
Described Ethernet transformer is connected with described first single gigabit PHY, second single gigabit PHY respectively, it mainly contains two in described ethernet communication module role, one is transmission data, the coil coupling filtering of the differential signal differential mode coupling that it sends out each PHY to strengthen signal, and is coupled to other one end of the connected with network cable of varying level by the conversion of electromagnetic field; One is the varying level of isolating the heterogeneous networks equipment room that netting twine connects, and to prevent different voltage by network cable transmission damage equipment, namely the Main Function of described Ethernet transformer improves EMI (electromagnetic interference (EMI)) characteristic and level isolation.
Described crystal is connected with first single gigabit PHY, described crystal is as the crystal clock source of described first single gigabit PHY, for providing clock signal source for first single gigabit PHY, and, first single gigabit PHY is connected with described second single gigabit PHY, described first single gigabit PHY inside arranges the first oscillator, described clock signal is transferred to second single gigabit PHY by described first oscillator, and, described second single gigabit PHY arranges the second oscillator, by described second oscillator, described clock signal is sent to the described field programmable gate array module PGFA be connected with described second single gigabit PHY again.
By by described first single gigabit PHY, described second single gigabit PHY and described field programmable gate array module PGFA connects mutually, and, by the second oscillator arranged in the first oscillator of arranging in described first single gigabit PHY and described second single gigabit PHY, transmit described clock signal respectively, so, as long as a crystal is as described crystal clock source, described first single gigabit PHY can be made, described second single gigabit PHY and described field programmable gate array module PGFA can obtain stable clock signal respectively, thus reduce the usage quantity of crystal, cost-saving, further, the communication quality of described control signal is improved, thus make the display effect of each LED point of control good.
Described field programmable gate array module PGFA is connected with driver, storer respectively, described driver is used for being connected with the drive control module of outside, for driving outside drive control module, thus control the display of each LED point, or described driver is for feeding back the duty of each LED point to described field programmable gate array module PGFA.
Such as, comprise two or more 74hc245 chip as described driver, 74hc245 chip driver is bus driver, is typical TTL type Three-State gate circuit driver, and its major function is that signal power is amplified.
Described storer is used for program of depositing and data, such as, described storer is SDRAM storer, i.e. SynchronousDynamicRandomAccessMemory (synchronous DRAM), synchronously refer to Memory need of work synchronous clock, the transmission of inner order and the transmission of data all with it for benchmark; Dynamically refer to that storage array needs constantly to refresh to ensure that data are not lost; Refer to that data are not linearly store successively at random, but free assigned address carries out reading and writing data.
By using described SDRAM storer, various program and signal data can be stored by synchronous dynamic random, thus run various program fast and transmit various signal.
Or, an indicating module can also be set in described LED display control unit, such as, described indicating module is made up of some pilot lamp, the corresponding pilot lamp of each parts, as described in ethernet communication module, as described in field programmable gate array module PGFA, as described in storer and each driver corresponding pilot lamp respectively, by each pilot lamp, the duty of each parts can be indicated, namely can pass through each pilot lamp, intuitively can see whether each parts are in normal duty.Such as, described indicating module or its each pilot lamp are electrically connected input end and the output terminal of each parts respectively, judge that whether the duty of each parts is normal.
The present embodiment passes through a crystal as crystal clock source, for described first single gigabit PHY provides clock signal source, and give second single gigabit PHY by the first oscillator inner in first single gigabit PHY by described clock signal transmission, described field programmable gate array module FPGA is given by described clock signal transmission again by inside second oscillator of second single gigabit PHY, so, by means of only a crystal as crystal clock source, namely first single gigabit PHY can be respectively, second single gigabit PHY, described on-site programmable gate array FPGA improves stable clock signal respectively, decrease the usage quantity of crystal, cost-saving, and clock signal transmission is stablized, the communication quality of described LED display control unit is improved.
Embodiment 2
As shown in Figure 2, be applied to above-mentioned each example, in the LED control device that the present embodiment provides, a spread spectrum clock is also set, described spread spectrum clock is connected with described field programmable gate array module PGFA, for expanding the frequency of the inner described clock signal of described field programmable gate array module PGFA.By increasing a spread spectrum clock, more stable clock source can be provided for described field programmable gate array module PGFA, thus make described LED display control unit reach best control effects.
Further, described spread spectrum clock also arranges an input end, can be set the extension frequency of described clock signal by described input end, and namely described spread spectrum clock can arrange the clock frequency of its spread spectrum as required, thus can meet the requirement of various use.
Embodiment 3
As shown in Figure 3, be applied to above-mentioned each example, in the LED control device that the present embodiment provides, described first single gigabit PHY and described second single gigabit PHY is integrated is set to a pair of gigabit PHY, namely the described couple of gigabit PHY is the chip module of integrated two gigabit PHY, namely can replace described first single gigabit PHY and described second single gigabit PHY by using a pair of gigabit PHY, more can save space by integrated setting, further, identical technique effect is reached.
And, described couple of gigabit PHY arranges two gigabit network interfaces, for inputting the identical control signal of two-way respectively, namely the control signal that two gigabit network interface inputs are identical and synchronous, two synchronous control signals backup each other, thus make to break down in the control signal of a gigabit network interface input, as loss of data, data distortion or data interrupt time, then outside each LED point be can control by using another gigabit network interface to input identical and synchronous control signal, thus stability and the reliability of described LED display ensure that.
Embodiment 4
Be applied to above-mentioned each example, in the LED control device that the present embodiment provides, one Intelligent Recognition submodule can also be set, described Intelligent Recognition submodule is connected with described ethernet communication module, be input to the control signal in described LED control device, first the described Intelligent Recognition submodule by arranging identifies, described Intelligent Recognition submodule can identify the displaying contents comprised in described control signal automatically, by in described displaying contents, the control signal belonging to each LED point that described LED control device controls is sent to described ethernet communication module, so, when described LED display control unit is positioned over different control positions, or, when same position changes described LED control device, without the need to re-starting optimum configurations to described LED display control unit, namely the display and control of each LED point can be completed, use convenient.
Or, one control signal cascaded-output port is also set, described control signal cascaded-output port is connected with described Intelligent Recognition submodule, described Intelligent Recognition submodule by belong to its part control signal controlled be sent to described in too Network Communication module, and, also other part control signals are processed, generate cascade signal, and by described control signal cascaded-output port, described cascade signal is outputted to another LED display control unit, thus can by arranging multiple described LED control device, and, mutual cascade connects, more LED point can be controlled.
It should be noted that, the mutual combination of above-mentioned each technical characteristic, forms each embodiment, should be considered as the scope that instructions of the present invention is recorded.
Should be understood that, for those of ordinary skills, can be improved according to the above description or convert, and all these improve and convert the protection domain that all should belong to claims of the present invention.
Claims (4)
1. a LED display control unit, comprises ethernet communication module, field programmable gate array module, storer and driver, it is characterized in that;
Described ethernet communication module comprises interconnective Ethernet transformer, first single gigabit physical chip, second single gigabit physical chip and a crystal clock source;
Described crystal clock source is connected with first single gigabit physical chip, for providing clock signal for described first single gigabit physical chip;
Described first single gigabit physical chip inside arranges the first oscillator, gives described second single gigabit physical chip by described first oscillator by described clock signal transmission;
Described second single gigabit physical chip is connected with described field programmable gate array module, and its inside arranges the second oscillator, and described clock signal transmission is given described field programmable gate array module by described second oscillator;
Described field programmable gate array module is also connected with described storer, described driver respectively; Described driver feeds back the duty of each LED point to described field programmable gate array module FPGA;
Described first single gigabit physical chip and described second single gigabit physical chip is integrated is set to a pair of gigabit physical chip;
Described pair of gigabit physical chip arranges two gigabit network interfaces, for inputting the identical control signal of two-way respectively;
Also comprise an indicating module, be used to indicate the duty of each parts; Described indicating module is electrically connected input end and the output terminal of each parts respectively, judges that whether the duty of each parts is normal;
A spread spectrum clock is also set, is connected with described field programmable gate array module, for expanding the frequency of clock signal described in described field programmable gate array inside modules; One Intelligent Recognition submodule is set, is connected with described ethernet communication module, for automatically identifying the displaying contents comprised in the control signal of input;
Described spread spectrum clock also arranges an input end, for setting the extension frequency of described clock signal.
2. LED display control unit according to claim 1, is characterized in that, comprises at least two 74hc245 chips as described driver.
3. LED display control unit according to claim 1, is characterized in that, described storer is SDRAM storer.
4. LED display control unit according to claim 1, it is characterized in that, one control signal cascaded-output port is also set, be connected with described Intelligent Recognition submodule, described Intelligent Recognition submodule also for generating cascade signal, and outputs to another LED display control unit by described control signal cascaded-output port.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010283415.6A CN101923831B (en) | 2010-09-16 | 2010-09-16 | A kind of LED display control unit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201010283415.6A CN101923831B (en) | 2010-09-16 | 2010-09-16 | A kind of LED display control unit |
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| CN101923831A CN101923831A (en) | 2010-12-22 |
| CN101923831B true CN101923831B (en) | 2015-11-11 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102081543A (en) * | 2011-01-25 | 2011-06-01 | 冉红 | Online upgrading method of LED (light emitting diode) display control system |
| CN104112413B (en) * | 2013-04-17 | 2016-12-28 | 深圳市德彩光电有限公司 | LED display bad point point detection system |
| CN106157888A (en) * | 2016-08-31 | 2016-11-23 | 深圳市灵星雨科技开发有限公司 | A kind of SOM display control program |
| CN107358910A (en) * | 2017-07-01 | 2017-11-17 | 深圳市灵星雨科技开发有限公司 | A kind of implementation method for reducing display screen EMC |
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Inventor after: Cai Zhenhua Inventor after: Ma Jing Inventor after: Wang Jin Inventor before: Xing Wei Inventor before: Shao Yinliang Inventor before: Xu Wei |
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Effective date of registration: 20171116 Address after: 225651 Jiangsu province Yangzhou city Gaoyou city sends the town Qiao Hao road 001 Patentee after: Polytechnic High Tech Institute (Gaoyou) Co., Ltd. Address before: Futian District Che Kung Temple Tairan industrial zone of Shenzhen city in Guangdong province 518040 211 706 Patentee before: Shenzhen Zhongqingwei Technology Development Co., Ltd. |
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