CN201489525U

CN201489525U - PCI communication card for realizing computer long-distance communication by utilizing twisted-pair communication

Info

Publication number: CN201489525U
Application number: CN2009201409674U
Authority: CN
Inventors: 王振; 范志刚; 邓颖辉; 石金成; 秦志辉
Original assignee: GUILIN GUANGTONG ELECTRONICS ENGINEERING Co Ltd
Current assignee: GUILIN GUANGTONG ELECTRONICS ENGINEERING Co Ltd
Priority date: 2009-06-13
Filing date: 2009-06-13
Publication date: 2010-05-26
Anticipated expiration: 2019-06-13

Abstract

The utility model discloses a PCI communication card for realizing computer long-distance communication by utilizing twisted-pair communication, comprising a PCI interface chip, a transformer and a clock. The PCI communication card is characterized by being also configured with a PHY chip connected with the interface of the PCI interface chip, a network bridge chip connected with the interface of the PHY chip, an FPGA chip connected with the interface of the network bridge chip and a digital subscriber interface chip connected with the FPGA chip, wherein the digital interface of the digital subscriber interface chip is connected to the FPGA chip through four signal wires, and the circuit interface is connected to an external twisted pair through the transformer, an overvoltage protector and an overcurrent protector; the pin of the clock is connected with the global clock pin of the FPGA chip; and RAM is connected to the RAM interface of the network bridge. The communication card has convenient use and high antijamming capability, can meet the demands of speech sounds, faxes and the like, realize no-repeater long-distance PCI communication and work in Windows operating systems.

Description

Utilize twisted-pair feeder communication to realize the PCI communication card of computer remote communication

Technical field

The utility model relates to the PCI communication card, specifically is to utilize twisted-pair feeder communication to realize the PCI communication card of computer remote communication.

Background technology

What current communication card was based on pci bus and utilization is the communication card that ethernet line communicates, and it is to change between pci bus and RMII bus by a pci bridge chip to realize function.Interconnected between the computing machine generally all is to pass through cable communication, yet because the antidamping and the interference free performance of cable signal are not very desirable, so use common ethernet line transmission range generally all in 100 meters,, will use trunking if extend transmission distance.This mode is because high cost makes long-distance transmissions not have practicality.

The utility model content

It is short that the purpose of this utility model is to overcome existing PCI communication card transmission range, realize the high shortcoming of computer remote communications cost, and a kind of PCI communication card that utilizes twisted-pair feeder communication to realize computer remote communication is provided, this communication card can be realized the efficient communication of 3 kilometers～5 kilometers longer distances under non-relay condition.

The utility model comprises pci interface chip and connected PCI contact pin; transformer; clock; unlike the prior art be: it has also disposed the PHY chip that is connected with the interface of pci interface chip; the bridge chip that is connected with the interface of PHY chip; the data module of the fpga chip that is connected with the bridge chip interface; the user's digital interface chip that is connected with the data module of fpga chip; the line interface of user's digital interface chip is through transformer; overvoltage protection device; overcurrent protective device is connected to outer twisted pairs; the insertion pin of clock links to each other with the global clock pin of fpga chip, and the RAM chip is connected to the RAM interface of bridge.

Described clock comprises 10.24MHz crystal oscillator and 50MHz crystal oscillator, " the clock receipts " of the data module of output pin of clock (input of 10.24M clock and the input of 50M clock) and fpga chip link to each other with the clock module of fpga chip, " the pci interface chip work clock " of fpga chip clock module inserts the clock input pin of pci interface chip, " PHY work clock " inserts the clock input pin of PHY, the clock input pin of " bridge work clock " Access Network bridge chip, " user's digital interface chip operation clock " inserts the clock input pin of user's digital interface chip, " data clock " inserts the data module of fpga chip, and " the register output interface " of the CDO signal of user's digital interface chip and FPGA link detecting module links to each other, " link indicator signal " is connected to outside pilot lamp." pci interface chip resets " of the initialization module of fpga chip is connected to the resetting pin of pci interface chip, the resetting pin that " PHY chip reset " is connected to the PHY chip, the resetting pin that " bridge chip reset " is connected to the bridge chip, and " state control signal " is connected to the user's digital interface chip.The initialization module of fpga chip " clock module initializing signal " is connected to the clock module of fpga chip, the data module that " data module initializing signal " is connected to fpga chip.

Described fpga chip field programmable logic array is made up of initialization module, link detecting module, data module and clock module, and initialization module, data module, clock module interconnect; The link detecting module links to each other with light emitting diode with the user's digital interface chip; Initialization module links to each other with pci interface chip, PHY chip, bridge, user's digital interface chip; Data module links to each other with the user's digital interface chip with bridge; Clock module links to each other with pci interface chip, PHY chip, bridge, user's digital interface chip with external clock.The function of each module is: initialization module: when system powers on, pci interface chip, PHY, bridge are resetted, by " state control signal " initialization user's digital interface chip, determine its operating rate, master slave mode, simultaneously also to the configuration of the clock module of fpga chip, determine its output clock frequency, to the configuration of the data module of fpga chip, determine whether it encrypts, cipher mode etc.; The link detecting module: whether the speed of detection line, principal and subordinate mate; Data module: finish the conversion of data, functions such as encrypting and decrypting; Clock module: for pci interface chip, PHY chip, bridge chip, user's digital interface chip provide work clock, for data module provides the data tranmitting data register.

The course of work of the present utility model is: after system powered on, each chip in the fpga chip initialize communications card was determined the master slave mode, traffic rate, the selection of clock, the frequency division of clock of communication card work.Simultaneously, fpga chip reads Link State from the register of user's digital interface chip, and after two computing machine speed, principals and subordinates were provided with correctly, it is normal that fpga chip then shows that by pilot lamp link connects, and this moment, two computing machines can be communicated by letter.During the computer sends the data, pci interface chip is converted to Ethernet data with the pci bus data, after the conversion through the bridge chip, becomes the HDLC data.Fpga chip is finished conversion, the management of clock, the encrypting and decrypting between HDLC data and the user's digital interface chip numeral interface data.Digital signal becomes analog carrier signal through the user's digital interface chip, outputs to twisted-pair feeder by transformer, overvoltage protection, overcurrent protection.The flow process of computer receiving data, the conversion of data layout are opposite with process of transmitting.

The driver of the utility model communication card adopts WDM (Windows Driver Model) to realize.

The utility model compared with prior art has following characteristics:

(1) easy to use, as long as communication card is inserted in the PCI slot of computing machine, an end is set to holotype, and an end is set to from pattern, can realize two computer remote point-to-point communications;

(2) antijamming capability is strong, according to the difference of twisted-pair feeder quality, can guarantee 3 kilometers～5 kilometers efficient communications under non-relay situation;

(3) provide the transfer rate of maximum 160kbit/s, can satisfy voice, data, fax waits the communication service requirement;

(4) this communication card comprises encrypting module (also can remove encrypting module as requested) in FPGA, guarantees communication security;

(5) driver adopts WDM (Windows Driver Model) to realize, exploitation is simple, can be operated in the operating system such as Windows98/2000/XP;

(6) this communication card is a network adapter by computer Recognition, and the active computer software resource is abundant, and the operation control software exploitation is simple.

Description of drawings

The communication card synoptic diagram of the current Ethernet Adaptation Unit of Fig. 1;

Fig. 2 for the utility model based on pci bus and utilize the communication card structural representation of twisted-pair feeder communication;

Fig. 3 uses synoptic diagram for the utility model;

Fig. 4 is the utility model FPGA high-level schematic functional block diagram.

Among the figure: 1.PCI interface chip 2.PHY chip 3. bridge chip 4.FPGA chip 4-1. initialization module 4-2. link detecting module 4-3. data module 4-4. clock modules 5. user's digital interface chips 6. transformers 7. overvoltage protection devices 8,9. overcurrent protective device 10. configuration store chips 11. clock 12.RAM 13. twisted-pair feeders

Embodiment

Below in conjunction with accompanying drawing and example the utility model is described in further detail.

As shown in Figure 2, the utility model communication card is made up of pci interface chip 1, physical layer device PHY (Physical LayerInterface Devices) chip 2, bridge chip 3, fpga chip 4, user's digital interface chip 5, transformer 6, overvoltage protection device 7, overcurrent protective device 8,9, configuration store chip 10, clock 11 and RAM12.Pci interface chip 1 is the RTL8139D chip of REALTEK company; PHY chip 2 is the IP101A chip of IC Plus company; bridge chip 3 is the XBridge2.0 chip of NSYS Technologies company; fpga chip 4 is the 3S50 chip of Xilinx company; user's digital interface chip 5 is the MT9172 chip of ZARLINK company; configuration store chip 10 is the 93C46A chip of atmel corp; transformer 6 is 2: 1 transformer for turn ratio; overvoltage protection device 7 is the THBT200S device of SGS-THOMSON company; overcurrent protective device 8; 9 is the XW80 device of XW company; be connected to outer twisted pairs 13; the pci interface of pci interface chip 1 is connected to the PCI contact pin; the Attachment Unit interface of pci interface chip 1 and the Cable Transmission interface of PHY chip 2 link to each other, and the EEPROM interface of pci interface chip 1 links to each other with the configuration store chip.The MII interface of PHY chip 2 links to each other with the MII interface of bridge chip 3, the HDLC interface of bridge chip 3 links to each other with fpga chip 4, and described fpga chip 4 is formed (see figure 4) by initialization module 4-1, link detecting module 4-2, data module 4-3 and clock module 4-4; The digital interface of user's digital interface chip 5 by data send out, clock is sent out, data are received, clock receives that these four signal wires are connected on the fpga chip 4, the line interface of user's digital interface chip 5 is linked outer twisted pairs through transformer 6, overvoltage protection device 7, overcurrent protective device 8,9.Configuration store chip 10 is EEPROM, with the relevant informations such as MAC Address of preserving communication card.The clock input pin of clock 11 links to each other with the global clock pin of fpga chip 4.RAM chip 12 is connected to the RAM interface of bridge chip 3.

During communication, as shown in Figure 3, the utility model communication card is inserted in the pci bus slot of computing machine, twisted-pair feeder is connected together two computing machines.After computing machine installed driver, two computers can be realized communication.

Claims

1. one kind is utilized twisted-pair feeder communication to realize the PCI communication card that computer remote is communicated by letter; comprise pci interface chip and connected PCI contact pin; transformer and clock; it is characterized in that: it has also disposed the PHY chip that is connected with the interface of pci interface chip; be connected the bridge chip with the interface of PHY chip; the fpga chip that is connected with the bridge chip interface; the user's digital interface chip that is connected with the data module of fpga chip; the line interface of user's digital interface chip is through transformer; overvoltage protection device; overcurrent protective device is connected to outer twisted pairs; the insertion pin of clock links to each other with the global clock pin of fpga chip, and the RAM chip is connected to the RAM interface of bridge.

2. PCI communication card according to claim 1 is characterized in that: fpga chip is by initialization module, link detecting module, and data module and clock module are formed, and initialization module, data module, clock module interconnect; The link detecting module links to each other with light emitting diode with the user's digital interface chip; Initialization module links to each other with pci interface chip, PHY chip, bridge, user's digital interface chip; Data module links to each other with the user's digital interface chip with bridge; Clock module links to each other with pci interface chip, PHY chip, bridge, user's digital interface chip with external clock.