CN101916754B - Through-hole, through-hole forming method and through-hole filling method - Google Patents

Through-hole, through-hole forming method and through-hole filling method Download PDF

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Publication number
CN101916754B
CN101916754B CN201010222721.9A CN201010222721A CN101916754B CN 101916754 B CN101916754 B CN 101916754B CN 201010222721 A CN201010222721 A CN 201010222721A CN 101916754 B CN101916754 B CN 101916754B
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hole
extends
parts
layer
extend
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CN101916754A (en
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徐逸杰
杨丹
史训清
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Hong Kong Applied Science and Technology Research Institute ASTRI
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Hong Kong Applied Science and Technology Research Institute ASTRI
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/146Mixed devices
    • H01L2924/1461MEMS

Abstract

The invention discloses a through-hole, a through-hole forming method and a through-hole filling method. An electronic or micromechanical device is provided with a first surface (11), a second surface (12) and one through-hole. The through-hole extends from the first surface and passes through the device to the second surface, and comprises a first part (84, 86), a second part (82) and a third part (88) which are integrally molded, wherein the first part (84, 86) extends from the first surface (11) to the second surface (12); the second part (82) extends and covers a part of the first surface (11) of the device; and the third part (88) extends and covers a part of the second surface (12) of the device. Preferably, the first part comprises a first component and a second component, and the second component extends and passes through an active region of the device, and the width of the second component is narrower than that of the first component. Meanwhile, the invention also discloses a method for forming and filling the through-hole.

Description

Through hole and through hole formation method and method for filling through hole
[technical field]
The present invention relates to through hole and through hole formation method and method for filling through hole, particularly but be not limited to a kind of silicon through hole (TSV).
[background technology]
Electronic device, particularly portable device such as mobile phone, the more and more miniaturization that just becoming, but simultaneously function more and more widely can be provided again, and the integrated multifunction of needs chip is arranged, do not increase size of devices again, keep less apparent size.In a 2D structure, increase the electronic component number and will increase size, do not reach these purposes, therefore, the 3D encapsulation is adopted day by day, so that the component density of more function property and Geng Gao can be provided, but has less apparent size.
In a 3D structure, electronic devices and components, as have the semiconductor chip of various active IC devices, possibly be multilayer laminated structure.Traditionally; Use the lead-in wire bonding (like United States Patent (USP) 6; 933; 172) set up electrical interconnection between the chip, but lead-in wire bonding (wire bonding) needs bigger plane inside dimension (in-plane size) and plane outside dimension (out-of-plane size), inconsistent with the target that maximizes component density.In order to be connected electrically in the element in the different layers, silicon through hole (TSV) technology can be used to provide electrical interconnection, and mechanical support is provided.In the TSV technology, on a silicon with different active IC devices or other device, make a through hole, and in this through hole, fill metal such as copper, gold, tungsten, scolder or a kind of highly doped semi-conducting material such as polysilicon.Therefore, bonding welding pad and bonding welding pad element basal surface on of TSV on can the Connection Element top surface.Therefore, a plurality of elements that have a this through hole are by lamination and be bonded on together.In addition importantly, the power path of electronic device can be shortened, thereby causes quicker operation speed.
Although TSV is applied in the electronic component continually, they also can be applied in the micromechanical component, like the MEMS device.
Fig. 1 (a) to (g) show to form the step of the conventional method of a TSV who is used for the nand flash memory wafer.
In the step of Fig. 1 (a), an electronic device (being a memory wafer) is provided in this example.Wafer have first " on " surface 11 and the second D score surface 12 opposite with first surface.Wafer comprises a silicon area 20 on wafer top and an active region 30 of wafer lower part.The active region comprises a pad 40.More specifically, in said example, active region 40 comprises a plurality of electric traces (electrical trace) and/or conductor wire, and it is embedded in the separator (like silica) 34 between silicon area 20 and the pad 40.In said example, active region 30 comprises a plurality of dielectric wires (dielectic line) 32, polysilicon lines 36 and M4 line 38, and it is embedded in the Si oxide separator 34 between silicon layer 20 and the pad 40.Pad is to be formed by metal, and a plurality of ledges 39 are arranged, and it projects upwards in the Si oxide district.Ledge 39 can have special structure, and in said example, these parts that project upwards are T types, and the crosspoint of T is the far-end at pad.
Fig. 1 (b) describes the method that forms through hole to (f).In the step of Fig. 1 (b), add one deck photoresist layer 50 with the not etched device component of protection, remove a part of silicon layer 20 and a part of polysilicon layer 32 through etching.In the step of Fig. 1 (c), remove a part of separator 34 through etching.In the step of Fig. 1 (d), remove a part of barrier metal layer M4 through etching.In the step of Fig. 1 (e), remove a part of Si oxide separator through etching.To shown in (e), different layers is removed in different etching steps like Fig. 1 (b).Because the material of removing is different, therefore need different etching processes.In addition, in each step, etched width almost is identical, thereby through hole has an almost consistent width.The through hole 60 that is completed into is shown in Fig. 1 (e).It extends downwardly into pad 40 from top device surface 11, and a uniform width or diameter are arranged.But through hole 60 can not extend through pad 40.
In the step of Fig. 1 (f), a separator 70 that comprises dielectric material is deposited over through hole 60 inside.Separator 70 covers the madial wall of through hole, and covers the top surface 11 of silicon layer 20.In the step of Fig. 1 (g), electroplate in through hole, to fill metal 82,84, this metal possibly be a copper usually.Metal level the 82, the 84th, solid, and form a T type.It comprises a vertical component 84 and the level that extends in top device surface 11 tops or " intersection " part 82 in the through hole.The bottom of the vertical component of plated metal 84 is with pad 40 mechanical connections and be electrically connected, but not and the pad monolithic molding.Be that through hole does not extend through pad 40, and do not arrive the second surface 12 of device.Although pad 40 all is made of copper with electrodeposited coating 82,84, they are not whole.They are parts separately, the individual components with different grainiesses (because pad 40 does not form through plating) that is formed by different manufacture methods.
Forming TSV in order to last method is a time-consuming process, because need in several different steps, carry out etching.And some etching steps should carry out in different chamber or behind the room of finding time, to avoid occurring pollution.Can increase the complexity and the required time of method like this, thereby increase manufacturing cost.In addition, said method can not always be attached to pad or through-hole side wall with electrodeposited coating 82,84 securely.Thereby, if in making or use, device is exerted pressure, can go wrong.So expectation can be found faster and more cost-efficient formation through-hole approaches, and this method can also guarantee the mechanical integrity of device.
[summary of the invention]
First aspect of the present invention provides a kind of electronics or micro mechanical device, and it has first and second surface and through holes, and this through hole extends through this device to second surface from first surface, and through hole is the I type normally.The I type characteristic of through hole helps this through hole of fastening to device.
Preferably, through hole comprises electric conducting material (like the metal) layer of a global formation.In via top, above the second surface of device, another conductive layer can be arranged, between through hole and another conductive layer, a barrier layer can be arranged.The top of I type (or another conductive layer) and bottom can form and electrically contact, and are used to connect another device above or below this device and this device.Scolder can be added on the contact top.
Second aspect of the present invention provides a kind of electronics or micro mechanical device; It has first and second surface and through holes; This through hole extends through this device to second surface from first surface, and through hole comprises integrally formed first, second and third part, and first extends to second surface from first surface; The second portion extension covers on a part of first surface of device, and the third part extension covers on a part of second surface of device.This being configured with helps the fastening through hole to this device.
Therefore, through hole comprises an integrally formed conductive layer.In via top, above through hole first, another conductive layer can be arranged, between through hole and another conductive layer, a barrier layer can be arranged.
Second and first of through hole (or another conductive layer) can form and electrically contact, and is used to connect another device above or below this device and this device.Scolder can be added on the contact top.
Through hole can also comprise one or more barrier layers, packing layer, splash-proofing sputtering metal layer and dielectric layer, and every layer all extends through the non-active region of device and part active region at least.
The third aspect of the invention provides a kind of method that forms through hole; This through hole extends through an electronics or a micro mechanical device with first surface and second surface; This method comprises: form a through hole, it extends through device to second surface from first surface; Electroplate to add an integrally formed metal level, it extends through said through hole to said second surface from said first surface; Said integrally formed metal level comprises a part of extending on the said first surface of covering device part and a part of extending on the said second surface of covering device part.
Fourth aspect of the present invention provides a kind of electronics or micro mechanical device; It has first and second surface and through holes; This through hole extends through this device to second surface from first surface, and wherein device has a non-active layer and an active layer, and wherein through hole first extends through non-active layer; The through hole second portion mainly extends through active layer, and the width of through hole first is wideer than through hole second portion.Because the through hole second portion is narrower, this helps to reduce the destruction to device active layers.
First and/or second portion of through hole can be taper, and they have a decline width in the direction from the device first surface to the device second surface.This help during making this device, to use the end of from and on plating.
The 5th aspect of the present invention provides a kind of method that forms through hole, and this through hole extends through an electronics or micro mechanical device, and this method comprises: form through hole first through etching; And through laser drill formation through hole second portion.Owing to only an etching step is arranged, laser only is used for second step, wears device but not necessarily will cut a hole fully, and this process is quite quick.Preferably, the width of the second removal part is narrower than first.
Preferably, this device has first and second opposite surfaces, and preferably, through hole extends through this device to second surface from first surface.Especially, preferably, through hole extends through the active region of device, and it can comprise a bonding welding pad.
The 6th aspect of the present invention provides a stacked wafer module; It comprises first device that is installed in second top device; At least one said first and second device is the devices that meet the present invention first, second or fourth aspect, or meets the device that the present invention the 3rd or the 5th aspect are made.
[description of drawings]
Fig. 1 (a) shows the step of the conventional method that forms a TSV to (g).
Fig. 2 (a) is the structural representation of the through hole of the embodiment of the invention to (d).
Fig. 3 shows a through hole in detail.
Fig. 4 (a) shows the sectional view of the through hole lower part of various embodiments of the invention to (d).
Fig. 5 to 19 shows the step of the method that forms Fig. 3 through hole; With
Figure 20 shows a pair of laminated device with through hole of one embodiment of the invention.
[detailed Description Of The Invention]
Fig. 2 (a) is the structural representation of the through hole of the embodiment of the invention to (d).Through hole extends through a substrate.Substrate can be an electronic device or a mechanical devices.For example, device can be a memory chip, a processor or a MEMs device, but the present invention is not limited to these examples.Substrate comprises silicon usually.
Through hole extends through substrate to an opposed second surface 12 from first surface 11.Through hole is the I type normally.It comprises a metal level, has through electroplating integrally formed first 84,86, second portion 82 and third part 88.Second portion 82 extensions cover substrate first surface 11 tops.First 84,86 extends through substrate, and third part 88 extends in substrate second surface top.Because parts of the whole formation of three parts of through hole, this can provide the mechanical integrity of structure.Because the plating of through hole partly is whole together formation; They have grain size (grain size) much at one, this and Fig. 1 inverted configuration, and wherein T type through hole 84 is not that integral body forms as one with pad 40; Therefore in Fig. 1; Although pad 40 is to be manufactured from the same material with through hole 84, they are not whole formation, and pad has different internal structures and grain size with through hole 84.Comparatively speaking, the structure in Fig. 1 (g) is firm inadequately, because pad 40 possibly separate from through hole 84.
In Fig. 2 (a)-(d) and Fig. 3, " the I type " of through hole makes through hole tightly be connected to substrate and pad.Because second and third part of through hole are on the opposing face of substrate, and integrally are formed together with through hole first, the mechanical integrity of structure is able to strengthen.
Three parts of all of through hole are metal levels, and it is copper normally, because the copper cost is low and have a good electrical conductivity.But the present invention is not subject to copper, can use any suitable metal.For example, gold and tungsten are possible subs, or other it will be apparent to those skilled in the art that sub.
The first 84,86 of through hole extends through device to second surface 12 from first surface 11.The first of through hole comprises two parts.First parts, 84 to the second parts 86 are wideer.Wideer first parts that mean have bigger diameter or bigger cross-sectional area (on the direction perpendicular to the vertical length of the through hole that extends to second surface 12 from first surface 11).Width on Fig. 2 (a) direction from left to right, can see between two parts size relatively.First parts 84 extend through the non-active region 20 of device, and second parts 86 mainly extend through the active region 30 of device.The active region can comprise a pad.Because the cross-sectional area of second parts 86 that extends through the active region can minimize the infringement to active region 30 so relatively less than the cross-sectional area of first parts 84.
In first and second parts one of them or two can be tapers.Preferably, first parts 84 are tapers, and it compares near the end of active region 30 wideer (a bigger cross-sectional area is arranged) at the end near first surface 11.Preferably, second parts 86 are tapers, and it compares near the end of non-active region 20 narrower (littler cross-sectional area) at the end near second surface 12.
In Fig. 2 (d) and Fig. 3, as stated, first parts 84 and second parts 86 are tapers.This taper has two main advantages in manufacturing process.First advantage is that the bottom (near the parts on surface 12) of through hole when electroplating can be filled more quickly, because required amount of metal still less.This helps bottom-up electroplating technology.Inclined via-hole sidewall in the bigger opening that second advantage is junction between activity and non-active layer and the zone 30, uniformity that can enhanced sputtering film metal 120.
This taper is optional, and has other structure, wherein neither one or only have to be taper in first and second parts.With reference to Fig. 2 (a) to 2 (c).In Fig. 2 (a), two parts are not tapers.In Fig. 2 (b), second parts 86 are tapers.In Fig. 2 (c), first parts 84 are tapers.
Preferably, through hole comprises an electroplated metal layer, and it is around a polymer filler.This metal-polymer-metal structure helps to compensate the thermal coefficient of expansion of substrate non-active region 20 (being formed by silicon usually) and electroplated metal layer (being formed by copper usually).Usually, the thermal coefficient of expansion of plated metal is more a lot of greatly than the thermal coefficient of expansion of non-active region 20.Simple filler helps to reduce the problem that is caused by thermal expansion coefficient difference, at first through reducing the number of electrodeposited coating, secondly through having self the middle coefficient of thermal expansion.In addition, packing layer has certain degree of resilience.Therefore, if because variations in temperature electrodeposited coating when expanding, this expansion can be able to adjusting through " extrusion " packing layer.Like this, possibly cause device non-active layer and active layer to break or the additional stress damaged can be minimized or avoid.
Fig. 3 shows the detailed structure sketch map of a through hole of the present invention in detail.Through hole extends through a device substrate to second surface 12 from first surface 11.Device comprises a nonactive silicon layer 20 and an active layer 30.Active layer 30 comprises a bonding welding pad 40 and the Si oxide separator 34 between bonding welding pad 40 and non-active layer 20.A plurality of traces, conductive path and other structure embed in it, and extend through separator 34.In said example, these traces comprise dielectric wire 32, polysilicon lines 36 and M4 line 38.A plurality of structures 39 are outstanding from pad 40.These different structures in active layer can be used for from other part of the pad transmission signal of telecommunication to a logic gates or device.This structure can form an ESD (static discharge) protection structure.
Through hole comprises first parts of a broad, and it extends through non-active layer, and second narrower parts, and it extends through active layer.Because second parts are narrower, it can cause damage to the various structures in the active layer hardly.
Each layer of through hole will be described now from outside to inside.Through hole has an external polymer layer 100, barrier layer 110, splash-proofing sputtering metal (like copper) 120, platings of layer (like copper) layer 84 an and inner polymeric layer 140.Each layer all has first parts and the second narrower parts that extend through the active region of device of the non-active region that extends through device.In said example, first and second parts are tapers, but this is optional, like Fig. 2 (a) shown in (c), can be non-taper or only part be taper.
Through hole is the I type normally, and as stated, electrodeposited coating has first 84,86, second portion 82 and third part 88.These parts are integrally formed.The upper surface 11 of device is capped parts 95, and it comprises a barrier layer 95a, splash-proofing sputtering metal layer 95b, electrodeposited coating 95c and scolder 95d.
Preferably, second parts of through hole 86 firsts comprise single " pillar ", and it extends through the active region.Shown in Fig. 3 and Fig. 4 (a), Fig. 4 (a) is a cross section along Fig. 3 line A-A.For the ease of describing, cross section only shows the plating part and the active region 30 of through hole 86.Shown in Fig. 4 (a), preferably, through hole has a circular cross section.But, also have difform cross section, like Fig. 4 (c) or (d).In addition, also have a plurality of " pillars " and extend through the active region downwards, like the 86a of Fig. 4 (b) to shown in the 86d.
A kind of method that forms through hole will be described now.
Fig. 5 is presented at through hole and forms electronic device wafer before.Described same parts before it comprises, and use identical reference code.In said example, this device is a memory wafer, but this method also can be applied to processor, other electronic device and micro mechanical device.
In Fig. 6 and 7, through hole forms with two steps.At first step, as shown in Figure 6, through a kind of engraving method such as RIE (reactive ion etch), remove a part of non-active layer.Only need an etching process.Preferably, through hole is taper, and (near first surface 11) is wideer at the top, although this is optional.At Fig. 7, form the second portion of through hole through laser drill.Promptly holed in the active region through laser.The size of the second portion of through hole is to be confirmed by the size of the laser beam adjusted of boring.As a result, through hole (comprising 60a of first and second portion 60b) extends through device to second surface 12 from first surface 11.Photoresist 101 is added to the surface of the second surface 12 of device with protection bonding welding pad 40.
In the step of Fig. 8, an insulating barrier 100 is deposited on the madial wall of through hole.Insulating barrier can comprise a kind of polymeric material.In Fig. 9, comprise that the thin metal layer of barrier layer 110 and sputtering layer 120 is deposited over through hole inside.In Figure 10, add electrodeposited coating again.Use a kind of the end of from and on electroplating technology.Usually, " end of from and on " electroplate the deposition that is meant at the plated metal of via bottoms (near surface 12) will be faster than the top of through hole.Therefore, at first by the plated metal sealing, and after electroplating, can remain opening near surface 12 part (active region) near the part on surface 11.With other electro-plating method as wait tropism (conformal) and electroplate or from top to bottom electro-plating method compare, go up technology the end of from and have following advantage, promptly unlikely form the space in the through hole.In addition, in this example, the top do not need special chemical material induce the end of from and on plating or suppress to electroplate, the second portion 60b of through hole is narrower than first 60a, adopt naturally the end of from and on electroplating technology because " end " is partially filled more rapid.Electroplate to form an electrodeposited coating, it is the I type normally, comprises integrally formed first parts 84,86, second parts 82 and the 3rd parts 88.Second parts extend first surface 11, the first parts that cover device and extend through device, and the 3rd parts extend the second surface 12 that covers device.
In Figure 11, add a kind of filler, form " inside " polymeric layer 140.Thereby through hole has metal-polymer-metal structure, because inner polymeric layer is centered on by electroplated metal layer.
In Figure 12, barrier layer 95a and splash-proofing sputtering metal layer 95b are added on the first surface 11.In Figure 13, one deck photoresist 102 is rotated and is coated to first and second surfaces 11,12.In Figure 14, another electrodeposited coating 95c is added on the top of splash-proofing sputtering metal layer 95b.In Figure 15, scolder 95d is added on the top of electrodeposited coating 95c.In Figure 16, remove photoresist from first surface 11.In Figure 17, the unwanted part of top thin metal layer (to the side of through hole) is etched.In Figure 18, remove photoresist from second surface 12.In Figure 19, on the top of first surface 11, make scolder be filled in thin metal layer 95a-c around.
Therefore, device 20,30 has a through hole (TSV) that extends through it.The 3rd parts 88 of first electrodeposited coating and another electrodeposited coating 95c of through hole can be used as and electrically contact, and are used to connect this device and at device 20, another device above or below in the of 30.Usually scolder 95d will be applied to another electrodeposited coating, and scolder 250 also can be applied to the 3rd parts 88, be electrically connected with convenient.Figure 20 shows two laminated devices.
First device has a non-active layer 200a and an active layer 200b.Second device has a non-active layer 300a and an active layer 300b.First through hole 210 extends through the left side of first device, and connects second through hole 220, and it extends through the left side of second device.Third through-hole 230 extends through the right (laterally with first through hole 210 separately) of first device.Third through-hole 230 connects fourth hole 240, and it extends through the right of second device.
Although the stacked arrangement of Figure 20 only has two devices, more device stack can be arranged at its top.In addition, although two devices shown in Figure 20 have the through hole of Fig. 3 embodiment characteristic, this is dispensable.Through hole can have other embodiment or its combined feature.In addition, be preferred although two devices have one or more through holes of the present invention, one of them device has the through hole of prior art type, does not perhaps have through hole at all, also is possible, but only has ammeter face characteristic to be used to be connected to the through hole of first device.
Accompanying drawing and said method and device only are preferred embodiments, should not be counted as restriction the present invention.Modification and equivalent to described special structure, material and method will be apparent to those skilled in the art, and belong in the scope of the invention by the accompanying claims definition.

Claims (20)

1. electronics or micro mechanical device; First and second surface and through holes are arranged; This through hole extends through this device to second surface from first surface; This through hole comprises first, second and third part, and first extends to second surface from first surface, and second portion extends a part of first surface that covers this device; Third part extend to cover a part of second surface of this device, said first, second be electrodeposited coating with third part through electroplating technology integrally formed through hole together.
2. device according to claim 1, wherein another electrodeposited coating is formed on the first surface top of this device.
3. device according to claim 2 wherein provides a barrier layer between said first electrodeposited coating and said another electrodeposited coating.
4. device according to claim 1, wherein the first of through hole comprises first parts and second parts, the cross-sectional area of first parts is bigger than the cross-sectional area of second parts.
5. device according to claim 4, wherein first parts are tapers.
6. device according to claim 4, wherein second parts are tapers.
7. device according to claim 1, wherein through hole comprises the polymer filler that is centered on by electroplated metal layer.
8. device according to claim 1, wherein this device is layered on the top or the below of second device or substrate, and is electrically connected to second device through through hole.
9. method that forms through hole, this through hole extends through an electronics or micro mechanical device, and this device has first surface and second surface, and this method comprises: form a through hole, this through hole extends through this device to second surface from first surface; Electroplate to add an integrally formed together metal level, it extends through said through hole to said second surface from said first surface; Said integrally formed together metal level comprises a part of extending the said first surface of this device portions of covering and a part of extending the said second surface of this device portions of covering.
10. method according to claim 9 comprises and adds a polymeric layer in metal level, is centered on by metal level.
11. method according to claim 9, wherein electroplate be through one the end of from and on technology carry out, wherein sealed sooner than part by plated metal near first surface near the part of second surface.
12. method according to claim 9, wherein this method also comprise the said device of lamination second top device or below step, make that said device and said second device are electrically connected through through hole.
13. electronics or micro mechanical device; First and second surface and through holes are arranged, and this through hole extends through this device to second surface from first surface, and this through hole comprises first, second and third part; First extends to second surface from first surface; Wherein this device has a non-active layer and an active layer, and wherein first parts of first extend through non-active layer, and second parts of first extend through active layer; The width of first parts is wideer than the width of second parts; Second portion extend to cover a part of first surface of this device, and third part is extended a part of second surface that covers this device, said first, second be electrodeposition of metals with third part through electroplating technology integrally formed through hole together.
14. device according to claim 13, wherein through hole comprises a polymeric layer that is centered on by electrodeposition of metals, and said polymer and electrodeposited coating all extend through the activity and the non-active layer of this device.
15. a method that forms through hole, this through hole extend through an electronics or micro mechanical device, this device has first surface and second surface, and this method comprises: through the first of etching formation through hole, form the second portion of through hole through laser drill; This through hole extends through this device to second surface from first surface; Electroplate to add an integrally formed together metal level, it extends through said through hole to said second surface from said first surface; Said integrally formed together metal level comprises a part of extending the said first surface of this device portions of covering and a part of extending the said second surface of this device portions of covering.
16. according to the method for claim 15, wherein the second portion of through hole extends through the active region of part at least of device.
17. according to the method for claim 16, wherein the active region of this device comprises a bonding welding pad.
18. according to the method for claim 15, wherein the width of the second portion of through hole is littler than the width of the first of through hole.
19., also comprise step according to the method for claim 15: electroplate with fill or a partially filled conductive metal layer in through hole.
20. the method according to claim 19 also comprises: add a polymeric layer that is centered on by electroplated metal layer.
CN201010222721.9A 2010-06-29 2010-06-29 Through-hole, through-hole forming method and through-hole filling method Active CN101916754B (en)

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CN201010222721.9A CN101916754B (en) 2010-06-29 2010-06-29 Through-hole, through-hole forming method and through-hole filling method

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CN201010222721.9A CN101916754B (en) 2010-06-29 2010-06-29 Through-hole, through-hole forming method and through-hole filling method

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CN101916754A CN101916754A (en) 2010-12-15
CN101916754B true CN101916754B (en) 2012-08-29

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9278845B2 (en) 2010-09-18 2016-03-08 Fairchild Semiconductor Corporation MEMS multi-axis gyroscope Z-axis electrode structure
EP2616771B8 (en) 2010-09-18 2018-12-19 Fairchild Semiconductor Corporation Micromachined monolithic 6-axis inertial sensor
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CN103221332B (en) 2010-09-18 2015-11-25 快捷半导体公司 Reduce the encapsulation of the stress on MEMS
DE112011103124T5 (en) 2010-09-18 2013-12-19 Fairchild Semiconductor Corporation Bearing for reducing quadrature for resonant micromechanical devices
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US10065851B2 (en) 2010-09-20 2018-09-04 Fairchild Semiconductor Corporation Microelectromechanical pressure sensor including reference capacitor
US9488693B2 (en) 2012-04-04 2016-11-08 Fairchild Semiconductor Corporation Self test of MEMS accelerometer with ASICS integrated capacitors
EP2647952B1 (en) 2012-04-05 2017-11-15 Fairchild Semiconductor Corporation Mems device automatic-gain control loop for mechanical amplitude drive
EP2648334B1 (en) 2012-04-05 2020-06-10 Fairchild Semiconductor Corporation Mems device front-end charge amplifier
EP2647955B8 (en) 2012-04-05 2018-12-19 Fairchild Semiconductor Corporation MEMS device quadrature phase shift cancellation
US9625272B2 (en) 2012-04-12 2017-04-18 Fairchild Semiconductor Corporation MEMS quadrature cancellation and signal demodulation
DE102013014881B4 (en) 2012-09-12 2023-05-04 Fairchild Semiconductor Corporation Enhanced silicon via with multi-material fill
CN115706080A (en) * 2021-08-05 2023-02-17 长鑫存储技术有限公司 Semiconductor structure and manufacturing method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6190493B1 (en) * 1995-07-05 2001-02-20 Hitachi, Ltd. Thin-film multilayer wiring board and production thereof
CN1716558A (en) * 2004-06-29 2006-01-04 新光电气工业株式会社 Through electrode and method for forming the same
JP2006295073A (en) * 2005-04-14 2006-10-26 Mitsubishi Electric Corp Semiconductor device and its manufacturing method
EP1920461A1 (en) * 2005-08-31 2008-05-14 Forschungsverbund Berlin e.V. Method for producing through-contacts in semi-conductor wafers
CN101276801A (en) * 2007-03-23 2008-10-01 国际商业机器公司 Wafer with through-wafer vias and manufacture method thereof
CN101553903A (en) * 2006-10-17 2009-10-07 丘费尔资产股份有限公司 Wafer via formation

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3034829B2 (en) * 1997-09-24 2000-04-17 新藤電子工業株式会社 Method for manufacturing double-sided tape carrier
US7674719B2 (en) * 2005-08-01 2010-03-09 Panasonic Corporation Via hole machining for microwave monolithic integrated circuits

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6190493B1 (en) * 1995-07-05 2001-02-20 Hitachi, Ltd. Thin-film multilayer wiring board and production thereof
CN1716558A (en) * 2004-06-29 2006-01-04 新光电气工业株式会社 Through electrode and method for forming the same
JP2006295073A (en) * 2005-04-14 2006-10-26 Mitsubishi Electric Corp Semiconductor device and its manufacturing method
EP1920461A1 (en) * 2005-08-31 2008-05-14 Forschungsverbund Berlin e.V. Method for producing through-contacts in semi-conductor wafers
CN101553903A (en) * 2006-10-17 2009-10-07 丘费尔资产股份有限公司 Wafer via formation
CN101276801A (en) * 2007-03-23 2008-10-01 国际商业机器公司 Wafer with through-wafer vias and manufacture method thereof

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